PDU combiner box sampling drive circuit based on bootstrap voltage boost

Abstract

This application proposes a bootstrap-based sampling drive circuit for a PDU combiner box. The circuit includes a MOSFET Q1, a bootstrap capacitor C1, an output capacitor C2, and diodes D1, D2, and D3. MOSFET Q1 is connected to the MCU to receive PWM control signals. MOSFET Q1 and diode D1 are connected in parallel to one side of the bootstrap capacitor C1, and the other side of C1 is connected to diode D3. Diode D3 is connected to the output capacitor C2 and the next-stage main switch NMOS transistor. When the MCU sends a PWM signal to turn off MOSFET Q1, the bootstrap capacitor C1 generates a displacement current due to voltage continuity requirements, releasing energy through diode D3 to the output capacitor C2 and the next-stage main switch NMOS transistor. By employing bootstrap technology, a higher drive voltage is generated using a single power supply, improving the circuit's reliability and stability.

Description

Technical Field

[0001] This application relates to the field of power electronics technology, and in particular to a PDU combiner box sampling drive circuit based on bootstrap voltage boost. Background Technology

[0002] As the requirements for drive circuits in electronic devices continue to increase, push-pull circuit schemes are widely used in level conversion and drive signal output. Push-pull driver chips (such as Infineon IR2104 and Microchip TC4420) have become a common solution for driving high-side power MOSFETs as core modules. These chips integrate complementary MOS pairs (PMOS and NMOS), support rail-to-rail output, and provide relatively stable drive signals, making them suitable for various high-efficiency circuit designs. Such circuits typically require dual power supplies: a high-side drive power supply (V_H, typically +12V) and a low-side drive power supply (V_L, typically -5V to -10V), which enables push-pull drive schemes to achieve effective level conversion under high-voltage environments.

[0003] Traditional push-pull drive circuits often employ isolated power supply networks to generate negative voltage. Common solutions include DC-DC isolation modules or charge pump circuits. Typical isolated power supply chips, such as TI's LM2662 or ADI's LT1054, are used to provide a stable negative voltage. Although push-pull drive schemes exhibit high performance in many applications, they still reveal significant drawbacks in certain scenarios, particularly in space-constrained, cost-sensitive, and low-power-consumption applications such as RV PDU combiner boxes.

[0004] First, the system cost is high. Based on a purchase quantity of 1000 units, the cost of a push-pull driver chip and its peripheral components is approximately 10 yuan, accounting for 15%-20% of the total BOM cost of the PDU circuit board. This is a significant burden for applications requiring low cost. Second, static power consumption is a serious problem. The static current of the push-pull chip and its negative voltage power supply leads to continuous energy consumption, further increasing system power consumption and affecting overall efficiency. Additionally, the push-pull driver circuit occupies a large PCB layout space and has a large number of components (≥12), making design difficult in space-constrained applications. Furthermore, the push-pull solution requires an additional negative voltage power supply, increasing the complexity and cost of power supply design. The industry has attempted alternatives such as integrated driver ICs, optocoupler-isolated drivers, and transformer-coupled drivers. However, these improvements have not fundamentally solved the shortcomings of the push-pull solution. Moreover, its poor frequency characteristics make it difficult to meet the requirements of high efficiency and space constraints. Utility Model Content

[0005] This application aims to address these problems in the prior art by proposing a bootstrap-based PDU combiner sampling drive circuit as a novel alternative to existing push-pull drive circuits. This circuit utilizes bootstrap technology, employing a single power supply and generating a higher drive voltage through the bootstrap circuit. This avoids the complexity and high static power consumption issues of dual power supplies in traditional push-pull circuits, enabling efficient current sampling and control within a smaller PCB space.

[0006] To achieve the above objectives, this application adopts the following technical solution: a PDU combiner sampling drive circuit based on bootstrap voltage boost, comprising: MOS transistor Q1, bootstrap capacitor C1, output capacitor C2, diode D1, diode D2 and diode D3;

[0007] The MOS transistor Q1 is connected to the MCU;

[0008] The MOSFET Q1 and diode D1 are connected in parallel and then connected to one side of the bootstrap capacitor C1; the other side of the bootstrap capacitor C1 is connected to diode D3.

[0009] The diode D3 is connected to the output capacitor C2 and the next-stage main switch NMOS, respectively.

[0010] Diode D2 is connected in parallel with diode D3;

[0011] When the MCU sends a PWM control wave to turn off the MOSFET Q1, the bootstrap capacitor C1 will generate a displacement current in order to maintain voltage continuity. This current will then release energy to the output capacitor C2 and the next-stage main switch NMOS through the diode D3.

[0012] Compared to traditional push-pull circuits, the bootstrap circuit used in this application effectively reduces quiescent current consumption, decreases continuous system power consumption, and improves system energy efficiency. Furthermore, the bootstrap circuit requires fewer components and less layout space than push-pull circuits, enabling current sampling and control functions within a limited space and adapting to more compact design requirements. The bootstrap circuit's simple structure reduces reliance on complex external protection circuits, improves circuit stability and anti-interference capabilities, and enhances system reliability.

[0013] Preferably, the gate of the MOSFET Q1 is connected to the MCU via resistor R1;

[0014] The source (S) terminal of the MOSFET Q1 is grounded;

[0015] The drain of the MOSFET Q1 is connected to the bootstrap capacitor C1 via resistor R5.

[0016] Preferably, the diode D1 is connected to the bootstrap capacitor C1 via resistor R3;

[0017] The resistors R3 and R4 are connected in parallel.

[0018] Preferably, the diode D1 is connected to the power supply VCC1;

[0019] The diode D2 is connected to the power supply VCC2;

[0020] The voltage value V output by diode D3 DVR VCC2 <V DVR <VCC1+VCC2。

[0021] Preferably, the bootstrap capacitor C1 is a 1206 surface mount capacitor, with a selected value of 2.2uF.

[0022] Preferably, the output capacitor C2 is a 0603 surface mount capacitor, with a selection of 100nF.

[0023] Preferably, the resistors R3, R4, and R5 are 750Ω, 750Ω, and 10Ω, respectively.

[0024] Preferably, the resistor R1 is 1kΩ.

[0025] Preferably, a resistor R2 is connected between the gate (G) and source (S) of the MOS transistor Q1;

[0026] Preferably, the resistor R2 is 20kΩ.

[0027] It should be noted that the voltage value V DVR The duty cycle is positively correlated with the PWM wave's duty cycle. That is, the PWM wave's duty cycle directly affects the charging and discharging process of the bootstrap capacitor C1, thus determining the voltage output characteristics. Specifically, the PWM wave generated by the MCU controls the switching action of the MOSFET Q1. Assuming the PWM wave period is T and the high-level duration is Ton, the duty cycle D is:

[0028]

[0029] The larger the duty cycle, the longer the turn-on time of MOSFET Q1, and the greater the current passing through MOSFET Q1.

[0030] Compared with the prior art, this application has the following advantages:

[0031] The sampling drive circuit of the PDU busbar box based on bootstrap boost in this application uses the bootstrap boost technology to generate the required higher drive voltage through single power supply. It avoids the complexity common in dual-power systems. By generating a high drive voltage through the bootstrap circuit, it reduces the design complexity and improves the reliability and stability of the circuit. The bootstrap boost circuit requires fewer components, reducing the complex component requirements in traditional push-pull circuits. The circuit design occupies less PCB space, making the circuit design more compact and suitable for high-density integration and space-constrained application scenarios. This application generates a high voltage through the bootstrap boost technology to ensure that it can effectively drive the output capacitor C2 and the next-stage main switch transistor NMOS, achieving the purpose of precise control, enabling the system to precisely control the current, and at the same time improving the sampling accuracy. BRIEF DESCRIPTION OF THE DRAWINGS

[0032] Figure 1 It is the circuit diagram of the sampling drive of the PDU busbar box based on bootstrap boost in the embodiment. DETAILED DESCRIPTION OF THE EMBODIMENTS

[0033] Next, the technical solutions in the embodiments of this application will be clearly and completely described in conjunction with the drawings in the embodiments of this application. Obviously, the described embodiments are only a part of the embodiments of this application, rather than all the embodiments.

[0034] Referring to Figure 1 , this application proposes a sampling drive circuit of a PDU busbar box based on bootstrap boost, including: MOS transistor Q1, bootstrap capacitor C1, output capacitor C2, diode D1, diode D2, and diode D3;

[0035] Among them, the MOS transistor Q1 is a key switching element in the circuit, and the MOS transistor Q1 is connected to the MCU; the MCU controls the on and off of the MOS transistor Q1 through a PWM (pulse width modulation) signal, thereby controlling the working state of the circuit. When the MCU issues a PWM control wave, the MOS transistor Q1 changes the current flow direction under the action of the switch, so as to realize the adjustment and control of the circuit. Generally, for the main switch transistor, it conducts when the gate voltage V_DVR = Vgs > Vth (threshold voltage), and turns off when V_DVR = Vgs < Vth.

[0036] The MOSFET Q1 and diode D1 are connected in parallel to one side of the bootstrap capacitor C1; the other side of the bootstrap capacitor C1 is connected to diode D3. This parallel connection of MOSFET Q1 and diode D1 helps ensure that when MOSFET Q1 is turned on, current flows through D1 to the bootstrap capacitor C1 for energy storage. Diode D1 acts as a protector, preventing backflow and ensuring that the bootstrap capacitor C1 always maintains the correct charging direction and voltage. The main function of the bootstrap capacitor C1 is to store energy. Under normal operating conditions, when MOSFET Q1 is turned on, the bootstrap capacitor C1 is charged. When MOSFET Q1 is turned off, to maintain voltage continuity, the bootstrap capacitor C1 generates a displacement current.

[0037] The diode D3 is connected to the output capacitor C2 and the next-stage main switch NMOS, respectively. That is, when the displacement current generated by the bootstrap capacitor C1 is released, D3 allows the current to flow to the output capacitor C2 and the next-stage main switch NMOS, thereby providing energy to the next stage circuit and ensuring stable energy transfer.

[0038] Among them, the MOSFET Q1 and the next-stage main switch NMOS can be selected as LBSS123LT1G.

[0039] The diodes D2 and D3 are connected in parallel, further enhancing the circuit's energy management and current control capabilities. When the circuit needs to release energy, D2 and D3 work together to ensure the stability of the current path. The presence of diode D2 helps reduce the current load on diode D3, thereby improving the overall circuit efficiency and reducing energy loss.

[0040] When the MCU sends a PWM control wave to turn off the MOSFET Q1, the bootstrap capacitor C1 will generate a displacement current in order to maintain voltage continuity. This current is released through diode D3 to the output capacitor C2 and the next-stage main switch NMOS, ensuring that each circuit part in the system can obtain sufficient drive voltage, thereby achieving efficient current sampling and control.

[0041] This application fully utilizes bootstrap voltage boosting technology to generate a high drive voltage through a single power supply. This avoids the complexity of dual power supply in traditional push-pull circuits and reduces the system's static power consumption. By using a bootstrap capacitor and diode working in tandem, not only is stable voltage control achieved, but the complexity of circuit design is also effectively reduced, the number of required components is decreased, costs are lowered, and PCB space requirements are reduced.

[0042] Preferably, the gate (G) of the MOSFET Q1 is connected to the MCU via a resistor R1; wherein the function of the resistor R1 is to provide current limiting, prevent excessive current from entering the gate, and protect the MCU output port.

[0043] The source (S) terminal of the MOSFET Q1 is grounded. Grounding provides a reference voltage source so that the voltage difference (V_DS) between the drain and source of the MOSFET Q1 can affect its turn-on and turn-off. Grounding the source also ensures the current flow path, thereby enabling the circuit to function properly.

[0044] The drain (D) of the MOSFET Q1 is connected to the bootstrap capacitor C1 via resistor R5. This allows current to flow through resistor R5 to the bootstrap capacitor C1 when the MOSFET Q1 is off, charging the bootstrap capacitor. When the MOSFET Q1 is on, the energy stored in capacitor C1 is released to the downstream circuit through a diode.

[0045] Preferably, the diode D1 is connected to the bootstrap capacitor C1 via a resistor R3; wherein, the function of the diode D1 is to prevent backflow of current, ensuring that energy flows only to the bootstrap capacitor C1. Connecting the diode D1 to the bootstrap capacitor C1 via the resistor R3 helps control the current flow path and limits the current through the resistor R3, preventing excessive current from directly entering the capacitor.

[0046] The resistors R3 and R4 are connected in parallel. The current can be controlled by the resistor R3 to ensure that the bootstrap capacitor C1 is not charged too quickly, thus avoiding excessive current flowing through the bootstrap capacitor and causing system instability.

[0047] Preferably, the diode D1 is connected to the power supply VCC1, and the power supply VCC1 provides the necessary voltage to ensure that the diode D1 can work.

[0048] Diode D2 is connected to power supply VCC2 to allow it to transfer energy or provide protection when needed by the circuit. Similar to D1, diode D2 also acts as a unidirectional conductor in the circuit, ensuring that current flows along the correct path. Power supply VCC2 is used to drive the next stage of the circuit or different circuit sections, enabling the circuit to operate independently from multiple voltage sources.

[0049] In this topology, power supply VCC1 and power supply VCC2 can be set to any value as needed. In this module, according to the requirements of the PDU combiner box, both are set to 12V. Preferably, they can be the same voltage.

[0050] The voltage value V output by diode D3 DVR VCC2 <V DVR <VCC1+VCC2。

[0051] Preferably, the bootstrap capacitor C1 is a 1206 surface mount capacitor, with a selected value of 2.2uF. Here, 1206 is the package size of the surface mount capacitor, indicating a size of 3.2mm x 1.6mm. Choosing a capacitance value of 2.2uF provides sufficient energy reserve to ensure stable switching of the MOSFET, especially during high-frequency switching.

[0052] Preferably, the output capacitor C2 is a 0603 surface mount capacitor, with a capacitance of 100nF. 0603 is another common surface mount capacitor package size, indicating a capacitor size of 1.6mm x 0.8mm. A 100nF capacitance is chosen because it effectively filters high-frequency noise while maintaining a small size, making it suitable for high-frequency circuit applications, especially for signal decoupling in electronic devices.

[0053] Preferably, the resistors R3, R4, and R5 are 750Ω, 750Ω, and 10Ω, respectively.

[0054] Preferably, the resistor R1 is 1kΩ.

[0055] Preferably, a resistor R2 is connected between the gate (G) and source (S) of the MOS transistor Q1;

[0056] Preferably, the resistor R2 is 20kΩ.

[0057] It should be noted that the voltage value V DVR The duty cycle is positively correlated with the PWM wave's duty cycle. That is, the PWM wave's duty cycle directly affects the charging and discharging process of the bootstrap capacitor C1, thus determining the voltage output characteristics. Specifically, the PWM wave generated by the MCU controls the switching action of the MOSFET Q1. Assuming the PWM wave period is T and the high-level duration is Ton, the duty cycle D is:

[0058]

[0059] The larger the duty cycle, the longer the turn-on time of MOSFET Q1, and the greater the current passing through MOSFET Q1.

[0060] To further clarify the practical significance and effect of the above-mentioned bootstrap-based PDU combiner box sampling drive circuit, we will analyze it from the perspective of Kirchhoff's laws:

[0061] During the charging phase:

[0062] First, assume that the bootstrap capacitor C1 is off, and ignore the output capacitor C2 and the next stage main switch NMOS.

[0063] When the PWM level is high, MOSFET Q1 is turned on and diode D1 is forward-biased. Then:

[0064]

[0065] The voltage drop V of diode D1 D1 Approximately 0.85V, VCC +12V Given a voltage of 12V, resistors R3, R4, and R5 are rated at 750Ω, 750Ω, and 10Ω respectively. Calculations show that V1 is approximately 0.3V.

[0066] Diode D2 is forward conducting:

[0067] V2 = VCC - V D2

[0068] The voltage drop V of diode D2 D2 Approximately 0.85V, VCC is 12V, so V2 is calculated to be 11.15V. Now, considering the bootstrap capacitor C1, the voltage across it is:

[0069] V C1 =V2-V1

[0070] Get V C1 Approximately 10.85V

[0071] During the discharge phase:

[0072] When the PWM signal is high, MOSFET Q1 is cut off, diode D1 is not conducting, and the voltage at V1 is close to VCC. +12V Let V1 = 12V

[0073] Since the voltage across the bootstrap capacitor C1 cannot change abruptly, V C1 =10.85V, meaning the voltage difference between V2 and V1 cannot change abruptly, therefore:

[0074] V2 = V1 + V C1

[0075] The instantaneous voltage of V2 is calculated to be 22.85V.

[0076] When diode D3 is turned on, its voltage drop is 0.85V. At this time,

[0077] V DVR =V2-V D3

[0078] Therefore, we obtain a driving voltage V with an instantaneous value of 22V. DVR At this time, V DVR When the voltage is greater than VCC, diode D2 is reverse-biased and cut off, isolating the high voltage.

[0079] Because of the presence of diode D2, V2 > VCC - V D2 Therefore, V is guaranteed DVRThe voltage is always between 11.85V and 22V, i.e., under ideal conditions without considering the voltage drop across the transistor:

[0080] VCC <V DVR <VCC+VCC +12V

[0081] To further clarify the practical significance and effect of the bootstrap-based PDU combiner box sampling drive circuit, an analysis from the perspective of energy flow is provided:

[0082] During the reset / charge phase (Q1 ON), the power supply VCC_+12V charges the bootstrap capacitor C1 through diode D1. VCC_+12V and bootstrap capacitor C1 simultaneously provide energy for the drive.

[0083] During the set / pump-up drive phase (Q1 OFF), since the voltage V_c1 across the bootstrap capacitor C1 remains essentially constant, and the diode D2 is cut off, isolating the high voltage of V2 to VCC, the bootstrap capacitor C1 discharges, forcing the voltage at point V2 to rise, thus providing energy for the drive.

[0084] In summary, the bootstrap capacitor C1 acts as a charge pump. Since the capacitor voltage cannot change abruptly, when the charging and discharging rate is fast enough, charge will continuously flow from the bootstrap capacitor C1 to the output capacitor C2 (load terminal), ultimately resulting in a voltage higher than VCC at the right end. DVR The specific value is related to the duty cycle of the PWM wave.

[0085] The above description is merely a preferred embodiment of this application, but the scope of protection of this application is not limited thereto. Any equivalent substitutions or modifications made by those skilled in the art within the scope of the technology disclosed in this application, based on the technical solution and inventive concept of this application, should be included within the scope of protection of this application.

Claims

1. A bootstrap boost-based PDU junction box sampling drive circuit, characterized in that, include: MOSFET Q1, bootstrap capacitor C1, output capacitor C2, diode D1, diode D2, and diode D3; in, The MOSFET Q1 is connected to the MCU; The MOSFET Q1 and diode D1 are connected in parallel and then connected to one side of the bootstrap capacitor C1; the other side of the bootstrap capacitor C1 is connected to diode D3. The diode D3 is connected to the output capacitor C2 and the next-stage main switch NMOS, respectively. Diode D2 is connected in parallel with diode D3; When the MCU sends a PWM control wave to turn off the MOSFET Q1, the bootstrap capacitor C1 will generate a displacement current in order to maintain voltage continuity. This current will then release energy to the output capacitor C2 and the next-stage main switch NMOS through the diode D3.

2. The PDU combiner sampling drive circuit based on bootstrap voltage boosting according to claim 1, characterized in that, The gate of the MOSFET Q1 is connected to the MCU through resistor R1; The source (S) terminal of the MOSFET Q1 is grounded; The drain of the MOSFET Q1 is connected to the bootstrap capacitor C1 via resistor R5.

3. The PDU combiner sampling drive circuit based on bootstrap voltage boosting according to claim 2, characterized in that, The diode D1 is connected to the bootstrap capacitor C1 through resistor R3; The resistors R3 and R4 are connected in parallel.

4. The PDU combiner sampling drive circuit based on bootstrap voltage boosting according to claim 3, characterized in that, The diode D1 is connected to the power supply VCC1; The diode D2 is connected to the power supply VCC2; The voltage value V outputted by the diode D3 DVR VCC2 DVR VCC1+VCC2.

5. The PDU combiner sampling drive circuit based on bootstrap voltage boosting according to claim 4, characterized in that, The bootstrap capacitor C1 is a 1206 surface mount capacitor, with a selected value of 2.2uF.

6. The PDU combiner sampling drive circuit based on bootstrap voltage boosting according to claim 5, characterized in that, The output capacitor C2 is a 0603 surface mount capacitor, with a selected value of 100nF.

7. The PDU combiner sampling drive circuit based on bootstrap voltage boosting according to claim 6, characterized in that, The resistors R3, R4, and R5 are 750Ω, 750Ω, and 10Ω, respectively.

8. The PDU combiner sampling drive circuit based on bootstrap voltage boosting according to claim 7, characterized in that, The resistor R1 is 1kΩ.

9. A PDU combiner sampling drive circuit based on bootstrap voltage boosting according to claim 8, characterized in that, A resistor R2 is connected between the gate and source of the MOSFET Q1; The resistor R2 is 20kΩ.

10. A PDU combiner sampling drive circuit based on bootstrap voltage boosting according to claim 9, characterized in that, The voltage value V DVR And the duty cycle of the PWM wave is positively correlated.

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