A power factor correction circuit and a switching power supply
By adding a detection winding and detection device to the boost inductor, the switching transistor of the second power frequency rectifier circuit is controlled to turn off during a lightning strike, solving the problem of easy damage to the switching transistor in the prior art. This achieves a high-efficiency and reliable power factor correction circuit suitable for rectification and inverter applications.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Utility models(China)
- Current Assignee / Owner
- MORNSUN GUANGZHOU SCI & TECH
- Filing Date
- 2025-03-26
- Publication Date
- 2026-06-30
AI Technical Summary
Existing high-efficiency totem pole bridgeless power factor correction circuits have poor lightning strike resistance, which makes the switching transistors easy to be damaged. In addition, existing lightning protection circuits have the risk of inductor saturation and switching transistor breakdown, making it difficult to achieve both high efficiency and reliability.
By adding a detection winding and detection device to the boost inductor, and controlling the switching transistor of the second power frequency rectifier circuit to turn off for a fixed time during a lightning strike, the current spike flowing through the switching transistor is limited. Combined with the bidirectional rectifier totem bridgeless circuit structure, the lightning protection capability of the circuit is improved.
It effectively protects the switching transistor from being broken down by lightning current, improving the reliability and lightning protection performance of the circuit, while maintaining high efficiency. It is suitable for power factor correction circuits in rectification and inversion.
Smart Images

Figure CN224438820U_ABST
Abstract
Description
Technical Field
[0001] This invention relates to the field of power factor correction technology, and particularly to a power factor correction circuit and a switching power supply. Background Technology
[0002] Commonly used high-efficiency totem-pole bridgeless power factor correction circuits employ power frequency diode rectification technology, such as... Figure 1a As shown, diodes D3 and D4 are power frequency diodes, often employing critical control or continuous control modes. This scheme uses power frequency diodes D1, D2, D3, and D4 to form a clamping circuit, capable of promptly clamping voltage stress under various lightning strikes. Power frequency diodes also have high current handling capability and very high product reliability. However, their drawback is that they cannot invert. Furthermore, current ultra-high efficiency primary rectifier module technology requires a peak efficiency of approximately 98%. To further improve efficiency, active switching transistors are typically used to replace power frequency diodes for rectification. Bidirectional power supplies also require active switching transistors for power frequency rectification. Therefore, existing technologies have proposed... Figure 1b The scheme shown.
[0003] Taking the positive half-cycle of AC input as an example, Figure 1b The working principle of the scheme is as follows: MOSFET Q1L is the main transistor, and MOSFET Q1H is the freewheeling transistor; when the boost inductor L1 is energized: MOSFET Q1L is turned on and MOSFET Q1H is turned off, and the current flow of inductor L1 is: inductor L1 → MOSFET Q1L → MOSFET QT2 → AC source → inductor L1; when the boost inductor L1 is demagnetized: MOSFET Q1H is turned on and MOSFET Q1L is turned off, and the current flow of inductor L1 is: inductor L1 → MOSFET Q1H → bus capacitor C1 → MOSFET QT2 → AC source → inductor L1. Figure 1b While this solution can improve efficiency and achieve inverter functionality, the current surge protection capability of conventional active switching transistors is much lower than that of diodes. This leads to a decrease in lightning strike resistance and an increased likelihood of circuit failure. Taking the positive half-cycle of AC input as an example: if a lightning strike occurs during the positive half-cycle, the lightning current flows as follows: diode D1 → bus capacitor C1 → MOSFET QT2 → AC source. The lightning current is very large and will damage MOSFET QT2. If a lightning strike occurs during the negative half-cycle, the lightning current flows as follows: MOSFET QT2 → diode D2 → AC source. The lightning current is also very large and will damage MOSFET QT2.
[0004] A more traditional solution is to connect multiple low-resistance, high-current-capacity active switching transistors in parallel, but this is very expensive and has poor reliability. Another approach is to add a surge-protected inductor and a clamping diode at the input to limit peak current, but this can lead to the PFC inductor not being properly clamped during a lightning strike, causing it to withstand an extremely high voltage instantaneously and saturate, thus retaining certain inherent drawbacks.
[0005] Patent CN109067167A discloses a power factor correction surge protection circuit, such as... Figure 2 As shown (from the appendix to this patent) Figure 3 As can be seen from the accompanying drawings and the description in claim 2, "When lightning strikes, the input current is sampled to an abnormal current value, and all semiconductor power transistors of the first and second rectifier circuits are turned off," although the semiconductor power transistors of the first and second rectifier circuits are turned off, and the surge voltage is effectively suppressed by the inductor L2 to withstand the surge voltage, the voltage across the body diode of the first rectifier circuit cannot be clamped due to the inductor L2. Ultimately, there is a risk of saturation and breakdown of the power transistor Q1. Taking the positive half-cycle as an example, before the lightning strike signal, the voltage at power supply terminal A is positive and the voltage at power supply terminal B is negative. After the positive lightning surge arrives, there will be a large voltage difference between terminal A and the positive terminal of the bus capacitor C1. This voltage difference is also directly applied to the inductor L1 and the body diode of the power transistor Q1, resulting in a large peak current being generated in inductor L1. Furthermore, when the power supply is turned on, during the process of the output capacitor rising from 0V to the maximum value of the input voltage, there will be a huge current in inductors L1 and L2, which will also cause inductor L1 to saturate and power transistor Q1 to break down.
[0006] As analyzed above, the surge protection circuits currently used in bridgeless PFC circuits still have certain shortcomings. Utility Model Content
[0007] In view of this, the technical problem to be solved by this utility model is to provide a power factor correction circuit and a switching power supply, which can at least to some extent solve one of the defects of the prior art.
[0008] As a first aspect of this utility model, the technical solution of the power factor correction circuit embodiment is as follows:
[0009] A power factor correction circuit, comprising:
[0010] The first power frequency rectifier circuit, the second power frequency rectifier circuit, the first high frequency rectifier circuit, and the bus capacitor are all connected in parallel between the positive output terminal and the negative output terminal of the power factor correction circuit. The first power frequency rectifier circuit, the second power frequency rectifier circuit, and the first high frequency rectifier circuit all include a bridge arm formed by two switching transistors.
[0011] The boost inductor has its first end connected to the midpoint of the first power frequency rectifier circuit bridge arm and its second end connected to the midpoint of the first high frequency rectifier circuit bridge arm.
[0012] A lightning strike detection unit includes: a first inductor, a detection winding, and a detection device; one end of the primary winding of the first inductor is connected to a first terminal of the AC input power grid, and the other end is connected to the midpoint of the bridge arm of the first power frequency rectifier circuit; one end of the secondary winding of the first inductor is connected to a second terminal of the AC input power grid, and the other end is connected to the midpoint of the bridge arm of the second power frequency rectifier circuit; the detection winding is electrically coupled to the first inductor and connected to the detection device; the detection device is used to generate a surge protection signal when the voltage across the detection winding exceeds a set value.
[0013] The controller is used to control the switching transistor in the second power frequency rectifier circuit to turn off for a fixed time after receiving the surge protection signal.
[0014] Furthermore, the first inductor is a common-mode inductor or a differential-mode inductor.
[0015] Furthermore, the detection winding is a single winding, and the detection device includes: a fifth diode, a sixth diode, a seventh diode, an eighth diode, a first resistor, a second resistor, and a comparator; wherein, the anode of the fifth diode and the cathode of the sixth diode are connected to the first end of the detection winding, the anode of the seventh diode and the cathode of the eighth diode are connected to the second end of the detection winding, the cathode of the fifth diode and the cathode of the seventh diode are connected to the first end of the first resistor, the anodes of the sixth diode and the eighth diode and the second end of the second resistor are simultaneously connected to the ground terminal of the controller, the second end of the first resistor and the first end of the second resistor are connected to one input terminal of the comparator, the other input terminal of the comparator receives a reference voltage, and the output terminal of the comparator outputs the surge protection signal;
[0016] Alternatively, the detection winding may be a dual-winding winding. The detection device includes a ninth diode, a tenth diode, a third resistor, a fourth resistor, and a comparator. The first end of the first detection winding is connected to the anode of the ninth diode, and the second end of the second detection winding is connected to the anode of the tenth diode. The second end of the first detection winding, the first end of the second detection winding, and the second end of the fourth resistor are all connected to the ground terminal of the controller. The cathodes of the ninth and tenth diodes are connected to the first end of the third resistor. The second end of the third resistor and the first end of the fourth resistor are connected to one input terminal of the comparator. The other input terminal of the comparator receives a reference voltage, and the output terminal of the comparator outputs the surge protection signal.
[0017] Preferably, the first high-frequency rectifier circuit includes a bridge arm formed by two active semiconductor power transistors.
[0018] Preferably, the first power frequency rectifier circuit includes a bridge arm formed by two passive semiconductor power transistors connected in series in the same direction.
[0019] Preferably, the second power frequency rectifier circuit includes a bridge arm formed by two active semiconductor power transistors, so that the power factor correction circuit is a bidirectional rectifier totem bridgeless circuit.
[0020] Furthermore, the power factor correction circuit includes N boost inductors and N first high-frequency rectifier circuits, where N is a natural number greater than or equal to 2. The first terminal of each boost inductor is simultaneously connected to the first input terminal of the power factor correction circuit and the midpoint of the bridge arm of the first power frequency rectifier circuit, and the second terminal is connected to the midpoint of the bridge arm of one of the N first high-frequency rectifier circuits.
[0021] As a second aspect of this utility model, the technical solution of the provided switching power supply embodiment is as follows:
[0022] A switching power supply, wherein: it includes the power factor correction circuit described in any of the first aspects above.
[0023] The working principle of this utility model will be described in detail with reference to specific embodiments, and will not be repeated here. The beneficial effects of this utility model are as follows:
[0024] 1. In the power factor correction circuit of this utility model embodiment, by adding a detection winding and detection device to the first inductor, the controller is triggered to quickly turn off the switching tube in the second power frequency rectifier circuit for a fixed time when a surge occurs, thereby limiting the current spike flowing through the switching tube in the second power frequency rectifier circuit. This protective measure of turning off the rectifier tube by adding detection can make the switching power supply more reliable.
[0025] 2. The power factor correction circuit of this utility model embodiment selects a second power frequency rectifier circuit that includes a bridge arm formed by two switching transistors and the bridge arm formed by these two switching transistors is controllable, thereby making the power factor correction circuit a bidirectional rectifier bridgeless circuit. It can be applied to both rectifier power factor correction circuits and reversible power factor correction circuits, making it more widely applicable. Attached Figure Description
[0026] Figure 1a The circuit schematic of a bridgeless power factor correction circuit for existing power frequency diode rectification;
[0027] Figure 1b The circuit schematic of a bridgeless power factor correction circuit for existing power frequency active switching transistor rectification;
[0028] Figure 2 The circuit schematic of an existing power factor correction lightning strike detection unit;
[0029] Figure 3 This is a schematic diagram of the power factor correction circuit of this utility model;
[0030] Figure 4 for Figure 3 A schematic diagram of the first specific embodiment of the detection device in the diagram;
[0031] Figure 5 for Figure 3 A schematic diagram of a second specific embodiment of the detection device in the diagram;
[0032] Figure 6 This is a schematic diagram of the two-phase power factor correction circuit of this utility model;
[0033] Figure 7 This is a schematic diagram of the multiphase power factor correction circuit of this utility model. Detailed Implementation
[0034] To make the above-mentioned objectives, features, and advantages of this utility model more apparent and understandable, the specific embodiments of this utility model will be described in detail below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of this utility model, not all embodiments. Based on the embodiments in this application, all other embodiments obtained by those skilled in the art without creative effort should fall within the scope of protection of this application.
[0035] It should be noted that the terms "comprising" and "having" and any variations thereof described in the specification and claims of this application are intended to cover non-exclusive inclusion. For example, including a series of components, unit circuits or control timings is not necessarily limited to those components, unit circuits or control timings that are explicitly listed, but may include components, unit circuits or control timings that are not explicitly listed or that are inherent to these circuits.
[0036] Furthermore, unless otherwise specified, the embodiments and features described in this application may be combined with each other.
[0037] It should be understood that, in the specification and claims, when an element is described as being "connected" to another element, that element may be "directly connected" to that other element or "connected" to that other element through a third element; when a step is described as being connected to another step, that step may be connected directly to that other step or connected to that other step through a third step.
[0038] Figure 3 This is a schematic diagram of the power factor correction circuit of this utility model. The power factor correction circuit includes: a first power frequency rectifier circuit, a second power frequency rectifier circuit, a first high frequency rectifier circuit, and a bus capacitor C1, all connected in parallel between the positive and negative output terminals of the power factor correction circuit. The first power frequency rectifier circuit, the second power frequency rectifier circuit, and the first high frequency rectifier circuit each include a bridge arm formed by two switching transistors; a boost inductor L1, with its first end connected to the midpoint of the bridge arm of the first power frequency rectifier circuit and its second end connected to the midpoint of the bridge arm of the first high frequency rectifier circuit; and a lightning strike detection unit, including a first inductor LT1, a detection winding, and a detection device. One end of the primary winding of the first inductor LT1 is connected to the first terminal of the AC input power grid, and the other end is connected to the midpoint of the bridge arm of the first power frequency rectifier circuit. One end of the secondary winding of the first inductor LT1 is connected to the second terminal of the AC input power grid, and the other end is connected to the midpoint of the bridge arm of the second power frequency rectifier circuit. The detection device is electrically coupled to the first inductor LT1 and connected to the detection device. The detection device is used to generate a surge protection signal when the voltage across the detection winding is greater than a set value. The controller is used to control the switching transistor in the second power frequency rectifier circuit to turn off for a fixed time after receiving the surge protection signal, thereby limiting the current spike flowing through the switching transistor in the second power frequency rectifier circuit.
[0039] The first high-frequency rectifier circuit includes a bridge arm formed by two active semiconductor power transistors. Specifically, the two active semiconductor power transistors are SiMOS transistor Q1H and SiMOS transistor Q1L. Alternatively, the switching transistor type can be IGBT, SiC, GAN, etc. Those skilled in the art can make the selection as needed, and this utility model does not impose any restrictions.
[0040] The first power frequency rectifier circuit includes a bridge arm formed by two passive semiconductor power transistors connected in the same direction. Specifically, the two passive semiconductor power transistors are diode D1 and diode D2.
[0041] The second power frequency rectifier circuit includes a bridge arm formed by two active semiconductor power transistors, thus the power factor correction circuit is a bidirectional rectifier totem bridgeless circuit. Specifically, the two active semiconductor power transistors are SiMOS transistor QT1 and SiMOS transistor QT2, and the switching transistor type can also be replaced with IGBT, SiC, GAN, etc. Those skilled in the art can choose according to their needs, and this utility model does not impose any restrictions.
[0042] The power factor correction circuit of this invention detects the signal on the winding through a detection device. When the voltage across the detection winding is greater than a set value, a surge protection signal is generated. After receiving the surge protection signal, the controller controls the switching transistor in the second power frequency rectifier circuit to turn off for a fixed time, thereby limiting the current spike flowing through the switching transistor in the second power frequency rectifier circuit and improving the reliability of the circuit.
[0043] The following combination Figure 3 A detailed analysis of the rectifier circuit reveals that during the positive half-cycle, the controller outputs a control signal that keeps MOSFET QT2 continuously on and MOSFET QT1 continuously off. During the negative half-cycle, the controller outputs a control signal that keeps MOSFET QT1 continuously on and MOSFET QT2 continuously off. During both the positive and negative half-cycles, MOSFETs Q1H and Q1L perform high-frequency switching operations, and the control signals for MOSFETs Q1H and Q1L are complementary signals with a dead zone in the middle.
[0044] Taking the positive half-cycle as an example, with the first inductor being a common-mode inductor, the voltage at point 101 is positive and the voltage at point 102 is negative:
[0045] The power factor correction circuit is a boost circuit. After power-on and entering steady state, the output voltage of the power factor correction circuit is greater than the input voltage, so diode D1 is cut off.
[0046] During the period when MOSFET Q1L is turned on and MOSFET Q1H is turned off, inductor L1 is energized, and the current flow is as follows: 101 → winding P2 of the first inductor LT1 → inductor L1 → MOSFET Q1L → MOSFET QT2 → winding P1 of the first inductor LT1 → 102.
[0047] During the period when MOSFET Q1H is on and MOSFET Q1L is off, inductor L1 is demagnetized, and the current flow is as follows: 101 → winding P2 of the first inductor LT1 → inductor L1 → MOSFET Q1H → load Rload → MOSFET QT2 → winding P1 of the first inductor LT1 → 102.
[0048] When a positive lightning strike signal is generated, the detection device will trigger the controller to turn off the MOSFET QT2 in the second power frequency rectifier circuit for a fixed period of time. Figure 4 for Figure 3 A schematic diagram of the first specific embodiment of the detection device in the diagram. Figure 5 for Figure 3 A schematic diagram of a second specific embodiment of the detection device in the diagram, for example. Figure 4 Taking a single-winding device as an example, the current flow is: detection winding → diode D7 → resistor R3 → resistor R4 → diode D6 → detection winding. At this time, a potential higher than Vref is generated at the positive terminal of the comparator, and the comparator outputs a high level. After receiving the high level, the controller controls the switching transistor in the second power frequency rectifier circuit to turn off for a fixed time. At this time, due to the positive lightning strike signal, the potential of 101 is greater than the potential of the cathode of diode D1, and diode D1 is turned on. Therefore, the lightning strike current flow is: 101 → winding P2 of the first inductor LT1 → diode D1 → bus capacitor C1 → body diode of MOSFET QT2 → winding P1 of the first inductor LT1 → 102. At this time, the current flows through the body diode of MOSFET QT2. The bus capacitor C1 will store the energy of the lightning strike. The peak current in the circuit will be significantly reduced during the lightning strike, protecting MOSFET QT2 from being broken down by the surge current.
[0049] When a negative lightning strike signal is generated, the detection device will trigger the controller to turn off the MOSFET QT1 in the second power frequency rectifier circuit for a fixed time, still operating at... Figure 4 Taking a single-winding device as an example, the current flow is as follows: detection winding → diode D5 → resistor R3 → resistor R4 → diode D8 → detection winding. At this time, a potential higher than Vref is generated at the positive terminal of the comparator, and the comparator outputs a high level. After receiving the high level, the controller controls the MOSFET QT1 in the second power frequency rectifier circuit to turn off for a fixed time. At this time, due to the negative lightning strike signal, the potential of the anode of diode D2 is greater than the potential of 101, and diode D2 is turned on. Therefore, the lightning strike current flows as follows: 102 → winding P1 of the first inductor LT1 → body diode of MOSFET QT1 → bus capacitor C1 → diode D2 → winding P2 of the first inductor LT1 → 101. The current only flows through the body diode of MOSFET QT1. The bus capacitor C1 will store the energy of the lightning strike. The peak current in the circuit will be significantly reduced during the lightning strike, protecting MOSFET QT1 from being broken down by the surge current.
[0050] Figure 3 The power factor correction circuit is single-phase. This circuit can be extended to two-phase and multi-phase interleaved power factor correction circuits. The purpose of extending it to two-phase and multi-phase interleaved circuits is to further improve the power rating of the power factor correction circuit and reduce the current ripple of the bus capacitor C1. At this time, in... Figure 3Based on this, it further includes N boost inductors (for ease of description below, starting from the second boost inductor, they are renamed one by one as the second boost inductor, the third boost inductor, ..., the Nth boost inductor) and N first high-frequency rectifier circuits (for ease of description below, starting from the second first high-frequency rectifier circuit, they are renamed one by one as the second high-frequency rectifier circuit, the third high-frequency rectifier circuit, ..., the Nth high-frequency rectifier circuit), where N is a natural number greater than or equal to 2. The first terminal of each boost inductor is simultaneously connected to the first input terminal of the power factor correction circuit and the midpoint of the bridge arm of the first power frequency rectifier circuit, and the second terminal is connected to the midpoint of the bridge arm of one of the N first high-frequency rectifier circuits.
[0051] Figure 6 This is a schematic diagram of the two-phase power factor correction circuit of this utility model. Its working principle is similar to... Figure 3 Similarly, the difference lies in the addition of a second boost inductor L2 and a second high-frequency rectifier circuit. The second high-frequency rectifier circuit comprises a bridge arm formed by two active semiconductor power transistors. Specifically, the two active semiconductor power transistors are SiMOS transistors Q2H and Q2L, but the switching transistor types can also be IGBT, SiC, GAN, etc. The control signals for MOS transistors Q1H and Q2H have a 180° phase difference, and the control signals for MOS transistors Q1L and Q2L have a 180° phase difference.
[0052] Figure 7 This is a schematic diagram of the multiphase power factor correction circuit of this utility model, and its working principle is also similar to... Figure 3 Similarly, the difference lies in the addition of second to nth boost inductors Ln and second to nth high-frequency rectifier circuits. Each of these high-frequency rectifier circuits includes a bridge arm formed by two active semiconductor power transistors. Specifically, the two active semiconductor power transistors are SiMOS transistors QnH and QnL, but the switching transistors can also be IGBTs, SiC, GANs, etc. The control signals from MOS transistors Q1H to QnH are sequentially 360° / n apart, and the control signals from MOS transistors Q1L to QnL are also sequentially 360° / n apart.
[0053] This invention also provides a switching power supply, including the power factor correction circuit of any of the above embodiments, thereby limiting the current spikes flowing through the switching transistor in the second power frequency rectifier circuit, making the switching power supply more reliable.
[0054] The above are merely embodiments of this utility model. It should be particularly noted that the above embodiments should not be regarded as limitations on this utility model. For those skilled in the art, several improvements and modifications can be made without departing from the spirit and scope of this utility model, and these improvements and modifications should also be regarded as protection scope of this utility model.
Claims
1. A power factor correction circuit, characterized by, include: The first power frequency rectifier circuit, the second power frequency rectifier circuit, the first high frequency rectifier circuit, and the bus capacitor are all connected in parallel between the positive output terminal and the negative output terminal of the power factor correction circuit. The first power frequency rectifier circuit, the second power frequency rectifier circuit, and the first high frequency rectifier circuit all include a bridge arm formed by two switching transistors. The boost inductor has its first end connected to the midpoint of the first power frequency rectifier circuit bridge arm and its second end connected to the midpoint of the first high frequency rectifier circuit bridge arm. A lightning strike detection unit includes: a first inductor, a detection winding, and a detection device; one end of the primary winding of the first inductor is connected to a first terminal of the AC input power grid, and the other end is connected to the midpoint of the bridge arm of the first power frequency rectifier circuit; one end of the secondary winding of the first inductor is connected to a second terminal of the AC input power grid, and the other end is connected to the midpoint of the bridge arm of the second power frequency rectifier circuit; the detection winding is electrically coupled to the first inductor and connected to the detection device; the detection device is used to generate a surge protection signal when the voltage across the detection winding exceeds a set value. The controller is used to control the switching transistor in the second power frequency rectifier circuit to turn off for a fixed time after receiving the surge protection signal.
2. The power factor correction circuit of claim 1, wherein: The first inductor is a common-mode inductor or a differential-mode inductor.
3. The power factor correction circuit according to claim 1, characterized in that: The detection winding is a single winding. The detection device includes: a fifth diode, a sixth diode, a seventh diode, an eighth diode, a first resistor, a second resistor, and a comparator. The anode of the fifth diode and the cathode of the sixth diode are connected to the first end of the detection winding; the anode of the seventh diode and the cathode of the eighth diode are connected to the second end of the detection winding; the cathodes of the fifth and seventh diodes are connected to the first end of the first resistor; the anodes of the sixth and eighth diodes and the second end of the second resistor are simultaneously connected to the ground terminal of the controller; the second end of the first resistor and the first end of the second resistor are connected to one input terminal of the comparator; the other input terminal of the comparator receives a reference voltage; and the output terminal of the comparator outputs the surge protection signal. Alternatively, the detection winding may be a dual-winding winding. The detection device includes a ninth diode, a tenth diode, a third resistor, a fourth resistor, and a comparator. The first end of the first detection winding is connected to the anode of the ninth diode, and the second end of the second detection winding is connected to the anode of the tenth diode. The second end of the first detection winding, the first end of the second detection winding, and the second end of the fourth resistor are all connected to the ground terminal of the controller. The cathodes of the ninth and tenth diodes are connected to the first end of the third resistor. The second end of the third resistor and the first end of the fourth resistor are connected to one input terminal of the comparator. The other input terminal of the comparator receives a reference voltage, and the output terminal of the comparator outputs the surge protection signal.
4. The power factor correction circuit of claim 1, wherein: The first high-frequency rectifier circuit includes a bridge arm formed by two active semiconductor power transistors.
5. The power factor correction circuit of claim 1, wherein: The first power frequency rectifier circuit includes a bridge arm formed by two passive semiconductor power transistors connected in the same direction.
6. The power factor correction circuit according to claim 1, characterized in that: The second power frequency rectifier circuit includes a bridge arm formed by two active semiconductor power transistors, thus the power factor correction circuit is a bidirectional rectifier totem bridgeless circuit.
7. The power factor correction circuit of any one of claims 1 to 6, wherein: The power factor correction circuit includes N boost inductors and N first high-frequency rectifier circuits, where N is a natural number greater than or equal to 2. The first terminal of each boost inductor is simultaneously connected to the first input terminal of the power factor correction circuit and the midpoint of the bridge arm of the first power frequency rectifier circuit, and the second terminal is connected to the midpoint of the bridge arm of one of the N first high-frequency rectifier circuits.
8. A switching power supply characterized by comprising: Includes the power factor correction circuit as described in any one of claims 1 to 7.