Surface acoustic wave devices

Abstract

A surface acoustic wave (SAW) device includes: a piezoelectric layer; an interdigitated electrode structure located on the piezoelectric layer; a wiring layer located on the piezoelectric layer and electrically connected to the interdigitated electrode structure; an interconnect layer located on the wiring layer; bumps located on the interconnect layer; and a metallization structure located between the interconnect layer and the bumps, electrically connecting the interconnect layer and the bumps and preventing material from the bumps from penetrating into the interconnect layer. The metallization structure on the interconnect layer prevents the bumps from directly contacting the interconnect layer, instead connecting them electrically through the metallization structure. This prevents the material of the bumps from fusing with the material of the interconnect layer and intruding into the device, thus preventing semiconductor device failure and improving the performance of the semiconductor device. Furthermore, the metallization structure's location between the bumps and the interconnect layer enhances the adhesion between the bumps and the interconnect layer.

Description

Technical Field

[0001] This utility model relates to the field of semiconductor technology, and specifically to a surface acoustic wave device. Background Technology

[0002] Radio frequency (RF) front-end chips in wireless communication devices include power amplifiers, antenna switches, RF filters, multiplexers, and low-noise amplifiers. Among these, RF filters include surface acoustic wave (SAW) filters, bulk acoustic wave (BAW) filters, micro-electro-mechanical system (MEMS) filters, and integrated passive device (IPD) filters.

[0003] With the development of technology, the packaging of surface acoustic wave (SAW) devices has evolved from the initial metal packaging to surface mount device (SMD) packaging, and then to chip scale package (CSP) and wafer level package (WLP), greatly expanding their application areas.

[0004] However, current surface acoustic wave devices still have some problems. Utility Model Content

[0005] The technical problem solved by this invention is how to improve surface acoustic wave devices, prevent bump material from intruding into the device interior, and improve the performance of semiconductor devices.

[0006] To address the aforementioned problems, embodiments of this utility model propose a surface acoustic wave (SAW) device, comprising: a piezoelectric layer; an interdigitated electrode structure located on the piezoelectric layer; a wiring layer located on the piezoelectric layer and electrically connected to the interdigitated electrode structure; an interconnect layer located on the wiring layer; bumps located on the interconnect layer; and a metallization structure located between the interconnect layer and the bumps, the metallization structure electrically connecting the interconnect layer and the bumps and serving to prevent material from the bumps from penetrating into the interconnect layer.

[0007] Optionally, the interconnect layer includes a first part and a second part, with the metallized structure located on the first part and in direct contact with it.

[0008] Optionally, the first part and the second part are adjacent to each other, and the surface of the first part is recessed into the surface of the second part.

[0009] Optionally, it may also include: a protective structure that covers the interconnect layer and exposes the surface of the first part, the protective structure having an angle with the surface of the first part near the sidewall of the first part, and the metallization structure extending to the sidewall.

[0010] Optionally, the included angle ranges from 20° to 50°.

[0011] Optionally, the protective structure is a single-layer structure.

[0012] Optionally, the protective structure is a multi-layer structure, including: a first protective layer and a second protective layer, wherein the first protective layer covers the interconnect layer and exposes the surface of the first part, the second protective layer is located on the first protective layer, the first protective layer has a first thickness, and the second protective layer has a second thickness.

[0013] Optionally, the first thickness is greater than the second thickness.

[0014] Optionally, the first thickness is less than the second thickness.

[0015] Optionally, the second protective layer also extends to the sidewall of the first protective layer near the first part and to a portion of the surface of the first part.

[0016] Optionally, the metallized structure also extends to the top surface of the protective structure.

[0017] Optionally, the width of the portion of the metallized structure extending to the top surface of the protective structure along the direction from the first portion to the second portion ranges from 3μm to 15μm.

[0018] Optionally, the metallization structure includes a first metallization layer, a second metallization layer located on the first metallization layer, and a third metallization layer located on the second metallization layer. The first metallization layer is used to connect with the interconnect layer, the third metallization layer is used to connect with the bump, and the second metallization layer is used to prevent the material of the bump from penetrating into the interconnect layer.

[0019] Optionally, the metallization structure further includes a fourth metallization layer and a fifth metallization layer located between the first metallization layer and the second metallization layer, wherein the fourth metallization layer is located between the first metallization layer and the fifth metallization layer, and the fifth metallization layer is located between the fourth metallization layer and the second metallization layer.

[0020] Optionally, the metallization structure further includes a sixth metallization layer located between the fourth and fifth metallization layers.

[0021] Optionally, the first metallization layer and the third metallization layer are made of different materials; the second metallization layer is made of different materials than the third metallization layer.

[0022] Optionally, the first metallization layer includes a titanium layer; the second metallization layer includes a platinum layer; and the third metallization layer includes a gold layer.

[0023] Optionally, the thickness of the first metallization layer ranges from 150 angstroms to 1500 angstroms; the thickness of the second metallization layer ranges from 200 angstroms to 5000 angstroms; and the thickness of the third metallization layer ranges from 200 angstroms to 50000 angstroms.

[0024] Compared with the prior art, the embodiments of this utility model have the following beneficial effects:

[0025] The surface acoustic wave device provided in the embodiments of this utility model has a metallization structure on the interconnect layer, so that the bumps do not directly contact the interconnect layer, but are electrically connected to the interconnect layer through the metallization structure. This prevents the material of the bumps from fusing with the material of the interconnect layer and intruding into the device interior, thereby causing semiconductor device failure and improving the performance of the semiconductor device. Furthermore, the metallization structure is located between the bumps and the interconnect layer, which enhances the bonding force between the bumps and the interconnect layer.

[0026] In an optional embodiment of this invention, a protective structure is further included. This protective structure covers the interconnect layer and exposes the surface of the first portion. The sidewall of the protective structure near the first portion forms an angle with the surface of the first portion. The metallized structure extends to the sidewall, and the angle ranges from 20° to 50°. By setting the angle between the sidewall of the protective structure and the metallized structure, breakage of the sidewall of the metallized structure is avoided, preventing the material of the bumps from penetrating into the interconnect layer along the sidewall of the metallized structure and fusing with the material of the interconnect layer, thereby improving the performance of the semiconductor device.

[0027] In an optional embodiment of this invention, the protective structure is a multi-layer structure, including: a first protective layer and a second protective layer. The first protective layer covers the interconnect layer and exposes the surface of the first portion. The second protective layer is located on the first protective layer on the interconnect layer. The first and second protective layers can thicken the protective structure located on the sidewall of the metallized structure, effectively confining the bumps on the metallized structure, preventing the bump material from seeping out of the metallized structure, avoiding the bump material from fusing with the interconnect layer material and intruding into the device interior, thereby improving the performance of the semiconductor device.

[0028] In an optional embodiment of this invention, the second protective layer further extends to the sidewall of the first protective layer near the first portion and to a portion of the surface of the first portion. This extension of the second protective layer to the sidewall of the first protective layer near the first portion prevents the sidewall of the metallized structure from breaking, and prevents the material of the bump from penetrating into the interconnect layer along the sidewall of the metallized structure and fusing with the material of the interconnect layer, thereby improving the performance of the semiconductor device.

[0029] In an optional embodiment of this invention, the metallization structure further extends to the top surface of the protective structure. This extension of the metallization structure to the top surface of the protective structure prevents material from the bumps from flowing along the sidewall between the metallization structure and the second protective layer towards the interconnect layer, thus preventing the bump material from fusing with the interconnect layer material and intruding into the device interior, thereby improving the performance of the semiconductor device.

[0030] In an optional embodiment of this invention, the metallization structure includes a first metallization layer, a second metallization layer located on the first metallization layer, and a third metallization layer located on the second metallization layer. The first metallization layer is used to connect with the interconnect layer, the third metallization layer is used to connect with the bump, and the second metallization layer is used to prevent the material of the bump from penetrating into the interconnect layer. The second metallization layer prevents the material of the bump from fusing with the material of the interconnect layer and intruding into the device interior, thereby preventing semiconductor device failure and improving the performance of the semiconductor device. Attached Figure Description

[0031] Figure 1 This is a schematic diagram of the cross-sectional structure of a surface acoustic wave device;

[0032] Figure 2 This is a cross-sectional schematic diagram of the interdigitated electrode structure and wiring layer according to an embodiment of the present invention;

[0033] Figure 3 This is a top view of the surface acoustic wave device according to an embodiment of the present invention;

[0034] Figure 4 This is a cross-sectional structural schematic diagram of the surface acoustic wave device according to an embodiment of the present invention;

[0035] Figure 5 This is a cross-sectional structural schematic diagram of a surface acoustic wave device according to another embodiment of the present invention. Detailed Implementation

[0036] As described in the background section, current surface acoustic wave (SAW) filters still have some structural problems. The reasons for these problems will now be analyzed.

[0037] Please refer to Figure 1A surface acoustic wave (SAW) device, characterized in that it comprises: a piezoelectric layer 100; an interdigitated electrode structure (not shown) located on the piezoelectric layer 100; a wiring layer 101 located on the piezoelectric layer 100 and electrically connected to the interdigitated electrode structure; an interconnect layer 102 located on the wiring layer 101; and a bump 103 located on the interconnect layer 102.

[0038] The interconnect layer 102 includes a first part I and a second part II, the first part I and the second part II are adjacent to each other, the surface of the first part I is recessed into the surface of the second part II, and the bump 103 is located on the first part I.

[0039] The surface acoustic wave device further includes a protective layer 104, which covers the interdigitated electrode structure and the interconnect layer 102 and exposes the surface of the first part.

[0040] The materials for the bump 103 can be varied, including gold, copper / nickel / gold, copper pillars, tin-lead, tin-silver-copper, etc. However, when using tin to fabricate the bump, the tin material of the bump 103 comes into contact with the interconnect layer 102, which can easily cause the tin material of the bump 103 to fuse with the material of the interconnect layer 102 and penetrate into the device interior, leading to device failure.

[0041] To address the aforementioned technical problems, this utility model provides a surface acoustic wave (SAW) device, comprising: a piezoelectric layer; an interdigitated electrode structure located on the piezoelectric layer; a wiring layer located on the piezoelectric layer and electrically connected to the interdigitated electrode structure; an interconnect layer located on the wiring layer; bumps located on the interconnect layer; and a metallization structure located between the interconnect layer and the bumps, the metallization structure electrically connecting the interconnect layer and the bumps and serving to prevent material from the bumps from penetrating into the interconnect layer.

[0042] In the surface acoustic wave device of this invention, a metallization structure is provided on the interconnect layer, so that the bumps do not directly contact the interconnect layer, but are electrically connected to the interconnect layer through the metallization structure. This prevents the material of the bumps from fusing with the material of the interconnect layer and intruding into the device interior, thereby causing semiconductor device failure and improving the performance of the semiconductor device. Furthermore, the metallization structure is located between the bumps and the interconnect layer, which enhances the bonding force between the bumps and the interconnect layer.

[0043] To make the above-mentioned objectives, features and beneficial effects of this utility model more apparent and understandable, the specific embodiments of this utility model will be described in detail below with reference to the accompanying drawings.

[0044] Please refer to Figures 2 to 4,in, Figure 4 for Figure 3 A cross-sectional structural diagram at position Y1Y2 shows that the surface acoustic wave device includes a piezoelectric layer 200.

[0045] The piezoelectric layer 200 is made of materials including piezoelectric crystals, piezoelectric ceramics, and piezoelectric polymers.

[0046] For example, in some embodiments of this utility model, the materials of the piezoelectric layer 200 include: barium titanate, lead zirconate titanate, modified lead zirconate titanate, lead metaniobate, lithium lead barium niobate, modified lead titanate, zinc oxide, gallium nitride, aluminum nitride, quartz crystal, lithium gallium oxide, lithium germanate, titanium germanate, lithium niobate, lithium tantalate, and polyvinylidene fluoride.

[0047] Please refer to Figures 2 to 4 The surface acoustic wave device further includes an interdigitated electrode structure 201, which is located on the piezoelectric layer 200.

[0048] The interdigital transducer (IDT) structure 201 is fabricated by depositing a metal thin film on the piezoelectric layer 200, forming a mask material layer on the metal thin film, patterning the mask material layer to form an interdigital pattern, and then etching the metal thin film using the interdigital pattern as a mask. The interdigital transducer 201 achieves the conversion between electrical and acoustic signals by exciting and detecting surface acoustic waves on the surface of the piezoelectric layer 200.

[0049] The interdigitated electrode structure 201 is made of at least one of the following materials: molybdenum, ruthenium, tungsten, titanium, platinum, aluminum, copper, chromium, magnesium, or scandium.

[0050] Please refer to Figures 3 to 4 The surface acoustic wave device further includes a wiring layer 202, which is located on the piezoelectric layer 200 and is electrically connected to the interdigitated electrode structure 201.

[0051] The wiring layer 202 is electrically connected to the interdigitated electrode structure 201 so that the interdigitated electrode structure 201 can be connected to other electronic components (such as amplifiers, oscillators, etc.) or input / output ports, so that electrical signals can be transmitted between the surface acoustic wave device and the external circuit, thereby realizing the signal processing and transmission functions.

[0052] Specifically, in some embodiments of this utility model, the wiring layer 202 is formed synchronously with the interdigitated electrode structure 201.

[0053] The wiring layer 202 is made of at least one of the following materials: molybdenum, ruthenium, tungsten, titanium, platinum, aluminum, copper, chromium, magnesium, or scandium.

[0054] Please refer to the reference. Figure 3 and Figure 4 , Figure 4 for Figure 3 The cross-sectional structural diagram at position Y1Y2 shows that the surface acoustic wave device further includes an interconnect layer 203, which is located on the wiring layer 202.

[0055] Specifically, in some embodiments of this utility model, the interconnect layer 203 includes a first part I and a second part II, the first part I and the second part II are adjacent to each other, and the surface of the first part I is recessed into the surface of the second part II.

[0056] The interconnect layer 203 includes: a first interconnect layer, a second interconnect layer located on the first interconnect layer, and a third interconnect layer located on the second interconnect layer. Specifically, in some embodiments of this utility model, the first interconnect layer includes a titanium layer, and the third interconnect layer includes a titanium layer.

[0057] Using a titanium layer as the first interconnect layer is beneficial to enhancing the bonding force between the interconnect layer 203 and the wiring layer 202; using a titanium layer as the third interconnect layer is beneficial to enhancing the bonding force between the interconnect layer 203 and the film layer located on the interconnect layer 203 and in direct contact with the interconnect layer 203, thereby improving the adhesion between the film layer located on the interconnect layer 203 and the interconnect layer 203.

[0058] Specifically, in some embodiments of this utility model, the first part I includes a first interconnect layer and a second interconnect layer located on the first interconnect layer; the second part II includes a first interconnect layer, a second interconnect layer located on the first interconnect layer, and a third interconnect layer located on the second interconnect layer.

[0059] The second interconnect layer is a single-layer or multi-layer structure. When the second interconnect layer is a single-layer structure, the second interconnect layer is one of an aluminum layer, a silver layer, a copper layer, a zinc layer, a gold layer, and a platinum layer.

[0060] When the second interconnect layer is a two-layer structure, the second interconnect layer includes a first sublayer and a second sublayer located on the first sublayer. The first sublayer is one of an aluminum layer, a silver layer, a copper layer, and a zinc layer, and the second sublayer is a gold layer.

[0061] When the second interconnect layer has a three-layer structure, the second interconnect layer includes a first sublayer, a second sublayer located on the first sublayer, and a third sublayer located on the second sublayer. The first sublayer is an aluminum layer, the second sublayer is a platinum layer, and the third sublayer is a gold layer.

[0062] Please refer to the reference. Figure 3 and Figure 4The surface acoustic wave device further includes a bump 204, which is located on the interconnect layer 203.

[0063] The bump 204 is used for electrical connection with the first part I of the interconnect layer 203.

[0064] The bump 204 is used to connect the surface acoustic wave device to the external substrate, reliably connecting the electrodes on the surface acoustic wave device to the circuit lines on the substrate, forming a path for electrical signal transmission, and ensuring that the surface acoustic wave device can effectively communicate with other electronic components.

[0065] The bump 204 includes gold bumps, copper pillar bumps, copper / nickel / gold bumps, tin / gold bumps, tin-silver-copper bumps, or tin-lead bumps.

[0066] Specifically, in some embodiments of this utility model, the bump 204 is a tin / gold bump, comprising a tin layer and a gold layer on the tin layer. The material of the bump 204 is tin, which has a relatively low melting point of approximately 231.9°C. During the soldering process, excessively high temperatures are not required for the tin to melt, thus avoiding overheating damage to the soldered electronic components and circuit boards. Tin is particularly suitable for soldering temperature-sensitive materials and precision electronic devices. Furthermore, tin has good wettability, allowing it to spread rapidly on the soldering surface and form good contact with the metal surface, thereby ensuring the quality and reliability of the solder joint. Tin can adhere well to common metal surfaces such as copper, silver, and gold, forming a strong metallurgical bond. In addition, tin is relatively abundant in nature, and compared to some precious metals, tin is cheaper, offering high cost-effectiveness and reducing production costs while ensuring soldering quality.

[0067] Please refer to the reference. Figure 3 and Figure 4 The surface acoustic wave device includes a metallization structure 205, which is located between the interconnect layer 203 and the bump 204. The metallization structure 205 electrically connects the interconnect layer 203 and the bump 204 and is used to prevent material from the bump 204 from penetrating into the interconnect layer 203.

[0068] A metallization structure 205 is provided on the interconnect layer 203, so that the bump 204 does not directly contact the interconnect layer 203, but is electrically connected to the interconnect layer 203 through the metallization structure 205. This prevents the material of the bump 204 from fusing with the material of the interconnect layer 203 and intruding into the device, thereby causing semiconductor device failure and improving the performance of the semiconductor device. Furthermore, the metallization structure 205 is located between the bump 204 and the interconnect layer 203, which enhances the bonding force between the bump 204 and the interconnect layer 203.

[0069] Specifically, in some embodiments of this utility model, the metallized structure 205 is located on the first part I and is in direct contact with the first part I. The metallized structure 205 is electrically connected to the first part I.

[0070] In this embodiment, the metallization structure 205 includes a first metallization layer, a second metallization layer located on the first metallization layer, and a third metallization layer located on the second metallization layer. The first metallization layer is used to connect with the interconnect layer 203, the third metallization layer is used to connect with the bump 204, and the second metallization layer is used to prevent the material of the bump 204 from penetrating into the interconnect layer 203.

[0071] The second metallization layer is provided to prevent the material of the bump 204 from fusing with the material of the interconnect layer 203 and intruding into the device, thereby causing semiconductor device failure and improving the performance of the semiconductor device.

[0072] Specifically, in some embodiments of this utility model, the materials of the first metallization layer and the third metallization layer are different; the materials of the second metallization layer and the third metallization layer are different.

[0073] Specifically, in some embodiments of this utility model, the first metallization layer includes a titanium layer; the second metallization layer includes a platinum layer; and the third metallization layer includes a gold layer.

[0074] Using a titanium layer as the first metallization layer is beneficial for the metallization structure 205 to adhere to the adjacent film layer, thereby enhancing the bonding strength between the metallization structure 205 and the adjacent film layer.

[0075] Platinum possesses excellent chemical stability and is not prone to chemical reactions with the surrounding medium. Using a platinum layer as the second metallization layer prevents the material of the second metal layer from easily fusing with the material of the bump 204, thus avoiding the material of the bump 204 from fusing with the material of the interconnect layer 203 and penetrating into the device, thereby causing semiconductor device failure. Furthermore, the platinum layer can prevent the material of the bump 204 from penetrating into the interconnect layer 203, thereby ensuring the reliability and lifespan of the device.

[0076] The gold layer has a wettable surface. Using the gold layer as the third metallization layer is beneficial for the material of the bump 204 to adhere to the third metallization layer, thereby enhancing the bonding force between the bump 204 and the interconnect layer 203.

[0077] Specifically, in some embodiments of this utility model, the thickness of the first metallization layer ranges from 150 angstroms to 1500 angstroms; the thickness of the second metallization layer ranges from 200 angstroms to 5000 angstroms; and the thickness of the third metallization layer ranges from 200 angstroms to 50000 angstroms.

[0078] In other embodiments, the metallization structure further includes a fourth metallization layer and a fifth metallization layer located between the first metallization layer and the second metallization layer, wherein the fourth metallization layer is located between the first metallization layer and the fifth metallization layer, and the fifth metallization layer is located between the fourth metallization layer and the second metallization layer.

[0079] The first metallization layer includes a titanium layer; the fourth metallization layer includes a platinum layer; the fifth metallization layer includes a titanium layer; the second metallization layer includes a platinum layer; and the third metallization layer includes a gold layer.

[0080] The thickness of the first metallization layer ranges from 150 angstroms to 1500 angstroms; the thickness of the fourth metallization layer ranges from 200 angstroms to 5000 angstroms; the thickness of the fifth metallization layer ranges from 150 angstroms to 1500 angstroms; the thickness of the second metallization layer ranges from 200 angstroms to 50000 angstroms.

[0081] In another embodiment, the metallization structure further includes a fourth metallization layer, a fifth metallization layer, and a sixth metallization layer located between the first metallization layer and the second metallization layer, wherein the sixth metallization layer is located between the fourth metallization layer and the fifth metallization layer, the fourth metallization layer is located between the first metallization layer and the sixth metallization layer, and the fifth metallization layer is located between the sixth metallization layer and the second metallization layer.

[0082] The first metallization layer includes a titanium layer; the fourth metallization layer includes a platinum layer; the sixth metallization layer includes a gold layer; the fifth metallization layer includes a titanium layer; the second metallization layer includes a platinum layer; and the third metallization layer includes a gold layer.

[0083] The thickness of the first metallization layer ranges from 150 angstroms to 1500 angstroms; the thickness of the fourth metallization layer ranges from 200 angstroms to 5000 angstroms; the thickness of the sixth metallization layer ranges from 200 angstroms to 50000 angstroms; the thickness of the fifth metallization layer ranges from 150 angstroms to 1500 angstroms; the thickness of the second metallization layer ranges from 200 angstroms to 50000 angstroms; and the thickness of the third metallization layer ranges from 200 angstroms to 50000 angstroms.

[0084] Specifically, in some embodiments of this invention, the size of the bump 204 is adapted to the size of the metallized structure 205. The projection of the bump 204 onto the surface of the piezoelectric layer 200 overlaps with the projection of the metallized structure 205 onto the surface of the piezoelectric layer 200. The bump 204 is in complete contact with the surface of the metallized structure 205, thereby enhancing the bonding force between the bump 204 and the metallized structure 205.

[0085] In some other embodiments of the utility model, the projection of the bump on the surface of the piezoelectric layer is located within the projection range of the metallized structure on the surface of the piezoelectric layer.

[0086] Specifically, in some embodiments of this utility model, the metallized structure 205 is formed by sputtering, electroplating or vapor deposition.

[0087] Please refer to the reference. Figure 3 and Figure 4 The surface acoustic wave device further includes: a protective structure that covers the interconnect layer 203 and exposes the surface of the first part I, the protective structure having an angle θ with the surface of the first part I near its sidewall, and the metallization structure 205 extending to the sidewall.

[0088] Specifically, in this embodiment, the included angle θ ranges from 20° to 50°. Setting the included angle θ within this range can prevent metal fracture during the formation of the metallized structure 205, avoid sidewall fracture of the metallized structure 205 caused by subsequent processes, improve the quality of the formed metallized structure 205, and thus improve the performance of the device.

[0089] The protective structure can be a single-layer structure or a multi-layer structure.

[0090] In this embodiment, the protective structure is a multi-layer structure, including: a first protective layer 206, which covers the interconnect layer 203 and exposes the surface of the first part I.

[0091] At least a portion of the protective structure extends onto the interdigitated electrode structure 201.

[0092] Specifically, in some embodiments of this utility model, the first protective layer 206 extends to the interdigital electrode structure 201, and the first protective layer 206 covers the side wall surface and top surface of the interdigital electrode structure 201.

[0093] The first protective layer 206 protects the interdigitated electrode structure 201 and the interconnect layer 203 from environmental factors such as dust, moisture, and chemicals. This prevents environmental factors from reducing device performance, prevents chemical corrosion, and extends the device's lifespan.

[0094] The first protective layer 206 also has a frequency modulation function. During the propagation of surface acoustic waves, the propagation speed is affected by the contact medium. Changes in the thickness of the first protective layer 206 will alter the effective propagation path and the medium environment of the surface acoustic waves, thereby changing the propagation speed of the surface acoustic waves, and consequently changing the frequency of the surface acoustic wave device.

[0095] Specifically, in the embodiments of this utility model, the material of the first protective layer 206 includes, but is not limited to, at least one of the following: silicon nitride, silicon oxide, silicon oxynitride, and silicon phosphide glass.

[0096] Specifically, in the embodiments of this utility model, the first protective layer 206 has a first thickness h1, and the first thickness h1 ranges from 50 angstroms to 1000 angstroms.

[0097] Please continue to refer to this. Figure 3 and Figure 4 The protective structure further includes a second protective layer 207, which is located on the second part I and on the first protective layer 206. The metallization structure 205 extends to the second protective layer 207 near the sidewall of the first part I.

[0098] The second protective layer 207 and the first protective layer 206 can thicken the protective structure located on the sidewall of the metallized structure 205, effectively confining the bump 204 on the metallized structure 205, preventing the material of the bump 204 from seeping out to a location outside the metallized structure 205, avoiding the material of the bump 204 from fusing with the material of the interconnect layer 203 and intruding into the device, thereby improving the performance of the semiconductor device.

[0099] Along the surface of the piezoelectric layer 200, the second protective layer 207 is located between the first part I and the interdigitated electrode structure 201. The second protective layer 207 does not extend onto the interdigitated electrode structure 201, and the interdigitated electrode structure 201 is not provided with the second protective layer 207, thus avoiding any impact on the performance of the surface acoustic wave device.

[0100] In other embodiments, the first protective layer does not extend to the interdigitated electrode structure, while the second protective layer extends to the interdigitated electrode structure.

[0101] In other embodiments, the surface acoustic wave device further includes a temperature compensation layer covering the sidewall and top surfaces of the interdigitated electrode structure, wherein the first protective layer extends onto the temperature compensation layer, and the second protective layer does not extend onto the temperature compensation layer, or the second protective layer may extend onto the temperature compensation layer.

[0102] Specifically, in some embodiments of this invention, the second protective layer 207 further extends to the sidewall of the interconnect layer 203. The first protective layer 206 and the second protective layer 207 can thicken the protective structure of the sidewall of the interconnect layer 203, preventing the protective structure of the sidewall of the interconnect layer 203 from becoming too thin and breaking, thereby preventing the material of the bump 204 from intruding into the device and causing semiconductor device failure.

[0103] The metallized structure 205 also extends to the top surface of the protective structure.

[0104] Specifically, in some embodiments of this utility model, the metallization structure 205 further extends to the top surface of the second protective layer 207.

[0105] The metallization structure 205 extends to the top surface of the protective structure, preventing the material of the bump 204 from flowing along the sidewall between the metallization structure 205 and the protective structure to the interconnect layer 203, preventing the material of the bump 204 from fusing with the material of the interconnect layer 203 and intruding into the device, thereby improving the performance of the semiconductor device.

[0106] Specifically, please refer to some embodiments of this utility model. Figure 3 The width d of the portion of the metallized structure 205 extending to the top surface of the protective structure ranges from 3 μm to 15 μm.

[0107] The width d of the portion of the metallized structure 205 extending to the top surface of the protective structure is the dimension of the portion of the metallized structure 205 extending to the top surface of the protective structure in the direction X from the first part I to the second part II.

[0108] Specifically, in the embodiments of this utility model, the material of the second protective layer 207 includes, but is not limited to, at least one of the following: silicon nitride, silicon oxide, silicon oxynitride, phosphosilicate glass, polyimide, and phenolic resin.

[0109] Specifically, in an embodiment of this utility model, the second protective layer 207 has a second thickness h2, which ranges from 100 angstroms to 100,000 angstroms.

[0110] In this embodiment, the first thickness h1 is smaller than the second thickness h2.

[0111] In other embodiments, the first thickness is greater than the second thickness, the first protective layer extends to the interdigitated electrode structure, the second protective layer extends to the interdigitated electrode structure, or the second protective layer does not extend to the interdigitated electrode structure.

[0112] In another embodiment, the first thickness is greater than the second thickness, the first protective layer does not extend to the interdigitated electrode structure, and the second protective layer does extend to the interdigitated electrode structure.

[0113] Figure 5 This is a cross-sectional structural schematic diagram of a surface acoustic wave device according to another embodiment of the present invention.

[0114] This embodiment is based on the aforementioned embodiment ( Figure 4 Based on the previous embodiments, the surface acoustic wave device will be further described. Figure 4 The similarities to the previous embodiments will not be repeated here. The differences from the previous embodiments are as follows, please refer to... Figure 5 The second protective layer 307 also extends to the sidewall of the first protective layer 306 near the first part I and a portion of the surface of the first part I.

[0115] The second protective layer 307 also extends to the sidewall of the first protective layer 306 near the first part I and to a portion of the surface of the first part I, and the metallized structure 305 extends to the second protective layer 307 near the sidewall of the first part I.

[0116] Extending the second protective layer 307 to the sidewall of the first protective layer 306 near the first part I and a portion of the surface of the first part I avoids the sidewall of the metallization structure 305 from breaking, prevents the material of the bump 204 from penetrating into the interconnect layer 203 along the sidewall of the metallization structure 305 and becoming fused with the material of the interconnect layer 203, and improves the performance of the semiconductor device.

[0117] Please continue to refer to this. Figure 5 The sidewall of the second protective layer 307 near the metallized structure 305 forms an angle θ with the surface of the first part I, with the angle θ ranging from 20° to 50°. An angle θ greater than 50° can easily cause metal fracture during the formation of the metallized structure 305; an angle θ less than 20° can easily cause a large difference in thickness between the second protective layer 307 at the slope position and other positions, resulting in uneven film thickness of the second protective layer 307, which in turn affects subsequent processes.

[0118] The metallized structure 305 is formed by sputtering, electroplating or vapor deposition.

[0119] Specifically, in some embodiments of this utility model, the metallization structure 305 is formed by vapor deposition, wherein the metallization structure 305 is formed by sequentially vapor deposition of a titanium layer, a platinum layer and a gold layer on the interconnect layer 203.

[0120] Specifically, please refer to the embodiments of this utility model. Figure 5The sidewall of the second protective layer 307 near the metallized structure 305 is set in the shape of a slope to avoid the metal being deposited during the metallization process to form the metallized structure 305, and to prevent the sidewall of the metallized structure 305 from breaking during subsequent processes, thereby improving the quality of the formed metallized structure 305 and thus improving the performance of the device.

[0121] Specifically, in some embodiments of this utility model, the metallization structure 305 further extends to the top surface of the second protective layer 307. The portion of the metallization structure 305 extending to the top surface of the second protective layer 307 has a dimension d ranging from 3 μm to 15 μm along the direction from the first part I to the second part II.

[0122] Specifically, please refer to some embodiments of this utility model. Figure 5 The angle between the sidewall of the first protective layer 306 near the metallized structure 305 and the surface of the second part II is in the range of 20° to 90°.

[0123] In summary, by setting a metallization structure on the interconnect layer, the bumps do not directly contact the interconnect layer but are electrically connected to it through the metallization structure. This prevents the material of the bumps from fusing with the material of the interconnect layer and intruding into the device, thus preventing semiconductor device failure and improving semiconductor device performance. Furthermore, the metallization structure is located between the bumps and the interconnect layer, enhancing the bonding force between the bumps and the interconnect layer. In addition, the metallization structure includes a first metallization layer, a second metallization layer on the first metallization layer, and a third metallization layer on the second metallization layer. The first metallization layer is used to connect with the interconnect layer, the third metallization layer is used to connect with the bumps, and the second metallization layer is used to prevent the material of the bumps from penetrating into the interconnect layer. The second metallization layer prevents the material of the bumps from fusing with the material of the interconnect layer and intruding into the device, thus preventing semiconductor device failure and improving semiconductor device performance.

[0124] While the present invention has been disclosed above, it is not limited thereto. Any person skilled in the art can make various modifications and alterations without departing from the spirit and scope of the present invention; therefore, the scope of protection of the present invention should be determined by the scope defined in the claims.

Claims

1. A surface acoustic wave device, characterized by, include: piezoelectric layer; An interdigitated electrode structure, wherein the interdigitated electrode structure is located on the piezoelectric layer; A wiring layer, which is located on the piezoelectric layer and is electrically connected to the interdigitated electrode structure; An interconnect layer, which is located on the wiring layer; Bumps, the bumps being located on the interconnect layer; A metallized structure is located between the interconnect layer and the bump, the metallized structure electrically connects the interconnect layer and the bump, and serves to prevent material from the bump from penetrating into the interconnect layer.

2. The SAW device of claim 1, wherein, The interconnect layer includes a first part and a second part, and the metallized structure is located on the first part and is in direct contact with the first part.

3. The SAW device of claim 2, wherein, The first part and the second part are adjacent to each other, and the surface of the first part is recessed into the surface of the second part.

4. The SAW device of claim 2, wherein, Also includes: A protective structure that covers the interconnect layer and exposes the surface of the first part, the protective structure having an angle with the surface of the first part near the sidewall of the first part, and the metallization structure extending to the sidewall.

5. The SAW device of claim 4, wherein, The included angle ranges from 20° to 50°.

6. The SAW device of claim 4, wherein, The protective structure is a single-layer structure.

7. The SAW device of claim 4, wherein, The protective structure is a multi-layer structure, including: a first protective layer and a second protective layer. The first protective layer covers the interconnect layer and exposes the surface of the first part. The second protective layer is located on the first protective layer. The first protective layer has a first thickness and the second protective layer has a second thickness.

8. The SAW device of claim 7, wherein, The first thickness is greater than the second thickness.

9. The SAW device of claim 7, wherein, The first thickness is less than the second thickness.

10. The SAW device of claim 7, wherein, The second protective layer also extends to the sidewall of the first protective layer near the first part and to a portion of the surface of the first part.

11. The SAW device of claim 4, wherein, The metallized structure also extends to the top surface of the protective structure.

12. The surface acoustic wave device as described in claim 11, characterized in that, The portion of the metallized structure extending to the top surface of the protective structure has a dimension ranging from 3 μm to 15 μm along the direction from the first portion to the second portion.

13. The SAW device of claim 1, wherein, The metallization structure includes a first metallization layer, a second metallization layer located on the first metallization layer, and a third metallization layer located on the second metallization layer. The first metallization layer is used to connect with the interconnect layer, the third metallization layer is used to connect with the bump, and the second metallization layer is used to prevent the material of the bump from penetrating into the interconnect layer.

14. The SAW device of claim 13, wherein, The metallization structure further includes a fourth metallization layer and a fifth metallization layer located between the first metallization layer and the second metallization layer, wherein the fourth metallization layer is located between the first metallization layer and the fifth metallization layer, and the fifth metallization layer is located between the fourth metallization layer and the second metallization layer.

15. The SAW device of claim 14, wherein, The metallization structure further includes a sixth metallization layer located between the fourth and fifth metallization layers.

16. The SAW device of claim 13, wherein, The first metallization layer and the third metallization layer are made of different materials; The material of the second metallization layer is different from the material of the third metallization layer.

17. The SAW device of claim 16, wherein, The first metallization layer comprises a titanium layer; the second metallization layer comprises a platinum layer; and the third metallization layer comprises a gold layer.

18. The surface acoustic wave device as described in claim 13, characterized in that, The thickness of the first metallization layer ranges from 150 angstroms to 1500 angstroms; the thickness of the second metallization layer ranges from 200 angstroms to 5000 angstroms; and the thickness of the third metallization layer ranges from 200 angstroms to 50000 angstroms.

Images