A three-phase PFC bus reverse pre-charging circuit based on a post-stage full-bridge CLLC topology and a charging device

Abstract

The utility model discloses a three -phase PFC bus reverse pre -charge circuit and charging equipment based on post stage full bridge CLLC topology, it includes the front stage three -phase PFC circuit and post stage full bridge CLLC resonant conversion circuit of connection, three -phase PFC bus reverse pre -charge circuit still includes and post stage full bridge CLLC resonant conversion circuit parallel connection's bus capacitor, the front stage three -phase PFC circuit includes Q1 Q6 six control devices, post stage full bridge CLLC resonant conversion circuit includes Q7 Q14 eight control devices, control device Q7 Q10 as the control switch of original side full bridge, control device Q11 Q14 as the reverse pre -charge switch of side full bridge.

Description

Technical Field

[0001] This utility model relates to a three-phase PFC bus reverse pre-charge circuit and charging device based on a downstream full-bridge CLLC topology. Background Technology

[0002] In AC / DC power systems, boost PFC circuits are typically used to improve the input power factor and stabilize the DC bus voltage. During system startup, since the initial voltage of the bus capacitor is zero, direct power-on may cause inrush current in the preceding boost circuit due to a momentary short circuit in the bus capacitor, damaging power devices. Traditional pre-charging schemes typically charge the bus capacitor using an additional pre-charging resistor or auxiliary power supply, but this increases cost, size, and circuit complexity. Furthermore, if the subsequent LLC resonant converter starts when the bus voltage is insufficient, the soft-switching conditions may not be met, leading to reduced efficiency or device damage. Utility Model Content

[0003] The main objective of this invention is to provide a three-phase PFC bus reverse pre-charge circuit and charging device based on a downstream full-bridge CLLC topology, in order to solve the aforementioned technical problems.

[0004] To achieve the above objectives, this utility model proposes a three-phase PFC bus reverse pre-charge circuit based on a rear-stage full-bridge CLLC topology, comprising a front-stage three-phase PFC circuit and a rear-stage full-bridge CLLC resonant converter circuit connected in series. The three-phase PFC bus reverse pre-charge circuit further includes a bus capacitor connected in parallel with the rear-stage full-bridge CLLC resonant converter circuit. The front-stage three-phase PFC circuit includes six control devices Q1-Q6, and the rear-stage full-bridge CLLC resonant converter circuit includes eight control devices Q7-Q14. Control devices Q7-Q10 serve as control switches for the primary-side full-bridge, and control devices Q11-Q14 serve as reverse pre-charge switches for the secondary-side full-bridge.

[0005] In one embodiment, every two controllers Q1-Q6 are connected in series to form three first control loops, and the three first control loops are connected in parallel.

[0006] In one embodiment, the three phase lines of the front-end three-phase PFC circuit are respectively connected to the three control loops.

[0007] In one embodiment, the three-phase PFC bus reverse pre-charge circuit based on the rear-stage full-bridge CLLC topology further includes a first capacitor and a second capacitor connected in series, and the first capacitor and the second capacitor are connected in parallel between the front-stage three-phase PFC circuit and the primary-side full-bridge.

[0008] In one embodiment, the neutral line of the front-end three-phase PFC circuit is connected to the first capacitor and the second capacitor.

[0009] In one embodiment, the control switches Q7-Q10 of the primary-side full bridge are connected in series with each pair of the control devices to form two second control loops, and the two second control loops are connected in parallel. The control switches Q11-Q14 of the secondary-side full bridge are connected in series with each pair of the control devices to form two third control loops, and the two third control loops are connected in parallel.

[0010] In one embodiment, the resonant cavity parameter in the CLLC resonant converter circuit is L. r =15μH, C r =100nF, L m =150μH, transformer turns ratio is 4:1.

[0011] In addition, this utility model also provides a charging device, which includes the three-phase PFC bus reverse pre-charging circuit based on the downstream full-bridge CLLC topology as described above.

[0012] In this invention, the three-phase PFC bus reverse pre-charge circuit based on a rear-stage full-bridge CLLC topology includes a front-stage three-phase PFC circuit and a rear-stage full-bridge CLLC resonant converter circuit connected in series. The three-phase PFC bus reverse pre-charge circuit also includes a bus capacitor connected in parallel with the rear-stage full-bridge CLLC resonant converter circuit. The front-stage three-phase PFC circuit includes six control devices Q1-Q6, and the rear-stage full-bridge CLLC resonant converter circuit includes eight control devices Q7-Q14. Control devices Q7-Q10 serve as control switches for the primary-side full-bridge, and control devices Q11-Q14 serve as reverse pre-charge switches for the secondary-side full-bridge. This application utilizes the soft-switching characteristics of the rear-stage CLLC to achieve efficient energy feedback, eliminating the need for an additional pre-charge circuit, saving on pre-charge resistors and relays to reduce costs, and simultaneously avoiding the stress impact of surge current on the front-stage switching transistors, thus extending device lifespan. Attached Figure Description

[0013] To more clearly illustrate the technical solutions in the embodiments of this utility model or the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments of this utility model. For those skilled in the art, other drawings can be obtained based on the structures shown in these drawings without creative effort.

[0014] Figure 1 This is a schematic diagram of the structure of a three-phase PFC bus reverse pre-charge circuit based on a downstream full-bridge CLLC topology, according to an embodiment of this utility model.

[0015] The realization of the purpose, functional features and advantages of this utility model will be further explained in conjunction with the embodiments and with reference to the accompanying drawings. Detailed Implementation

[0016] The technical solutions of the present utility model will be clearly and completely described below with reference to the accompanying drawings of the embodiments. Obviously, the described embodiments are only some embodiments of the present utility model, and not all embodiments. Based on the embodiments of the present utility model, all other embodiments obtained by those of ordinary skill in the art without creative effort are within the protection scope of the present utility model.

[0017] It should be noted that all directional indicators (such as up, down, left, right, front, back, etc.) in this utility model embodiment are only used to explain the relative positional relationship and movement of each component in a certain specific posture (as shown in the figure). If the specific posture changes, the directional indicator will also change accordingly.

[0018] Furthermore, in this utility model, the use of terms such as "first," "second," etc., is for descriptive purposes only and should not be construed as indicating or implying their relative importance or implicitly specifying the number of technical features indicated. Therefore, a feature defined as "first" or "second" may explicitly or implicitly include at least one of that feature. In the description of this utility model, "multiple" means at least two, such as two, three, etc., unless otherwise explicitly specified.

[0019] Furthermore, the technical solutions of the various embodiments of this utility model can be combined with each other, but only if they are based on the ability of those skilled in the art to implement them. When the combination of technical solutions is contradictory or cannot be implemented, it should be considered that such combination of technical solutions does not exist and is not within the scope of protection claimed by this utility model.

[0020] This invention provides a three-phase PFC bus reverse pre-charge circuit based on a downstream full-bridge CLLC topology.

[0021] like Figure 1As shown, the three-phase PFC bus reverse pre-charge circuit based on the rear-stage full-bridge CLLC topology provided in this embodiment of the utility model includes a front-stage three-phase PFC circuit and a rear-stage full-bridge CLLC resonant converter circuit connected in series. The three-phase PFC bus reverse pre-charge circuit also includes a bus capacitor connected in parallel with the rear-stage full-bridge CLLC resonant converter circuit. The front-stage three-phase PFC circuit includes six control devices Q1-Q6, and the rear-stage full-bridge CLLC resonant converter circuit includes eight control devices Q7-Q14. The control devices Q7-Q10 serve as control switches for the primary-side full-bridge, and the control devices Q11-Q14 serve as reverse pre-charge switches for the secondary-side full-bridge.

[0022] In this embodiment, the control module is used to control the downstream CLLC converter to enter the reverse operating mode when the system starts up, so as to transfer the output energy in reverse to the bus capacitor, thereby realizing soft-start pre-charging.

[0023] Among them, every two controllers Q1-Q6 are connected in series to form three first control loops, and the three first control loops are connected in parallel. The three phase lines of the front-end three-phase PFC circuit are respectively connected to the three control loops.

[0024] The three-phase PFC bus reverse pre-charge circuit based on the rear-stage full-bridge CLLC topology further includes a first capacitor and a second capacitor connected in series. The first capacitor and the second capacitor are connected in parallel between the front-stage three-phase PFC circuit and the primary-side full-bridge. The neutral line of the front-stage three-phase PFC circuit is connected to the first capacitor and the second capacitor.

[0025] The control switches Q7-Q10 of the primary-side full bridge form two second control loops when two of the control devices are connected in series, and the two second control loops are connected in parallel. The control switches Q11-Q14 of the secondary-side full bridge form two third control loops when two of the control devices are connected in series, and the two third control loops are connected in parallel.

[0026] In this application, taking Q1 to Q14 as silicon carbide and the control module as digital software control as an example, after the system is powered on, the digital software control logic continuously sends a low level to the gate of Q1 to Q6, which are SiC-Mosfet, through the control module, so that the drain and source of Q1 to Q6 are always kept in the open state, blocking the switching transistors and disabling the front-end three-phase PFC circuit.

[0027] The digital software control logic employs complementary frequency modulation control through the control module. The secondary-side full-bridge of the CLLC topology acts as the reverse pre-charge main switch, with switching transistors Q11 to Q14 conducting diagonally alternately (e.g., Q11 / Q14 alternating with Q12 / Q13), generating a square wave voltage. Energy flows into the resonant cavity, requiring the switching frequency to be synchronized with the resonant frequency to ensure zero-voltage turn-on (ZVS) for Q11 to Q14, thereby improving efficiency.

[0028] The CLLC topology primary-side full-bridge acts as a synchronous rectifier, rectifying high-frequency AC into high-voltage DC. Switches Q7 to Q10 serve as synchronous rectifier diodes. Synchronous rectification is achieved by SiC-Mosfet self-conducting diodes or control drive signals, depending on the direction of the resonant current.

[0029] If Q7 to Q10 adopt a synchronous rectification strategy, it is necessary to detect the zero-crossing point of the resonant current and trigger the corresponding switch to turn on to ensure zero-current turn-off (ZCS) of Q7 to Q10, so as to improve efficiency. The reverse resonant frequency is lower than the forward operating frequency range to ensure reverse energy transmission. The system operates in reverse mode and transfers the output energy to the bus capacitor through the resonant cavity and high-frequency transformer.

[0030] Furthermore, by adjusting the CLLC switching frequency, the pre-charge current amplitude is controlled. In the initial state, the control module controls the switching frequency f of Q11 to Q14 via digital software. sw Much higher than the resonant frequency f r At this point, the gain is extremely low, the resonant current is suppressed, and the bus capacitor is slowly charged with a small current to avoid current surges; the system detects the bus voltage V. bus With target voltage V ref Comparison, if V bus <V ref Gradually reduce the switching frequency f sw Towards the resonant frequency f r To increase energy transfer, move the device closer to the target area, increase the gain, and increase the charging current. If the charging current exceeds a threshold, increase the switching frequency f. sw To limit the charging current; when the bus voltage V bus Approaching target voltage V ref When the value is reached, the switching frequency f is gradually adjusted. sw to rated operating point f normal Switch to closed-loop voltage regulation or current regulation control mode to maintain the bus voltage V. bus It stabilizes at the set threshold.

[0031] Finally, after the bus voltage reaches the preset value (such as 80% of the rated voltage), the reverse pre-charge mode is exited, the front-stage three-phase PFC circuit is started, and the rear-stage CLLC is switched to the normal forward operating mode.

[0032] In this application, taking a 48V / 10A AC / DC power supply as an example, the bus capacitor is 450V / 470μF, and the CLLC resonant cavity parameters are L. r =15μH, C r =100nF, L m =150μH, transformer turns ratio 4:1.

[0033] During the early pre-charge process, the control stage CLLC operates in reverse at a frequency of 80kHz. By adjusting the frequency linearly to 120kHz, the bus capacitor is charged to 360V within 20ms. After the pre-charge is completed, the front-stage three-phase PFC starts in critical conduction mode (CRM), and the rear-stage CLLC switches to the forward operating frequency of 380kHz.

[0034] This application utilizes the soft-switching characteristics of the subsequent CLLC to achieve efficient energy feedback, eliminating the need for an additional pre-charging circuit, reducing costs by eliminating the pre-charging resistor and relay, and avoiding the stress impact of surge current on the preceding switching transistor, thus extending device life.

[0035] The above description is only a preferred embodiment of the present utility model and does not limit the patent scope of the present utility model. All equivalent structural transformations made under the concept of the present utility model and using the contents of the present utility model specification and drawings, or direct / indirect applications in other related technical fields, are included in the patent protection scope of the present utility model.

Claims

1. A three-phase PFC bus reverse pre-charge circuit based on a later-stage full-bridge CLLC topology, characterized in that, The three-phase PFC bus reverse pre-charge circuit based on the rear-stage full-bridge CLLC topology includes a front-stage three-phase PFC circuit and a rear-stage full-bridge CLLC resonant converter circuit connected in series. The three-phase PFC bus reverse pre-charge circuit also includes a bus capacitor connected in parallel with the rear-stage full-bridge CLLC resonant converter circuit. The front-stage three-phase PFC circuit includes six control devices Q1-Q6, and the rear-stage full-bridge CLLC resonant converter circuit includes eight control devices Q7-Q14. Control devices Q7-Q10 serve as control switches for the primary-side full-bridge, and control devices Q11-Q14 serve as reverse pre-charge switches for the secondary-side full-bridge.

2. The three-phase PFC bus reverse pre-charge circuit based on a downstream full-bridge CLLC topology according to claim 1, characterized in that, The controllers Q1-Q6 are connected in series to form three first control loops, and the three first control loops are connected in parallel.

3. The three-phase PFC bus reverse pre-charge circuit based on a downstream full-bridge CLLC topology according to claim 2, characterized in that, The three phase lines of the front-end three-phase PFC circuit are respectively connected to the three control loops.

4. The three-phase PFC bus reverse pre-charge circuit based on the later-stage full-bridge CLLC topology according to claim 3, characterized in that, The three-phase PFC bus reverse pre-charge circuit based on the rear full-bridge CLLC topology also includes a first capacitor and a second capacitor connected in series, and the first capacitor and the second capacitor are connected in parallel between the front-end three-phase PFC circuit and the primary-side full bridge.

5. The three-phase PFC bus reverse pre-charge circuit based on the later-stage full-bridge CLLC topology according to claim 4, characterized in that, The neutral line of the front-end three-phase PFC circuit is connected to the first capacitor and the second capacitor.

6. The three-phase PFC bus reverse pre-charge circuit based on the later-stage full-bridge CLLC topology according to claim 1, characterized in that, The control switches Q7-Q10 of the primary-side full bridge form two second control loops when two of the control devices are connected in series, and the two second control loops are connected in parallel. The control switches Q11-Q14 of the secondary-side full bridge form two third control loops when two of the control devices are connected in series, and the two third control loops are connected in parallel.

7. The three-phase PFC bus reverse pre-charge circuit based on a downstream full-bridge CLLC topology according to claim 1, characterized in that, The CLLC resonant conversion circuit, wherein the resonant cavity parameters are L r = 15 μH, C r = 100 nF, L m = 150 μH, and the transformer turns ratio is 4:

1.

8. A charging device, characterized by The charging device includes a three-phase PFC bus reverse pre-charge circuit based on a downstream full-bridge CLLC topology as described in any one of claims 1-7.

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