An electromagnetic interference suppression circuit and PCB board for an inverter

Abstract

This application relates to an electromagnetic interference suppression circuit and PCB board for an inverter, including a pre-rectification suppression module, a rectification-inverter module, and a post-rectification suppression module. The pre-rectification suppression module is connected to the rectification-inverter module, and the rectification-inverter module is connected to the post-rectification suppression module. The pre-rectification suppression module includes a power input line, an X capacitor, a Y capacitor, and a varistor. The first terminal of the X capacitor is connected to the power input line, the second terminal of the X capacitor is connected to the first terminal of the Y capacitor, and the second terminal of the Y capacitor is grounded. The first terminal of the varistor is connected to the power input line, and the second terminal of the varistor is grounded. The post-rectification suppression module includes a common-mode inductor, a common-mode filter capacitor, and a differential-mode filter capacitor. The common-mode inductor is connected in series with the DC bus, the differential-mode filter capacitor is connected in parallel with the DC bus, the first terminal of the common-mode filter capacitor is connected to the DC bus, and the second terminal of the common-mode filter capacitor is grounded. Compared with the prior art, this application can improve the electromagnetic compatibility performance of the inverter.

Description

Technical Field

[0001] This application relates to the field of power electronics, and more particularly to an electromagnetic interference suppression circuit and PCB board for an inverter. Background Technology

[0002] With the rapid development of power electronics technology, the electromagnetic compatibility requirements for adjustable speed control systems in industrial equipment are becoming increasingly stringent. According to the international standards system, electromagnetic compatibility includes two core indicators: electromagnetic interference and electromagnetic susceptibility. Electromagnetic interference focuses on the level of interference radiation emitted by the equipment to the external environment, while electromagnetic susceptibility characterizes the equipment's ability to resist interference in complex electromagnetic environments. Taking the EU's new machinery directive as an example, speed control equipment configured in industrial machines must comply with the IEC 61800-3 standard, which sets clear limits for key parameters such as conducted emissions, radiated emissions, and immunity.

[0003] Current compact inverter designs face a technical bottleneck that balances power density improvement with electromagnetic compatibility performance. In pursuit of miniaturization and high efficiency, power devices generally employ high-frequency switching technology, but the rapid switching process can trigger transient effects of high current and high voltage, leading to a surge in common-mode current and an expansion of the electromagnetic noise spectrum. Utility Model Content

[0004] This application provides an electromagnetic interference suppression circuit and PCB board for an inverter. By implementing targeted electromagnetic interference suppression before and after rectification in the inverter, the electromagnetic compatibility performance of the inverter can be improved.

[0005] In a first aspect, this application provides an electromagnetic interference suppression circuit for an inverter, comprising: a pre-rectification suppression module, a rectification-inverter module, and a post-rectification suppression module; the pre-rectification suppression module is connected to the rectification-inverter module, and the rectification-inverter module is connected to the post-rectification suppression module; wherein, the pre-rectification suppression module includes a power input line, an X capacitor, a Y capacitor, and a varistor, the first end of the X capacitor is connected to the power input line, the second end of the X capacitor is connected to the first end of the Y capacitor, the second end of the Y capacitor is grounded, the first end of the varistor is connected to the power input line, and the second end of the varistor is grounded; the post-rectification suppression module includes a common-mode inductor, a common-mode filter capacitor, and a differential-mode filter capacitor, the common-mode inductor is connected in series with the DC bus, the differential-mode filter capacitor is connected in parallel with the DC bus, the first end of the common-mode filter capacitor is connected to the DC bus, and the second end of the common-mode filter capacitor is grounded.

[0006] In one possible implementation, the pre-rectification suppression module includes a power input line, an X capacitor, a Y capacitor, and a varistor. Specifically, the pre-rectification suppression module includes a three-phase power input submodule, an electromagnetic interference (EMI) protection submodule, and a lightning surge protection submodule. The three-phase power input submodule is connected to the EMI protection submodule, and the EMI protection submodule is connected to the lightning surge protection submodule. The three-phase power input submodule includes an A-phase power input line, a B-phase power input line, and a C-phase power input line. The EMI protection submodule includes at least a first X capacitor, a second X capacitor, a third X capacitor, a first Y capacitor, and a second Y capacitor. The lightning surge protection submodule includes at least a first varistor, a second varistor, and a third varistor.

[0007] In one possible implementation, the first terminal of the X capacitor in the pre-rectification suppression module is connected to the power input line, the second terminal of the X capacitor is connected to the first terminal of the Y capacitor, and the second terminal of the Y capacitor is grounded. Specifically, the first terminal of the first X capacitor is connected to the A-phase power input line, the first terminal of the second X capacitor is connected to the B-phase power input line, and the first terminal of the third X capacitor is connected to the C-phase power input line. The second terminals of the first X capacitor, the second X capacitor, and the third X capacitor are connected to form a first common node. The first terminal of the first Y capacitor is connected to the first terminal of the second Y capacitor to form a second common node. The first common node and the second common node are connected, and the second terminal of the first Y capacitor is grounded.

[0008] In one possible implementation, the first end of the varistor is connected to the power input line, and the second end of the varistor is grounded. Specifically, the first end of the first varistor is connected to the A-phase power input line, the first end of the second varistor is connected to the B-phase power input line, and the first end of the third varistor is connected to the C-phase power input line; the second ends of the first varistor, the second varistor, and the third varistor are respectively grounded.

[0009] In one possible implementation, the lightning surge protection submodule further includes a protection diode, wherein the first end of the protection diode is connected to the second end of the first varistor, the second end of the second varistor, and the second end of the third varistor, respectively, and the second end of the protection diode is grounded.

[0010] In one possible implementation, the post-rectification suppression module includes a common-mode inductor, a common-mode filter capacitor, and a differential-mode filter capacitor. Specifically, the post-rectification suppression module includes a first filter submodule and a second filter submodule, with the first filter submodule connected to the second filter submodule. The first filter submodule includes at least a first differential-mode filter capacitor, a second differential-mode filter capacitor, and a first common-mode inductor. The second filter submodule includes at least a first common-mode filter capacitor, a second common-mode filter capacitor, a third common-mode filter capacitor, and a fourth common-mode filter capacitor.

[0011] In one possible implementation, the common-mode inductor is connected in series with the DC bus, and the differential-mode filter capacitor is connected in parallel with the DC bus. Specifically, the first and second pins of the first common-mode inductor are connected in series with the positive terminal of the DC bus, and the third and fourth pins of the first common-mode inductor are connected in series with the negative terminal of the DC bus. The first terminal of the first differential-mode filter capacitor and the first terminal of the second differential-mode filter capacitor are respectively connected to the positive terminal of the DC bus, and the second terminal of the first differential-mode filter capacitor and the second terminal of the second differential-mode filter capacitor are respectively connected to the negative terminal of the DC bus.

[0012] In one possible implementation, the first terminal of the common-mode filter capacitor is connected to the DC bus, and the second terminal of the common-mode filter capacitor is grounded. Specifically, the first terminals of the first and third common-mode filter capacitors are respectively connected to the positive terminal of the DC bus, and the first terminals of the second and fourth common-mode filter capacitors are respectively connected to the negative terminal of the DC bus; the second terminals of the first, second, third, and fourth common-mode filter capacitors are respectively grounded.

[0013] Secondly, this application also provides a PCB board for an inverter, comprising: the electromagnetic interference suppression circuit described in any of the preceding claims; wherein the electromagnetic interference suppression circuit comprises a pre-rectification suppression module, a rectification-inverter module, and a post-rectification suppression module, wherein the post-rectification suppression module comprises a first filter submodule and a second filter submodule; the rectification-inverter module and the second filter submodule are physically combined to form a first combined module; the first combined module, the pre-rectification suppression module, and the first filter submodule are physically isolated from each other.

[0014] In one possible implementation, the ground wires in the PCB are designed using a star grounding or multi-point grounding strategy.

[0015] The technical solutions provided in this application have the following advantages compared with the prior art:

[0016] This application provides an electromagnetic interference suppression circuit and PCB board for an inverter. The electromagnetic interference suppression circuit includes: a pre-rectification suppression module, a rectification-inverter module, and a post-rectification suppression module. The pre-rectification suppression module is connected to the rectification-inverter module, and the rectification-inverter module is connected to the post-rectification suppression module. The pre-rectification suppression module includes a power input line, an X capacitor, a Y capacitor, and a varistor. The first terminal of the X capacitor is connected to the power input line, and the second terminal of the X capacitor is connected to the first terminal of the Y capacitor, with the second terminal of the Y capacitor grounded. The first terminal of the varistor is connected to the power input line, and the second terminal of the varistor is grounded. The post-rectification suppression module includes a common-mode inductor, a common-mode filter capacitor, and a differential-mode filter capacitor. The common-mode inductor is connected in series with the DC bus, and the differential-mode filter capacitor... The filter capacitor is connected in parallel with the DC bus. The first terminal of the common-mode filter capacitor is connected to the DC bus, and the second terminal of the differential-common-mode filter capacitor is grounded. Compared with the prior art, the technical solution of this application uses a combination of X and Y capacitors before rectification, which can effectively filter out differential-mode and common-mode interference at the power input terminal. A varistor is also set for lightning surge protection, further reducing the level of electromagnetic interference. After rectification, the common-mode inductor is directly connected to the DC bus, and its high impedance characteristics for common-mode signals are used to effectively suppress the propagation of common-mode noise. The common-mode filter capacitor and the differential-mode filter capacitor can provide a low-impedance path, allowing high-frequency noise signals to bypass to ground, thereby reducing interference to other parts of the system. This achieves targeted electromagnetic interference suppression before and after inverter rectification, which can improve the electromagnetic compatibility performance of the inverter. Attached Figure Description

[0017] The accompanying drawings, which are incorporated in and form part of this specification, illustrate embodiments consistent with this application and, together with the description, serve to explain the principles of this application.

[0018] To more clearly illustrate the technical solutions in the embodiments of this application or the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, for those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0019] One or more embodiments are illustrated by way of example with reference numerals in the accompanying drawings. These illustrations do not constitute a limitation on the embodiments. Elements with the same reference numerals in the drawings are denoted as similar elements. Unless otherwise stated, the figures in the drawings are not to be limited by scale.

[0020] Figure 1A schematic diagram of an electromagnetic interference suppression circuit for an inverter provided in an embodiment of this application;

[0021] Figure 2 This is a schematic diagram of the pre-rectification suppression module provided in an embodiment of this application;

[0022] Figure 3 This is a schematic diagram of the structure of the rectifier-inverter module provided in the embodiments of this application;

[0023] Figure 4 This is a schematic diagram of the structure of the post-rectification suppression module provided in an embodiment of this application;

[0024] Figure 5 This is another schematic diagram of an electromagnetic interference suppression circuit for an inverter provided in an embodiment of this application;

[0025] Figure 6 This is a schematic diagram of the structure of the driver module provided in an embodiment of this application;

[0026] Figure 7 This is a schematic diagram of the layout of a PCB board provided in an embodiment of this application. Detailed Implementation

[0027] To make the objectives, technical solutions, and advantages of the embodiments of this application clearer, the technical solutions of the embodiments of this application will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of this application, not all embodiments. Based on the embodiments of this application, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of this application.

[0028] The following disclosure provides numerous different embodiments or examples for implementing various structures of this application. To simplify the disclosure, specific examples of components and arrangements are described below. These are merely examples and are not intended to limit the scope of this application. Furthermore, reference numerals and / or letters may be repeated in different examples. Such repetition is for simplification and clarity and does not in itself indicate a relationship between the various embodiments and / or arrangements discussed.

[0029] For ease of description, spatial relative terms may be used in the text to describe the relative position or movement of one element or feature relative to another element or feature, as shown in the figure. These relative terms include, for example, "inside," "outside," "middle," "outer," "below," "below," "above," "front," "back," etc. Such spatial relative terms are intended to include different orientations of the device in use or operation, other than those depicted in the figure. For example, if the device in the figure undergoes a positional flip, orientation change, or change of motion, these directional indications will change accordingly. For instance, an element described as "below other elements or features" or "below other elements or features" will subsequently be oriented "above other elements or features" or "above other elements or features." Therefore, the example term "below" can include both upper and lower orientations. The device may be otherwise oriented (rotated 90 degrees or in other directions), and the spatial relative descriptors used in the text will be interpreted accordingly.

[0030] Figure 1 This application provides a schematic diagram of an electromagnetic interference suppression circuit for an inverter, as shown in the embodiments of the present application. Figure 1 As shown, the electromagnetic interference suppression circuit for the inverter includes a pre-rectification suppression module 10, a rectification-inverter module 20, and a post-rectification suppression module 30, as detailed below:

[0031] In one embodiment, the pre-rectification suppression module 10 is connected to the rectification inverter module 20, and the rectification inverter module 20 is connected to the post-rectification suppression module 30.

[0032] In one embodiment, the pre-rectification suppression module 10 includes a power input line, an X capacitor, a Y capacitor, and a varistor. The first end of the X capacitor is connected to the power input line, the second end of the X capacitor is connected to the first end of the Y capacitor, the second end of the Y capacitor is grounded, the first end of the varistor is connected to the power input line, and the second end of the varistor is grounded.

[0033] In one embodiment, during the pre-rectification stage, the circuit mainly faces common-mode interference and differential-mode interference from the power grid.

[0034] In one embodiment, the pre-rectification suppression module 10 includes a three-phase power input submodule 101, an electromagnetic interference protection submodule 102, and a lightning surge protection submodule 103, such as... Figure 2 As shown, Figure 2 This is a schematic diagram of the pre-rectification suppression module provided in an embodiment of this application.

[0035] Specifically, the three-phase power input submodule 101 is connected to the electromagnetic interference protection submodule 102, and the electromagnetic interference protection submodule 102 is connected to the lightning surge protection submodule 103.

[0036] In one embodiment, the three-phase power input submodule 101 includes an A-phase power input line R, a B-phase power input line S, and a C-phase power input line T.

[0037] In one embodiment, the electromagnetic interference protection submodule 102 includes at least a first X capacitor CX1, a second X capacitor CX2, a third X capacitor CX3, a first Y capacitor CY1, and a second Y capacitor CY2.

[0038] Specifically, the X capacitor is used to suppress differential-mode interference, which refers to the interference signal that exists between the two input lines of the power supply. The X capacitor is connected between the power supply input lines and can filter high-frequency differential-mode interference signals.

[0039] Specifically, the Y capacitor is used to suppress common-mode interference, which refers to the interference signal that exists between the power input line and ground. The Y capacitor is connected between the power input line and ground and can filter high-frequency common-mode interference signals.

[0040] Specifically, the first terminal of the first X capacitor CX1 is connected to the A-phase power input line R, the first terminal of the second X capacitor CX2 is connected to the B-phase power input line S, and the first terminal of the third X capacitor CX3 is connected to the C-phase power input line T. The second terminals of the first X capacitor CX1, the second X capacitor CX2, and the third X capacitor CX3 are connected to form a first common node. The first terminal of the first Y capacitor CY1 is connected to the first terminal of the second Y capacitor CY2 to form a second common node. The first common node and the second common node are connected. The second terminal of the first Y capacitor CY1 and the second Y capacitor CY2 are grounded.

[0041] Specifically, the first X capacitor CX1, the second X capacitor CX2, and the third X capacitor CX3 are connected in parallel. This connection method enables the three X capacitors to form a parallel connection between the three-phase power input lines, which can filter these high-frequency differential mode interference signals, reduce their amplitude, and effectively suppress differential mode interference.

[0042] Specifically, the first Y capacitor CY1 and the second Y capacitor CY2 are connected in parallel. This connection method allows the two Y capacitors to form a parallel connection between the power input line and ground, which can bypass these high-frequency common-mode interference signals to ground, reduce their amplitude, and effectively suppress common-mode interference.

[0043] In one embodiment, the lightning surge protection submodule 103 includes at least a first varistor RV1, a second varistor RV2, and a third varistor RV3.

[0044] Specifically, the first end of the first varistor RV1 is connected to the A-phase power input line R, the first end of the second varistor RV2 is connected to the B-phase power input line S, and the first end of the third varistor RV3 is connected to the C-phase power input line T; the second ends of the first varistor RV1, the second varistor RV2, and the third varistor RV3 are respectively grounded.

[0045] Specifically, a varistor is a voltage-sensitive component. When the voltage exceeds its threshold, its resistance drops rapidly. Therefore, by connecting the first terminal of the varistor to the three-phase power input line and grounding the second terminal, the varistor can rapidly increase its resistance when the circuit is subjected to overvoltage surges, such as lightning strikes, thereby limiting the current and protecting the subsequent circuits from damage. At the same time, the varistor can also absorb and dissipate electromagnetic energy caused by overvoltage to a certain extent, further reducing the level of electromagnetic interference.

[0046] Specifically, by setting corresponding varistors on each of the three-phase power input lines, instead of using a single protective element, the entire three-phase power input system can be ensured to have a higher protection capability against lightning surges.

[0047] Specifically, the parameters of the X capacitor, Y capacitor, and varistor mentioned above can be set according to the power supply voltage, interference level, and equipment requirements in actual applications to achieve the best filtering and protection effect. This application does not impose specific limitations on these parameters.

[0048] Specifically, the electromagnetic interference protection submodule 102 includes at least three X capacitors and two Y capacitors; the lightning surge protection submodule 103 includes at least three varistors; preferably, in some high-requirement applications, the electromagnetic interference protection submodule 102 includes at least three X capacitors and two Y capacitors; in addition to the at least three varistors, the lightning surge protection submodule 103 can also have multiple X capacitors, Y capacitors and varistors added to improve the reliability and anti-interference capability of the circuit.

[0049] In one embodiment, the lightning surge protection submodule 103 further includes a protection diode D1, wherein the first end of the protection diode D1 is connected to the second end of the first varistor RV1, the second end of the second varistor RV2 and the second end of the third varistor RV3 respectively, and the second end of the protection diode D1 is grounded. The addition of the protection diode D1 can serve as an auxiliary component of the varistor, providing an additional protection path and enhancing the transient high voltage discharge capability of the entire protection submodule.

[0050] Specifically, a diode has unidirectional conductivity. When a transient high voltage occurs at the common node of the varistor, the diode can quickly conduct and discharge excess energy to ground.

[0051] In one embodiment, the rectifier-inverter module 20 includes a first rectifier diode, a second rectifier diode, a third rectifier diode, a fourth rectifier diode, a fifth rectifier diode, and a sixth rectifier diode; as shown... Figure 3 As shown, Figure 3 This is a schematic diagram of the structure of the rectifier-inverter module provided in an embodiment of this application.

[0052] Specifically, the cathodes of the first, second, and third rectifier diodes are connected to the positive terminal of the DC bus, and the anodes of the fourth, fifth, and sixth rectifier diodes are connected to the negative terminal of the DC bus; the anode of the first rectifier diode is connected to the cathode of the fourth rectifier diode, the anode of the second rectifier diode is connected to the cathode of the fifth rectifier diode, and the anode of the third rectifier diode is connected to the cathode of the sixth rectifier diode.

[0053] Specifically, the A-phase power input line R is connected to the positive terminal of the first rectifier diode and the negative terminal of the fourth rectifier diode, respectively; the B-phase power input line S is connected to the positive terminal of the second rectifier diode and the negative terminal of the fifth rectifier diode, respectively; and the C-phase power input line T is connected to the positive terminal of the third rectifier diode and the negative terminal of the sixth rectifier diode, respectively.

[0054] Specifically, by setting up the rectifier-inverter module 20, efficient and stable conversion of three-phase AC power to DC power can be achieved; it can not only improve energy conversion efficiency, but also provide a stable DC output voltage.

[0055] In one embodiment, the post-rectification suppression module 30 includes a common-mode inductor, a common-mode filter capacitor, and a differential-mode filter capacitor. The common-mode inductor is connected in series with the DC bus, the differential-mode filter capacitor is connected in parallel with the DC bus, the first terminal of the common-mode filter capacitor is connected to the DC bus, and the second terminal of the common-mode filter capacitor is grounded.

[0056] In one embodiment, the rectified suppression module 30 includes a first filtering submodule 301 and a second filtering submodule 302, wherein the first filtering submodule 301 is connected to the second filtering submodule 302; as Figure 4 As shown, Figure 4 This is a schematic diagram of the structure of the post-rectification suppression module provided in an embodiment of this application.

[0057] In one embodiment, the first filtering submodule 301 includes at least a first differential mode filter capacitor CX4, a second differential mode filter capacitor CX5, and a first common mode inductor L1.

[0058] Specifically, the first and second pins of the first common-mode inductor L1 are connected in series with the positive terminal of the DC bus, and the third and fourth pins of the first common-mode inductor L1 are connected in series with the negative terminal of the DC bus.

[0059] Specifically, when 10kHz≤f≤10MHz, the inductance value of the first common-mode inductor L1 is related to the minimum common-mode impedance and switching frequency of the inverter.

[0060] Preferably, the inductance value L is set to Among them, Z min is the minimum common-mode impedance in the inverter, and f is the switching frequency of the inverter.

[0061] Specifically, by directly connecting the common-mode inductor in series with the DC bus, its high impedance characteristics to common-mode signals are utilized to effectively suppress the propagation of common-mode noise.

[0062] Specifically, the first terminal of the first differential mode filter capacitor CX4 and the first terminal of the second differential mode filter capacitor CX5 are respectively connected to the positive terminal of the DC bus, and the second terminal of the first differential mode filter capacitor CX4 and the second terminal of the second differential mode filter capacitor CX5 are respectively connected to the negative terminal of the DC bus.

[0063] Specifically, the first terminal of the first differential mode filter capacitor CX4 is connected to the first pin of the first differential mode inductor L1, and the second terminal of the first differential mode filter capacitor CX4 is connected to the third pin of the first common mode inductor L1; the first terminal of the second differential mode filter capacitor CX5 is connected to the second pin of the first common mode inductor L1, and the second terminal of the second differential mode filter capacitor CX5 is connected to the fourth pin of the first common mode inductor L1.

[0064] Specifically, the capacitance values ​​of the first differential mode filter capacitor CX4 and the second differential mode filter capacitor CX5 are related to the minimum common mode impedance and the switching frequency in the inverter.

[0065] Preferably, the capacitance value C1 of the differential mode filter capacitor is set to... Where f is the switching frequency of the inverter, P is the power of the motor driver, and U is the input voltage of the motor driver.

[0066] In one embodiment, the second filtering submodule 302 includes at least a first common-mode filter capacitor CY3, a second common-mode filter capacitor CY4, a third common-mode filter capacitor CY5, and a fourth common-mode filter capacitor CY6.

[0067] Specifically, the first terminal of the first common-mode filter capacitor CY3 and the first terminal of the third common-mode filter capacitor CY5 are respectively connected to the positive terminal of the DC bus, and the first terminal of the second common-mode filter capacitor CY4 and the first terminal of the fourth common-mode filter capacitor CY6 are respectively connected to the negative terminal of the DC bus; the second terminals of the first common-mode filter capacitor CY3, the second common-mode filter capacitor CY4, the third common-mode filter capacitor CY5 and the fourth common-mode filter capacitor CY6 are respectively grounded.

[0068] Specifically, the capacitance values ​​of the first common-mode filter capacitor CY3, the second common-mode filter capacitor CY4, the third common-mode filter capacitor CY5, and the fourth common-mode filter capacitor CY6 are related to the switching frequency in the inverter, as well as the power of the motor driver and the input voltage of the motor driver.

[0069] Preferably, the capacitance value C2 of the common-mode filter capacitor is set to... Among them, Z min is the minimum common-mode impedance in the inverter, and f is the switching frequency of the inverter.

[0070] Specifically, by connecting the first terminals of multiple common-mode filter capacitors to the positive and negative terminals of the DC bus respectively, this connection method ensures that common-mode noise is suppressed to the maximum extent when passing through the capacitors, thereby effectively reducing the amplitude of common-mode noise. Furthermore, by grounding the second terminals of the multiple common-mode filter capacitors, this connection method ensures that common-mode noise can be directly discharged to ground through the filter capacitors, while avoiding interference with other circuits. Using multiple common-mode filter capacitors enables multi-stage filtering, further improving the suppression capability of common-mode noise. Multi-stage filtering can cover a wider frequency range, providing more comprehensive noise suppression.

[0071] In one embodiment, the common-mode filter capacitor and the differential-mode filter capacitor may be decoupling capacitors.

[0072] In one embodiment, after rectification, the DC-side circuit generates a large amount of high-frequency noise and harmonics due to the rapid switching of switching elements such as IGBTs. After rectification, a combination of common-mode inductors, common-mode filter capacitors, and differential-mode filter capacitors is adopted, and the common-mode filter capacitors and differential-mode filter capacitors are arranged close to the IGBT side to further filter out high-frequency noise and achieve effective suppression of electromagnetic interference.

[0073] In one embodiment, the electromagnetic interference suppression circuit further includes a driving module 40; such as Figure 5 As shown, Figure 5 This is another schematic diagram of an electromagnetic interference suppression circuit for an inverter provided in an embodiment of this application.

[0074] Specifically, when the driving module 40 is connected to the rectified suppression module 30, the driving module 40 is connected to the second filtering submodule 302 in the rectified suppression module 30.

[0075] In one embodiment, the driving module 40 includes multiple IGBT device bridges, wherein each IGBT device bridge includes a first IGBT device and a second IGBT device; wherein the gates of the first IGBT device and the second IGBT device are respectively connected to the driving signal output terminal, the collector of the first IGBT device is connected to the positive terminal of the DC bus, the emitter of the first IGBT device is connected to the collector of the second IGBT device, and the emitter of the second IGBT device is connected to the negative terminal of the DC bus, such as... Figure 6 As shown, Figure 6 This is a schematic diagram of the structure of the driver module provided in an embodiment of this application.

[0076] Specifically, the drive module 40 includes at least three IGBT device bridges, wherein the three IGBT device bridges include a first IGBT device bridge, a second IGBT device bridge, and a third IGBT device bridge.

[0077] Specifically, the first IGBT device bridge, the second IGBT device bridge, and the third IGBT device bridge are connected in parallel. By using multiple IGBT device bridges in parallel, the overall driving capability of the drive module 40 can be improved. The parallel IGBT devices can share the current load, reduce the current stress of individual devices, and thus improve the current handling capability of the entire drive module 40.

[0078] Specifically, connecting the drive module 40 to the second filter submodule 302 in the rectified suppression module 30 can reduce the interference of the drive signal on the power supply; the second filter submodule 302 can suppress common-mode noise in the drive signal, thereby reducing the impact of this noise on the power supply and other circuits and improving the electromagnetic compatibility of the entire system.

[0079] Figure 7 This is a schematic diagram of a PCB board layout provided in an embodiment of this application; as shown... Figure 7 As shown, the PCB board includes the electromagnetic interference suppression circuit described in Embodiment 1 above, specifically as follows:

[0080] In one embodiment, the electromagnetic interference suppression circuit includes a pre-rectification suppression module, a rectification-inverter module, and a post-rectification suppression module, wherein the post-rectification suppression module includes a first filtering submodule and a second filtering submodule.

[0081] In one embodiment, the rectifier-inverter module and the second filter submodule are physically combined to form a first combined module; the first combined module, the pre-rectification suppression module, and the first filter submodule are physically isolated from each other.

[0082] Specifically, the PCB layout of the PCB adopts a partitioning strategy, dividing the electromagnetic interference suppression circuit printed on the PCB into a pre-rectification suppression module, a rectification-inverter module, and a post-rectification suppression module. Among them, the rectification-inverter module and the second filter sub-module in the post-rectification suppression module are physically combined to form a first combined module to reduce the connection length between them and reduce electromagnetic interference. The first combined module is centrally located on the output side of the PCB. The first filter sub-module in the pre-rectification suppression module and the post-rectification suppression module are each treated as separate areas on the PCB and arranged on the input side of the PCB.

[0083] Specifically, when the first filter submodule in the pre-rectification suppression module and the post-rectification suppression module are physically isolated from the first combined module, separate copper traces are used in each area, and the traces are kept as short, straight, and uniform in width as possible to reduce impedance mismatch and signal reflection. At the same time, sufficient spacing is maintained between the traces to avoid mutual interference of electromagnetic fields.

[0084] In one embodiment, the ground wire in the PCB board is designed using a star grounding or multi-point grounding strategy to ensure low impedance and uniformity of the ground wire system and effectively suppress electromagnetic interference caused by ground loop current.

[0085] In one embodiment, the length of high-frequency signal lines in the PCB board is minimized and loops are avoided to reduce radiation and coupling.

[0086] In one embodiment, key components such as capacitors and inductors on the PCB board should be arranged close to their filtering objects to reduce the influence of parasitic parameters.

[0087] In the above embodiments, the descriptions of each embodiment have different focuses. For parts that are not described in detail in a certain embodiment, please refer to the relevant descriptions in other embodiments.

[0088] In the description of this application, it should be understood that the terms "center", "longitudinal", "lateral", "length", "width", "thickness", "upper", "lower", "front", "rear", "left", "right", "vertical", "horizontal", "top", "bottom", "inner", "outer", "clockwise", "counterclockwise", etc., indicate the orientation or positional relationship based on the orientation or positional relationship shown in the accompanying drawings. They are used only for the convenience of describing this application and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, or be constructed and operated in a specific orientation. Therefore, they should not be construed as limitations on this application.

[0089] Furthermore, the terms "first" and "second" are used for descriptive purposes only and should not be construed as indicating or implying relative importance or implicitly specifying the number of technical features indicated. Thus, a feature defined as "first" or "second" may explicitly or implicitly include one or more of that feature. In the description of this application, "multiple" means two or more, unless otherwise explicitly specified.

[0090] In this application, unless otherwise expressly specified and limited, the terms "installation," "connection," "joining," and "fixing," etc., should be interpreted broadly. For example, they can refer to a connection, a detachable connection, or an integral part; they can refer to a mechanical connection or an electrical connection; they can refer to a direct connection or an indirect connection through an intermediate medium; they can refer to the internal communication of two components or the interaction between two components. Those skilled in the art can understand the specific meaning of the above terms in this application according to the specific circumstances.

[0091] In this application, unless otherwise expressly specified and limited, "above" or "below" the second feature can include direct contact between the first and second features, or contact between the first and second features through another feature between them. Furthermore, "above," "over," and "on top" of the second feature includes the first feature being directly above or diagonally above the second feature, or simply indicates that the first feature is at a higher horizontal level than the second feature. "Below," "below," and "under" the second feature includes the first feature being directly below or diagonally below the second feature, or simply indicates that the first feature is at a lower horizontal level than the second feature.

[0092] In the description of this specification, the references to terms such as "one embodiment," "some embodiments," "example," "specific example," or "some examples," etc., indicate that a specific feature, structure, material, or characteristic described in connection with that embodiment or example is included in at least one embodiment or example of this application. The illustrative expressions of the above terms in this specification should not be construed as necessarily referring to the same embodiment or example. Furthermore, the specific features, structures, materials, or characteristics described may be combined in any suitable manner in one or more embodiments or examples. In addition, those skilled in the art can combine and integrate the different embodiments or examples described in this specification.

[0093] Obviously, those skilled in the art can make various modifications and variations to this application without departing from the spirit and scope of this application. Since these modifications and variations fall within the scope of the claims and their equivalents, this application also intends to include these modifications and variations.

[0094] The above description describes specific embodiments of this application, but the scope of protection of this application is not limited thereto. Any person skilled in the art can easily conceive of various equivalent modifications or substitutions within the technical scope disclosed in this application, and these modifications or substitutions should all be covered within the scope of protection of this application. Therefore, the scope of protection of this application should be determined by the scope of the claims.

Claims

1. An electromagnetic interference suppression circuit for an inverter, characterized by, Includes: pre-rectification suppression module, rectification-inverter module, and post-rectification suppression module; The pre-rectification suppression module is connected to the rectification inverter module, and the rectification inverter module is connected to the post-rectification suppression module; The pre-rectification suppression module includes a power input line, an X capacitor, a Y capacitor, and a varistor. The first end of the X capacitor is connected to the power input line, the second end of the X capacitor is connected to the first end of the Y capacitor, and the second end of the Y capacitor is grounded. The first end of the varistor is connected to the power input line, and the second end of the varistor is grounded. The rectified suppression module includes a common-mode inductor, a common-mode filter capacitor, and a differential-mode filter capacitor. The common-mode inductor is connected in series with the DC bus, the differential-mode filter capacitor is connected in parallel with the DC bus, the first terminal of the common-mode filter capacitor is connected to the DC bus, and the second terminal of the common-mode filter capacitor is grounded.

2. The electromagnetic interference suppression circuit for an inverter according to claim 1, wherein The pre-rectification suppression module includes a power input line, an X capacitor, a Y capacitor, and a varistor, specifically comprising: The pre-rectification suppression module includes a three-phase power input submodule, an electromagnetic interference protection submodule, and a lightning surge protection submodule. The three-phase power input submodule is connected to the electromagnetic interference protection submodule, and the electromagnetic interference protection submodule is connected to the lightning surge protection submodule. The three-phase power input submodule includes an A-phase power input line, a B-phase power input line, and a C-phase power input line. The electromagnetic interference protection submodule includes at least a first X capacitor, a second X capacitor, a third X capacitor, a first Y capacitor, and a second Y capacitor; The lightning surge protection submodule includes at least a first varistor, a second varistor, and a third varistor.

3. The electromagnetic interference suppression circuit for an inverter according to claim 2, wherein In the pre-rectification suppression module, the first terminal of the X capacitor is connected to the power input line, the second terminal of the X capacitor is connected to the first terminal of the Y capacitor, and the second terminal of the Y capacitor is grounded. Specifically, this includes: The first terminal of the first X capacitor is connected to the A-phase power input line, the first terminal of the second X capacitor is connected to the B-phase power input line, and the first terminal of the third X capacitor is connected to the C-phase power input line. The second end of the first X capacitor, the second end of the second X capacitor, and the second end of the third X capacitor are connected to form a first common node. The first end of the first Y capacitor is connected to the first end of the second Y capacitor to form a second common node. The first common node and the second common node are connected. The second end of the first Y capacitor and the second end of the second Y capacitor are grounded.

4. The electromagnetic interference suppression circuit for an inverter according to claim 2, wherein The first terminal of the varistor is connected to the power input line, and the second terminal of the varistor is grounded, specifically including: The first end of the first varistor is connected to the A-phase power input line, the first end of the second varistor is connected to the B-phase power input line, and the first end of the third varistor is connected to the C-phase power input line. The second terminals of the first varistor, the second varistor, and the third varistor are respectively grounded.

5. The electromagnetic interference suppression circuit for an inverter of claim 4, wherein, The lightning surge protection submodule also includes a protection diode, wherein the first end of the protection diode is connected to the second end of the first varistor, the second end of the second varistor and the second end of the third varistor, and the second end of the protection diode is grounded.

6. The electromagnetic interference suppression circuit for an inverter of claim 1, wherein The rectified suppression module includes a common-mode inductor, a common-mode filter capacitor, and a differential-mode filter capacitor, specifically including: The post-rectified suppression module includes a first filtering submodule and a second filtering submodule, wherein the first filtering submodule is connected to the second filtering submodule; The first filtering submodule includes at least a first differential-mode filter capacitor, a second differential-mode filter capacitor, and a first common-mode inductor; The second filtering submodule includes at least a first common-mode filter capacitor, a second common-mode filter capacitor, a third common-mode filter capacitor, and a fourth common-mode filter capacitor.

7. The electromagnetic interference suppression circuit for an inverter of claim 6, wherein The common-mode inductor is connected in series with the DC bus, and the differential-mode filter capacitor is connected in parallel with the DC bus, specifically including: The first and second pins of the first common-mode inductor are connected in series with the positive terminal of the DC bus, and the third and fourth pins of the first common-mode inductor are connected in series with the negative terminal of the DC bus. The first terminal of the first differential mode filter capacitor and the first terminal of the second differential mode filter capacitor are respectively connected to the positive terminal of the DC bus, and the second terminal of the first differential mode filter capacitor and the second terminal of the second common mode filter capacitor are respectively connected to the negative terminal of the DC bus.

8. The electromagnetic interference suppression circuit for an inverter according to claim 6, wherein The first terminal of the common-mode filter capacitor is connected to the DC bus, and the second terminal of the common-mode filter capacitor is grounded, specifically including: The first terminal of the first common-mode filter capacitor and the first terminal of the third common-mode filter capacitor are respectively connected to the positive terminal of the DC bus, and the first terminal of the second common-mode filter capacitor and the first terminal of the fourth common-mode filter capacitor are respectively connected to the negative terminal of the DC bus. The second terminals of the first common-mode filter capacitor, the second common-mode filter capacitor, the third common-mode filter capacitor, and the fourth common-mode filter capacitor are respectively grounded.

9. A PCB board for an inverter, characterized by, include: The electromagnetic interference suppression circuit according to any one of claims 1-8; The electromagnetic interference suppression circuit includes a pre-rectification suppression module, a rectification-inverter module, and a post-rectification suppression module, wherein the post-rectification suppression module includes a first filter submodule and a second filter submodule. The rectifier-inverter module and the second filter submodule are physically combined to form a first combined module; The first combination module, the pre-rectification suppression module, and the first filter submodule are physically isolated from each other.

10. The PCB board for an inverter according to claim 9, wherein The grounding wires in the PCB board are designed using a star grounding or multi-point grounding strategy.

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