Charge pump circuit, display chip and display device

Abstract

This utility model discloses a charge pump circuit, a display chip, and a display device. After the charge pump circuit is started, it periodically alternates between a charging phase and a pumping phase. The charge pump circuit includes a pumping capacitor and a control circuit. The control circuit is used to control the second terminal of the pumping capacitor to selectively connect to at least one of the non-positive supply voltages during the charging phase, and to control the first terminal of the pumping capacitor to connect to at least two positive supply voltages in a time-sharing manner, thereby reducing the power consumption of the charge pump circuit.

Description

Technical Field

[0001] This utility model relates to the field of integrated circuit technology, and in particular to a charge pump circuit, a display chip, and a display device. Background Technology

[0002] In display devices, it is usually necessary to convert the power supply voltage provided by the battery into several basic voltages, and then use a switching power supply (such as a charge pump circuit) to convert these basic voltages into a common voltage with a certain adjustable range, so that the common electrodes in the display panel can be driven by the common voltage, thereby achieving normal display.

[0003] In display chips, switching power supplies are typically used to convert three different power base voltages into a common voltage with a certain adjustable range. When the switching power supply uses a charge pump circuit, the output voltage Vout of the switching power supply can be adjusted within a certain range by switching the pump voltage multiplier, i.e., switching the base voltage supplied to the input terminal of the switching power supply. To save power consumption, for a specific output voltage Vout, the lowest pump voltage multiplier that can cover that output voltage Vout is generally selected. Table 1 shows the correspondence between a pump voltage multiplier and the theoretical value of the output voltage Vout in the prior art.

[0004] Table 1

[0005] Pump pressure ratio Vout_rt 1.5 V1+V2 2 2*V2 2.5 V1+V2-V3 3 2*V2-V3

[0006] Taking a base voltage of V1=1.8V, V2=6V, V3=-6V, an output voltage Vout of 13V, and a load current of 3mA as an example, theoretically, both pump voltage ratios of 2.5 and 3 can achieve an output voltage Vout of 13V. However, choosing a pump voltage ratio of 2.5 to achieve an output voltage Vout of 13.8V saves power compared to choosing a pump voltage ratio of 3 to achieve an output voltage Vout of 18V. The power saving is (18-13.8)V*3mA=12.6mW.

[0007] However, due to voltage drop issues, the output voltage Vout is difficult to reach the theoretical value. Generally, the maximum value that the output voltage can actually reach is Vout_max = Vout_rt - (Rout + Rline) * iload, where Vout_rt is the theoretical value of the output voltage Vout under the set pump voltage ratio, Rout is the output impedance of the switching power supply, Rline is the parasitic resistance of the switching power supply, and iload is the load current.

[0008] Taking V1=1.8V, V2=6V, and V3=-6V as an example, the theoretical value of the output voltage Vout corresponding to a pump voltage ratio of 2.5 is Vout_rt, which is 13.8V. Assuming Rout=500Ω, Rline=100Ω, and iload=3mA, the actual maximum value that the output voltage Vout can reach is Vout_max=13.8-(800+100)*3m=12V. Therefore, when the required output voltage Vout is between 12V and 13.8V, a pump voltage ratio of 2.5 cannot be used, and only a pump voltage ratio of 3 can be used, resulting in higher circuit power consumption.

[0009] Based on this, the present invention proposes a new charge pump circuit to solve the above problems. Utility Model Content

[0010] In view of the above problems, the purpose of this utility model is to provide a charge pump circuit, a display chip, and a display device, thereby reducing the power consumption of the charge pump circuit.

[0011] According to a first aspect of the present invention, a charge pump circuit is provided. After the charge pump circuit is started, it periodically alternates between a charging phase and a pumping phase. The charge pump circuit includes a pumping capacitor and a control circuit. The control circuit is used to control the second terminal of the pumping capacitor to selectively connect to at least one of the non-positive supply voltages during the charging phase, and to control the first terminal of the pumping capacitor to connect to at least two positive supply voltages in a time-sharing manner.

[0012] Optionally, the control circuit divides the charging stage into at least two sub-charging stages in sequence, and controls the first terminal of the pump capacitor to be connected to the corresponding positive power supply voltage in each sub-charging stage.

[0013] Optionally, the control circuit includes a feedback module for dividing the output voltage of the charge pump circuit to obtain a feedback voltage; a time-sharing proportional control module for generating at least two non-overlapping time-sharing control signals; and a comparison module for comparing the reference voltage with the feedback voltage and generating a control signal based on the comparison result.

[0014] Optionally, the number of positive supply voltages is two. The time-sharing proportional control module includes a counter for counting a clock signal after reset to obtain a count value; a first comparator for generating a time-sharing signal when the count value reaches a preset value; and a first non-overlapping signal generation circuit for inverting the time-sharing signal and performing non-overlapping processing on the inverted signal and the time-sharing signal to obtain a first time-sharing control signal and a second time-sharing control signal. The first time-sharing control signal is used to control the connection between the first positive supply voltage and the first terminal of the pump capacitor, and the second time-sharing control signal is used to control the connection between the second positive supply voltage and the first terminal of the pump capacitor.

[0015] Optionally, the number of the at least one non-positive supply voltage is two. The control circuit further includes a second comparator for comparing the reference voltage with a threshold voltage and generating a comparison signal based on the comparison result; a second non-overlapping signal generation circuit for inverting the comparison signal and performing non-overlapping processing on the inverted signal and the comparison signal to obtain a first control signal and a second control signal; wherein, when the reference voltage is greater than the threshold voltage, the first control signal controls the second terminal of the pump capacitor to connect to the first non-positive supply voltage during the charging phase, and when the reference voltage is not greater than the threshold voltage, the second control signal controls the second terminal of the pump capacitor to connect to the second non-positive supply voltage during the charging phase, the threshold voltage being equal to the sum of the voltage values ​​of the at least two positive supply voltages, and the voltage value of the second non-positive supply voltage being less than the voltage value of the first non-positive supply voltage.

[0016] Optionally, the charge pump circuit further includes a first selector for selecting one of a plurality of preset values ​​according to a selection signal and providing it to the first comparator; and a second selector for selecting one of a plurality of reference voltages according to the selection signal and providing it to the comparison module and the second comparator.

[0017] Optionally, the comparison module includes a third comparator, whose power supply voltage is the first positive power supply voltage and the ground voltage, used to compare the feedback voltage and the reference voltage, and generate a third control signal based on the comparison result; a fourth comparator, whose power supply voltage is the second positive power supply voltage and the ground voltage, used to compare the feedback voltage and the reference voltage, and generate a fourth control signal based on the comparison result; the charge pump circuit further includes a first transistor connected between the first positive power supply voltage and the first terminal of the pump capacitor, the control terminal of the first transistor receiving the third control signal; and a second transistor connected between the second positive power supply voltage and the first terminal of the pump capacitor, the control terminal of the second transistor receiving the fourth control signal.

[0018] Optionally, the comparison module includes a fifth comparator, whose power supply voltage is the second positive power supply voltage and the ground voltage, used to compare the feedback voltage and the reference voltage, and generate a fifth control signal based on the comparison result; the charge pump circuit further includes: a first transistor and a third transistor, connected sequentially between the first positive power supply voltage and the first terminal of the pump capacitor, the control terminal of the first transistor receiving the first time-division control signal, and the control terminal of the third transistor receiving the fifth control signal; a second transistor, connected between the second positive power supply voltage and the intermediate node between the first transistor and the third transistor, the control terminal of the second transistor receiving the second time-division control signal.

[0019] Optionally, the charge pump circuit further includes a high-voltage transistor for isolating the first terminal of the pump capacitor from the third transistor, or isolating the first terminal of the pump capacitor from the first transistor and the second transistor.

[0020] According to a second aspect of the present invention, a display chip is also provided, comprising the charge pump circuit as described above.

[0021] According to a third aspect of the present invention, a display device is also provided, comprising a charge pump circuit as described above or a display chip as described above.

[0022] The present invention provides a charge pump circuit, a display chip, and a display device, including a pump voltage capacitor and a control circuit. During the charging phase of the charge pump circuit, the control circuit controls the second terminal of the pump voltage capacitor to selectively connect to at least one of the non-positive supply voltages, and controls the first terminal of the pump voltage capacitor to connect to at least two positive supply voltages in a time-sharing manner, thereby reducing the power consumption of the charge pump circuit.

[0023] Furthermore, the charge pump circuit provided by this utility model is also equipped with a high-voltage transistor to prevent damage to the circuit when the voltage at the first end of the pump capacitor is too high. Attached Figure Description

[0024] The above and other objects, features and advantages of the present invention will become clearer from the following description of embodiments of the present invention with reference to the accompanying drawings, in which:

[0025] Figure 1 A circuit diagram of a charge pump circuit is shown;

[0026] Figure 2 It shows Figure 1 The timing diagram of the charge pump circuit shown is at a pump voltage multiplier of 2.5.

[0027] Figure 3A timing diagram of the output voltage of a prior art charge pump circuit is shown;

[0028] Figure 4 A schematic diagram of a charge pump circuit according to an embodiment of the present invention is shown;

[0029] Figures 5a-5c A schematic diagram showing the power consumption of the charge pump circuit of this utility model embodiment under different states is provided.

[0030] Figure 6 A schematic diagram of the charge pump circuit according to the first embodiment of the present invention is shown;

[0031] Figure 7 A schematic diagram of the charge pump circuit according to the second embodiment of the present invention is shown;

[0032] Figure 8 A circuit diagram of a time-sharing proportional control module according to an embodiment of the present invention is shown;

[0033] Figure 9 A timing diagram of some signals in the control circuit according to an embodiment of the present invention is shown;

[0034] Figure 10 A schematic diagram of the selection module according to an embodiment of the present invention is shown;

[0035] Figure 11 A schematic diagram illustrating the acquisition of preset values ​​according to an embodiment of the present invention is shown. Detailed Implementation

[0036] Various embodiments of the present invention will now be described in more detail with reference to the accompanying drawings. In the various drawings, the same elements or modules are indicated by the same or similar reference numerals. For clarity, the various parts in the drawings are not drawn to scale.

[0037] It should be understood that, in the following description, "circuit" may include single or combined hardware circuits, programmable circuits, state machine circuits, and / or elements capable of storing instructions executed by the programmable circuit. When an element or circuit is said to be "connected" to another element or "connected" between two nodes, it may be directly coupled or connected to the other element, or there may be intermediate elements; the connection between elements may be physical, logical, or a combination thereof. Conversely, when an element is said to be "directly coupled to" or "directly connected" to another element, it means that there are no intermediate elements between them.

[0038] Furthermore, certain terms are used in this patent specification and claims to refer to specific components. Those skilled in the art will understand that hardware manufacturers may use different names to refer to the same component. This patent specification and claims do not distinguish components based on differences in name, but rather on differences in function.

[0039] Furthermore, it should be noted that in this document, relational terms such as "first" and "second" are used only to distinguish one entity or operation from another, and do not necessarily require or imply any such actual relationship or order between these entities or operations. Moreover, the terms "comprising," "including," or any other variations thereof are intended to cover non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements includes not only those elements but also other elements not expressly listed, or elements inherent to such a process, method, article, or apparatus. Without further limitations, an element defined by the phrase "comprising one..." does not exclude the presence of other identical elements in the process, method, article, or apparatus that includes said element.

[0040] Figure 1 A circuit diagram of a charge pump circuit is shown.

[0041] See Figure 1 The charge pump circuit 100 includes switches S1-S6, a pump voltage capacitor Cp, and a filter capacitor C1. Switch S1 is connected between the positive supply voltage V1 and the first terminal of the pump voltage capacitor Cp; switch S2 is connected between the positive supply voltage V2 and the first terminal of the pump voltage capacitor Cp; switch S3 is connected between the non-positive supply voltage V4 and the second terminal of the pump voltage capacitor Cp; switch S4 is connected between the non-positive supply voltage V3 and the second terminal of the pump voltage capacitor Cp; switch S5 is connected between the first terminal of the pump voltage capacitor Cp and the output terminal of the charge pump circuit 100; switch S6 is connected between the second terminal of the pump voltage capacitor Cp and the pump voltage V5; and filter capacitor C1 is connected between the output terminal of the charge pump circuit 100 and the ground terminal. The pump voltage V5 is equal to the positive supply voltage V2. A positive supply voltage refers to a supply voltage with a value greater than 0, and a non-positive supply voltage refers to a supply voltage with a value less than or equal to 0.

[0042] After the charge pump circuit 100 is started, it alternates between charging mode and pumping mode. When the charge pump circuit 100 is operating in charging mode, one of the switches S1-S2 and one of the switches S3-S4 are open, and switches S5-S6 are closed to charge the pumping capacitor Cp. When the charge pump circuit 100 is operating in pumping mode, switches S1-S4 are closed, and switches S5-S6 are open to raise the voltage at the first terminal of the pumping capacitor Cp and discharge the output terminal of the charge pump circuit 100 through the filter capacitor C1.

[0043] When the load connected to the charge pump circuit 100 is light, the load current is small, and the voltage drop across the charge pump circuit 100 is small. Therefore, at the end of the charging phase, the voltage at the first terminal of the pump capacitor Cp is close to the positive supply voltage connected to it. However, when the load connected to the charge pump circuit 100 is heavy, the load current is large, and the voltage drop across the charge pump circuit 100 is large. Therefore, at the end of the charging phase, the voltage at the first terminal of the pump capacitor Cp is much smaller than the positive supply voltage connected to it, resulting in insufficient charging of the pump capacitor Cp, which in turn reduces the final output voltage Vout value.

[0044] Furthermore, because the charge pump circuit 100 periodically switches its operating mode during operation, the final output voltage Vout will be as follows: Figure 2 The figure shows periodic ripple, which is usually small, around a few hundred mV. Furthermore, through dual-pump technology, the ripple of the output voltage Vout can be reduced to a few tens of mV. Therefore, the accuracy of the output voltage Vout is relatively high.

[0045] To reduce the power consumption of the charge pump circuit 100, existing technology dynamically switches the pump voltage ratio by detecting the output voltage Vout. However, frequent switching between high and low pump voltage ratios can cause the output voltage Vout to... Figure 3 As shown, it has a large ripple, which will result in poor accuracy of the output voltage Vout.

[0046] Based on this, the present invention proposes a new charge pump circuit to solve the above problems.

[0047] Figure 4 A circuit diagram of a charge pump circuit according to an embodiment of the present invention is shown.

[0048] See Figure 4 The charge pump circuit 200 provided in this embodiment includes a pump voltage capacitor Cp, a control circuit 210, and a filter capacitor C1 connected between the output terminal and the ground terminal of the charge pump circuit 200.

[0049] After the charge pump circuit 200 is started, it periodically alternates between the charging phase and the pumping phase. The control circuit 210 is used to control the first terminal of the pumping capacitor Cp to be connected to at least two positive supply voltages in a time-sharing manner during the charging phase, and to control the second terminal of the pumping capacitor Cp to be selectively connected to one of at least one non-positive supply voltage.

[0050] The connection of the second terminal of the pump capacitor Cp to the non-positive supply voltage depends on the reference voltage VREF. At least two positive supply voltages must have different values. A positive supply voltage is one with a value greater than 0, while a non-positive supply voltage is one with a value less than or equal to 0.

[0051] Similar to existing technology, during the pumping phase of the charge pump circuit 200, the first end of the pumping capacitor Cp is connected to the output terminal of the charge pump circuit 200, and the second end of the pumping capacitor Cp is connected to the pumping voltage V5.

[0052] Specifically, the control circuit 210 divides the charging stage of the charge pump circuit 200 into at least two sub-charging stages, and controls the first terminal of the pump voltage capacitor Cp to be connected to a corresponding positive supply voltage in each sub-charging stage. The time corresponding to some of the at least two sub-charging stages can be 0. For example, from the first sub-charging stage to the last sub-charging stage, the voltage value of the positive supply voltage connected to the first terminal of the pump voltage capacitor Cp increases or decreases sequentially.

[0053] Furthermore, the first terminal of the pump capacitor Cp is connected to each positive supply voltage via a switch, the first terminal of the pump capacitor Cp is connected to the output terminal of the charge pump circuit 200 via a switch, the second terminal of the pump capacitor Cp is connected to each non-positive supply voltage via a switch, and the second terminal of the pump capacitor Cp is connected to the pump voltage V5 via a switch.

[0054] The control circuit 210 controls the first terminal of the pump capacitor Cp to be connected to at least two positive supply voltages in a time-sharing manner by controlling the switch connected between the first terminal of the pump capacitor Cp and each positive supply voltage, and controls the second terminal of the pump capacitor Cp to be selectively connected to at least one of the non-positive supply voltages by controlling the switch connected between the second terminal of the pump capacitor Cp and each non-positive supply voltage.

[0055] Figure 6 A circuit diagram of a charge pump circuit according to a first embodiment of the present invention is shown.

[0056] See Figure 6 The control circuit 210 includes a switch switching module 214, which is used to control the second terminal of the pump capacitor Cp to selectively connect to at least one of the non-positive supply voltages.

[0057] The control circuit 210 also includes a feedback module 211, a comparison module 212, and a time-sharing proportional control module 213. The feedback module 211 divides the output voltage Vout to obtain the feedback voltage VFB. The time-sharing proportional control module 213 generates at least two non-overlapping time-sharing control signals. The comparison module 212 compares the feedback voltage VFB with the reference voltage VREF and generates a control signal ctrl based on the comparison result.

[0058] In the first embodiment of this application, there are two positive supply voltages, V1 and V2. There are two negative supply voltages, V3 and V4. The pump voltage V5 is equal to the voltage value of V2. Wherein, V2 > V1 > V4 > V3. For example, V1 = 1.8V, V2 = V5 = 6V, V3 = -6V, and V4 = 0V (i.e., GND).

[0059] The charge pump circuit 200 includes switches S1-S6. Switch S1 is connected between the positive supply voltage V1 and the first terminal of the pump capacitor Cp; switch S2 is connected between the positive supply voltage V2 and the first terminal of the pump capacitor Cp; switch S3 is connected between the non-positive supply voltage V4 and the second terminal of the pump capacitor Cp; switch S4 is connected between the non-positive supply voltage V3 and the second terminal of the pump capacitor Cp; switch S5 is connected between the first terminal of the pump capacitor Cp and the output terminal of the charge pump circuit 200; and switch S6 is connected between the second terminal of the pump capacitor Cp and the pump voltage V5.

[0060] During the charging phase of the charge pump circuit 200, the first terminal of the pump voltage capacitor Cp is connected to the positive supply voltages V1 and V2 in a time-sharing manner, and the second terminal of the pump voltage capacitor Cp is selectively connected to one of the non-positive supply voltages V3 and V4. During the pumping phase of the charge pump circuit 200, the first terminal of the pump voltage capacitor Cp is connected to the output terminal of the charge pump circuit 200, and the second terminal of the pump voltage capacitor Cp is connected to the pump voltage V5.

[0061] The control circuit 210 divides the charging stage into two sub-charging stages in sequence, and controls the first terminal of the pump capacitor Cp to be connected to the positive supply voltage V1 in the first sub-charging stage, and controls the first terminal of the pump capacitor Cp to be connected to the positive supply voltage V2 in the second sub-charging stage.

[0062] See Figure 5a This is a power consumption diagram of the charge pump circuit 200 when the first sub-charging phase lasts for 0 seconds and the second terminal of the pump voltage capacitor Cp is connected to a non-positive supply voltage V3; see [link to diagram]. Figure 5b The diagram shows the power consumption of the charge pump circuit 200 when the first and second sub-charging phases are of equal duration and the second terminal of the pump capacitor Cp is connected to a non-positive supply voltage V3; see [link to diagram]. Figure 5cThe diagram shows the power consumption of the charge pump circuit 200 when the time of the first sub-charging stage is longer than the time of the second sub-charging stage, and the second terminal of the pump capacitor Cp is connected to a non-positive supply voltage V3. Figures 5a-5c In the diagram, the dotted pattern represents power consumption, compared to... Figures 5a-5c It can be seen that the shorter the duration of the second sub-charging phase, the lower the power consumption of the circuit. In circuit design, both power consumption and performance need to be considered. Therefore, the duration of the second sub-charging phase must at least ensure that by the end of the charging phase, the voltage of the pump capacitor Cp is charged to a value greater than or equal to the difference between the reference voltage VREF and the pump voltage V5.

[0063] Table 2 compares the power consumption of the charge pump circuit 200 in the above example with that of the charge pump circuit in the prior art.

[0064] Table 2

[0065] Vout setting voltage Existing pump pressure ratio The proportion of the first sub-charging stage to the second sub-charging stage in this application Power saving 13.8 3 0% / 100% Does not save power 13.5 3 25% / 75% (V2-V1)*25% 13 3 50% / 50% (V2-V1)*50% 12.5 3 75% / 25% (V2-V1)*75% 12 2.5 100% / 0 Does not save power

[0066] Furthermore, the feedback module 211 includes resistors R1 and R2 connected in sequence between the output terminal and the ground terminal of the charge pump circuit 200, with the intermediate node of resistors R1 and R2 providing the feedback voltage VFB.

[0067] The time-sharing proportional control module 213 is used to generate two non-overlapping time-sharing control signals ctrl11_1 and ctrl12_1.

[0068] The comparison module 212 includes comparator comp1 and comparator comp2. The supply voltage of comparator comp1 is the positive supply voltage V1 and the ground voltage GND (not shown in the figure), and the supply voltage of comparator comp2 is the positive supply voltage V2 and the ground voltage GND (not shown in the figure). Comparator comp1 is used to compare the feedback voltage VFB and the reference voltage VREF after startup, and outputs a control signal ctrl1 according to the comparison result to control the opening and closing of switch S1. Comparator comp2 is used to compare the feedback voltage VFB and the reference voltage VREF after startup, and outputs a control signal ctrl2 according to the comparison result to control the opening and closing of switch S2.

[0069] Comparators comp1 and comp2 each have a control terminal, a positive input terminal, a negative input terminal, and an output terminal. The control terminal of comparator comp1 receives a time-division control signal ctrl1_1, which is used to control the on and off states of comparator comp1. The positive input terminal of comparator comp1 is connected to the feedback voltage VFB, and the negative input terminal is connected to the reference voltage VREF. The output terminal of comparator comp1 provides the control signal ctrl1. The control terminal of comparator comp2 is connected to a time-division control signal ctrl12_1, which is used to control the on and off states of comparator comp2. The positive input terminal of comparator comp2 is connected to the feedback voltage VFB, and the negative input terminal is connected to the reference voltage VREF. The output terminal of comparator comp2 provides the control signal ctrl2.

[0070] The switch switching module 214 generates two non-overlapping control signals, ctrl3 and ctrl3_1. The switch switching module 214 includes a comparator 214a and a non-overlapping signal generation circuit 214b. The comparator 214a compares the reference voltage VREF with the threshold voltage V6 and outputs a comparison signal based on the comparison result. The non-overlapping signal generation circuit 214b inverts the comparison signal and performs non-overlapping processing on the inverted and compared signals to obtain the control signals ctrl3 and ctrl3_1. The control terminal of switch S3 receives the control signal ctrl3, and the control terminal of switch S4 receives the control signal ctrl3_1. The non-overlapping signal generation circuit 214b can use any existing circuit to perform non-overlapping processing on the inverted and compared signals.

[0071] Specifically, when the reference voltage VREF is greater than the threshold voltage V6, switch S4 is turned on, and the second terminal of the pump capacitor Cp is connected to the non-positive supply voltage V3. When the reference voltage VREF is not greater than the threshold voltage V6, switch S3 is turned on, and control signal ctrl3_1 controls the second terminal of the pump capacitor Cp to be connected to the non-positive supply voltage V4. The threshold voltage V6 is equal to the sum of the voltage values ​​of at least two positive supply voltages. The voltage value of the non-positive supply voltage V3 is less than the voltage value of the non-positive supply voltage V4.

[0072] In one example, switch S1 is implemented using a first transistor, and switch S2 is implemented using a second transistor.

[0073] Furthermore, to prevent excessive voltage at the first terminal of the pump capacitor Cp from damaging the first and second transistors, the charge pump circuit 200 of this application also includes a high-voltage transistor MH. The first terminal of the high-voltage transistor MH is connected to the second terminals of switches S1 and S2, and the second terminal of the high-voltage transistor MH is connected to the first terminal of the pump capacitor Cp. The control terminal of the high-voltage transistor MH receives the control signal ctrl4, which turns on during the charging phase of the charge pump circuit 200 and turns off during the pumping phase of the charge pump circuit 200.

[0074] Figure 7 A schematic diagram of a charge pump circuit according to a second embodiment of the present invention is shown.

[0075] See Figure 7 The charge pump circuit 200 of the second embodiment of the present invention further includes a third transistor M1. The first terminal of the third transistor M1 is connected to the second terminals of switches S1 and S2. The second terminal of the third transistor M1 is connected to the first terminal of the high voltage transistor MH. The control terminal of the third transistor M1 receives the control signal ctrl5.

[0076] In addition, the feedback module 212 also includes a comparator comp3. The supply voltage of comparator comp3 is the positive supply voltage V2 and the ground voltage GND (not shown in the figure). The negative input terminal of comparator comp3 is connected to the reference voltage VREF, and the positive input terminal of comparator comp3 is connected to the feedback voltage VFB. The output terminal of comparator comp3 provides a control signal ctrl5 to the control terminal of the third transistor M1. The control signal ctrl5 can also be used as the control signal ctrl4 to control the turn-on and turn-off of the high-voltage transistor MH.

[0077] In the second embodiment of this utility model, the time-sharing proportional control module 213 generates non-overlapping time-sharing control signals ctrl1_1 and ctrl2_1. The control terminal of switch S1 receives the time-sharing control signal ctrl1_1, and the control terminal of switch S2 receives the time-sharing control signal ctrl2_1.

[0078] The charge pump circuit 200 of the second embodiment of this utility model can reduce the number of comparators by one compared to the charge pump circuit 200 of the first embodiment, thereby saving chip area.

[0079] It is understood that in other embodiments of this application, the number of positive supply voltages may be greater than two, the number of non-positive supply voltages may be greater than or less than two, and the number of pump voltages is not limited to one.

[0080] Figure 8 A circuit diagram of a time-sharing proportional control module according to an embodiment of the present invention is shown.

[0081] See Figure 8 The time-sharing proportional control circuit 213 includes a counter 213a, a comparator 213b, and a non-overlapping signal generation circuit 213c.

[0082] Counter 213a is used to reset after the reset signal rst switches to a high level, and counts the clock signal clk after the reset to obtain the count value out.

[0083] Comparator 213b is used to compare the counting signal out with the preset value D[N-1:0] and generate a time-division signal based on the comparison result.

[0084] The non-overlapping signal generation circuit 213c is used to invert the time-division signal and perform non-overlapping processing on the inverted signal and the time-division signal to obtain the time-division control signal ctrl1_1 and the time-division control signal ctrl2_1. The non-overlapping signal generation circuit 213c can use any existing circuit to perform non-overlapping processing on the inverted signal and the time-division signal.

[0085] Figure 9 A timing diagram of some signals in the control circuit according to an embodiment of the present invention is shown.

[0086] See Figure 9 The reset signal rst switches to a high level at the end of the charging phase. Control signals ctrl1 and ctrl2 are non-overlapping signals to ensure that switches S1 and S2 do not conduct simultaneously. Control signal ctrl4 is high during the charging phase and low during the pumping phase. In the first sub-charging phase t1, signal ctrl1 (ctrl1_1) is high and signal ctrl2 (ctrl2_1) is low; in the second sub-charging phase t2, signal ctrl2 (ctrl2_1) is high and signal ctrl1 (ctrl1_1) is low.

[0087] Furthermore, the control circuit 210 also includes a selection module. Specifically, such as... Figure 10 As shown, the selection module includes selector 215 and selector 216. Selector 215 is used to select one from multiple preset values ​​D1[N-1:0]-Dm[N-1:0] according to the selection signal and output it to comparator 231b. Selector 216 is used to select one from multiple reference voltages VREF1-VREFx according to the selection signal and output it to comparator module 212 and comparator 214.

[0088] Furthermore, when the charge pump circuit 200 is applied to a display device, the selection signal can be a display mode selection signal.

[0089] The load will be significantly different for different display modes. Based on this, preset values ​​corresponding to different display modes can be set in advance, and the preset values ​​and reference voltage VREF can be updated simultaneously when the display mode is switched.

[0090] For example, see Figure 11 In each display mode, the output voltage is adjusted by regulating the time ratio of the first sub-charging stage t1 and the second sub-charging stage t2, and the output voltage value is measured by an oscilloscope until the output voltage stabilizes within a set range. The time interval t1 / t2 at this point is recorded as y. The time ratio of the first sub-charging stage t1 and the second sub-charging stage t2 is adjusted by regulating the preset value D[N-1:0] provided to comparator 213b. The preset value D[N-1:0] corresponding to any value between y and ay can be selected as the preset value D[N-1:0] for this display mode. For example, a is any value between 1.01 and 1.2, such as 1.1.

[0091] Furthermore, this utility model also provides a display chip, including the charge pump circuit 200 as described above.

[0092] Furthermore, this utility model also provides a display device, including the charge pump circuit 200 as described above or the display chip as described above.

[0093] The present invention provides a charge pump circuit, a display chip, and a display device, including a pump voltage capacitor and a control circuit. During the charging phase of the charge pump circuit, the control circuit controls the second terminal of the pump voltage capacitor to selectively connect to at least one of the non-positive supply voltages, and controls the first terminal of the pump voltage capacitor to connect to at least two positive supply voltages in a time-sharing manner, thereby reducing the power consumption of the charge pump circuit.

[0094] The embodiments of this utility model described above are examples of specific examples, and do not exhaustively describe all details, nor do they limit the utility model to only specific embodiments. Obviously, many modifications and variations can be made based on the above description. This specification selects and specifically describes these embodiments to better explain the principles and practical applications of this utility model, thereby enabling those skilled in the art to make good use of this utility model and its modifications. The scope of protection of this utility model should be determined by the scope defined by the claims of this utility model and their equivalents.

Claims

1. A charge pump circuit, characterized in that, After the charge pump circuit is started, it periodically alternates between the charging phase and the pumping phase. The charge pump circuit includes: A pump capacitor and a control circuit, wherein the control circuit is used to control the second terminal of the pump capacitor to selectively connect to one of at least one non-positive supply voltage during the charging phase, and to control the first terminal of the pump capacitor to connect to at least two positive supply voltages in a time-sharing manner.

2. The charge pump circuit of claim 1, wherein, The control circuit divides the charging stage into at least two sub-charging stages in sequence, and controls the first terminal of the pump capacitor to be connected to the corresponding positive power supply voltage in each sub-charging stage.

3. The charge pump circuit of claim 1, wherein, The control circuit includes: The feedback module is used to divide the output voltage of the charge pump circuit to obtain the feedback voltage; The time-sharing proportional control module is used to generate at least two non-overlapping time-sharing control signals; The comparison module is used to compare the reference voltage with the feedback voltage and generate a control signal based on the comparison result.

4. The charge pump circuit of claim 3, wherein, The number of positive power supply voltages is two, and the time-sharing proportional control module includes: A counter is used to count a clock signal after a reset to obtain a count value; A first comparator is used to generate a time-division signal when the count value reaches a preset value; A first non-overlapping signal generation circuit is used to invert the time-division signal and perform non-overlapping processing on the inverted signal and the time-division signal to obtain a first time-division control signal and a second time-division control signal. Wherein, the first time-sharing control signal is used to control the connection between the first positive power supply voltage and the first terminal of the pump capacitor, and the second time-sharing control signal is used to control the connection between the second positive power supply voltage and the first terminal of the pump capacitor.

5. The charge pump circuit of claim 4, wherein, The number of the at least one non-positive supply voltage is two, and the control circuit further includes: The second comparator is used to compare the reference voltage with the threshold voltage and generate a comparison signal based on the comparison result; The second non-overlapping signal generation circuit is used to invert the comparison signal and perform non-overlapping processing on the inverted signal of the comparison signal and the comparison signal to obtain the first control signal and the second control signal. Specifically, when the reference voltage is greater than the threshold voltage, the first control signal controls the second terminal of the pump capacitor to connect to a first non-positive supply voltage during the charging phase; and when the reference voltage is not greater than the threshold voltage, the second control signal controls the second terminal of the pump capacitor to connect to a second non-positive supply voltage during the charging phase. The threshold voltage is equal to the sum of the voltage values ​​of the at least two positive supply voltages, and the voltage value of the second non-positive supply voltage is less than the voltage value of the first non-positive supply voltage.

6. The charge pump circuit of claim 5, wherein, Also includes: A first selector is configured to select one of a plurality of preset values ​​based on a selection signal and provide it to the first comparator. A second selector is used to select one of a plurality of reference voltages according to the selection signal and provide it to the comparison module and the second comparator.

7. The charge pump circuit of claim 6, wherein, The comparison module includes: The third comparator, whose power supply voltage is the first positive power supply voltage and the ground voltage, is used to compare the feedback voltage and the reference voltage, and generate a third control signal based on the comparison result; The fourth comparator, whose power supply voltage is the second positive power supply voltage and the ground voltage, is used to compare the feedback voltage and the reference voltage, and generate a fourth control signal based on the comparison result; The charge pump circuit also includes: A first transistor is connected between the first positive supply voltage and the first terminal of the pump capacitor, and the control terminal of the first transistor receives the third control signal. The second transistor is connected between the second positive supply voltage and the first terminal of the pump capacitor, and the control terminal of the second transistor receives the fourth control signal.

8. The charge pump circuit of claim 6, wherein, The comparison module includes: The fifth comparator, whose power supply voltage is the second positive power supply voltage and the ground voltage, is used to compare the feedback voltage and the reference voltage, and generate a fifth control signal based on the comparison result; The charge pump circuit also includes: The first transistor and the third transistor are connected sequentially between the first positive supply voltage and the first terminal of the pump capacitor. The control terminal of the first transistor receives the first time-division control signal, and the control terminal of the third transistor receives the fifth control signal. The second transistor is connected between the second positive supply voltage and the intermediate node between the first transistor and the third transistor, and the control terminal of the second transistor receives the second time-division control signal.

9. Charge pump circuit according to claim 7 or 8, characterized in that, The charge pump circuit also includes: A high-voltage transistor is used to isolate the first terminal of the pump capacitor from the third transistor, or to isolate the first terminal of the pump capacitor from the first transistor and the second transistor.

10. A display chip comprising the charge pump circuit as described in any one of claims 1-9.

11. A display device comprising a charge pump circuit as described in any one of claims 1-9 or a display chip as described in claim 10.

Images