Delay circuit and multi-delay circuit
By designing a delay circuit, digital I/O control is achieved using a MOS control switch and a DC-DC power supply. This solves the problems of EMI interference and slow response in the joint brakes of medical robots, improves the response speed of the brakes, and meets the dynamic control requirements of medical robots for rapid start and stop.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Utility models(China)
- Current Assignee / Owner
- HANGZHOU WISEKING MEDICAL ROBOT CO LTD
- Filing Date
- 2025-08-05
- Publication Date
- 2026-07-17
AI Technical Summary
Existing joint actuator control schemes for medical robots suffer from EMI interference and slow low-frequency PWM response, making it difficult to meet the dynamic control requirements of medical robots for rapid start and stop of joint movements.
A delay circuit is adopted, and digital I/O control is used to replace analog control. The switching between 24V high voltage excitation and 7V low holding voltage is realized through MOS control switch and DC-DC power supply. The delay control is realized by using the capacitor charging characteristics, which overcomes EMI interference and improves response speed.
It effectively reduces EMI interference, improves the response speed of the joint brakes of medical robots, and meets the dynamic control requirements of medical robots for rapid start and stop.
Smart Images
Figure CN224521032U_ABST
Abstract
Claims
1. A delay circuit, characterized by, The delay circuit includes a first MOS control switch, a second MOS control switch, a DC-DC power supply, a first capacitor, a first resistor, and a brake. The source of the first MOS control switch is connected to an external voltage, and the drain of the first MOS control switch is connected to the DC-DC power input terminal. The drain of the first MOS control switch is also connected to the source of the second MOS control switch; The drain of the second MOS control switch is connected to the output terminal of the DC-DC power supply, and the gate of the second MOS control switch is connected to the source of the second MOS control switch through the first resistor. The gate of the second MOS control switch is also connected to one end of the first capacitor, and the other end of the first capacitor is grounded; The output terminal of the DC-DC power supply is connected to the first pin of the brake, and the second pin of the brake is grounded.
2. The delay circuit of claim 1, wherein The delay circuit also includes a second capacitor and / or a second resistor; The second capacitor is connected in parallel with the first capacitor; The gate of the second MOS control switch is connected to one end of the first capacitor through the second resistor.
3. The delay circuit of claim 1, wherein The delay circuit also includes a third resistor, a fourth resistor, a first control switch, and a first relay; The source of the first MOS control switch is also connected to the gate of the first MOS control switch through the third resistor; The gate of the first MOS control switch is connected to the first control switch through the fourth resistor; The first control switch is also connected to the first relay; The output terminal of the DC-DC power supply is connected to the first pin of the brake via the first relay. When the first control switch is closed, the first relay connects the output terminal of the DC-DC power supply to the first pin of the brake.
4. The delay circuit of claim 1, wherein The delay circuit also includes a third capacitor and / or a fourth capacitor; The output terminal of the DC-DC power supply is grounded through the third capacitor and / or the fourth capacitor, respectively.
5. The delay circuit of claim 3, wherein: The delay circuit also includes at least one of a first diode, a second diode, and a third diode; The output terminal of the DC-DC power supply is connected to the first relay through the first diode; The output terminal of the DC-DC power supply is connected to the negative terminal of the second diode, and the positive terminal of the second diode is grounded. The third diode is connected in parallel with the first relay.
6. The delay circuit of claim 1, wherein The delay circuit also includes a fifth capacitor and / or a sixth capacitor; The DC-DC power supply also includes a PGND pin. The input terminal of the DC-DC power supply is grounded after being connected to the PGND pin through the fifth capacitor and / or the sixth capacitor.
7. The delay circuit of claim 1, wherein The delay circuit also includes a fifth resistor, and the DC-DC power supply also includes an EN pin. The drain of the first MOS control switch is connected to the EN pin of the DC-DC power supply through the fifth resistor.
8. The delay circuit of claim 1, wherein: The delay circuit also includes a sixth resistor, a seventh resistor, and a seventh capacitor; The DC-DC power supply also includes FB pins and AGNG pins; The AGND pin is connected to the FB pin via the sixth resistor; The FB pin is connected to the output end of the DC-DC power supply through the seventh resistor; The seventh capacitor is connected in parallel with the seventh resistor.
9. The delay circuit of claim 1, wherein, The delay circuit further comprises a second control switch; After the second control switch is opened, the output end of the DC-DC power supply is in communication with the first pin of the brake.
10. A multi-delay circuit, characterized in that, The multiple delay circuit comprises at least two delay circuits as claimed in any one of claims 1 to 9.