A high-precision temperature detection circuit

Abstract

The utility model discloses a high accuracy temperature detection circuit, it includes signal conditioning module, clock synchronization module and sectional type quantization module. Sectional type quantization module starts through the rising edge of external periodic signal, the falling edge of internal signal ends, ensures that the quantization result is accurate, optionally, contains multiple quantization channels and control unit, adjusts the switch state through delay inversion circuit accurately, and optimizes quantization process. The present application can reduce the power consumption, simplify the manufacturing process, improve real -time and the flexibility of the scope of application, reduce the dependence on complex calibration algorithm simultaneously, provide brand -new solution for high accuracy temperature detection.

Description

Technical Field

[0001] This utility model relates to the field of electronic measurement and sensor technology, and in particular to a high-precision temperature detection circuit. Background Technology

[0002] Temperature detection circuits are an indispensable component of modern electronic devices, widely used in industrial control, medical equipment, and consumer electronics. Like other circuit designs, high-precision temperature detection circuits strive for higher detection accuracy, lower power consumption, and smaller circuit area.

[0003] To improve temperature detection accuracy, one approach is to use a higher-resolution analog-to-digital converter (ADC) to accurately capture subtle temperature change signals. However, this often comes at the cost of increased power consumption. Alternatively, optimizing sensor materials and structure can reduce the impact of temperature drift, thereby improving detection accuracy, but this comes at the cost of increased manufacturing complexity and cost. Furthermore, some circuits incorporate complex calibration algorithms to compensate for nonlinear errors. While this can improve accuracy to some extent, it sacrifices real-time performance and flexibility in application range. Utility Model Content

[0004] The purpose of this utility model is to provide a high-precision temperature detection circuit that solves the problems mentioned in the background art.

[0005] This invention is implemented as follows: a high-precision temperature detection circuit includes:

[0006] The signal conditioning module is suitable for receiving and preprocessing the analog signal output by the temperature sensor;

[0007] A clock synchronization module, suitable for generating internal control signals based on external periodic signals;

[0008] The segmented quantization module is adapted to generate quantization results based on the output signal of the signal conditioning module and the internal signal of the clock synchronization module.

[0009] Within the same cycle, the start time of the segmented quantization module corresponds to the rising edge of the external periodic signal, and the end time of the segmented quantization module corresponds to the falling edge of the internal signal.

[0010] Optionally, within the same cycle, the time interval between the start-up time of the segmented quantization module and the falling edge of the internal signal is related to the response time of the temperature sensor.

[0011] Optionally, the segmented quantization module includes at least two quantization channels, each quantization channel being adapted to receive different gain coefficients and send the quantization result to the corresponding output port.

[0012] Optionally, the segmented quantization module includes: a control unit and a transmission unit;

[0013] The transmission unit includes: a first comparator, a second comparator, a third comparator, a fourth comparator, a first switch, a second switch, a third switch, a fourth switch, a first buffer, a second buffer, and a third buffer;

[0014] The first input terminal of the first comparator is adapted to receive the output signal of the signal conditioning module, the second input terminal is connected to the output terminal of the third buffer, and the output terminal is connected to the input terminal of the first switch;

[0015] The first input terminal of the second comparator is adapted to receive the internal signal of the clock synchronization module, the second input terminal is connected to the output terminal of the third buffer, and the output terminal is connected to the input terminal of the second switch;

[0016] The first input terminal of the third comparator is adapted to receive the output signal of the signal conditioning module, the second input terminal is connected to the input terminal of the third buffer, and the output terminal is connected to the input terminal of the third switch.

[0017] The first input terminal of the fourth comparator is adapted to receive the internal signal of the clock synchronization module, the second input terminal is connected to the input terminal of the third buffer, and the output terminal is connected to the input terminal of the fourth switch.

[0018] The output terminals of the first switch and the second switch are connected to the input terminal of the first buffer, and the output terminals of the third switch and the fourth switch are connected to the input terminal of the second buffer.

[0019] The control unit is adapted to control the first switch and the third switch to be in a conducting state before the first time and after the second time, and to control the second switch and the fourth switch to be in a conducting state between the first time and the second time, wherein the first time is later than the rising edge of the internal signal and earlier than the falling edge of the internal signal, and the second time is later than the falling edge of the internal signal.

[0020] The input terminal of the third buffer is adapted to receive the gain coefficient signal, and the output terminals of the first buffer and the second buffer are the two output terminals of the segmented quantization module.

[0021] Optionally, the control unit includes: a fourth buffer, a fifth buffer, a fifth comparator, and a delay inverting circuit;

[0022] The input of the fourth buffer is adapted to receive the internal signal, and the output is connected to the first input of the fifth comparator.

[0023] The delay-inverting circuit is adapted to invert and delay the external periodic signal and output the processed signal to the second input terminal of the fifth comparator. The delay time of the delay-inverting circuit is greater than the time difference between the rising edge of the external periodic signal and the rising edge of the internal signal.

[0024] The output of the fifth comparator is connected to the inverting control terminal of the first switch, the positive control terminal of the second switch, the inverting control terminal of the third switch, the positive control terminal of the fourth switch, and the input terminal of the fifth buffer.

[0025] The output terminal of the fifth buffer is connected to the positive control terminal of the first switch, the negative control terminal of the second switch, the positive control terminal of the third switch, and the negative control terminal of the fourth switch.

[0026] Optionally, the positive control terminal of the first switch, the second switch, the third switch, and the fourth switch is the gate of the NMOS transistor in the switch, and the negative control terminal is the gate of the PMOS transistor in the switch.

[0027] Optionally, the number of transmission units is greater than 1.

[0028] Compared with existing technologies, the technical solution of this invention triggers the segmented quantization module by the rising edge of an external periodic signal, thus capturing subtle signal changes from the temperature sensor in advance; the quantization process ends by the falling edge of an internal signal, ensuring the accuracy of the quantization results. This high-precision temperature detection circuit is suitable for temperature sensors under various process conditions, and its circuit structure is simple and clear. Using this technical solution, the amplifier size in the signal conditioning module can be reduced because there is no need to design large-sized components for rapid response to the initial signal, thereby optimizing the overall circuit area.

[0029] Furthermore, this invention employs a segmented quantization module design to process signals with different gain coefficients separately, avoiding the accuracy loss caused by insufficient dynamic range in a single quantization channel. Simultaneously, the control unit precisely adjusts the switch's on / off state through a delay-inverting circuit, ensuring the quantization process is completed within the optimal timeframe, thereby improving detection accuracy and reducing power consumption.

[0030] Furthermore, the delay-inverting circuit of this invention effectively solves the signal synchronization problem by inverting and delaying the external periodic signal, avoiding the error accumulation caused by inconsistent signal delays in traditional designs. This design not only improves the stability and reliability of the circuit but also significantly reduces the reliance on complex calibration algorithms, enhancing the circuit's real-time performance and flexibility in its application range.

[0031] In summary, this utility model, through innovative circuit structure design, solves the problems of high power consumption, complex manufacturing process, and poor real-time performance in the prior art, and provides a brand-new solution for high-precision temperature detection circuits. Attached Figure Description

[0032] Figure 1 The overall structural block diagram of the high-precision temperature detection circuit provided in this embodiment of the utility model;

[0033] Figure 2 A block diagram of the internal structure of the segmented quantization module provided in this embodiment of the utility model;

[0034] Figure 3 This is a block diagram of the internal structure of the control unit provided in an embodiment of the present utility model.

[0035] The attached diagram is labeled as follows: 1. Signal conditioning module; 2. Clock synchronization module; 3. Segmented quantization module; 4. Control unit; 5. Transmission unit; 6. First comparator; 7. Second comparator; 8. Third comparator; 9. Fourth comparator; 10. First switch; 11. Second switch; 12. Third switch; 13. Fourth switch; 14. First buffer; 15. Second buffer; 16. Third buffer; 17. Delay inverting circuit. Detailed Implementation

[0036] This utility model provides a high-precision temperature detection circuit, the block diagram of which is shown below. Figure 1 As shown, the circuit includes a signal conditioning module 1, a clock synchronization module 2, and a segmented quantization module 3. The signal conditioning module 1 is adapted to receive and preprocess the analog signal output from the temperature sensor, and its output is connected to the transmission unit 5 in the segmented quantization module 3. The clock synchronization module 2 is adapted to generate an internal control signal based on an external periodic signal, and its output is also connected to the transmission unit 5 in the segmented quantization module 3. The segmented quantization module 3 includes a control unit 4 and a transmission unit 5, wherein the control unit 4 is adapted to adjust the state of each switch in the transmission unit 5 according to the external periodic signal and the internal signal, thereby achieving segmented quantization of the signal.

[0037] Specifically, the transmission unit 5 in the segmented quantization module 3 includes a first comparator 6, a second comparator 7, a third comparator 8, a fourth comparator 9, a first switch 10, a second switch 11, a third switch 12, a fourth switch 13, a first buffer 14, a second buffer 15, and a third buffer 16. The first input of the first comparator 6 is connected to the output of the signal conditioning module 1 to receive the pre-processed temperature sensor signal; its second input is connected to the output of the third buffer 16, and its output is connected to the input of the first switch 10. The first input of the second comparator 7 is connected to the output of the clock synchronization module 2 to receive internal signals; its second input is also connected to the output of the third buffer 16, and its output is connected to the input of the second switch 11. The first input of the third comparator 8 is connected to the output of the signal conditioning module 1; its second input is connected to the input of the third buffer 16; and its output is connected to the input of the third switch 12. The first input of the fourth comparator 9 is connected to the output of the clock synchronization module 2; its second input is connected to the input of the third buffer 16; and its output is connected to the input of the fourth switch 13. The output terminals of the first switch 10 and the second switch 11 are both connected to the input terminal of the first buffer 14, and the output terminals of the third switch 12 and the fourth switch 13 are both connected to the input terminal of the second buffer 15.

[0038] The control unit 4 includes a fourth buffer, a fifth buffer, a fifth comparator, and a delay-inverting circuit 17. The input of the fourth buffer is connected to the output of the clock synchronization module 2 to receive internal signals, and its output is connected to the first input of the fifth comparator. The input of the delay-inverting circuit 17 is connected to an external periodic signal source to invert and delay the external periodic signal, and its output is connected to the second input of the fifth comparator. The delay time of the delay-inverting circuit 17 is set to be greater than the time difference between the rising edge of the external periodic signal and the rising edge of the internal signal to ensure signal synchronization. The output of the fifth comparator is connected to the inverting control terminal of the first switch 10, the forward control terminal of the second switch 11, the inverting control terminal of the third switch 12, the forward control terminal of the fourth switch 13, and the input of the fifth buffer. The output of the fifth buffer is connected to the forward control terminal of the first switch 10, the inverting control terminal of the second switch 11, the forward control terminal of the third switch 12, and the inverting control terminal of the fourth switch 13. The positive control terminals of the first switch 10, the second switch 11, the third switch 12, and the fourth switch 13 are all NMOS transistor gates, and the negative control terminals are all PMOS transistor gates.

[0039] During actual operation, the rising edge of the external periodic signal triggers the start-up of the segmented quantization module 3. At this time, the control unit 4 controls the first switch 10 and the third switch 12 to be in the on state, while the second switch 11 and the fourth switch 13 are in the off state, through the output signal of the delayed inverting circuit 17. In this state, the output signals of the first comparator 6 and the third comparator 8 are transmitted to the first buffer 14 and the second buffer 15 through the first switch 10 and the third switch 12, respectively. When the rising edge of the internal signal arrives, the control unit 4 switches the first switch 10 and the third switch 12 to the off state, and simultaneously switches the second switch 11 and the fourth switch 13 to the on state. At this time, the output signals of the second comparator 7 and the fourth comparator 9 are transmitted to the first buffer 14 and the second buffer 15 through the second switch 11 and the fourth switch 13, respectively. When the falling edge of the internal signal arrives, the segmented quantization module 3 completes one quantization cycle, and the output terminals of the first buffer 14 and the second buffer 15 output two quantization results, respectively.

[0040] To further improve quantization accuracy, the segmented quantization module 3 may include multiple transmission units 5, each corresponding to a different gain coefficient. The input of the third buffer 16 is adapted to receive the gain coefficient signal, and its output is connected to the inputs of the first comparator 6, the second comparator 7, the third comparator 8, and the fourth comparator 9, respectively. By adjusting the gain coefficient, different transmission units 5 can quantize signals with different dynamic ranges, thereby avoiding accuracy loss caused by insufficient dynamic range in a single quantization channel.

[0041] In the circuit described above, signal conditioning module 1 amplifies and filters the analog signal output from the temperature sensor to remove noise and enhance signal strength. The amplifier size in signal conditioning module 1 can be reduced because there is no need to design large-sized components for rapid response to the initial signal. This design optimizes the overall circuit area while reducing power consumption. Clock synchronization module 2 generates internal control signals from external periodic signals, ensuring that the start time of segmented quantization module 3 corresponds to the rising edge of the external periodic signal, and the end time corresponds to the falling edge of the internal signal. This synchronization mechanism effectively solves the error accumulation problem caused by inconsistent signal delays in traditional designs, improving the stability and reliability of the circuit.

[0042] In practical applications, the high-precision temperature detection circuit of this invention is suitable for temperature sensors under various process conditions. For example, in the field of industrial automation, this circuit can be used to monitor the operating temperature of equipment in real time, accurately capturing subtle signal changes and providing early warnings of potential overheating risks. In the field of medical devices, this circuit can be used in body temperature monitoring instruments, achieving high-precision detection of different temperature ranges through segmented quantization design to meet clinical needs. Furthermore, in the field of consumer electronics, this circuit can be integrated into smart home devices for accurate ambient temperature sensing, thereby optimizing the user experience.

[0043] The circuit structure of this invention is simple and clear, and its innovative design solves the problems of high power consumption, complex manufacturing process, and poor real-time performance in existing technologies. By precisely adjusting the conduction state of the switch through the delay-inverting circuit 17, the quantization process can be completed within the optimal time period, thereby improving detection accuracy and reducing power consumption. At the same time, the segmented quantization module 3 avoids the accuracy loss caused by insufficient dynamic range of a single quantization channel, enhancing the applicability and flexibility of the circuit.

[0044] To enable those skilled in the art to fully understand and implement this utility model, the following supplementary explanation of the specific implementation principle of this utility model is provided in conjunction with a specific application scenario.

[0045] In the field of industrial automation, the high-precision temperature detection circuit of this invention can be used to monitor the operating temperature of equipment in real time. For example, in critical equipment on a production line, this circuit can accurately capture subtle signal changes and provide early warning of potential overheating risks. The specific operating steps and implementation principle are as follows:

[0046] First, signal conditioning module 1 receives an analog signal from the temperature sensor and amplifies and filters it. During this process, the low-noise amplifier in signal conditioning module 1 adjusts the gain of the weak signal output from the sensor to enhance signal strength, while a filter removes high-frequency noise interference. Because the design of signal conditioning module 1 optimizes the amplifier size, it can quickly respond to the initial signal without using large-sized components, thereby reducing overall circuit power consumption and footprint. The pre-processed signal is then transmitted to transmission unit 5 in segmented quantization module 3.

[0047] Secondly, the clock synchronization module 2 generates an internal control signal based on the external periodic signal and transmits this signal to the segmented quantization module 3. The rising edge of the external periodic signal triggers the start time of the segmented quantization module 3. At this time, the delay-inverting circuit 17 inverts and delays the external periodic signal to ensure that the time difference between it and the internal signal is accurately compensated. The delay time of the delay-inverting circuit 17 is set to be greater than the time difference between the rising edge of the external periodic signal and the rising edge of the internal signal, thereby ensuring signal synchronization. The fifth comparator in the control unit 4 adjusts the state of the first switch 10 and the third switch 12 according to the output signal of the delay-inverting circuit 17, making them in the on state, while the second switch 11 and the fourth switch 13 remain in the off state. In this state, the first comparator 6 and the third comparator 8 receive the output signal of the signal conditioning module 1 and the input signal of the third buffer 16, respectively, and transmit the comparison result to the first buffer 14 and the second buffer 15.

[0048] Subsequently, when the rising edge of the internal signal arrives, the control unit 4 switches the first switch 10 and the third switch 12 to the closed state, while simultaneously switching the second switch 11 and the fourth switch 13 to the open state. At this time, the second comparator 7 and the fourth comparator 9 receive the internal signal from the clock synchronization module 2 and the input signal from the third buffer 16, respectively, and transmit the comparison result to the first buffer 14 and the second buffer 15. This process achieves segmented quantization of the signal, ensuring accurate processing of different parts of the signal at different time periods.

[0049] Finally, when the falling edge of the internal signal arrives, the segmented quantization module 3 completes one quantization cycle, and the first buffer 14 and the second buffer 15 output two quantization results respectively. To further improve quantization accuracy, the segmented quantization module 3 may include multiple transmission units 5, each corresponding to a different gain coefficient. The input of the third buffer 16 receives the gain coefficient signal and transmits it to the inputs of the first comparator 6, the second comparator 7, the third comparator 8, and the fourth comparator 9. By adjusting the gain coefficient, different transmission units 5 can quantize signals with different dynamic ranges, thereby avoiding accuracy loss caused by insufficient dynamic range in a single quantization channel.

[0050] Throughout operation, the delay-inverting circuit 17 effectively solves the error accumulation problem caused by inconsistent signal delays in traditional designs by inverting and delaying the external periodic signal. The control unit 4 precisely adjusts the conduction state of each switch, enabling the quantization process to be completed within the optimal time period, thereby improving detection accuracy and reducing power consumption. Furthermore, the segmented quantization module 3 enhances the circuit's applicability and flexibility, allowing it to adapt to temperature sensors under various process conditions.

[0051] In summary, through the above steps and their implementation principles, the high-precision temperature detection circuit of this invention can accurately capture changes in weak signals in practical applications, meet the needs of real-time monitoring of equipment operating temperature in the field of industrial automation, and significantly improve the stability and reliability of the circuit.

[0052] The above description is only a preferred embodiment of the present utility model and is not intended to limit the present utility model. Any modifications, equivalent substitutions and improvements made within the spirit and principles of the present utility model should be included within the protection scope of the present utility model.

Claims

1. A high-precision temperature detection circuit, comprising: The signal conditioning module (1) is adapted to receive the analog signal output by the temperature sensor and perform preprocessing. The clock synchronization module (2) is adapted to generate internal control signals based on external periodic signals; The segmented quantization module (3) is adapted to generate quantization results based on the output signal of the signal conditioning module (1) and the internal signal of the clock synchronization module (2); Within the same cycle, the start time of the segmented quantization module (3) corresponds to the rising edge of the external periodic signal, and the end time of the segmented quantization module (3) corresponds to the falling edge of the internal signal.

2. The high-precision temperature detection circuit as described in claim 1, characterized in that, Within the same cycle, the time interval between the start-up time of the segmented quantization module (3) and the falling edge of the internal signal is related to the response time of the temperature sensor.

3. The high-precision temperature detection circuit as described in claim 1, characterized in that, The segmented quantization module (3) includes at least two quantization channels, each of which is adapted to receive different gain coefficients and send the quantization results to the corresponding output port.

4. The high-precision temperature detection circuit as described in claim 1, characterized in that, The segmented quantization module (3) includes a control unit (4) and a transmission unit (5); The transmission unit (5) includes a first comparator (6), a second comparator (7), a third comparator (8), a fourth comparator (9), a first switch (10), a second switch (11), a third switch (12), a fourth switch (13), a first buffer (14), a second buffer (15), and a third buffer (16); The first input terminal of the first comparator (6) is adapted to receive the output signal of the signal conditioning module (1), the second input terminal is connected to the output terminal of the third buffer (16), and the output terminal is connected to the input terminal of the first switch (10); The first input terminal of the second comparator (7) is adapted to receive the internal signal of the clock synchronization module (2), the second input terminal is connected to the output terminal of the third buffer (16), and the output terminal is connected to the input terminal of the second switch (11); The first input terminal of the third comparator (8) is adapted to receive the output signal of the signal conditioning module (1), the second input terminal is connected to the input terminal of the third buffer (16), and the output terminal is connected to the input terminal of the third switch (12). The first input terminal of the fourth comparator (9) is adapted to receive the internal signal of the clock synchronization module (2), the second input terminal is connected to the input terminal of the third buffer (16), and the output terminal is connected to the input terminal of the fourth switch (13). The output terminals of the first switch (10) and the second switch (11) are connected to the input terminal of the first buffer (14), and the output terminals of the third switch (12) and the fourth switch (13) are connected to the input terminal of the second buffer (15). The control unit (4) is adapted to control the first switch (10) and the third switch (12) to be in the on state before the first time and after the second time, and to control the second switch (11) and the fourth switch (13) to be in the on state between the first time and the second time, wherein the first time is later than the rising edge of the internal signal and earlier than the falling edge of the internal signal, and the second time is later than the falling edge of the internal signal. The input terminal of the third buffer (16) is adapted to receive the gain coefficient signal, and the output terminals of the first buffer (14) and the second buffer (15) are the two output terminals of the segmented quantization module (3).

5. The high-precision temperature detection circuit as described in claim 4, characterized in that, The control unit (4) includes a fourth buffer, a fifth buffer, a fifth comparator, and a delay inverting circuit (17); The input of the fourth buffer is adapted to receive the internal signal, and the output is connected to the first input of the fifth comparator. The delay-inverting circuit (17) is adapted to invert and delay the external periodic signal and output the processed signal to the second input terminal of the fifth comparator. The delay time of the delay-inverting circuit (17) is greater than the time difference between the rising edge of the external periodic signal and the rising edge of the internal signal. The output of the fifth comparator is connected to the inverting control terminal of the first switch (10), the positive control terminal of the second switch (11), the inverting control terminal of the third switch (12), the positive control terminal of the fourth switch (13), and the input terminal of the fifth buffer. The output terminal of the fifth buffer is connected to the positive control terminal of the first switch (10), the negative control terminal of the second switch (11), the positive control terminal of the third switch (12), and the negative control terminal of the fourth switch (13).

6. The high-precision temperature detection circuit as described in claim 5, characterized in that, The positive control terminals of the first switch (10), the second switch (11), the third switch (12), and the fourth switch (13) are the gates of the NMOS transistors in the switches, and the negative control terminals are the gates of the PMOS transistors in the switches.

7. The high-precision temperature detection circuit as described in claim 4, characterized in that, The number of transmission units (5) is greater than 1.

Images