A circuit for improving the harmonics of a flyback power supply
By adding diodes D2 and D3 and inductor L2 to the flyback power supply circuit, and combining this with the control of MOSFET Q1, the power factor is optimized, solving the high harmonic distortion problem of traditional flyback power supply circuits and achieving low-loss and low-cost harmonic suppression.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Utility models(China)
- Current Assignee / Owner
- CHANGZHOU WUJIN HGPOWER
- Filing Date
- 2025-06-29
- Publication Date
- 2026-07-24
Smart Images

Figure CN224555469U_ABST
Abstract
Description
Technical Field
[0001] This utility model relates to the field of flyback power supply technology, and in particular to a circuit for improving flyback power supply harmonics. Background Technology
[0002] Flyback power supplies are a commonly used isolated switching power supply topology. Their core feature is the use of transformers for energy storage and release, enabling energy transfer. They offer voltage conversion and electrical isolation functions. Due to their simple structure, low cost, and ease of isolation implementation, they hold an important position in low-power applications such as mobile phone adapters and auxiliary power supplies for home appliances. Traditional flyback power supplies typically employ a bridge rectifier followed by a large-capacity filter capacitor in the input stage, resulting in a high-frequency pulse current waveform rather than an ideal sinusoidal waveform. This current distortion injects a large amount of harmonics into the power grid, with measured total harmonic distortion (THD) reaching 20%-30%, potentially causing grid pollution and reduced equipment compatibility.
[0003] To meet harmonic regulations, existing technologies include: Patent CN217445255U, which discloses a flyback power supply circuit, circuit board, and terminal device; a flyback circuit for a television set as the terminal device, which ensures stable and efficient energy transmission through the control of a boost sub-circuit and a boost auxiliary sub-circuit; Patent CN217824756U, which discloses a valley-compensated flyback power supply circuit, circuit board, and terminal device, which uses a compensation capacitor to assist the output capacitor in power supply and maintain the valley voltage to ensure power supply reliability; and Patent CN218997926U, which discloses a passive harmonic circuit for a flyback power supply, which increases the conduction angle of the rectifier tube through a valley-filling circuit after the rectifier bridge, improving the power factor while reducing total harmonic distortion. Compared with traditional power factor correction (PFC) schemes, it saves some costs, but the circuit module is still relatively complex.
[0004] In summary, existing technologies have optimized flyback power supply circuits in terms of power supply, reliability, and cost while suppressing harmonics. However, there is still room for further research on flyback power supply circuits that are low-cost, small in size, and can reduce input current THD without significantly affecting efficiency. Utility Model Content
[0005] The purpose of this invention is to address the shortcomings of existing technologies by proposing a circuit that improves harmonics in flyback power supplies.
[0006] To achieve the above objectives, the present invention adopts the following technical solution:
[0007] A circuit for improving harmonics in a flyback power supply includes an input rectifier sub-circuit, a transformer, an output sub-circuit, a control sub-circuit, and a feedback sub-circuit.
[0008] The input rectifier circuit includes an X capacitor CX1, a filter capacitor C1, a capacitor C3, a common-mode inductor L1, an inductor L2, a bridge rectifier BD1, a diode D2, a diode D3, and a diode D4.
[0009] The transformer includes a primary winding N1 and a secondary winding N2;
[0010] The output sub-circuit includes capacitor C2, filter capacitor C4, diode D1, and resistor R1;
[0011] The control sub-circuit includes a control chip IC1, a MOSFET Q1, an auxiliary winding N3, capacitors C5, C6, and C7, a filter capacitor C8, diodes D5 and D6, and resistors R2, R3, R4, R5, R6, R8, R10, R12, and R14.
[0012] The feedback sub-circuit includes a Y capacitor CY1, an optocoupler IC2, a voltage regulator IC3, a capacitor C9, resistors R7, R9, R11, R13, and R15.
[0013] The output terminal of the input rectifier sub-circuit is connected to the primary winding N1, the output terminal of the control sub-circuit is connected to the primary winding N1, the output sub-circuit is connected to the secondary winding N2, and the feedback sub-circuit is connected to the output terminal of the output sub-circuit.
[0014] Furthermore, in the input rectifier circuit, the X capacitor CX1 is connected in parallel between the L and N lines at the input terminal of the input rectifier circuit; the common-mode inductor L1 is connected in series between the L and N lines and is connected to the anodes of diodes D2 and D3, and is connected to capacitor C3 after rectification; the first terminal of the bridge rectifier BD1 is connected to the first tap of the primary winding N1, the second and fourth terminals are connected to the common-mode inductor L1, and the third terminal is grounded; the positive terminal of the filter capacitor C1 is connected to the first terminal of the bridge rectifier BD1, and the negative terminal is connected to the third terminal of the bridge rectifier BD1; the two ends of the capacitor C3 are respectively connected to the third terminal of the bridge rectifier BD1 and the anode of diode D4; the two ends of the inductor L2 are respectively connected to the cathode of diode D4 and the second tap of the primary winding N1.
[0015] Furthermore, in the output sub-circuit, the anode of diode D1 is connected to the fourth tap of the secondary winding N2, and the cathode is connected to the output terminal of the output sub-circuit, and is connected in parallel with capacitor C2 and resistor R1; the positive terminal of the filter capacitor C4 is connected to the cathode of diode D1, and the negative terminal is connected to the fifth tap of the secondary winding N2 and grounded.
[0016] Furthermore, in the control sub-circuit, the anode of diode D6 is connected in sequence to resistor R14 and the first pin of control chip IC1, and the cathode is connected to the sixth pin of control chip IC1; the positive terminal of filter capacitor C8 is connected to the sixth pin of control chip IC1, and the negative terminal is grounded; the fourth pin of control chip IC1 is grounded; the two ends of capacitor C6 are connected to the second and fourth pins of control chip IC1 respectively; the two ends of resistor R12 are connected to the first and fourth pins of control chip IC1 respectively; the third pin of control chip IC1 is connected in sequence to resistor R8 and resistor R10 and then grounded. The capacitor C7 is connected in parallel with resistors R8 and R10; the two ends of resistor R3 are connected to the anode of diode D6 and the sixth tap of auxiliary winding N3, respectively; the seventh tap of auxiliary winding N3 is grounded; resistor R6 is connected to the fifth tap of control chip IC1 and the gate of MOSFET Q1, respectively; the cathode of diode D5 is connected in sequence with resistors R5, R2, R4 and the eighth pin of control chip IC1, and the anode is connected to the drain of MOSFET Q1; capacitor C5 is connected in parallel with resistor R5; the source of MOSFET Q1 is connected to resistor R10, and the drain is connected to the third tap of primary winding N1.
[0017] Furthermore, in the feedback sub-circuit, the Y capacitor CY1 is grounded; the voltage regulator IC3 is a TL431, with its anode grounded and its cathode connected sequentially to resistors R9 and R7 and the output terminal of the output sub-circuit; the optocoupler IC2 is connected in parallel with resistor R9; the capacitor C9 and resistor R11 are connected in series, wherein capacitor C9 is also connected to the cathode of voltage regulator IC3, and resistor R11 is also connected to the reference terminal of voltage regulator IC3; the two ends of resistor R13 are respectively connected to the reference terminal of voltage regulator IC3 and the output terminal of the output sub-circuit; the two ends of resistor R15 are respectively connected to the anode of voltage regulator IC3 and the reference terminal of voltage regulator IC3.
[0018] Furthermore, the MOSFET Q1 is an N-type MOSFET, which is turned off when the input voltage is higher than the voltage of capacitor C3, and turns on the transformer when the input voltage is not higher than the voltage of capacitor C3.
[0019] The beneficial effects of this utility model are as follows:
[0020] (1) Based on the filter capacitor after the bridge rectifier in the traditional flyback power supply circuit, this utility model adds diode D2, diode D3, capacitor C3, diode D1, and diode D4 and inductor L2 with low loss characteristics to form a harmonic suppression circuit, which reduces the input current THD to below 10%, and the efficiency is only reduced by about 0.5% compared with the traditional PFC scheme.
[0021] (2) The entire flyback power supply circuit of this utility model does not require the use of large-volume capacitors or inductors, and the overall size of the circuit is reduced, which effectively reduces the cost of circuit manufacturing and assembly. Attached Figure Description
[0022] The present invention will be further described below with reference to the accompanying drawings and embodiments.
[0023] Figure 1 This is a schematic diagram of the circuit structure of this utility model.
[0024] In the diagram: 01. Input rectifier sub-circuit, 02. Output sub-circuit, 03. Control sub-circuit, 04. Feedback sub-circuit, T1. Transformer, T11. First tap of primary winding N1, T12. Second tap of primary winding N1, T13. Third tap of primary winding N1, T14. Fourth tap of secondary winding N2, T15. Fifth tap of secondary winding N2, T16. Sixth tap of auxiliary winding N3, T17. Seventh tap of auxiliary winding N3, BD11. First terminal of bridge rectifier BD1, BD12. Second terminal of bridge rectifier BD1, BD13. Third terminal of bridge rectifier BD1, BD14. Fourth terminal of bridge rectifier BD1, IC11. First pin (D) of control chip IC1. EM pin), IC12. Second pin (FB pin) of control chip IC1, IC13. Third pin (CS pin) of control chip IC1, IC14. Fourth pin (GND pin) of control chip IC1, IC15. Fifth pin (GATE pin) of control chip IC1, IC16. Sixth pin (VDD pin) of control chip IC1, IC17. Seventh pin (NC pin) of control chip IC1, IC18. Eighth pin (CS pin) of control chip IC1, G. Gate of MOSFET Q1, D. Drain of MOSFET Q1, S. Source of MOSFET Q1, A. Positive terminal of regulator IC3, K. Negative terminal of regulator IC3, R. Reference terminal of regulator IC3. Detailed Implementation
[0025] The technical solutions of the present utility model will be clearly and completely described below with reference to the accompanying drawings of the embodiments. Obviously, the described embodiments are only some embodiments of the present utility model, and not all embodiments. It should be noted that, unless otherwise explicitly specified and limited, the terms "installation", "fixing", and "connection" should be interpreted broadly. For those skilled in the art, the specific meaning of the above terms in this patent can be understood according to the specific circumstances.
[0026] like Figure 1As shown, a circuit for improving harmonics in a flyback power supply includes an input rectifier circuit 01, a transformer T1, an output sub-circuit 02, a control sub-circuit 03, and a feedback sub-circuit 04. The transformer T1 includes a primary winding N1 and a secondary winding N2. The primary winding N1 also includes three taps that can be connected, namely a first tap T11, a second tap T12, and a third tap T13. The secondary winding N2 also includes two taps that can be connected, namely a fourth tap T14 and a fifth tap T15. The output terminals of the input rectifier circuit 01 and the control sub-circuit 03 are both connected to the primary winding N1. The output sub-circuit 02 is connected to the secondary winding N2. The feedback sub-circuit 04 is connected to the output terminal of the output sub-circuit 02.
[0027] In this invention, the input rectifier circuit 01 consists of an X capacitor CX1, a filter capacitor C1, a capacitor C3, a common-mode inductor L1, an inductor L2, a bridge rectifier BD1, diodes D2, D3, and D4, and its input is alternating current. The X capacitor is a safety capacitor connected in parallel between the L and N lines at the input terminal of the input rectifier circuit 01 to filter out differential-mode noise between L and N. The common-mode inductor L1 is connected in series between the L and N lines to suppress common-mode noise, thus forming a progressive "differential-mode-common-mode" filter that effectively reduces electromagnetic interference. The anodes of diodes D2 and D3 are both connected to the common-mode inductor L1 and connected to capacitor C3 after rectification. The bridge rectifier BD1 consists of four diodes, with its first terminal BD11 connected to the first descent of the primary winding N1. The first terminal T11 is connected, the second terminal BD12 and the fourth terminal BD14 are connected to the common mode inductor L1, and the third terminal BD13 is grounded; the positive terminal of the filter capacitor C1 is connected to the first terminal BD11 of the bridge rectifier BD1, and the negative terminal is connected to the third terminal BD13 of the bridge rectifier BD1; the two ends of the capacitor C3 are connected to the third terminal BD13 of the bridge rectifier BD1 and the anode of the diode D4, respectively; the two ends of the inductor L2 are connected to the cathode of the diode D4 and the second tap T12 of the primary winding N1, respectively.
[0028] It should be noted that the input rectifier circuit 01 differs from the traditional PFC scheme in that it improves the power factor through the combination of diode D4 and inductor L2, eliminating the need for high-frequency switching and thus exhibiting low-loss characteristics. Furthermore, the second tap T12 is the center tap of the primary winding N1. Connecting inductor L2 to this center tap allows the current to flow symmetrically in the positive and negative half-cycles of the primary winding N1, reducing core bias losses and simultaneously lowering the effective current values of diode D4 and inductor L2, thereby further reducing conduction losses. Actual measurements show that the efficiency of the diode D4 and inductor L2 combination scheme is only about 0.5% lower than the traditional PFC scheme.
[0029] In this invention, the output sub-circuit 02 consists of capacitor C2, filter capacitor C4, diode D1, and resistor R1. The anode of diode D1 is connected to the fourth tap T14 of the secondary winding N2 to rectify the AC pulse voltage of the secondary winding N2 into unidirectional DC, and the cathode is connected to the output terminal of the output sub-circuit 02. Capacitor C2 and circuit R1 are connected in series and then in parallel with diode D1. The positive terminal of filter capacitor C4 is connected to the cathode of diode D1, and the negative terminal is connected to the fifth tap T15 of the secondary winding N2 and grounded to smooth the pulsating voltage after rectification, provide a stable DC output, and supply power to the load when MOSFET Q1 is on and diode D4 is off.
[0030] In this invention, the control sub-circuit 03 consists of a control chip IC1, a MOSFET Q1, an auxiliary winding N3, capacitors C5, C6, and C7, a filter capacitor C8, diodes D5 and D6, and resistors R2, R3, R4, R5, R6, R8, R10, R12, and R14. The auxiliary winding N3 also includes two accessible taps, a sixth tap T16 and a seventh tap T17. The control chip IC1 generates a high-frequency PWM signal to control the MOSFET Q1. The switching on and off of the MOSFET Q1 is controlled by an N-type MOSFET. Its gate (G) is connected to the fifth tap (IC15) of the control chip IC1, its drain (D) is connected to the third tap (T13) of the primary winding N1, and its source (S) is connected to resistor R10 and then grounded. The positive terminal of the filter capacitor C8 is connected to the sixth pin (IC16) of the control chip IC1, and its negative terminal is grounded. This capacitor absorbs high-frequency current fluctuations generated by the gate (G) drive output of the MOSFET Q1 in the control sub-circuit 03, maintaining voltage stability. It can also provide sufficient voltage for high-frequency switching of the MOSFET Q1 and for situations where the auxiliary winding N3 cannot provide sufficient voltage instantaneously. Supplemental power supply when current is sufficient; the anode of diode D6 is connected to resistor R14 and pin 11 of control chip IC1 in sequence, and the cathode is connected to pin 6 of control chip IC1; pin 4 of control chip IC14 is grounded; the two ends of capacitor C6 are connected to pin 2 of control chip IC1, IC12 and pin 4 of control chip IC1 in sequence; the two ends of resistor R12 are connected to pin 1 of control chip IC1, IC11 and pin 4 of control chip IC1 in sequence; pin 3 of control chip IC1, IC13, is connected to resistor R8 and resistor R1 in sequence. 0 is connected to ground; capacitor C7 is connected in parallel with resistors R8 and R10; the two ends of resistor R3 are connected to the anode of diode D6 and the sixth tap T16 of auxiliary winding N3 respectively; the seventh tap T17 of auxiliary winding N3 is grounded; resistor R6 is connected to the fifth tap IC15 of control chip IC1 and the gate G of MOSFET Q1 respectively; the cathode of diode D5 is connected to resistors R5, R2, R4 and the eighth pin IC18 of control chip IC1 in sequence, and the anode is connected to the drain D of MOSFET Q1; capacitor C5 is connected in parallel with resistor R5.
[0031] It should be noted that the preferred model of the control chip IC1 is LD5762. Pin 8, IC18, is the HV pin, and pin 6, IC16, is the VDD pin. During the startup phase, the HV pin supplies power to the filter capacitor C8 connected to the VDD pin through an internal high-voltage current source, enabling the control chip IC1 to start automatically. During the operation phase, the auxiliary winding N3 is powered through diode D6 to maintain the VDD voltage. Pin 5, IC15, is the GATE pin, used to output a PWM signal to drive the gate G of MOSFET Q1. Pin 3, IC13, is the CS pin, used to detect the current of MOSFET Q1. When the voltage exceeds the threshold voltage of the CS pin, the chip IC1 shuts down the GATE output to achieve overcurrent protection. Pin 1, IC11, is the DEM pin, used to detect when the energy release on the secondary winding N2 side is complete, ensuring that MOSFET Q1 switches during voltage troughs. Pin 2, IC12, is the FB pin, used to receive feedback signals from feedback sub-circuit 04, thereby adjusting the PWM duty cycle to stabilize the output voltage. Pin 4, IC14, is the GND pin, grounded. Pin 7, IC17, is the floating NC pin.
[0032] In this invention, the feedback sub-circuit 04 consists of a Y capacitor CY1, an optocoupler IC2, a voltage regulator IC3, a capacitor C9, resistors R7, R9, R11, R13, and R15. The Y capacitor CY1 is a safety capacitor connected between the primary and secondary grounds to filter high-frequency interference, such as switching noise generated during transformer T1 coupling. The voltage regulator IC3 is preferably a TL431, with its anode A grounded and its cathode K connected sequentially to resistors R9, R7, and the output terminal of the output sub-circuit 02. The optocoupler IC2 is connected in parallel with resistor R9. Capacitor C9 and resistor R11 are connected in series, with capacitor C9 also connected to the cathode K of voltage regulator IC3, and resistor R11 also connected to the reference terminal R of voltage regulator IC3. The two ends of resistor R13 are connected to the reference terminal R of voltage regulator IC3 and the output terminal of output sub-circuit 02, respectively. The two ends of resistor R15 are connected to the anode A of voltage regulator IC3 and the reference terminal R of voltage regulator IC3, respectively.
[0033] It should be noted that resistors R13 and R15 are voltage divider resistors. The reference terminal R of the voltage regulator IC3 is connected to the midpoint of resistors R13 and R15. This is used to set the output voltage by adjusting the voltage divider resistors and compare the output voltage with the internal reference voltage. The output error signal drives the optocoupler IC2. The optocoupler IC2 is used to transmit the voltage error signal of the feedback sub-circuit 04 to the second pin IC2 of the control chip IC1 in the control sub-circuit 03, i.e., the FB pin, thereby realizing signal feedback.
[0034] The principle of this invention is as follows: When the input voltage of the input rectifier circuit 01 is higher than the voltage of capacitor C3, MOSFET Q1 is turned off, diode D4 is cut off, and diodes D1, D2, and D3 are turned on. At this time, capacitor C3 is charged and stores energy. When the input voltage of the input rectifier circuit 01 is not higher than the voltage of capacitor C3, MOSFET Q1 turns on transformer T1 and it works. At this time, capacitor C3 releases the stored energy to transformer T1 through diode D4 and inductor L2, thereby avoiding the "peak current" problem caused by only the large-capacity filter capacitor C1 charging near the voltage peak. This reduces the input current THD from about 25% to below 10%, meeting the Class B harmonic standard.
[0035] The above description is only a preferred embodiment of the present utility model, but the protection scope of the present utility model is not limited thereto. Any equivalent substitutions or changes made by those skilled in the art within the technical scope disclosed in the present utility model, based on the technical solution and the inventive concept of the present utility model, should be included within the protection scope of the present utility model.
Claims
1. A circuit for improving harmonics in a flyback power supply, characterized in that, It includes the input rectifier sub-circuit, transformer, output sub-circuit, control sub-circuit, and feedback sub-circuit; The input rectifier circuit includes an X capacitor CX1, a filter capacitor C1, a capacitor C3, a common-mode inductor L1, an inductor L2, a bridge rectifier BD1, a diode D2, a diode D3, and a diode D4. The transformer includes a primary winding N1 and a secondary winding N2; The output sub-circuit includes capacitor C2, filter capacitor C4, diode D1, and resistor R1; The control sub-circuit includes a control chip IC1, a MOSFET Q1, an auxiliary winding N3, capacitors C5, C6, and C7, a filter capacitor C8, diodes D5 and D6, and resistors R2, R3, R4, R5, R6, R8, R10, R12, and R14. The feedback sub-circuit includes a Y capacitor CY1, an optocoupler IC2, a voltage regulator IC3, a capacitor C9, resistors R7, R9, R11, R13, and R15. The output terminal of the input rectifier sub-circuit is connected to the primary winding N1, the output terminal of the control sub-circuit is connected to the primary winding N1, the output sub-circuit is connected to the secondary winding N2, and the feedback sub-circuit is connected to the output terminal of the output sub-circuit.
2. The circuit for improving flyback power supply harmonics according to claim 1, characterized in that, In the input rectifier circuit, the X capacitor CX1 is connected in parallel between the L and N lines at the input terminal of the input rectifier circuit; the common-mode inductor L1 is connected in series between the L and N lines and is connected to the anodes of diodes D2 and D3, and is connected to capacitor C3 after rectification; the first terminal of the bridge rectifier BD1 is connected to the first tap of the primary winding N1, the second and fourth terminals are connected to the common-mode inductor L1, and the third terminal is grounded; the positive terminal of the filter capacitor C1 is connected to the first terminal of the bridge rectifier BD1, and the negative terminal is connected to the third terminal of the bridge rectifier BD1; the two ends of the capacitor C3 are respectively connected to the third terminal of the bridge rectifier BD1 and the anode of diode D4; the two ends of the inductor L2 are respectively connected to the cathode of diode D4 and the second tap of the primary winding N1.
3. The circuit for improving flyback power supply harmonics according to claim 1, characterized in that, In the output sub-circuit, the anode of diode D1 is connected to the fourth tap of the secondary winding N2, and the cathode is connected to the output terminal of the output sub-circuit, and is connected in parallel with capacitor C2 and resistor R1; the positive terminal of the filter capacitor C4 is connected to the cathode of diode D1, and the negative terminal is connected to the fifth tap of the secondary winding N2 and grounded.
4. The circuit for improving flyback power supply harmonics according to claim 1, characterized in that, In the control sub-circuit, the anode of diode D6 is connected to resistor R14 and the first pin of control chip IC1 in sequence, and the cathode is connected to the sixth pin of control chip IC1; the positive terminal of filter capacitor C8 is connected to the sixth pin of control chip IC1, and the negative terminal is grounded; the fourth pin of control chip IC1 is grounded; the two ends of capacitor C6 are connected to the second and fourth pins of control chip IC1 respectively; the two ends of resistor R12 are connected to the first and fourth pins of control chip IC1 respectively; the third pin of control chip IC1 is connected to resistor R8 and resistor R10 in sequence and grounded; the... Capacitor C7 is connected in parallel with resistors R8 and R10; the two ends of resistor R3 are connected to the anode of diode D6 and the sixth tap of auxiliary winding N3, respectively; the seventh tap of auxiliary winding N3 is grounded; resistor R6 is connected to the fifth tap of control chip IC1 and the gate of MOSFET Q1, respectively; the cathode of diode D5 is connected in sequence with resistors R5, R2, R4 and the eighth pin of control chip IC1, and the anode is connected to the drain of MOSFET Q1; capacitor C5 is connected in parallel with resistor R5; the source of MOSFET Q1 is connected to resistor R10, and the drain is connected to the third tap of primary winding N1.
5. The circuit for improving flyback power supply harmonics according to claim 1, characterized in that, In the feedback sub-circuit, capacitor CY1 is grounded; the voltage regulator IC3 is a TL431, with its anode grounded and its cathode connected in sequence to resistors R9 and R7 and the output terminal of the output sub-circuit; the optocoupler IC2 is connected in parallel with resistor R9; capacitor C9 and resistor R11 are connected in series, wherein capacitor C9 is also connected to the cathode of voltage regulator IC3, and resistor R11 is also connected to the reference terminal of voltage regulator IC3; the two ends of resistor R13 are connected to the reference terminal of voltage regulator IC3 and the output terminal of the output sub-circuit, respectively; the two ends of resistor R15 are connected to the anode of voltage regulator IC3 and the reference terminal of voltage regulator IC3, respectively.
6. The circuit for improving flyback power supply harmonics according to claim 4, characterized in that, The MOSFET Q1 is an N-type MOSFET, which is turned off when the input voltage is higher than the voltage of capacitor C3, and turns on the transformer when the input voltage is not higher than the voltage of capacitor C3.