Isolation type same frequency control circuit based on LVDS signal
By designing an isolated frequency-synchronous control circuit based on LVDS signals, the LVDS signals are converted into CMOS signals using a signal converter and isolation module. Combined with a drive module and DC blocking capacitor, the problem of mutual interference between LVDS signals in isolated power supply control is solved, achieving efficient frequency-synchronous conversion and independent operation, and improving electromagnetic compatibility and power supply quality.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Utility models(China)
- Current Assignee / Owner
- XIAN JUNTAO TECH CO LTD
- Filing Date
- 2025-06-19
- Publication Date
- 2026-07-24
AI Technical Summary
In existing technologies, LVDS signals cannot be directly applied to the synchronous control of isolated power supplies, resulting in mutual interference between signals, affecting electromagnetic compatibility and power supply quality, especially when multiple modules are connected in parallel, the pins interfere with each other severely.
Design an isolated synchronous frequency control circuit based on LVDS signals. The LVDS signal is converted into a CMOS signal by a signal converter, and the synchronous frequency conversion isolation of the signal is achieved by using an isolation module and an inverting field-effect transistor. The signal reflection and electromagnetic interference are reduced by combining differential matching resistors and bypass capacitors, the driving capability is improved by using a driving module, and DC blocking capacitors are used to isolate DC signals.
It achieves signal frequency conversion and isolation, avoids mutual interference between signals, improves circuit reliability and power supply quality, has a wide range of applications, low cost, and is suitable for the same frequency control of multiple modules.
Smart Images
Figure CN224555600U_ABST
Abstract
Description
Technical Field
[0001] This utility model relates to the field of electronic circuit technology, and in particular to an isolated synchronous control circuit based on LVDS signals. Background Technology
[0002] In current radar projects, power supply stability and anti-interference capabilities have become key factors affecting overall system performance. Therefore, to improve the system's anti-interference ability, power supplies are typically designed as input-output isolated power supplies. Isolation power supply frequency control can help the radar system eliminate false alarms caused by its own interference during operation. Due to differences in topology, the inherent switching frequencies of different isolated power supplies are transmitted to the subsequent control system through power supply, leading to false targets appearing in radar monitoring. Frequency control, as the most cost-effective method for eliminating false alarms, can be widely used in power supply design. The switching frequencies of isolated power supplies are concentrated in the 100kHz~400kHz range, and frequency control can be achieved within the 400kHz~600kHz range. Isolated power supplies usually contain more than one output; different power modules must be selected to implement the functions of different outputs.
[0003] The same-frequency signal usually shares a ground with the output of the isolated power supply, and the same-frequency control signal needs to control the input side of the isolated power supply. Therefore, the converted CMOS signal needs to be isolated for use. That is, power supply same-frequency control usually requires the same-frequency pins of a set of CMOS level signal modules, and the CMOS signal needs to achieve isolated signal transmission. When multiple downstream modules are connected in parallel, it is also necessary to eliminate mutual interference from the same-frequency pins of the modules being connected together. LVDS signals are also widely used in communication systems such as radar. LVDS signals are a high-speed, low-power, and low-noise differential signal transmission technology. However, this signal has a voltage difference (typically 350mV), which cannot be directly used for downstream power supply same-frequency control. Therefore, there is an urgent need to provide a control circuit to solve the above problems. Utility Model Content
[0004] This invention provides an isolated same-frequency control circuit based on LVDS signals, which can solve the problems of input-output isolation and electromagnetic compatibility and power supply quality that cannot be achieved by directly applying LVDS signals in the prior art. It realizes same-frequency conversion isolation of signals and avoids mutual interference between signals.
[0005] This invention provides an isolated synchronous frequency control circuit based on LVDS signals, comprising a signal converter, an enable resistor group, an isolation module, and an inverting field-effect transistor, wherein:
[0006] The first enable terminal of the signal converter is electrically connected to the first terminal of the enable resistor group, the second enable terminal of the signal converter is electrically connected to the second terminal of the enable resistor group, the output terminal of the signal converter is electrically connected to the receiving terminal of the isolation module, the first receiving terminal of the signal converter serves as the negative power supply synchronization terminal of the isolated synchronous frequency control circuit, and the second receiving terminal of the signal converter serves as the positive power supply synchronization terminal of the isolated synchronous frequency control circuit.
[0007] The first output terminal of the isolation module is electrically connected to the gate of the reverse field-effect transistor, the second output terminal of the isolation module is electrically connected to the source of the reverse field-effect transistor, and the third output terminal of the isolation module is electrically connected to the drain of the reverse field-effect transistor. The third output terminal of the isolation module serves as the voltage drive terminal of the isolated synchronous frequency control circuit.
[0008] The source of the reverse field-effect transistor is grounded;
[0009] The third terminal of the enable resistor group is electrically connected to the positive power supply terminal, and the fourth terminal of the enable resistor group is electrically connected to the negative power supply terminal.
[0010] The isolated synchronous frequency control circuit provided by this utility model first converts the original input LVDS signal into a CMOS signal through a signal converter, and then converts it into a CMOS signal with the same frequency as the original input LVDS signal through an isolation module. Finally, it uses an inverting field-effect transistor to convert the inverted CMOS signal back into a CMOS signal with the same phase as the LVDS signal, thus realizing synchronous frequency conversion and isolation of signals, avoiding mutual interference between signals. The circuit structure is simple and has the advantages of being easy to use, low cost, and wide applicability.
[0011] Furthermore, it also includes a differential matching resistor, wherein: the first end of the differential matching resistor is electrically connected to the first receiving end of the signal converter, and the second end of the differential matching resistor is electrically connected to the second receiving end of the signal converter.
[0012] In the above scheme, the characteristic impedance of the transmission is matched by designing differential matching resistors, thereby reducing signal reflection and electromagnetic interference (EMI) and ensuring the integrity and stability of the input signal.
[0013] Furthermore, it also includes a bypass capacitor, wherein: the first end of the bypass capacitor is electrically connected to the positive power supply terminal of the signal converter, and the second end of the bypass capacitor is electrically connected to the negative power supply terminal of the signal converter.
[0014] In the above scheme, a bypass capacitor is set to provide voltage for the chip to operate normally.
[0015] Furthermore, the isolation module includes a protection resistor, an isolation resistor, an isolation capacitor, an isolation diode, an isolation field-effect transistor (FET), and an isolation optocoupler. Specifically: the first terminal of the protection resistor serves as the receiving terminal of the isolation module; the second terminal of the protection resistor is electrically connected to the first terminal of the isolation diode; the first terminal of the isolation diode is electrically connected to the first terminal of the isolation capacitor, and the second terminal of the isolation diode is electrically connected to the second terminal of the isolation capacitor; the first terminal of the isolation capacitor is electrically connected to the first terminal of the isolation resistor, and the second terminal of the isolation capacitor is electrically connected to the second terminal of the isolation resistor; the first terminal of the isolation resistor is electrically connected to the gate of the isolation FET, and the second terminal of the isolation resistor is electrically connected to the source of the isolation FET; the drain of the isolation FET is electrically connected to the first input terminal of the isolation optocoupler, and the source of the isolation FET is electrically connected to the negative power supply terminal; the second input terminal of the isolation optocoupler is electrically connected to the positive power supply terminal; the first output terminal of the isolation optocoupler serves as the first output terminal of the isolation module; the second output terminal of the isolation optocoupler serves as the second output terminal of the isolation module; and the third output terminal of the isolation optocoupler serves as the third output terminal of the isolation module.
[0016] In the above scheme, since the CMOS signal output of the signal converter and the output of the isolation power supply share the same ground, and the signal of the same frequency needs to control the input side of the isolation power supply, an isolation module is constructed by using an isolation optocoupler and an isolation field-effect transistor to electrically isolate the CMOS signal.
[0017] Furthermore, the enabling resistor group includes a first enabling resistor, a second enabling resistor, a third enabling resistor, and a fourth enabling resistor, wherein: the first terminal of the first enabling resistor is electrically connected to the first terminal of the second enabling resistor, and the first terminal of the first enabling resistor serves as the first terminal of the enabling resistor group; the second terminal of the first enabling resistor serves as the third terminal of the enabling resistor group and is electrically connected to the positive power supply terminal; the second terminal of the second enabling resistor serves as the fourth terminal of the enabling resistor group and is electrically connected to the negative power supply terminal; the first terminal of the third enabling resistor is electrically connected to the first terminal of the fourth enabling resistor, and the first terminal of the third enabling resistor serves as the second terminal of the enabling resistor group, and the second terminal of the third enabling resistor is electrically connected to the positive power supply terminal; the second terminal of the fourth enabling resistor is electrically connected to the negative power supply terminal.
[0018] In the above scheme, multiple enabling resistors work together to achieve a precise start / stop signal converter for the circuit module through level control and signal conditioning.
[0019] Furthermore, it also includes a reverse capacitor, a first reverse protection resistor, and a second reverse protection resistor, wherein: the first terminal of the reverse capacitor is electrically connected to the first terminal of the first reverse protection resistor, and the first terminal of the reverse capacitor is electrically connected to the source of the reverse field-effect transistor; the first terminal of the first reverse protection resistor is electrically connected to the first terminal of the second reverse protection resistor, and the second terminal of the first reverse protection resistor is electrically connected to the gate of the reverse field-effect transistor; the second terminal of the second reverse protection resistor is electrically connected to the drain of the reverse field-effect transistor.
[0020] In the above scheme, signal conversion is achieved by using a reverse capacitor, a first reverse protection resistor, and a second reverse protection resistor in conjunction with a reverse field-effect transistor, converting the inverted CMOS signal back into a CMOS signal in phase with LVDS.
[0021] Furthermore, it also includes a drive module, the output of which is electrically connected to the voltage drive terminal.
[0022] Furthermore, the drive module includes a drive resistor, a drive capacitor, a drive chip, a transformer, a transformer capacitor, and an output capacitor, wherein: the first end of the drive resistor serves as the positive input terminal of the drive module; the second end of the drive resistor is electrically connected to the receiving end of the drive chip; the receiving end of the drive chip is electrically connected to the first end of the drive capacitor; the ground terminal of the drive chip is electrically connected to the second end of the drive capacitor; the first normally closed terminal of the drive chip is electrically connected to the second end of the drive capacitor; the first normally closed terminal of the drive chip is electrically connected to the first end of the transformer; the second normally closed terminal of the drive chip is electrically connected to the first end of the transformer; the second normally closed terminal of the drive chip is electrically connected to the first end of the transformer capacitor; the output terminal of the drive chip is electrically connected to the second end of the transformer; the output terminal of the drive chip is electrically connected to the second end of the transformer capacitor; the second end of the drive capacitor serves as the negative input terminal of the drive module; the third end of the transformer is electrically connected to the first end of the output capacitor and serves as the output terminal of the drive module, which is also electrically connected to the voltage drive terminal; the fourth end of the transformer is electrically connected to the second end of the output capacitor and serves as the ground terminal of the drive module.
[0023] In the above scheme, the drive module is used to provide the required power supply voltage to the circuit.
[0024] Furthermore, it also includes a frequency-synchronous control module, the driving end of which is electrically connected to the voltage driving end, the receiving end of which is electrically connected to the drain of the reverse field-effect transistor, and the output end of which includes several frequency-synchronous control pins.
[0025] Furthermore, the frequency-synchronous control module includes a DC blocking chip, a first capacitor, a second capacitor, a third capacitor, a fourth capacitor, a DC blocking resistor, and several DC blocking capacitors. Specifically: the driving end of the DC blocking chip serves as the driving end of the frequency-synchronous control module; the driving end of the DC blocking chip is electrically connected to the first terminal of the first capacitor; the positive receiving end of the DC blocking chip serves as the receiving end of the frequency-synchronous control module; the positive receiving end of the DC blocking chip is electrically connected to the first terminal of the second capacitor; the negative receiving end of the DC blocking chip is electrically connected to the second terminal of the second capacitor; the grounding end of the DC blocking chip is electrically connected to the second terminal of the second capacitor; the grounding end of the DC blocking chip is electrically connected to the second terminal of the first capacitor; the high-level output end of the DC blocking chip is electrically connected to the first terminal of the DC blocking resistor; the low-level output end of the DC blocking chip is electrically connected to the first terminal of the third capacitor; the second terminal of the DC blocking resistor is electrically connected to the first terminal of the fourth capacitor; the second terminal of the fourth capacitor is electrically connected to the second terminal of the third capacitor; for any one of the several DC blocking capacitors, the second terminal of the third capacitor is electrically connected to the receiving end of the DC blocking capacitor; and the output end of the DC blocking capacitor serves as the frequency-synchronous control pin.
[0026] In the above scheme, the same-frequency control module is used to amplify the current to synchronously control multiple power supply modules to work at the same frequency. Several DC blocking capacitors are used to block DC and pass AC, so that the converted in-phase CMOS signal can smoothly enter the module through the capacitors. Moreover, the pin inside the module is a fixed DC signal. When the same-frequency function is turned off, the DC signals inside the module will not affect each other through the capacitors, thus achieving better same-frequency control.
[0027] This invention provides an isolated synchronous frequency control circuit based on LVDS signals. It utilizes a signal converter to convert LVDS signals into CMOS signals, then uses an optocoupler to isolate the signals. After the isolated signals are driven by a driver module to enhance their driving capability, a DC blocking capacitor is used to isolate interference between DC signals. This invention solves the technical problems in existing technologies where LVDS signals typically share a common ground with the isolated power supply output, but the synchronous frequency pin shares a common ground with the isolated power supply input. Direct connection of these pins leads to the original isolated power supply failing to achieve input-output isolation, and directly introduces input-side interference to the output side, affecting the power supply quality. Furthermore, when multiple modules are connected in parallel, direct shorting of the synchronous frequency pins causes mutual interference between the control pins of multiple modules, thus affecting electromagnetic compatibility and power supply quality. This invention enables the simultaneous driving of multiple power supply modules with synchronous frequency functionality, avoiding frequency discrepancies caused by inconsistent parameters, improving reliability. Moreover, when the synchronous frequency function is disabled, each power supply module operates independently without interference. The circuit structure is simple, offering advantages such as ease of use, low cost, and wide applicability. Attached Figure Description
[0028] To more clearly illustrate the technical solution of this application, the drawings used in the embodiments will be briefly introduced below. Obviously, the drawings described below are only some embodiments of this application. For those skilled in the art, other drawings can be obtained from these drawings without creative effort.
[0029] Figure 1 This embodiment provides a schematic diagram of a multi-power-isolated synchronous frequency control circuit based on LVDS signals.
[0030] Figure 2 This is a schematic diagram of the driving module in a multi-power-isolated synchronous frequency control circuit based on LVDS signals provided in this embodiment;
[0031] Figure 3 This is a schematic diagram of the synchronous control module in a multi-power-isolated synchronous control circuit based on LVDS signals provided in this embodiment. Detailed Implementation
[0032] To make the objectives, technical solutions, and advantages of this application clearer, the technical solutions of this application will be clearly and completely described below with reference to the accompanying drawings of the embodiments. Obviously, the described embodiments are only some embodiments of this application, not all embodiments. Based on the embodiments of this application, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of this application.
[0033] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this application pertains; the terminology used herein is for the purpose of describing particular embodiments only and is not intended to limit the application; the terms “comprising” and “having”, and any variations thereof, in the specification, claims, and foregoing description of the drawings are intended to cover non-exclusive inclusion.
[0034] In the description of the embodiments of this application, technical terms such as "first" and "second" are used only to distinguish different objects and should not be construed as indicating or implying relative importance or implicitly specifying the number, specific order, or primary and secondary relationship of the indicated technical features. In the description of the embodiments of this application, "multiple" means two or more, unless otherwise explicitly defined.
[0035] In this document, the term "embodiment" means that a particular feature, structure, or characteristic described in connection with an embodiment may be included in at least one embodiment of this application. The appearance of this phrase in various places throughout the specification does not necessarily refer to the same embodiment, nor is it a separate or alternative embodiment mutually exclusive with other embodiments. It will be explicitly and implicitly understood by those skilled in the art that the embodiments described herein can be combined with other embodiments.
[0036] In the description of the embodiments in this application, the term "and / or" is merely a description of the relationship between related objects, indicating that three relationships can exist. For example, A and / or B can represent: A existing alone, A and B existing simultaneously, and B existing alone. Additionally, the character " / " in this document generally indicates that the preceding and following related objects have an "or" relationship.
[0037] In the description of the embodiments of this application, the term "multiple" refers to two or more (including two), similarly, "multiple sets" refers to two or more (including two sets), and "multiple pieces" refers to two or more (including two pieces).
[0038] In the description of the embodiments of this application, unless otherwise expressly specified and limited, technical terms such as "installation," "connection," "joining," and "fixing" should be interpreted broadly. For example, they can refer to a fixed connection, a detachable connection, or an integral part; they can refer to a mechanical connection or an electrical connection; they can refer to a direct connection or an indirect connection through an intermediate medium; they can refer to the internal communication of two components or the interaction between two components. For those skilled in the art, the specific meaning of the above terms in the embodiments of this application can be understood according to the specific circumstances.
[0039] Example 1:
[0040] This embodiment provides an isolated frequency-synchronous control circuit based on LVDS signals, including a signal converter, an enable resistor group, an isolation module, and an inverting field-effect transistor (FET). Specifically: the first enable terminal of the signal converter is electrically connected to the first terminal of the enable resistor group; the second enable terminal of the signal converter is electrically connected to the second terminal of the enable resistor group; the output terminal of the signal converter is electrically connected to the receiving terminal of the isolation module; the first receiving terminal of the signal converter serves as the negative power supply synchronization terminal of the isolated frequency-synchronous control circuit; the second receiving terminal of the signal converter serves as the positive power supply synchronization terminal of the isolated frequency-synchronous control circuit; the first output terminal of the isolation module is electrically connected to the gate of the inverting field-effect transistor; the second output terminal of the isolation module is electrically connected to the source of the inverting field-effect transistor; the third output terminal of the isolation module is electrically connected to the drain of the inverting field-effect transistor; the third output terminal of the isolation module serves as the voltage drive terminal of the isolated frequency-synchronous control circuit; the source of the inverting field-effect transistor is grounded; the third terminal of the enable resistor group is electrically connected to the positive power supply terminal; and the fourth terminal of the enable resistor group is electrically connected to the negative power supply terminal.
[0041] The isolated frequency-synchronous control circuit provided in this embodiment first converts the original input LVDS signal into a CMOS signal through a signal converter, and then converts it into a CMOS signal with the same frequency as the original input LVDS signal through an isolation module. Finally, it uses an inverting field-effect transistor to convert the inverted CMOS signal back into a CMOS signal with the same phase as the LVDS signal, thus realizing the isolation of the signal conversion with the same frequency, avoiding mutual interference between signals. The circuit structure is simple and has the advantages of being easy to use, low cost, and wide applicability.
[0042] Optionally, a differential matching resistor may also be included, wherein: the first terminal of the differential matching resistor is electrically connected to the first receiving terminal of the signal converter, and the second terminal of the differential matching resistor is electrically connected to the second receiving terminal of the signal converter.
[0043] In the specific implementation process, the LVDS signal conversion first needs to convert the LVDS signal into a CMOS signal. In this embodiment, the signal converter can use the SM9A53 data receiver. This chip can convert the LVDS signal into a 3.3V CMOS signal with a maximum frequency of 200MHz, while the same frequency control signal usually requires 400 kHz to 600 kHz, which can meet the requirements. The signal converter is powered by an isolated power supply output.
[0044] Optionally, a bypass capacitor may also be included, wherein: the first terminal of the bypass capacitor is electrically connected to the positive power supply terminal of the signal converter, and the second terminal of the bypass capacitor is electrically connected to the negative power supply terminal of the signal converter.
[0045] In practice, a bypass capacitor is used to provide voltage for the chip to operate normally.
[0046] Optionally, the isolation module includes a protection resistor, an isolation resistor, an isolation capacitor, an isolation diode, an isolation field-effect transistor (FET), and an isolation optocoupler, wherein: the first terminal of the protection resistor serves as the receiving terminal of the isolation module; the second terminal of the protection resistor is electrically connected to the first terminal of the isolation diode; the first terminal of the isolation diode is electrically connected to the first terminal of the isolation capacitor, and the second terminal of the isolation diode is electrically connected to the second terminal of the isolation capacitor; the first terminal of the isolation capacitor is electrically connected to the first terminal of the isolation resistor, and the second terminal of the isolation capacitor is electrically connected to the second terminal of the isolation resistor; the first terminal of the isolation resistor is electrically connected to the gate of the FET, and the second terminal of the isolation resistor is electrically connected to the source of the FET; the drain of the FET is electrically connected to the first input terminal of the isolation optocoupler, and the source of the FET is electrically connected to the negative power supply terminal; the second input terminal of the isolation optocoupler is electrically connected to the positive power supply terminal; the first output terminal of the isolation optocoupler serves as the first output terminal of the isolation module; the second output terminal of the isolation optocoupler serves as the second output terminal of the isolation module; and the third output terminal of the isolation optocoupler serves as the third output terminal of the isolation module.
[0047] In practical implementation, after the LVDS signal is converted into a CMOS signal using an LVDS signal conversion chip, this CMOS signal shares a common ground with the isolated power supply output. Since the same frequency signal needs to control the input side of the isolated power supply, an isolation module is also required to electrically isolate this CMOS signal. Specifically, this isolation module uses a high-speed optocoupler, combined with other auxiliary components, to convert the signal into an inverted isolated CMOS signal. That is, after the LVDS signal is converted into a CMOS signal, the CMOS signal is converted into a CMOS signal with the same frequency as the input LVDS signal through an isolated optocoupler circuit.
[0048] Optionally, the enabling resistor group includes a first enabling resistor, a second enabling resistor, a third enabling resistor, and a fourth enabling resistor, wherein: the first terminal of the first enabling resistor is electrically connected to the first terminal of the second enabling resistor, and the first terminal of the first enabling resistor serves as the first terminal of the enabling resistor group; the second terminal of the first enabling resistor serves as the third terminal of the enabling resistor group and is electrically connected to the positive power supply terminal; the second terminal of the second enabling resistor serves as the fourth terminal of the enabling resistor group and is electrically connected to the negative power supply terminal; the first terminal of the third enabling resistor is electrically connected to the first terminal of the fourth enabling resistor, and the first terminal of the third enabling resistor serves as the second terminal of the enabling resistor group, and the second terminal of the third enabling resistor is electrically connected to the positive power supply terminal; the second terminal of the fourth enabling resistor is electrically connected to the negative power supply terminal.
[0049] In the specific implementation process, multiple enabling resistors work together to achieve a precise start / stop signal converter for the circuit module through level control and signal conditioning.
[0050] Optionally, it also includes a reverse capacitor, a first reverse protection resistor, and a second reverse protection resistor, wherein: the first terminal of the reverse capacitor is electrically connected to the first terminal of the first reverse protection resistor, and the first terminal of the reverse capacitor is electrically connected to the source of the reverse field-effect transistor; the first terminal of the first reverse protection resistor is electrically connected to the first terminal of the second reverse protection resistor, and the second terminal of the first reverse protection resistor is electrically connected to the gate of the reverse field-effect transistor; the second terminal of the second reverse protection resistor is electrically connected to the drain of the reverse field-effect transistor.
[0051] In the specific implementation process, signal conversion is achieved by using a reverse capacitor, a first reverse protection resistor, a second reverse protection resistor, and a reverse field-effect transistor to convert the reversed CMOS signal back into a CMOS signal in phase with LVDS. The reverse field-effect transistor is then used to convert the reversed CMOS signal back into a CMOS signal in phase with LVDS.
[0052] Optionally, a drive module is also included, with the output of the drive module electrically connected to the voltage drive terminal.
[0053] Optionally, the drive module includes a drive resistor, a drive capacitor, a drive chip, a transformer, a transformer capacitor, and an output capacitor, wherein: the first end of the drive resistor serves as the positive input terminal of the drive module; the second end of the drive resistor is electrically connected to the receiving end of the drive chip; the receiving end of the drive chip is electrically connected to the first end of the drive capacitor; the ground terminal of the drive chip is electrically connected to the second end of the drive capacitor; the first normally closed terminal of the drive chip is electrically connected to the second end of the drive capacitor; the first normally closed terminal of the drive chip is electrically connected to the first end of the transformer; the second normally closed terminal of the drive chip is electrically connected to the first end of the transformer; the second normally closed terminal of the drive chip is electrically connected to the first end of the transformer capacitor; the output terminal of the drive chip is electrically connected to the second end of the transformer; the output terminal of the drive chip is electrically connected to the second end of the transformer capacitor; the second end of the drive capacitor serves as the negative input terminal of the drive module; the third end of the transformer is electrically connected to the first end of the output capacitor and serves as the output terminal of the drive module, which is also electrically connected to the voltage drive terminal; the fourth end of the transformer is electrically connected to the second end of the output capacitor and serves as the ground terminal of the drive module.
[0054] In practical implementation, the driver module is used to provide the required power supply voltage to the circuit, such as converting the input voltage to DC5V power supply.
[0055] Optionally, it also includes a frequency-synchronous control module, the driving end of which is electrically connected to the voltage driving end, the receiving end of which is electrically connected to the drain of the reverse field-effect transistor, and the output end of which includes several frequency-synchronous control pins.
[0056] Optionally, the frequency-synchronized control module includes a DC blocking chip, a first capacitor, a second capacitor, a third capacitor, a fourth capacitor, a DC blocking resistor, and several DC blocking capacitors. Specifically: the driving end of the DC blocking chip serves as the driving end of the frequency-synchronized control module; the driving end of the DC blocking chip is electrically connected to the first terminal of the first capacitor; the positive receiving end of the DC blocking chip serves as the receiving end of the frequency-synchronized control module; the positive receiving end of the DC blocking chip is electrically connected to the first terminal of the second capacitor; the negative receiving end of the DC blocking chip is electrically connected to the second terminal of the second capacitor; the grounding end of the DC blocking chip is electrically connected to the second terminal of the second capacitor; the grounding end of the DC blocking chip is electrically connected to the second terminal of the first capacitor; the high-level output end of the DC blocking chip is electrically connected to the first terminal of the DC blocking resistor; the low-level output end of the DC blocking chip is electrically connected to the first terminal of the third capacitor; the second terminal of the DC blocking resistor is electrically connected to the first terminal of the fourth capacitor; the second terminal of the fourth capacitor is electrically connected to the second terminal of the third capacitor; for any one of the several DC blocking capacitors, the second terminal of the third capacitor is electrically connected to the receiving end of the DC blocking capacitor; and the output end of the DC blocking capacitor serves as the frequency-synchronized control pin.
[0057] In practical implementation, a synchronous frequency control module is used to amplify the current and control multiple power modules to operate at the same frequency. Several DC-blocking capacitors are employed to block DC and allow AC signals to pass through, ensuring that the converted in-phase CMOS signal can smoothly enter the module through the capacitors. Internally, these pins on the module display fixed DC signals. When the synchronous frequency function is disabled, the DC signals within the module do not interfere with each other through the capacitors, thus achieving better synchronous frequency control. For example, the converted CMOS signal is amplified by a driver module, which can synchronously control multiple power modules to operate at the same frequency. When there are N modules, N synchronous frequency control pins are needed. The converted in-phase CMOS signal can smoothly enter the module through the DC-blocking capacitors. Internally, these pins on the module display fixed DC signals. Therefore, when the synchronous frequency function is disabled, the DC signals within the module do not interfere with each other through the capacitors, and each power module operates independently without interference. In other words, the CMOS signal can simultaneously drive multiple power modules with synchronous frequency functionality, avoiding frequency discrepancies caused by inconsistent parameters in multiple synchronous frequency circuits, saving costs, and improving reliability.
[0058] This embodiment provides an isolated frequency-synchronous control circuit based on LVDS signals. It uses a signal converter to convert LVDS signals into CMOS signals, then uses an optocoupler to isolate the signals. After the isolated signals are driven by a driver module to improve their driving capability, a DC blocking capacitor is used to isolate interference between DC signals. This solves the technical problems in existing technologies where LVDS signals typically share a common ground with the isolated power supply output, but the frequency-synchronous pin shares a common ground with the isolated power supply input. Direct connection of these pins leads to the original isolated power supply failing to achieve input-output isolation, and directly introduces input-side interference to the output side, affecting the power supply quality. It also addresses the issue that short-circuiting the frequency-synchronous pins of multiple modules in parallel causes mutual interference between the control pins, affecting electromagnetic compatibility and power supply quality. This circuit enables the simultaneous driving of multiple power supply modules with frequency-synchronous functionality, avoiding frequency discrepancies caused by inconsistent parameters, improving reliability. Furthermore, when the frequency-synchronous function is disabled, each power supply module operates independently without interference. The circuit structure is simple, offering advantages such as ease of use, low cost, and wide applicability.
[0059] Example 2:
[0060] This embodiment provides a multi-power-isolated synchronous frequency control circuit based on LVDS signals, including: a signal conversion module, an isolation module, an inversion module, a driving module, and a synchronous frequency control module, wherein:
[0061] The main body of the multi-power-isolated synchronous frequency control circuit is as follows: Figure 1The diagram shows a circuit schematic including a signal conversion module 1, an isolation module 2, and an inverting module 3 that are electrically connected. The signal conversion module includes a signal converter U1, a differential matching resistor R1, a bypass capacitor C1, a first enabling resistor R11, a second enabling resistor R12, a third enabling resistor R13, and a fourth enabling resistor R14.
[0062] The isolation module includes a protection resistor R21, an isolation resistor R22, an isolation capacitor C2, an isolation diode D2, an isolation field-effect transistor Q2, an isolation optocoupler U2, and an isolation protection resistor R23;
[0063] The reverse module includes a reverse field-effect transistor Q3, a reverse capacitor C3, a first reverse protection resistor R31 and a second reverse protection resistor, wherein the second reverse protection resistor is composed of reverse protection resistors R32 and R33 connected in parallel.
[0064] A driver module such as Figure 2 As shown, the drive module includes a drive resistor, which consists of a first drive resistor R41 and a second drive resistor R42 connected in parallel, a drive capacitor C41, a drive chip U4, a transformer L4, a transformer capacitor C42, and an output capacitor C43.
[0065] A type of frequency control module, such as Figure 3 As shown, the synchronous frequency control module includes a DC blocking chip U5, a first capacitor C51, a second capacitor C52, a third capacitor C53, a fourth capacitor C54, a DC blocking resistor R5, a first DC blocking capacitor C61, a second DC blocking capacitor C62, a first synchronous frequency control pin T1, and a second synchronous frequency control pin T2.
[0066] VCC represents the positive power supply terminal (VCC_3.3V), GND represents the negative power supply terminal (+3.3VGND), and VSS represents the common ground terminal. Interface 1 of the signal conversion module is connected to the negative input terminal of the power synchronization, and interface 2 is connected to the positive input terminal of the power synchronization.
[0067] The inverting module and the driving module are electrically connected through nodes VD and TB. The driving module interface 1 is connected to the positive input terminal and interface 2 is connected to the negative input terminal. The synchronous control module and the driving module are electrically connected through node VD, and the synchronous control module and the inverting module are electrically connected through TB.
[0068] In the specific implementation process, when there are N power supply modules, the same frequency control module is equipped with N same frequency control pins and corresponding N DC blocking capacitors.
[0069] In practical implementation, if there is only one power supply module being controlled, the DC blocking chip U5 used for synchronous frequency control can be omitted.
[0070] In the specific implementation process, the LVDS signal conversion first requires converting the LVDS signal into a CMOS signal. This part of the circuit uses an SM9A53 data receiver for signal conversion. Specifically, device U1 is the LVDS conversion chip, R1 is the differential input matching resistor, R11 / / R12 and R13 / / R14 are the enable resistors for the chip, and capacitor C1 is mainly a bypass capacitor, providing voltage for normal chip operation. After U1 converts the LVDS signal into a CMOS signal, this CMOS signal shares a common ground with the isolated power supply output. Next, a high-speed optocoupler U2 is used to electrically isolate this CMOS signal. Device U2 is a high-speed optocoupler; pin 15 of the U1 chip outputs a CMOS signal at 3.3V. The U1 chip, powered by the isolated power supply, converts the LVDS signal back into a CMOS signal. Then, using Q2 and the U2 optocoupler, the signal is converted into an inverted isolated CMOS signal. Next, chip I4 converts the input voltage to DC 5V, and signal Q3 converts the inverted CMOS signal back into a CMOS signal in phase with the LVDS signal. The converted CMOS signal is amplified by the driver chip U4, enabling synchronous control of multiple power modules to operate at the same frequency. As shown in the diagram, the signals at the frequency control pins T1 and T2 require N similar frequency control pins when there are N modules. C61 and C62 act as DC blocking capacitors, allowing the converted in-phase CMOS signal to smoothly pass through the capacitors into the module. Internally, these pins display fixed DC signals. When the frequency synchronization function is disabled, the internal DC signals of the module will not interfere with each other through the capacitors, thus achieving better frequency synchronization control.
[0071] The circuit provided in this embodiment uses a chip to convert LVDS signals into CMOS signals, then uses optocouplers to isolate the signals. After the isolated signals are driven by a driver to improve their driving capability, DC blocking capacitors are used to isolate interference between DC signals. The circuit structure is simple and has the advantages of being easy to use, low cost, and wide applicability. It effectively solves the problems that would occur if the LVDS signal voltage difference of 350mV were directly connected to the same frequency pin of the power module: First, the LVDS signal usually shares a ground with the output of the isolated power supply, but the same frequency pin shares a ground with the input of the isolated power supply. Direct connection would cause the originally designed isolated power supply to fail to achieve the function of input-output isolation. Second, it would directly introduce interference from the input side to the output side, affecting the power supply quality of the isolated power supply. Finally, if multiple modules are connected in parallel, directly shorting the same frequency pin would cause mutual interference between the control pins of multiple modules, thereby affecting electromagnetic compatibility and power supply quality.
[0072] The above description is the preferred embodiment of this utility model. It should be noted that for those skilled in the art, several improvements and modifications can be made without departing from the principle of this utility model, and these improvements and modifications are also considered to be within the protection scope of this utility model.
Claims
1. An isolated synchronous control circuit based on LVDS signals, characterized in that, It includes a signal converter, an enable resistor group, an isolation module, and a reverse field-effect transistor, wherein: The first enable terminal of the signal converter is electrically connected to the first terminal of the enable resistor group, the second enable terminal of the signal converter is electrically connected to the second terminal of the enable resistor group, the output terminal of the signal converter is electrically connected to the receiving terminal of the isolation module, the first receiving terminal of the signal converter serves as the negative power supply synchronization terminal of the isolated synchronous frequency control circuit, and the second receiving terminal of the signal converter serves as the positive power supply synchronization terminal of the isolated synchronous frequency control circuit. The first output terminal of the isolation module is electrically connected to the gate of the reverse field-effect transistor, the second output terminal of the isolation module is electrically connected to the source of the reverse field-effect transistor, and the third output terminal of the isolation module is electrically connected to the drain of the reverse field-effect transistor. The third output terminal of the isolation module serves as the voltage drive terminal of the isolated synchronous frequency control circuit. The source of the reverse field-effect transistor is grounded; The third terminal of the enabling resistor group is electrically connected to the positive power supply terminal, and the fourth terminal of the enabling resistor group is electrically connected to the negative power supply terminal.
2. The isolated synchronous control circuit based on LVDS signals as described in claim 1, characterized in that, It also includes differential matching resistors, where: The first terminal of the differential matching resistor is electrically connected to the first receiving terminal of the signal converter, and the second terminal of the differential matching resistor is electrically connected to the second receiving terminal of the signal converter.
3. The isolated synchronous control circuit based on LVDS signals as described in claim 1, characterized in that, It also includes bypass capacitors, of which: The first terminal of the bypass capacitor is electrically connected to the positive power supply terminal of the signal converter, and the second terminal of the bypass capacitor is electrically connected to the negative power supply terminal of the signal converter.
4. The isolated synchronous control circuit based on LVDS signals as described in claim 1, characterized in that, The isolation module includes a protective resistor, an isolation resistor, an isolation capacitor, an isolation diode, an isolation field-effect transistor, and an isolation optocoupler, wherein: The first end of the protection resistor serves as the receiving end of the isolation module, and the second end of the protection resistor is electrically connected to the first end of the isolation diode. The first terminal of the isolation diode is electrically connected to the first terminal of the isolation capacitor, and the second terminal of the isolation diode is electrically connected to the second terminal of the isolation capacitor. The first terminal of the isolation capacitor is electrically connected to the first terminal of the isolation resistor, and the second terminal of the isolation capacitor is electrically connected to the second terminal of the isolation resistor; The first end of the isolation resistor is electrically connected to the gate of the isolation field-effect transistor, and the second end of the isolation resistor is electrically connected to the source of the isolation field-effect transistor. The drain of the isolation field-effect transistor is electrically connected to the first input terminal of the isolation optocoupler, and the source of the isolation field-effect transistor is electrically connected to the negative power supply terminal. The second input terminal of the isolation optocoupler is electrically connected to the positive power supply terminal. The first output terminal of the isolation optocoupler serves as the first output terminal of the isolation module. The second output terminal of the isolation optocoupler serves as the second output terminal of the isolation module. The third output terminal of the isolation optocoupler serves as the third output terminal of the isolation module.
5. The isolated synchronous control circuit based on LVDS signals as described in claim 1, characterized in that, The enabling resistor group includes a first enabling resistor, a second enabling resistor, a third enabling resistor, and a fourth enabling resistor, wherein: The first terminal of the first enabling resistor is electrically connected to the first terminal of the second enabling resistor, and the first terminal of the first enabling resistor serves as the first terminal of the enabling resistor group; the second terminal of the first enabling resistor serves as the third terminal of the enabling resistor group and is electrically connected to the positive power supply terminal. The second terminal of the second enabling resistor serves as the fourth terminal of the enabling resistor group, and the electrical connection is to the negative power supply terminal. The first end of the third enabling resistor is electrically connected to the first end of the fourth enabling resistor. The first end of the third enabling resistor serves as the second end of the enabling resistor group. The second end of the third enabling resistor is electrically connected to the positive power supply terminal. The second terminal of the fourth enabling resistor is electrically connected to the negative power supply terminal.
6. The isolated synchronous control circuit based on LVDS signals as described in claim 1, characterized in that, It also includes a reverse capacitor, a first reverse protection resistor, and a second reverse protection resistor, wherein: The first terminal of the reverse capacitor is electrically connected to the first terminal of the first reverse protection resistor, and the first terminal of the reverse capacitor is electrically connected to the source of the reverse field-effect transistor. The first terminal of the first reverse protection resistor is electrically connected to the first terminal of the second reverse protection resistor, and the second terminal of the first reverse protection resistor is electrically connected to the gate of the reverse field-effect transistor. The second terminal of the second reverse protection resistor is electrically connected to the drain of the reverse field-effect transistor.
7. The isolated synchronous control circuit based on LVDS signals as described in claim 1, characterized in that, It also includes a drive module, the output of which is electrically connected to the voltage drive terminal.
8. The isolated synchronous control circuit based on LVDS signals as described in claim 7, characterized in that, The driving module includes a driving resistor, a driving capacitor, a driving chip, a transformer, a transformer capacitor, and an output capacitor, wherein: The first end of the driving resistor serves as the positive input terminal of the driving module, and the second end of the driving resistor is electrically connected to the receiving end of the driving chip. The receiving end of the driver chip is electrically connected to the first end of the driver capacitor, the ground end of the driver chip is electrically connected to the second end of the driver capacitor, the first normally closed end of the driver chip is electrically connected to the second end of the driver capacitor, the first normally closed end of the driver chip is electrically connected to the first end of the transformer, the second normally closed end of the driver chip is electrically connected to the first end of the transformer, the second normally closed end of the driver chip is electrically connected to the first end of the transformer capacitor, the output end of the driver chip is electrically connected to the second end of the transformer, and the output end of the driver chip is electrically connected to the second end of the transformer capacitor. The second terminal of the driving capacitor serves as the negative input terminal of the driving module. The third terminal of the transformer is electrically connected to the first terminal of the output capacitor. The third terminal of the transformer serves as the output terminal of the drive module, and the output terminal of the drive module is electrically connected to the voltage drive terminal. The fourth terminal of the transformer is electrically connected to the second terminal of the output capacitor, and the fourth terminal of the transformer serves as the grounding terminal of the drive module.
9. The isolated synchronous control circuit based on LVDS signals as described in claim 1, characterized in that, It also includes a frequency-synchronous control module, wherein the driving end of the frequency-synchronous control module is electrically connected to the voltage driving end, the receiving end of the frequency-synchronous control module is electrically connected to the drain of the reverse field-effect transistor, and the output end of the frequency-synchronous control module includes several frequency-synchronous control pins.
10. The isolated synchronous control circuit based on LVDS signals as described in claim 9, characterized in that, The same-frequency control module includes a DC blocking chip, a first capacitor, a second capacitor, a third capacitor, a fourth capacitor, a DC blocking resistor, and several DC blocking capacitors, wherein: The DC blocking chip driving terminal serves as the driving terminal of the frequency-synchronized control module. The DC blocking chip driving terminal is electrically connected to the first terminal of the first capacitor. The positive receiving terminal of the DC blocking chip serves as the receiving terminal of the frequency-synchronized control module. The positive receiving terminal of the DC blocking chip is electrically connected to the first terminal of the second capacitor. The negative receiving terminal of the DC blocking chip is electrically connected to the second terminal of the second capacitor. The ground terminal of the DC blocking chip is electrically connected to the second terminal of the second capacitor. The ground terminal of the DC blocking chip is electrically connected to the second terminal of the first capacitor. The high-level output terminal of the DC blocking chip is electrically connected to the first terminal of the DC blocking resistor. The low-level output terminal of the DC blocking chip is electrically connected to the first terminal of the third capacitor. The second terminal of the DC blocking resistor is electrically connected to the first terminal of the fourth capacitor, and the second terminal of the fourth capacitor is electrically connected to the second terminal of the third capacitor. For any one of the DC blocking capacitors, the second terminal of the third capacitor is electrically connected to the receiving terminal of the DC blocking capacitor, and the output terminal of the DC blocking capacitor serves as a frequency control pin.