A DC-DC step-down conversion circuit

Abstract

The utility model discloses a kind of DC-DC step-down conversion circuit, including input module, voltage conversion chip U1, output module, frequency selection acceleration module and voltage control module, voltage conversion chip U1 including VIN pin, BOOT pin, PH pin and VSENSE pin, voltage control module includes voltage amplifier U2 and error amplifier U3;Input module is connected to VIN pin, output module is connected to the PH pin, and there is start-up capacitor C1 between PH pin and the BOOT pin, and frequency selection acceleration module is connected between the output end of output module and VSENSE pin;Voltage amplifier U2 has the same phase end connection with set voltage Vset.This application scheme can improve the dynamic response rate of DC-DC step-down conversion circuit and the stability and accuracy of its output voltage.

Description

Technical Field

[0001] This utility model belongs to the field of step-down circuit technology, specifically relating to a DC-DC step-down converter circuit. Background Technology

[0002] Lithium-ion batteries are essential components of modern electronic products, with a wide range of applications. From small Bluetooth headsets to large electric vehicles, lithium-ion batteries are ubiquitous in our lives. The research and development and production of electronic products using lithium-ion batteries require various types of testing, such as testing their performance under different charge levels and operating conditions. Currently, the industry has developed battery simulation devices to simulate real batteries for testing purposes.

[0003] In battery simulation devices, a DC-DC buck converter circuit is required at the front end to provide the input voltage for the subsequent voltage simulation output circuit. For battery simulation devices, improving the dynamic response rate of the DC-DC buck converter circuit and the stability and accuracy of its output voltage are problems that need to be solved. Utility Model Content

[0004] In view of this, the present invention provides a DC-DC buck converter circuit to solve the problem of how to improve the dynamic response rate of the DC-DC buck converter circuit and the stability and accuracy of its output voltage.

[0005] To achieve the above objectives, the present invention adopts the following technical solution:

[0006] A DC-DC buck converter circuit includes an input module, a voltage conversion chip U1, an output module, a frequency selection acceleration module, and a voltage control module. The voltage conversion chip U1 includes a VIN pin, a BOOT pin, a PH pin, and a VSENSE pin. The voltage control module includes a voltage amplifier U2 and an error amplifier U3. The input module is connected to the VIN pin, and the output module is connected to the PH pin. A start-up capacitor C1 is connected between the PH pin and the BOOT pin. The frequency selection acceleration module is connected between the output terminal of the output module and the VSENSE pin. The non-inverting input of the voltage amplifier U2 is connected to a set voltage Vset. The inverting input of the voltage amplifier U2 is connected to the output terminal, and its output terminal is connected to the inverting input of the error amplifier U3. The non-inverting input of the error amplifier U3 is connected to the output terminal of the output module, and the output terminal of the error amplifier U3 is connected to the VSENSE pin.

[0007] The voltage conversion chip U1 is configured to convert the input voltage Vin received from the VIN pin into an output voltage Vout and output it through the output module; the voltage amplifier U2 is configured to amplify the received set voltage Vset into a target voltage Vout. T The input is given to the inverting input of the error amplifier U3; the error amplifier U3 is configured to compare the output voltage Vout with the target voltage V. T After error amplification calculation, the result is fed back to the voltage conversion chip U1; the frequency selection acceleration module is configured to feed back the change information of the output voltage Vout to the voltage conversion chip U1;

[0008] The voltage conversion chip U1 is further configured to adjust the magnitude of the output voltage Vout based on the information fed back from the error amplifier U3 and the frequency selection acceleration module, so that the output voltage Vout is greater than the target voltage V. T The voltage difference is large and ΔV.

[0009] In the specific scheme, the voltage difference ΔV is between 2V and 2.5V.

[0010] In the specific solution, the frequency selection acceleration module includes a resistor R1, a capacitor C2 and a capacitor C3. The first end of the resistor R1 is connected to the VSENSE pin, the second end of the resistor R1 is connected to the first end of the capacitor C2, the second end of the capacitor C2 is connected to the output terminal of the output module, the first end of the capacitor C3 is connected to the first end of the resistor R1, and the second end of the capacitor C3 is connected to the second end of the capacitor C2.

[0011] In the specific design, the non-inverting input of the voltage amplifier U2 is connected to a resistor R2 and a capacitor C4; the set voltage Vset is connected to the first terminal of the resistor R2, the second terminal of the resistor R2 is connected to the non-inverting input of the voltage amplifier U2, the first terminal of the capacitor C4 is connected to the second terminal of the resistor R2, and the second terminal of the capacitor C4 is grounded.

[0012] The inverting input of the voltage amplifier U2 is connected to resistors R3 and R4; the first end of resistor R3 is connected to the inverting input of the voltage amplifier U2, the second end of resistor R3 is connected to the output input of the voltage amplifier U2, the first end of resistor R4 is connected to the second end of resistor R3, and the second end of resistor R4 is grounded.

[0013] In the specific design, the non-inverting input of the error amplifier U3 is connected to resistors R5 and R6; the first end of resistor R5 is connected to the non-inverting input of the error amplifier U3, the second end of resistor R5 is connected to the output terminal of the output module, the first end of resistor R6 is connected to the first end of resistor R5, and the second end of resistor R6 is grounded.

[0014] The inverting input of the error amplifier U3 is connected to resistors R7 and R8 and capacitor C5; the first end of resistor R7 is connected to the inverting input of the error amplifier U3, the second end of resistor R7 is connected to the output of the voltage amplifier U2, and resistor R8 and capacitor C5 are connected in parallel between the inverting input and the output of the error amplifier U3.

[0015] The output terminal of the error amplifier U3 is connected to a resistor R9 and a diode D1. The first end of the resistor R9 is connected to the output terminal of the error amplifier U3, the second end of the resistor R9 is connected to the VSENSE pin, the cathode of the diode D1 is connected to the second end of the resistor R9, and the anode of the diode D1 is grounded.

[0016] In the specific scheme, the input module includes the input voltage Vin connected to the VIN pin, and capacitors C6, C7 and C8 connected in parallel between the input voltage Vin and the ground terminal.

[0017] In the specific design, capacitor C6 is an electrolytic capacitor, while capacitors C7 and C8 are ordinary non-polar capacitors.

[0018] In the specific solution, the DC-DC buck converter circuit also includes an enable indicator module, and the voltage conversion chip U1 also includes an ENA pin;

[0019] The enable indicator module includes a resistor R. 10 Resistance R 11 Resistance R 12 LED D2 and transistor Q1; resistor R 10 The first terminal is connected to the ENA enable signal, and the resistor R 10 The second terminal is connected to the ENA pin, and the resistor R 11 The first terminal is connected to the resistor R 10 The first terminal, the resistor R 11 The second terminal is grounded; the resistor R 12 The first terminal is connected to the input voltage Vin, and the resistor R 12The second terminal is connected to the positive terminal of the light-emitting diode D2, the negative terminal of the light-emitting diode D2 is connected to the collector of the transistor Q1, the emitter of the transistor Q1 is grounded, and the base of the transistor Q1 is connected to the ENA pin.

[0020] In the specific design, the output module includes inductor L1, diode D3, capacitor C9, and capacitor C. 10 Capacitor C 11 and capacitor C 12 The first terminal of inductor L1 is connected to the PH pin, and the second terminal of inductor L1 serves as the output terminal of the output module, outputting the output voltage Vout. The cathode of diode D3 is connected to the first terminal of inductor L1, and the anode of diode D3 is grounded. Capacitors C9 and C... 10 Capacitor C 11 and capacitor C 12 It is connected in parallel between the second terminal of the inductor L1 and the ground terminal.

[0021] In the specific design, capacitor C9 is an electrolytic capacitor, and capacitor C... 10 Capacitor C 11 and capacitor C 12 It is a common non-polarized capacitor.

[0022] The DC-DC buck converter circuit provided in this embodiment of the invention includes a frequency selection acceleration module and a voltage control module between the VSENSE pin of the voltage conversion chip U1 and the output terminal of the output module. On the one hand, the frequency selection acceleration module feeds back the change information of the output voltage Vout to the voltage conversion chip U1, enabling the voltage control loop to detect and respond to the output voltage change reflected on the VSENSE pin more quickly, thereby improving the dynamic response rate of the DC-DC buck converter circuit. On the other hand, the voltage control module includes a voltage amplifier U2 and an error amplifier U3. The voltage amplifier U2 first amplifies the received set voltage Vset to the target voltage Vout. T The input is fed into error amplifier U3, which then compares the output voltage Vout with the target voltage V. T After error amplification calculation, the error is fed back to the voltage conversion chip U1. Then, the voltage conversion chip U1 adjusts the output voltage Vout based on the information fed back by the error amplifier U3 and the frequency selection acceleration module, thereby improving the stability and accuracy of the output voltage. Attached Figure Description

[0023] Figure 1 This is a circuit diagram of the DC-DC buck converter circuit in an embodiment of this utility model. Detailed Implementation

[0024] To make the objectives, technical solutions, and advantages of this utility model clearer, the specific embodiments of this utility model will be described in detail below with reference to the accompanying drawings. Examples of these preferred embodiments are illustrated in the drawings. The embodiments of this utility model shown in and described with reference to the drawings are merely exemplary, and this utility model is not limited to these embodiments.

[0025] It should be noted that the same or similar reference numerals in the accompanying drawings of the embodiments of this utility model correspond to the same or similar components. In the description of this utility model, it should be understood that if terms such as "upper," "lower," "left," and "right" indicate the orientation or positional relationship based on the orientation or positional relationship shown in the accompanying drawings, they are only for the convenience of describing this utility model and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, or be constructed and operated in a specific orientation. Therefore, the terms used to describe positional relationships in the accompanying drawings are only for illustrative purposes and should not be construed as limiting this patent. For those skilled in the art, the specific meaning of the above terms can be understood according to the specific circumstances.

[0026] It should also be noted that, in order to avoid obscuring the present invention with unnecessary details, only the structures and / or processing steps closely related to the solution according to the present invention are shown in the accompanying drawings, while other details that are not closely related to the present invention are omitted.

[0027] This utility model provides a DC-DC buck converter circuit, mainly used in battery simulation devices. Figure 1 As shown, the DC-DC buck converter circuit mainly includes an input module 1, a voltage conversion chip U1, an output module 2, a frequency selection acceleration module 3, a voltage control module 4, and an enable indicator module 5. The voltage conversion chip U1 mainly includes a VIN pin, a BOOT pin, a PH pin, a VSENSE pin, and an ENA pin. The voltage control module 4 mainly includes a voltage amplifier U2 and an error amplifier U3.

[0028] The input module 1 is connected to the VIN pin, the output module 2 is connected to the PH pin, a start-up capacitor C1 is connected between the PH pin and the BOOT pin, and the frequency selection acceleration module 3 is connected between the output terminal of the output module 2 and the VSENSE pin. The non-inverting input of the voltage amplifier U2 is connected to a set voltage Vset, the inverting input of the voltage amplifier U2 is connected to its output terminal, and its output terminal is connected to the inverting input of the error amplifier U3. The non-inverting input of the error amplifier U3 is connected to the output terminal of the output module 2, and the output terminal of the error amplifier U3 is connected to the VSENSE pin.

[0029] The voltage conversion chip U1 is configured to convert the input voltage Vin received from the VIN pin into an output voltage Vout and output it through the output module 2. The voltage amplifier U2 is configured to amplify the received set voltage Vset into a target voltage Vout. T The input is given to the inverting input of the error amplifier U3. The error amplifier U3 is configured to compare the output voltage Vout with the target voltage V. T After error amplification calculation, the result is fed back to the voltage conversion chip U1. The frequency selection acceleration module 3 is configured to feed back the change information of the output voltage Vout to the voltage conversion chip U1. The voltage conversion chip U1 is also configured to adjust the magnitude of the output voltage Vout according to the information fed back by the error amplifier U3 and the frequency selection acceleration module 3, so that the output voltage Vout is greater than the target voltage V T The voltage difference is large and ΔV.

[0030] Wherein, the target voltage V T This is the operating voltage of the subsequent circuit. The set voltage Vset is a voltage value determined by the controller of the subsequent circuit, and it is related to the target voltage V. T Correspondingly, in this embodiment, the DC-DC buck converter circuit efficiently reduces the input voltage Vin to a voltage lower than the target voltage V. T A large output voltage Vout (ΔV) is provided to the subsequent circuitry, which can reduce heat generation in the subsequent stage and improve the power supply efficiency. In a preferred embodiment, the voltage difference ΔV is between 2V and 2.5V, and more preferably, ΔV is set to 2V.

[0031] In specific plans, such as Figure 1 As shown, the frequency selection acceleration module 3 includes a resistor R1, a capacitor C2, and a capacitor C3. The first end of resistor R1 is connected to the VSENSE pin, and the second end of resistor R1 is connected to the first end of capacitor C2. The second end of capacitor C2 is connected to the output terminal of the output module 2. The first end of capacitor C3 is connected to the first end of resistor R1, and the second end of capacitor C3 is connected to the second end of capacitor C2. The frequency selection acceleration module 3, composed of resistor R1, capacitor C2, and capacitor C3, forms an RC network that feeds back the change in output voltage Vout to the voltage conversion chip U1. This allows the voltage control loop to detect and respond to the output voltage change reflected on the VSENSE pin more quickly, thereby improving the dynamic response rate of the DC-DC buck converter circuit.

[0032] In specific plans, such as Figure 1As shown, in the voltage control module 4, the non-inverting input of the voltage amplifier U2 is connected to a resistor R2 and a capacitor C4; the set voltage Vset is connected to the first terminal of the resistor R2, the second terminal of the resistor R2 is connected to the non-inverting input of the voltage amplifier U2, the first terminal of the capacitor C4 is connected to the second terminal of the resistor R2, and the second terminal of the capacitor C4 is grounded. The inverting input of the voltage amplifier U2 is connected to a resistor R3 and a resistor R4; the first terminal of the resistor R3 is connected to the inverting input of the voltage amplifier U2, the second terminal of the resistor R3 is connected to the output terminal of the voltage amplifier U2, the first terminal of the resistor R4 is connected to the second terminal of the resistor R3, and the second terminal of the resistor R4 is grounded. Based on the above circuit connection structure of the voltage amplifier U2, it can amplify the set voltage Vset to the target voltage V. T The specific amplification factor needs to be set according to the requirements, which can be achieved by selecting the specific parameters of resistors R3 and R4.

[0033] In specific plans, such as Figure 1 As shown, in the voltage control module 4, the non-inverting input of the error amplifier U3 is connected to resistors R5 and R6; the first end of resistor R5 is connected to the non-inverting input of the error amplifier U3, the second end of resistor R5 is connected to the output terminal of the output module, the first end of resistor R6 is connected to the first end of resistor R5, and the second end of resistor R6 is grounded. The inverting input of the error amplifier U3 is connected to resistors R7 and R8 and capacitor C5; the first end of resistor R7 is connected to the inverting input of the error amplifier U3, the second end of resistor R7 is connected to the output terminal of the voltage amplifier U2, and resistor R8 and capacitor C5 are connected in parallel between the inverting input and the output terminal of the error amplifier U3. The output terminal of the error amplifier U3 is connected to resistor R9 and diode D1; the first end of resistor R9 is connected to the output terminal of the error amplifier U3, the second end of resistor R9 is connected to the VSENSE pin, the cathode of diode D1 is connected to the second end of resistor R9, and the anode of diode D1 is grounded.

[0034] Based on the voltage control module 3 described above, voltage amplifier U2 first amplifies the received set voltage Vset to the target voltage V. T The input is fed to error amplifier U3, which then compares the output voltage Vout with the target voltage V. T After error amplification calculation, the error is fed back to the voltage conversion chip U1. Then, the voltage conversion chip U1 adjusts the output voltage Vout based on the information fed back by the error amplifier U3 and the frequency selection acceleration module 3, thereby improving the stability and accuracy of the output voltage.

[0035] In this embodiment, as Figure 1 As shown, the input module includes the input voltage Vin connected to the VIN pin, and capacitors C6, C7, and C8 connected in parallel between the input voltage Vin and ground. Capacitors C6, C7, and C8 are input filter capacitors of different capacitance values, used to filter out ripple and noise of different frequencies of the input voltage Vin, providing a high-quality voltage source for the subsequent voltage conversion chip U1. In a preferred embodiment, capacitor C6 is an electrolytic capacitor, and capacitors C7 and C8 are ordinary non-polarized capacitors.

[0036] In this embodiment, as Figure 1 As shown, the enable indicator module 5 includes a resistor R. 10 Resistance R 11 Resistance R 12 LED D2 and transistor Q1; resistor R 10 The first terminal is connected to the ENA enable signal, and the resistor R 10 The second terminal is connected to the ENA pin, and the resistor R 11 The first terminal is connected to the resistor R 10 The first terminal, the resistor R 11 The second terminal is grounded; the resistor R 12 The first terminal is connected to the input voltage Vin, and the resistor R 12 The second terminal is connected to the positive terminal of the LED D2, the negative terminal of the LED D2 is connected to the collector of the transistor Q1, the emitter of the transistor Q1 is grounded, and the base of the transistor Q1 is connected to the ENA pin. When the ENA enable signal is high, causing the voltage conversion chip U1 to be in working state, the transistor Q1 is turned on, and the LED D2 emits light. Thus, whether the LED D2 is lit indicates whether the voltage conversion chip U1 is activated.

[0037] In this embodiment, as Figure 1 As shown, the output module includes inductor L1, diode D3, capacitor C9, and capacitor C. 10 Capacitor C 11 and capacitor C 12 The first terminal of inductor L1 is connected to the PH pin, and the second terminal of inductor L1 serves as the output terminal of the output module, outputting the output voltage Vout. The cathode of diode D3 is connected to the first terminal of inductor L1, and the anode of diode D3 is grounded. Capacitor C9 and capacitor C... 10 The capacitor C 11 and the capacitor C 12It is connected in parallel between the second terminal of inductor L1 and the ground terminal. Inductor L1 is a filtering and energy storage inductor, and capacitors C9 and C... 10 Capacitor C 11 and capacitor C 12 For filtering capacitors, the inductor L1, capacitor C9, and capacitor C... 10 Capacitor C 11 and capacitor C 12 An LC filter network is formed to filter the high-frequency switching waveform of the voltage conversion chip U1 into a stable DC voltage output. In a preferred embodiment, capacitor C9 is an electrolytic capacitor. 10 Capacitor C 11 and capacitor C 12 It is a common non-polarized capacitor.

[0038] In summary, the DC-DC buck converter circuit provided by this utility model embodiment sets up a frequency selection acceleration module and a voltage control module between the VSENSE pin of the voltage conversion chip U1 and the output terminal of the output module, thereby improving the dynamic response rate of the DC-DC buck converter circuit as well as the stability and accuracy of the output voltage.

[0039] The above description is only a specific embodiment of this application. It should be noted that for those skilled in the art, several improvements and modifications can be made without departing from the principle of this application, and these improvements and modifications should also be considered within the scope of protection of this application.

Claims

1. A DC-DC buck converter circuit, characterized in that, The system includes an input module, a voltage conversion chip U1, an output module, a frequency selection acceleration module, and a voltage control module. The voltage conversion chip U1 includes a VIN pin, a BOOT pin, a PH pin, and a VSENSE pin. The voltage control module includes a voltage amplifier U2 and an error amplifier U3. The input module is connected to the VIN pin, and the output module is connected to the PH pin. A startup capacitor C1 is connected between the PH pin and the BOOT pin. The frequency selection acceleration module is connected between the output terminal of the output module and the VSENSE pin. The non-inverting input of the voltage amplifier U2 is connected to a set voltage Vset. The inverting input of the voltage amplifier U2 is connected to its output terminal, and its output terminal is connected to the inverting input of the error amplifier U3. The non-inverting input of the error amplifier U3 is connected to the output terminal of the output module, and the output terminal of the error amplifier U3 is connected to the VSENSE pin. The voltage conversion chip U1 is configured to convert the input voltage Vin received from the VIN pin into an output voltage Vout and output it through the output module; the voltage amplifier U2 is configured to amplify the received set voltage Vset into a target voltage Vout. T The input is given to the inverting input of the error amplifier U3; the error amplifier U3 is configured to compare the output voltage Vout with the target voltage V. T After error amplification calculation, the result is fed back to the voltage conversion chip U1; the frequency selection acceleration module is configured to feed back the change information of the output voltage Vout to the voltage conversion chip U1; The voltage conversion chip U1 is further configured to adjust the magnitude of the output voltage Vout based on the information fed back from the error amplifier U3 and the frequency selection acceleration module, so that the output voltage Vout is greater than the target voltage V. T The voltage difference is large and ΔV.

2. The DC-DC buck converter circuit according to claim 1, characterized in that, The voltage difference ΔV is between 2V and 2.5V.

3. The DC-DC buck converter circuit according to claim 1, characterized in that, The frequency selection acceleration module includes a resistor R1, a capacitor C2, and a capacitor C3. The first end of the resistor R1 is connected to the VSENSE pin, the second end of the resistor R1 is connected to the first end of the capacitor C2, the second end of the capacitor C2 is connected to the output terminal of the output module, the first end of the capacitor C3 is connected to the first end of the resistor R1, and the second end of the capacitor C3 is connected to the second end of the capacitor C2.

4. The DC-DC buck converter circuit according to claim 1, characterized in that, The non-inverting input of the voltage amplifier U2 is connected to a resistor R2 and a capacitor C4; the set voltage Vset is connected to the first terminal of the resistor R2, the second terminal of the resistor R2 is connected to the non-inverting input of the voltage amplifier U2, the first terminal of the capacitor C4 is connected to the second terminal of the resistor R2, and the second terminal of the capacitor C4 is grounded. The inverting input of the voltage amplifier U2 is connected to resistors R3 and R4; the first end of resistor R3 is connected to the inverting input of the voltage amplifier U2, the second end of resistor R3 is connected to the output input of the voltage amplifier U2, the first end of resistor R4 is connected to the second end of resistor R3, and the second end of resistor R4 is grounded.

5. The DC-DC buck converter circuit according to claim 1, characterized in that, The non-inverting input of the error amplifier U3 is connected to resistors R5 and R6; the first end of resistor R5 is connected to the non-inverting input of the error amplifier U3, the second end of resistor R5 is connected to the output terminal of the output module, the first end of resistor R6 is connected to the first end of resistor R5, and the second end of resistor R6 is grounded. The inverting input of the error amplifier U3 is connected to resistors R7 and R8 and capacitor C5; the first end of resistor R7 is connected to the inverting input of the error amplifier U3, the second end of resistor R7 is connected to the output of the voltage amplifier U2, and resistor R8 and capacitor C5 are connected in parallel between the inverting input and the output of the error amplifier U3. The output terminal of the error amplifier U3 is connected to a resistor R9 and a diode D1. The first end of the resistor R9 is connected to the output terminal of the error amplifier U3, the second end of the resistor R9 is connected to the VSENSE pin, the cathode of the diode D1 is connected to the second end of the resistor R9, and the anode of the diode D1 is grounded.

6. The DC-DC buck converter circuit according to any one of claims 1-5, characterized in that, The input module includes the input voltage Vin connected to the VIN pin and capacitors C6, C7 and C8 connected in parallel between the input voltage Vin and the ground terminal.

7. The DC-DC buck converter circuit according to claim 6, characterized in that, The capacitor C6 is an electrolytic capacitor, while the capacitors C7 and C8 are ordinary non-polarized capacitors.

8. The DC-DC buck converter circuit according to claim 6, characterized in that, The DC-DC buck converter circuit also includes an enable indicator module, and the voltage conversion chip U1 also includes an ENA pin; The enable indicator module includes a resistor R. 10 Resistance R 11 Resistance R 12 LED D2 and transistor Q1; resistor R 10 The first terminal is connected to the ENA enable signal, and the resistor R 10 The second terminal is connected to the ENA pin, and the resistor R 11 The first terminal is connected to the resistor R 10 The first terminal, the resistor R 11 The second terminal is grounded; the resistor R 12 The first terminal is connected to the input voltage Vin, and the resistor R 12 The second terminal is connected to the positive terminal of the light-emitting diode D2, the negative terminal of the light-emitting diode D2 is connected to the collector of the transistor Q1, the emitter of the transistor Q1 is grounded, and the base of the transistor Q1 is connected to the ENA pin.

9. The DC-DC buck converter circuit according to any one of claims 1-5, characterized in that, The output module includes inductor L1, diode D3, capacitor C9, and capacitor C. 10 Capacitor C 11 and capacitor C 12 The first terminal of inductor L1 is connected to the PH pin, and the second terminal of inductor L1 serves as the output terminal of the output module, outputting the output voltage Vout. The cathode of diode D3 is connected to the first terminal of inductor L1, and the anode of diode D3 is grounded. Capacitor C9 and capacitor C... 10 The capacitor C 11 and the capacitor C 12 It is connected in parallel between the second terminal of the inductor L1 and the ground terminal.

10. The DC-DC buck converter circuit according to claim 9, characterized in that, The capacitor C9 is an electrolytic capacitor, the capacitor C 10 Capacitor C 11 and capacitor C 12 It is a common non-polarized capacitor.

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