An automatic driving road test data collection and storage system

Abstract

The utility model discloses a kind of collection and storage systems of automatic driving road test data, including ADU automatic driving unit, sensor group, data acquisition module, U.2 server hard disk, temperature management module and power management module. ADU integrates SOC processing unit, is equipped with multiple interfaces, receives sensor group data. Sensor group contains multiple sensors, and is connected with ADU data input interface. Data acquisition module is installed in ADU circuit board, and is connected with SOC processing unit and U.2 server hard disk. U.2 server hard disk is installed ADU hard disk store through vehicle level cable and adapter plate, supports hot plug. Temperature management module contains sensor, heating sheet and fan, for adjusting hard disk temperature. Power management module contains voltage stabilizing and hibernate control circuit, voltage stabilizing circuit connects automobile power supply and hard disk, hibernate control circuit is on ADU circuit board, and hard disk power supply is controlled by relay.

Description

Technical Field

[0001] This specification relates to the field of autonomous driving road testing technology, and in particular to an autonomous driving road test data acquisition and storage system. Background Technology

[0002] In today's automotive industry, the market size of advanced driver assistance systems (ADAS) vehicles is showing a continuous expansion trend. With the continuous advancement of technology, algorithm providers are increasingly demanding road test data to optimize and iterate intelligent driving algorithms. This data plays a crucial role in improving the accuracy and reliability of the algorithms. Currently, the mainstream road test data collection methods are mainly the following two:

[0003] 1. Cloud storage solution: In this solution, the vehicle's autonomous driving domain controller (ADU) first processes the data collected by the sensors, and then uses a 5G-TBOX to transmit the processed data to the cloud server for storage in real time. In theory, this method can achieve rapid data upload and centralized management, making it convenient for algorithm providers to obtain data for analysis at any time.

[0004] 2. Local storage solution: The road test data is stored by installing a PC server in the trunk of the car. This solution is relatively simple and direct, does not rely on the network for real-time transmission, and avoids the impact of network problems on data storage to a certain extent.

[0005] However, these two existing solutions have many problems in practical applications:

[0006] 1. Data Transmission Bottleneck: Today, the number and resolution of cameras in automobiles are constantly increasing, and the use of various sensors such as LiDAR, millimeter-wave radar, and inertial navigation systems (INS) is becoming more widespread. This has led to a dramatic increase in the amount of data generated per second in highly intelligent vehicles, reaching Gbps levels. However, the uplink bandwidth of 5G networks is only 100Mbps, far from meeting the real-time upload requirements of such a large amount of data. Furthermore, most road test scenarios are conducted outdoors, where the stability of 5G communication signals is poor, making it difficult to meet the high bandwidth requirements. This frequently leads to data loss and network interruptions, severely impacting the integrity and continuity of data collection.

[0007] 2. Limitations of Local Storage: Early solutions using industrial PCs to store road test data had significant drawbacks. Vehicles undergoing testing need to operate in environments ranging from -40℃ to 85℃, while typical industrial PCs can only function normally in temperatures from 5℃ to 35℃. This severely restricts the environmental adaptability of the testing environment. Furthermore, industrial PCs require a special 220V automotive power supply, which has poor stability and reliability. During data acquisition, problems such as data loss, computer restarts, and hard drive failures frequently occur, compromising the security and reliability of data storage.

[0008] In summary, existing solutions for collecting and storing autonomous driving road test data can no longer meet the growing data demands and complex testing environment requirements, and a new solution is urgently needed to address these issues. Utility Model Content

[0009] To solve the above-mentioned technical problems, the embodiments of this specification are implemented as follows: This utility model provides a system for collecting and storing autonomous driving road test data, including:

[0010] The ADU (Autonomous Driving Unit) integrates a SOC (System-on-a-Chip) processing unit. The ADU is equipped with a data input interface, a PCIE bus interface, and a power interface.

[0011] The sensor group includes ultrasonic radar, millimeter-wave radar, lidar, camera and high-precision positioning sensor. Each sensor is electrically connected to the data input interface of the ADU autonomous driving unit via cables.

[0012] The data acquisition module is fixedly installed on the circuit board of the ADU autonomous driving unit. The input end of the data acquisition module is connected to the output end of the SOC processing unit through an internal bus, and the output end of the data acquisition module is brought out through a high-speed PCIe bus interface.

[0013] The U.2 server hard drive is connected to the PCIE bus interface of the data acquisition module via an automotive-grade PCIE high-speed cable, and is installed in the hard drive bay inside the ADU autonomous driving unit via an automotive-grade adapter board. The hard drive bay is equipped with a hot-swappable interface.

[0014] The temperature management module includes: a temperature sensor, a resistive heating element, and a cooling fan; wherein, the temperature sensor is attached to the surface of the housing of the U.2 server hard drive; the resistive heating element is fixed to the inner wall of the hard drive bay; the cooling fan is installed inside the ADU (Autopilot Unit) and adjacent to the hard drive bay; the temperature sensor, the resistive heating element, and the cooling fan are electrically connected to the control circuit of the ADU via signal lines;

[0015] The power management module includes a voltage regulator circuit and a sleep control circuit. The input of the voltage regulator circuit is connected to the vehicle power supply via an automotive-grade power cable, and the output of the voltage regulator circuit is connected to the power interface of the U.2 server hard drive via a copper busbar. The sleep control circuit is located on the circuit board of the ADU (Autonomous Driving Unit), and the output of the voltage regulator circuit is connected to the power interface of the U.2 server hard drive via a relay.

[0016] In some optional implementations, the input terminal of the SOC processing unit is connected to the data input interface of the sensor group through an internal data bus, and the output terminal of the SOC processing unit is divided into a first data channel and a second data channel. The first data channel is connected to the control circuit of the ADU autonomous driving unit, and the second data channel is connected through the input terminal of the data acquisition module.

[0017] In some optional implementations, the data acquisition module includes: an FPGA chip, BGA packaged and soldered onto the circuit board of the ADU autonomous driving unit; a cache unit, consisting of two DDR4 SDRAM chips, connected to the storage interface of the FPGA chip via gold wire bonding; a PCIe interface circuit, integrated into the edge area of ​​the circuit board, including a PCIe 3.0x4 gold finger connector; and a power filtering circuit, consisting of multiple surface-mount ceramic capacitors and ferrite bead inductors, soldered around the power supply pins of the FPGA chip; wherein the data input terminal of the FPGA chip is connected to the SOC processing unit through the internal bus of the ADU autonomous driving unit, and the data output terminal is connected to the automotive-grade PCIe high-speed cable through the PCIe interface circuit.

[0018] In some optional embodiments, the automotive-grade PCIe high-speed cable is a shielded twisted-pair cable with an outer layer covered with high-temperature resistant insulating material and gold-plated connectors at both ends. The connectors are plugged into and fixed to the PCIe bus interface of the data acquisition module and the interface of the U.2 server hard drive.

[0019] In some optional embodiments, the automotive-grade adapter board is a multi-layer PCB board with a copper heat dissipation layer on its surface. The adapter board is fixed to the hard drive bay of the ADU autonomous driving unit by screws and is plugged into the interface of the U.2 server hard drive.

[0020] In some optional embodiments, the voltage regulator circuit includes multi-stage filter capacitors, inductors, and voltage regulation chips. The filter capacitors and inductors are soldered to the power board of the ADU (Autonomous Driving Unit), and the voltage regulation chip is fixed to the power board via a heat dissipation substrate.

[0021] In some alternative implementations, the sleep control circuit includes a Hall sensor and a relay. The Hall sensor is mounted on the power board of the ADU (Automatic Driving Unit) for detecting the power input status, and the control terminal of the relay is electrically connected to the output terminal of the Hall sensor.

[0022] In some optional implementations, a high-precision map acquisition module is also included. The high-precision map acquisition module is connected to the data input interface of the ADU autonomous driving unit via a data cable. The high-precision map acquisition module has a storage chip inside, which is connected to the input terminal of the data acquisition module via a data bus.

[0023] In some optional implementations, a runtime clock module is also included, the hardware structure of which includes:

[0024] The automotive-grade clock generator adopts a differential output design and is soldered onto the circuit board of the ADU autonomous driving unit using SMT technology. Its output terminal is connected to the clock input pin of the FPGA chip of the data acquisition module through a dedicated clock line. The dedicated clock line has a differential trace structure and is configured to transmit a reference clock signal.

[0025] The clock buffer is integrated on the PCB board of the PCIe interface circuit. Its input terminal is electrically connected to the output terminal of the automotive-grade clock generator through gold-plated contacts, and its output terminal is connected to the gold finger connector of the PCIe interface circuit. It is configured to output a differential clock signal that conforms to the PCIe 3.0 protocol.

[0026] The dedicated clock circuit is covered with a copper foil shielding layer, which is connected to the ground layer of the circuit board through vias.

[0027] One embodiment of this specification can achieve the following beneficial effects:

[0028] 1. The ADU (Autonomous Driving Unit) integrates a SOC (System-on-a-Chip) processing unit, capable of preliminary processing and analysis of the large amounts of raw data collected by the sensor array. The data acquisition module connects to the SOC processing unit via an internal bus, enabling rapid data transmission and distribution. Furthermore, a high-speed PCIe bus interface is used to transmit the processed data to the U.2 server hard drive, ensuring high efficiency and stability in data transmission, avoiding delays and data loss during transmission, and ensuring timely and accurate data storage.

[0029] 2. The U.2 server hard drive has a large storage capacity, capable of meeting the storage needs of large amounts of data during autonomous driving road testing. Simultaneously, the connection to the data acquisition module via automotive-grade PCIe high-speed cables and the installation of an automotive-grade adapter board within the hard drive bay ensure reliable connection and stable operation between the hard drive and the system. The hard drive bay is equipped with a hot-swappable interface, facilitating hard drive replacement and maintenance during testing, thereby improving system availability and maintainability.

[0030] 3. The temperature management module can monitor the temperature of the U.2 server hard drive in real time and adjust the temperature using resistive heating elements or a cooling fan to ensure the hard drive operates in a suitable temperature environment. This prevents the hard drive from being affected by excessively high or low temperatures, thus ensuring the safe storage of data. The voltage regulation circuit in the power management module provides a stable power supply to the hard drive, preventing damage from voltage fluctuations. The hibernation control circuit can put the hard drive into hibernation mode when the vehicle is not being tested, reducing power consumption and extending the hard drive's lifespan, further ensuring data security. Attached Figure Description

[0031] To more clearly illustrate the technical solutions in the embodiments or prior art of this specification, the drawings used in the description of the embodiments or prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments recorded in this application. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0032] Figure 1 A system block diagram of the autonomous driving road test data acquisition and storage system provided in this specification;

[0033] Figure 2 This is a logical architecture diagram of the autonomous driving road test data acquisition and storage system provided in this manual. Detailed Implementation

[0034] The technical solutions of the present utility model will be clearly and completely described below with reference to the accompanying drawings of the embodiments of the present utility model. Obviously, the described embodiments are only some embodiments of the present utility model, and not all embodiments.

[0035] Figure 1 This is a system block diagram of the autonomous driving road test data acquisition and storage system provided in this specification. Figure 2 This is a logical architecture diagram of the autonomous driving road test data acquisition and storage system provided in this manual.

[0036] This application provides a data acquisition and storage system for autonomous driving road tests, applied to an autonomous driving data acquisition vehicle. The system includes an Autonomous Driving Unit (ADU), a sensor array, a data acquisition module, a U.2 server hard drive, a temperature management module, and a power management module. The ADU integrates a System-on-a-Chip (SOC) processing unit and is equipped with a data input interface, a PCIe bus interface, and a power interface. The data input interface receives data from the sensor array, which is fundamental for autonomous driving decisions and environmental perception. Different types of sensor data can be transmitted to the ADU for processing via this interface. The PCIe bus interface provides a high-speed data transmission channel, enabling the data acquisition module to quickly output processed data for storage on the U.2 server hard drive. The power interface provides power to the ADU and its internal components, ensuring their normal operation.

[0037] The sensor array can include ultrasonic radar, millimeter-wave radar, lidar, cameras, and high-precision positioning sensors. Each sensor is electrically connected to the data input interface of the ADU (Autonomous Driving Unit) via cables. Ultrasonic radar is generally used for short-range detection, detecting the distance to obstacles around the vehicle, and is commonly used in scenarios such as reversing assistance. Millimeter-wave radar can operate in various weather conditions, providing information such as the distance, speed, and angle of targets. LiDAR creates a 3D point cloud map of the surrounding environment by emitting laser beams, providing high-precision environmental information to help the vehicle identify road boundaries, obstacles, etc. Cameras can capture images and videos around the vehicle for identifying traffic signs, lane lines, pedestrians, and other visual information. High-precision positioning sensors provide precise vehicle position and attitude information, which, combined with map data, enables accurate vehicle positioning and navigation. Each sensor is electrically connected to the data input interface of the ADU via cables, transmitting the collected raw data to the ADU for processing in real time.

[0038] The data acquisition module is fixedly mounted on the circuit board of the ADU (Autonomous Driving Unit) and serves as a data relay and processing unit. The input of the data acquisition module is connected to the output of the SOC (System-on-a-Chip) processing unit via an internal bus, receiving data after preliminary processing of sensor data by the SOC. The output of the data acquisition module is led out through a high-speed PCIe bus interface, transmitting the processed data at high speed to the U.2 server hard drive for storage. The U.2 server hard drive is connected to the PCIe bus interface of the data acquisition module via an automotive-grade PCIe high-speed cable and is installed in the hard drive bay inside the ADU via an automotive-grade adapter board. The hard drive bay has a hot-swappable interface, facilitating hard drive replacement without shutting down the system, improving the flexibility and efficiency of data acquisition. The temperature management module may include a temperature sensor, a resistive heating element, and a cooling fan. The temperature sensor is attached to the surface of the U.2 server hard drive casing, monitoring the hard drive temperature in real time and transmitting the temperature information to the control circuit of the ADU via a signal line. A resistive heating element is fixed to the inner wall of the hard drive bay. When the temperature sensor detects that the hard drive temperature is too low, the ADU control circuit activates the resistive heating element to heat the hard drive and bring it to a suitable operating temperature. A cooling fan is installed inside the ADU autopilot unit and adjacent to the hard drive bay. The temperature sensor, resistive heating element, and cooling fan are electrically connected to the control circuit of the ADU autopilot unit via signal lines. When the hard drive temperature is too high, the ADU control circuit activates the cooling fan to accelerate airflow and lower the hard drive temperature. The temperature management module ensures that the U.2 server hard drive operates within a suitable temperature range, improving the hard drive's reliability and lifespan. The power management module may include a voltage regulator circuit and a sleep control circuit. The input of the voltage regulator circuit is connected to the automotive power supply via an automotive-grade power cable, and the output of the voltage regulator circuit is connected to the power interface of the U.2 server hard drive via a copper busbar. The sleep control circuit is located on the circuit board of the ADU autopilot unit, and the output of the voltage regulator circuit is connected to the power interface of the U.2 server hard drive via a relay. When the vehicle is parked or data collection is not required, the hibernation control circuit can control the relay to cut off the power to the hard drive, thus putting the hard drive into hibernation and reducing power consumption.

[0039] In the above technical solution, the ADU (Autonomous Driving Unit) integrates a SOC (System-on-a-Chip) processing unit, capable of preliminary processing and analysis of the large amount of raw data collected by the sensor array. The data acquisition module connects to the SOC processing unit via an internal bus, enabling rapid data transmission and distribution. Furthermore, a high-speed PCIe bus interface is used to transmit the processed data to the U.2 server hard drive, ensuring high efficiency and stability in data transmission, avoiding delays and data loss during transmission, and ensuring timely and accurate data storage. Simultaneously, the U.2 server hard drive has a large storage capacity, meeting the storage needs of large amounts of data during autonomous driving road testing. Furthermore, the connection to the data acquisition module via automotive-grade PCIe high-speed cables, and the installation of an automotive-grade adapter board within the hard drive bay, ensure reliable connection and stable operation of the hard drive and the system. The hard drive bay is equipped with a hot-swappable interface, facilitating hard drive replacement and maintenance during testing, thereby improving system availability and maintainability. Furthermore, the temperature management module can monitor the temperature of the U.2 server hard drive in real time and adjust the temperature using resistive heating elements or a cooling fan to ensure the hard drive operates in a suitable temperature environment. This prevents the hard drive from being affected by excessively high or low temperatures, thus ensuring the safe storage of data. The voltage regulation circuit in the power management module provides a stable power supply to the hard drive, preventing damage from voltage fluctuations. The hibernation control circuit can put the hard drive into hibernation mode when the vehicle is not being tested, reducing power consumption and extending the hard drive's lifespan, further ensuring data security.

[0040] Based on the technical solutions described above, some more specific technical solutions are provided below, which will be elaborated on separately.

[0041] In an optional embodiment, the input terminal of the SOC processing unit is connected to the data input interface of the sensor group via an internal data bus. The output terminal of the SOC processing unit can be divided into a first data channel and a second data channel. The first data channel is connected to the control circuit of the ADU autonomous driving unit, and the second data channel is connected through the input terminal of the data acquisition module.

[0042] In this application's technical solution, the SOC processing unit, as a component of the ADU (Autonomous Driving Unit), has its input terminal connected to the data input interface of the sensor group via an internal data bus. The sensor group can include ultrasonic radar, millimeter-wave radar, lidar, cameras, and high-precision positioning sensors. The raw data collected by these sensors is highly heterogeneous. For example, radar outputs point cloud data in binary point cloud stream format, covering information such as three-dimensional coordinates and reflection intensity; cameras transmit image data in various formats, such as RGB or RAW, with resolutions reaching over 8 megapixels, accessed via LVDS or CSI interfaces; high-precision positioning sensors output GNSS / INS data such as latitude, longitude, altitude, speed, and attitude angles according to the NMEA protocol or a custom binary protocol. The internal data bus is responsible for rapidly and stably transmitting this raw data from different sensors to the SOC processing unit. It can employ high-speed, low-latency transmission technology to ensure the integrity and accuracy of the data during transmission, meeting the real-time transmission requirements of Gbps-level data volumes.

[0043] In this embodiment, after a series of hardware-level preprocessing operations by the SOC processing unit, the data is divided into a first data channel and a second data channel from its output. The first data channel is connected to the control circuit of the ADU (Autonomous Driving Unit) and undertakes the task of real-time control. It prioritizes extracting data directly related to autonomous driving control, such as radar point clouds, real-time camera images, and positioning coordinates. This data is rapidly transmitted to the ADU's perception and control module. The second data channel is connected through the input of the data acquisition module. Its main task is to completely retain the original sensor data, including redundant data not used in real-time control, such as original radar echoes and full-resolution images. This data provides richer and more comprehensive information for algorithm training. The second data channel transmits the data to the data acquisition module, which is fixedly mounted on the ADU's circuit board. Here, the data is packaged and organized, then led out through a high-speed PCIe bus interface, and finally transmitted to the U.2 server hard drive for storage via automotive-grade PCIe high-speed cables. Because the automotive-grade PCIe high-speed cables used have high-speed transmission and anti-interference characteristics, it ensures that the data is not lost or damaged during transmission, meeting the stringent requirements for data integrity.

[0044] The data processing and distribution architecture in this embodiment enables the system to efficiently complete data acquisition and storage while performing real-time autonomous driving control. Furthermore, the hardware-level design avoids the high latency and resource contention issues associated with software processing, thus improving system performance and reliability.

[0045] In an optional embodiment, the data acquisition module may include an FPGA chip, a cache unit, a PCIe interface circuit, and a power filtering circuit. The FPGA chip is BGA-packaged and soldered onto the circuit board of the ADU (Autonomous Driving Unit). The cache unit consists of two DDR4 SDRAM chips, connected to the FPGA chip's memory interface via gold wire bonding. The PCIe interface circuit is integrated into the edge area of ​​the circuit board and includes a PCIe 3.0x4 gold finger connector. The power filtering circuit consists of multiple surface-mount ceramic capacitors and ferrite bead inductors, soldered around the power supply pins of the FPGA chip. The data input terminal of the FPGA chip is connected to the SOC (System-on-a-Chip) processing unit via the internal bus of the ADU, and the data output terminal is connected to the automotive-grade PCIe high-speed cable via the PCIe interface circuit.

[0046] In this embodiment, the data acquisition module mainly consists of an FPGA chip, a cache unit, a PCIe interface circuit, and a power filtering circuit. These components work together to acquire data from the SOC processing unit and transmit it to the U.2 server hard drive. The specific features and functions of each component are described below.

[0047] In this technical solution, the FPGA chip can be packaged using a Ball Grid Array (BGA) package. This packaging method arranges the chip's pins as ball-shaped solder balls on the bottom of the package. BGA packaging provides a large number of I / O pins within a small space, meeting the needs of connecting the FPGA chip to other components. Simultaneously, it offers excellent electrical and heat dissipation performance, reducing signal transmission delay and noise interference, ensuring the chip maintains a low temperature during operation, and improving reliability and stability. The FPGA chip can be soldered onto the circuit board of the ADU (Automatic Driving Unit) to ensure a stable electrical connection and physical fixation between the chip and the circuit board.

[0048] The cache unit can be composed of two Double Data Rate Synchronous Dynamic Random Access Memory (DDR4 SDRAM) chips. DDR4 SDRAM is a high-speed memory device with high data transfer rates and storage capacity, enabling fast data read and write. The cache unit can be connected to the FPGA chip's storage interface via gold wire bonding. Gold wire bonding is a reliable chip interconnect technology that enables high-speed data transfer between the cache unit and the FPGA chip. In this embodiment, the cache unit serves as a temporary data storage area, mitigating the data transfer speed difference between the FPGA chip and the U.2 server hard drive. When the SOC processing unit outputs data quickly, while the U.2 server hard drive writes relatively slowly, the cache unit can temporarily store data, preventing data loss and ensuring the continuity and stability of data transmission.

[0049] The PCIe interface circuitry is integrated into the edge area of ​​the circuit board for easy connection to external automotive-grade PCIe high-speed cables. The PCIe interface circuitry includes a PCIe 3.0 x4 gold-finger connector. PCIe (Peripheral Component Interconnect Express) is a high-speed serial computer expansion bus standard. PCIe 3.0 x4 indicates that the interface uses the PCIe 3.0 protocol and has four channels, providing high data transmission bandwidth to meet the needs of rapid transmission of large amounts of data. The gold-finger connector is a common physical interface type, offering good electrical contact performance and mechanical stability. The PCIe interface circuitry serves as the data transmission channel between the data acquisition module and the U.2 server hard drive, transmitting data processed by the FPGA chip to the U.2 server hard drive for storage via an automotive-grade PCIe high-speed cable.

[0050] The power supply filter circuit consists of multiple surface-mount ceramic capacitors and ferrite bead inductors. Surface-mount ceramic capacitors have advantages such as small size, large capacitance, and good high-frequency characteristics, effectively filtering out high-frequency noise in the power supply. Ferrite bead inductors suppress high-frequency interference on the power lines, reducing the impact of electromagnetic interference on the FPGA chip. The power supply filter circuit can be soldered around the power supply pins of the FPGA chip, allowing for more direct filtering of the FPGA chip's power supply and ensuring a stable and clean power supply.

[0051] In this embodiment, the data input terminal of the FPGA chip is connected to the SOC processing unit via the internal bus of the ADU (Autonomous Driving Unit). This allows the data processed by the SOC processing unit to be transmitted to the FPGA chip via the internal bus, providing a foundation for subsequent data processing and storage. The data output terminal of the FPGA chip is connected to an automotive-grade PCIe high-speed cable via a PCIe interface circuit. The data processed by the FPGA chip is transmitted to the U.2 server hard drive via the PCIe interface circuit and the automotive-grade PCIe high-speed cable, realizing data acquisition and storage.

[0052] In an optional embodiment, the automotive-grade PCIE high-speed cable is a shielded twisted-pair cable with an outer layer covered with high-temperature resistant insulating material and gold-plated connectors at both ends. The connectors are plugged into and fixed to the PCIE bus interface of the data acquisition module and the interface of the U.2 server hard drive.

[0053] In this embodiment, the automotive-grade PCIe high-speed cable employs a shielded twisted-pair structure to cope with the complex electromagnetic environment inside a vehicle. Various electronic devices exist inside a car, generating electromagnetic interference during operation. In such an environment, ordinary cables are prone to data transmission interference, leading to data loss or errors. Shielded twisted-pair cables, by wrapping a metal shield around the twisted pair, effectively shield against external electromagnetic interference, ensuring the accuracy of data transmission. The twisted-pair structure, utilizing the twisting of two conductors, reduces its own electromagnetic radiation, further improving anti-interference capabilities. This structural design in this embodiment enables the automotive-grade PCIe high-speed cable to stably carry Gbps-level data traffic, meeting the high-speed transmission requirements of autonomous driving systems for large amounts of sensor data.

[0054] In this embodiment, the outer layer of the PCIe high-speed cable is covered with a high-temperature resistant insulating material. This is to take into account the temperature variations of automobiles under different operating conditions. During vehicle operation, the temperature near the engine compartment is high, and the cable also faces severe challenges under extreme weather conditions, such as high-temperature exposure or low-temperature environments. The high-temperature resistant insulating material ensures that the cable will not be damaged by overheating in high-temperature environments, maintaining good insulation performance and preventing short circuits. In low-temperature environments, the material still maintains its flexibility and will not affect the physical properties and data transmission performance of the cable due to hardening or brittleness. This material characteristic allows automotive-grade PCIe high-speed cables to operate normally within a wide range of automotive operating temperatures, such as -40℃ to 85℃, thus adapting to various complex climates and operating conditions.

[0055] Meanwhile, in this embodiment, the connector is fixed to the PCIE bus interface of the data acquisition module and the interface of the U.2 server hard drive by plugging. This plugging method is compact and easy to install, which can ensure that the connection between the cable and the device is firm. Therefore, even if the vehicle is subjected to vibration and bumps during the car's operation, the plugging method can ensure that the connector will not easily loosen and maintain a stable data transmission connection.

[0056] In an optional embodiment, the automotive-grade adapter board is a multi-layer PCB board with a copper heat dissipation layer on its surface. The adapter board is fixed to the hard drive bay of the ADU autonomous driving unit by screws and is connected to the interface of the U.2 server hard drive.

[0057] In this embodiment, the automotive-grade adapter board employs a multi-layer printed circuit board (PCB) design to meet the complex circuit layout and signal transmission requirements. In autonomous driving systems, the U.2 server hard drive and the ADU autonomous driving unit need to transmit large amounts of high-speed data. A multi-layer PCB provides more wiring layers, effectively reducing signal interference and ensuring the stability and reliability of data transmission. Different layers can be used for power transmission, signal transmission, and grounding, achieving functional partitioning and improving the electrical performance of the adapter board. Compared to single-layer or double-layer PCBs, multi-layer PCBs better meet the stringent requirements of autonomous driving systems for data transmission rate and stability, ensuring smooth data interaction between the U.2 server hard drive and the ADU autonomous driving unit and preventing data loss or transmission errors.

[0058] Meanwhile, considering that the U.2 server hard drive generates heat during operation, if the heat cannot be dissipated in time, it will affect the performance and stability of the hard drive, and may even lead to hard drive damage. Therefore, in this embodiment, a copper heat dissipation layer is provided on the surface of the automotive-grade adapter board. Copper has good thermal conductivity, and the copper heat dissipation layer can quickly conduct the heat generated by the hard drive away. It is in close contact with the hard drive and can guide the heat from the hard drive surface to the adapter board. Then, through the contact between the adapter board and the ADU (Autonomous Driving Unit), the heat is finally dissipated into the surrounding environment. This heat dissipation design in this embodiment helps to maintain the U.2 server hard drive within a suitable temperature range, improves the reliability and lifespan of the hard drive, and ensures that the hard drive can operate stably during long-term data acquisition and storage without failure due to overheating.

[0059] In this embodiment, the automotive-grade adapter board can be secured to the hard drive bay of the ADU (Autonomous Driving Unit) using screws. This secure fixing method ensures that the adapter board will not loosen due to vibration or bumps during vehicle operation. During testing, vehicles experience various complex road conditions and varying degrees of vibration; the screw fixing effectively resists these external forces, ensuring the stability of the connection between the adapter board and the ADU. The adapter board connects to the U.2 server hard drive via an interface that facilitates installation and removal. This allows for convenient operation when replacing the hard drive or maintaining the adapter board. Furthermore, the interface design ensures the stability of the electrical connection, guaranteeing reliable data transmission between the adapter board and the hard drive.

[0060] In an optional embodiment, the voltage regulator circuit may include multi-stage filter capacitors, inductors, and voltage regulation chips. The filter capacitors and inductors are soldered to the power board of the ADU (Autonomous Driving Unit), and the voltage regulation chip is fixed to the power board via a heat dissipation substrate.

[0061] In this embodiment, the voltage regulator circuit employs a design that utilizes multi-stage filter capacitors, inductors, and a voltage regulator chip working in tandem. Automotive power supplies exhibit numerous unstable factors during output, such as voltage fluctuations and current noise, which are extremely detrimental to the stable operation of U.2 server hard drives. Multi-stage filter capacitors effectively filter high-frequency noise in the power supply. Their principle is based on the low impedance characteristic of capacitors to high-frequency signals, introducing high-frequency noise to ground and making the output power purer. The inductor works in conjunction with the filter capacitors to suppress low-frequency ripple current. Inductors have the characteristic of impeding current changes; when current fluctuates, the inductor can smooth the current through its own energy storage and release, reducing the impact of low-frequency ripple on power stability. The voltage regulator chip precisely adjusts the voltage, stabilizing it within the power supply voltage range required by the U.2 server hard drive. It can automatically adjust the output voltage according to changes in input voltage and load, ensuring the hard drive always receives a stable power supply. Through the coordinated operation of these three components, the voltage regulator circuit can convert automotive power into stable, clean DC power, meeting the stringent power supply stability requirements of the U.2 server hard drive.

[0062] Meanwhile, in this embodiment, the filter capacitor and inductor can be soldered to the power board of the ADU (Automatic Driving Unit). This soldering method ensures a tight and reliable electrical connection between the components and the power board, effectively reducing contact resistance and minimizing energy loss and interference during signal transmission. Furthermore, this mounting method allows for a more compact circuit structure, suitable for the limited space inside a vehicle. The power board provides a stable mounting platform for the filter capacitor and inductor, ensuring they do not loosen due to vibration or bumps during vehicle operation, thus guaranteeing the stability and reliability of the circuit.

[0063] In this embodiment, the voltage regulator chip is fixed to the power board via a heat dissipation substrate. The voltage regulator chip generates heat during operation, especially during voltage adjustment, where power loss is converted into heat. If this heat cannot be dissipated promptly, the chip temperature will become too high, affecting its performance and stability, and potentially damaging the chip. Because the heat dissipation substrate has excellent thermal conductivity, it can quickly conduct the heat generated by the voltage regulator chip away. Its close contact with the voltage regulator chip and power board transfers heat from the chip to the power board, and then, through the power board and other heat dissipation structures of the ADU (Automatic Duty Unit), the heat is dissipated into the surrounding environment. This installation method effectively solves the heat dissipation problem of the voltage regulator chip, ensuring stable operation during long-term use and providing a continuous and stable voltage output to the U.2 server hard drive.

[0064] In an optional embodiment, the sleep control circuit may include a Hall sensor and a relay. The Hall sensor is mounted on the power board of the ADU (Automatic Driving Unit) and is used to detect the power input status. The control terminal of the relay is electrically connected to the output terminal of the Hall sensor.

[0065] The working principles of Hall sensors and relays, and their specific roles in this embodiment, will be explained below. The Hall sensor, as a signal detection element in the sleep control circuit, utilizes the Hall effect to sense changes in the magnetic field and converts them into an electrical signal output. In this embodiment, its main function is to monitor the power input status. The power status of a car is related to various operating conditions, such as starting, driving, and stopping, and these changes are reflected in the magnetic field changes generated by the current or voltage on the power line. The Hall sensor can accurately detect these magnetic field changes to obtain real-time power input status information, thus providing a basis for subsequent control actions. A relay is an automatic switching element with isolation function. It uses electromagnetic force to close and open contacts, thereby controlling the on / off state of the circuit. In this embodiment, the control terminal of the relay can receive the electrical signal output by the Hall sensor and determine whether to cut off or connect the power to the U.2 server hard drive based on the signal status, thereby realizing the hard drive's sleep and wake-up operations.

[0066] Specifically, the Hall sensor can be installed on the power board of the ADU (Autonomous Driving Unit). The power board is a key node for the vehicle's power supply to the ADU, and all power input to the ADU must be distributed and preliminarily processed by the power board. In this embodiment, the Hall sensor is installed here, enabling it to detect changes in power input immediately and directly, ensuring high accuracy and timeliness in monitoring the power status. For example, when the car starts, the voltage and current on the power board change instantaneously, and the Hall sensor can quickly sense these changes and output corresponding signals; when the car is turned off, the power supply on the power board gradually stops, and the Hall sensor can also capture this state change in a timely manner, avoiding inaccurate hard drive hibernation control due to detection delays.

[0067] In this embodiment, the output terminal of the Hall sensor can be directly electrically connected to the control terminal of the relay, thereby ensuring that the power status signal detected by the Hall sensor can be transmitted to the relay quickly and accurately, so that the relay can respond in a timely manner according to the received signal.

[0068] The following describes the system's workflow after adopting the sleep control circuit in this embodiment. When the car is in normal driving or running state, the power supply to the ADU (Autonomous Driving Unit) is continuously and stably input. At this time, the Hall sensor detects the stable power input state and outputs a specific electrical signal (such as a high-level signal) to the control terminal of the relay. After receiving the signal, the relay keeps its contacts closed, keeping the power path of the U.2 server hard drive connected, and the hard drive works normally, continuously collecting and storing data. When the car is turned off or enters a stationary state, the power input changes. The Hall sensor detects the change in power state (such as a decrease in voltage or current), and its output electrical signal also changes accordingly (such as becoming a low-level signal). This changed signal is transmitted to the control terminal of the relay. After receiving the signal, the relay controls its contacts to open, cutting off the power supply to the U.2 server hard drive, causing the hard drive to enter a low-power sleep mode. In sleep mode, the hard drive stops working, reducing unnecessary power consumption and avoiding the risk of data damage to the hard drive due to abnormal power outages. When the car starts again and the power input returns to normal, the Hall sensor detects the restoration of power and outputs a corresponding signal. The relay then activates again, connecting the hard drive to the power supply. The hard drive then resumes normal operation and continues data acquisition and storage.

[0069] In an optional embodiment, the system may further include a high-precision map acquisition module. This module is connected to the data input interface of the ADU (Autonomous Driving Unit) via a data cable and contains a storage chip. The storage chip is connected to the input terminal of the data acquisition module via a data bus. Specifically, the hardware of the high-precision map acquisition module can primarily consist of data acquisition, storage, and transmission units. The data acquisition unit may include a high-precision satellite positioning receiver and an inertial measurement unit (IMU). The former receives satellite signals for positioning, while the latter measures vehicle attitude; both work together to ensure positioning continuity and accuracy. The storage unit can use a high-capacity storage chip, such as NAND Flash, and may also employ redundant storage technology to ensure the integrity and reliability of the map data. The transmission unit can be connected to the ADU via shielded twisted-pair cable and employs data compression technology to improve transmission efficiency.

[0070] In optional embodiments, a runtime clock module may also be included, the hardware structure of which may include:

[0071] The automotive-grade clock generator employs a differential output design, transmitting the differential signal through two lines: one positive and the other negative. Its strong common-mode noise suppression capability effectively resists interference from the complex electromagnetic environment inside the vehicle. The automotive-grade clock generator can be surface-mounted (SMT) onto the circuit board of the ADU (Autonomous Driving Unit). SMT technology ensures a more robust connection between the clock generator and the circuit board, reducing contact problems caused by vibration and bumps, making it suitable for the complex physical environment of a vehicle in motion. Its output can be connected to the clock input pin of the FPGA chip in the data acquisition module via a dedicated clock line. This dedicated clock line has a differential routing structure and is configured to transmit a reference clock signal, which is the foundation of the entire system clock. It provides a stable clock source for the FPGA chip, ensuring that the logic circuits inside the FPGA chip operate according to the predetermined timing sequence, thereby guaranteeing the accuracy and stability of data acquisition and processing.

[0072] The clock buffer is integrated on the PCB board of the PCIe interface circuit. Its input terminal can be electrically connected to the output terminal of the automotive-grade clock generator through gold-plated contacts, and its output terminal is connected to the gold finger connector of the PCIe interface circuit. It is configured to output a differential clock signal that conforms to the PCIe 3.0 protocol.

[0073] The dedicated clock circuit is covered with a copper foil shielding layer to further reduce the impact of external electromagnetic interference on the clock signal. Various electronic devices exist inside the vehicle, which generate electromagnetic interference of different frequencies during operation. The copper foil shielding layer can block the intrusion of external electromagnetic interference into the clock circuit. The copper foil shielding layer can be connected to the ground plane of the circuit board through vias, forming a complete shielded grounding system. When external electromagnetic interference reaches the shielding layer, the interference signal is introduced to the ground through the ground plane, effectively protecting the integrity and stability of the clock signal. This ensures that the clock signal can be stably transmitted to the FPGA chip and PCIe interface circuit, guaranteeing the stable operation of the entire system.

[0074] The above description is merely a specific embodiment of the utility model, but the scope of protection of the utility model is not limited thereto. Any changes or substitutions conceived without inventive effort should be included within the scope of protection of the utility model. Therefore, the scope of protection of the utility model should be determined by the scope defined in the claims.

Claims

1. A system for collecting and storing autonomous driving road test data, applied to an autonomous driving data collection vehicle, characterized in that, include: The ADU (Autonomous Driving Unit) integrates a SOC (System-on-a-Chip) processing unit. The ADU is equipped with a data input interface, a PCIE bus interface, and a power interface. The sensor group includes ultrasonic radar, millimeter-wave radar, lidar, camera and high-precision positioning sensor. Each sensor is electrically connected to the data input interface of the ADU autonomous driving unit via a cable. The data acquisition module is fixedly installed on the circuit board of the ADU autonomous driving unit. The input end of the data acquisition module is connected to the output end of the SOC processing unit through an internal bus, and the output end of the data acquisition module is brought out through a high-speed PCIe bus interface. The U.2 server hard drive is connected to the PCIE bus interface of the data acquisition module via an automotive-grade PCIE high-speed cable, and is installed in the hard drive bay inside the ADU autonomous driving unit via an automotive-grade adapter board. The hard drive bay is equipped with a hot-swappable interface. The temperature management module includes: a temperature sensor, a resistive heating element, and a cooling fan; wherein, the temperature sensor is attached to the surface of the housing of the U.2 server hard drive; the resistive heating element is fixed to the inner wall of the hard drive bay; the cooling fan is installed inside the ADU (Autopilot Unit) and adjacent to the hard drive bay; the temperature sensor, the resistive heating element, and the cooling fan are electrically connected to the control circuit of the ADU via signal lines; The power management module includes a voltage regulator circuit and a sleep control circuit. The input of the voltage regulator circuit is connected to the vehicle power supply via an automotive-grade power cable, and the output of the voltage regulator circuit is connected to the power interface of the U.2 server hard drive via a copper busbar. The sleep control circuit is located on the circuit board of the ADU (Autonomous Driving Unit), and the output of the voltage regulator circuit is connected to the power interface of the U.2 server hard drive via a relay.

2. The autonomous driving road test data acquisition and storage system according to claim 1, characterized in that, The input terminal of the SOC processing unit is connected to the data input interface of the sensor group through an internal data bus. The output terminal of the SOC processing unit is divided into a first data channel and a second data channel. The first data channel is connected to the control circuit of the ADU autonomous driving unit, and the second data channel is connected through the input terminal of the data acquisition module.

3. The autonomous driving road test data acquisition and storage system according to claim 1, characterized in that, The ultrasonic radar sensor is located in the center of the roof of the data acquisition vehicle, the millimeter-wave radar sensor is located in the center of the front bumper of the data acquisition vehicle, the lidar sensor is located in the center of the top of the data acquisition vehicle, the high-precision positioning sensor is located above the center console below the windshield of the data acquisition vehicle, and the camera is located in the center of the front of the data acquisition vehicle.

4. The autonomous driving road test data acquisition and storage system according to claim 1, characterized in that, The data acquisition module includes: The FPGA chip is soldered onto the circuit board of the ADU autonomous driving unit using a BGA package. The high-speed cache unit consists of two DDR4 SDRAM chips, which are connected to the storage interface of the FPGA chip via gold wire bonding. The PCIe interface circuit is integrated into the edge area of ​​the circuit board and includes a PCIe 3.0 x4 gold finger connector. The power supply filtering circuit consists of multiple surface-mount ceramic capacitors and ferrite bead inductors, which are soldered around the power supply pins of the FPGA chip. The data input terminal of the FPGA chip is connected to the SOC processing unit through the internal bus of the ADU autonomous driving unit, and the data output terminal is connected to the automotive-grade PCIE high-speed cable through the PCIe interface circuit.

5. The autonomous driving road test data acquisition and storage system according to claim 1, characterized in that, The automotive-grade PCIe high-speed cable is a shielded twisted-pair cable with an outer layer covered with high-temperature resistant insulating material. Both ends are equipped with gold-plated connectors, which are plugged into and fixed to the PCIe bus interface of the data acquisition module and the interface of the U.2 server hard drive.

6. The autonomous driving road test data acquisition and storage system according to claim 1, characterized in that, The automotive-grade adapter board is a multi-layer PCB board with a copper heat dissipation layer on its surface. The adapter board is fixed to the hard drive bay of the ADU autonomous driving unit by screws and is connected to the interface of the U.2 server hard drive.

7. The autonomous driving road test data acquisition and storage system according to claim 1, characterized in that, The voltage regulator circuit includes multi-stage filter capacitors, inductors, and voltage regulation chips. The filter capacitors and inductors are soldered to the power board of the ADU (Autonomous Driving Unit), and the voltage regulation chip is fixed to the power board via a heat dissipation substrate.

8. The autonomous driving road test data acquisition and storage system according to claim 1, characterized in that, The sleep control circuit includes a Hall sensor and a relay. The Hall sensor is mounted on the power board of the ADU (Autonomous Driving Unit) and is used to detect the power input status. The control terminal of the relay is electrically connected to the output terminal of the Hall sensor.

9. The autonomous driving road test data acquisition and storage system according to claim 1, characterized in that, It also includes a high-precision map acquisition module, which is connected to the data input interface of the ADU autonomous driving unit via a data cable. The high-precision map acquisition module has a storage chip inside, which is connected to the input terminal of the data acquisition module via a data bus.

10. The autonomous driving road test data acquisition and storage system according to claim 4, characterized in that, It also includes a running clock module, the hardware structure of which includes: The automotive-grade clock generator adopts a differential output design and is soldered onto the circuit board of the ADU autonomous driving unit using SMT technology. Its output terminal is connected to the clock input pin of the FPGA chip of the data acquisition module through a dedicated clock line. The dedicated clock line has a differential trace structure and is configured to transmit a reference clock signal. The clock buffer is integrated on the PCB board of the PCIe interface circuit. Its input terminal is electrically connected to the output terminal of the automotive-grade clock generator through gold-plated contacts, and its output terminal is connected to the gold finger connector of the PCIe interface circuit. It is configured to output a differential clock signal that conforms to the PCIe 3.0 protocol. The dedicated clock circuit is covered with a copper foil shielding layer, which is connected to the ground plane of the circuit board through vias.

Images