A flow channel assembly of a microfluidic chip

CN224686911UActive Publication Date: 2026-08-28LIANGZHUN (HANGZHOU) SCI INSTR CO LTD
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Patent Information

Application Number
CN202521933835.2
Authority / Receiving Office
CN · China
Patent Type
Utility models(China)
Current Assignee / Owner
Filing Date
2025-09-09
Publication Date
2026-08-28
Estimated Expiration
2035-09-09

AI Technical Summary

Technical Problem

在现有技术中,现有的微流控芯片的流道组件包括底座和对接座,底座设有过孔和螺纹对接口,该螺纹对接口连通所述过孔,并用于对接外部的管道,对接座设有对接通道,对接通道经过孔连通螺纹对接口,但是,仅仅单一的支路,只能对一种样本进行测试,导致现有的微流控芯片的流道组件的测试效率较差

Benefits of technology

本实用新型提供一种微流控芯片的流道组件,底座设有过孔和螺纹对接口,该螺纹对接口连通过孔,并用于对接外部的管道;第一芯片层设置于底座的一侧,并贴合于底座;第一芯片层设有多个第一流道,多个第一流道间隔布置,并沿着不同方向延伸;第二芯片层设置于第一芯片层的一侧,并贴合于第一芯片层;第二芯片层和第一芯片层呈堆叠布置,第二芯片层设有多个第二流道,多个第二流道间隔布置,并沿着不同方向延伸;多个第二流道与多个第一流道处于不同的高度位置,并间隔布置;对接座设置于第二芯片层的一侧,并贴合于第二芯片层;对接座设有第一对接通道和第二对接通道,第一对接通道和第二对接通道呈相邻布置,并相互间隔;第一对接通道对接对应的第一流道,并与对应的第一流道呈连通状态,第一流道经对应的过孔连通对应的螺纹对接口;第二对接通道对接对应的第二流道,并与对应的第二流道呈连通状态,第二流道经对应的过孔连通对应的螺纹对接口,以便于不同的样本经过不同的支路,以实现多路的不同样本同时进行测试,避免了仅仅单一的支路而只能对一种样本进行测试,提高了微流控芯片的流道组件的测试效率。

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Abstract

The application provides a flow channel assembly of a microfluidic chip, which comprises a base, a first chip layer, a second chip layer and a docking seat, the base is provided with through holes and threaded docking interfaces, the first chip layer is provided with a plurality of first flow channels, the second chip layer is provided with a plurality of second flow channels, the docking seat is provided with a first docking channel and a second docking channel, the first docking channel and the second docking channel are arranged adjacently and are spaced from each other, the first docking channel is docked with a corresponding first flow channel and is in a communication state with the corresponding first flow channel, the first flow channel is communicated with a corresponding threaded docking interface through a corresponding through hole, the second docking channel is docked with a corresponding second flow channel and is in a communication state with the corresponding second flow channel, and the second flow channel is communicated with a corresponding threaded docking interface through a corresponding through hole, so that different samples pass through different branches, different samples are tested at the same time, and the test efficiency of the flow channel assembly of the microfluidic chip is improved.
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Description

Technical Field

[0001] This utility model relates to the technical field of flow channel components for microfluidic chips, and more particularly to a flow channel component for microfluidic chips. Background Technology

[0002] With the development of technology, microfluidic chips have enormous application potential in point-of-care diagnostics, especially in nucleic acid and protein analysis. Microfluidic chips enable rapid, accurate, and high-throughput analysis of samples, suitable for various detection methods. In existing technologies, the flow channel assembly of current microfluidic chips includes a base and a docking seat. The base has a through-hole and a threaded interface, which connects to the through-hole and is used to connect to an external pipe. The docking seat has a docking channel that connects to the threaded interface through the through-hole. However, this single-channel design limits the testing efficiency to only one type of sample, resulting in poor testing efficiency for existing microfluidic chip flow channel assemblies. Summary of the Invention

[0003] The purpose of this invention is to provide a flow channel assembly for a microfluidic chip. The base has a through-hole and a threaded interface, the threaded interface being connected to the through-hole and used for docking with an external pipe. A first chip layer is disposed on one side of the base and adheres to it. The first chip layer has multiple first flow channels, which are spaced apart and extend in different directions. A second chip layer is disposed on one side of the first chip layer and adheres to it. The second chip layer and the first chip layer are stacked. The second chip layer has multiple second flow channels, which are spaced apart and extend in different directions. The multiple second flow channels and the multiple first flow channels are at different heights and are spaced apart. A docking seat is disposed on the second chip layer. On one side, it is attached to the second chip layer; the docking seat is provided with a first docking channel and a second docking channel, which are arranged adjacently and spaced apart from each other; the first docking channel docks with the corresponding first flow channel and is in a connected state with the corresponding first flow channel, and the first flow channel is connected to the corresponding threaded interface through the corresponding via; the second docking channel docks with the corresponding second flow channel and is in a connected state with the corresponding second flow channel, and the second flow channel is connected to the corresponding threaded interface through the corresponding via, so that different samples can pass through different branches, so as to realize the simultaneous testing of multiple different samples, avoiding the limitation of only one type of sample being tested by a single branch, and improving the testing efficiency of the flow channel component of the microfluidic chip.

[0004] To achieve the above objectives, this utility model provides the following technical solution: a flow channel assembly for a microfluidic chip, comprising: The base has a through hole and a threaded interface, which connects to the through hole and is used to connect to an external pipe. A first chip layer is disposed on one side of the base and is attached to the base; the first chip layer is provided with a plurality of first flow channels, which are arranged at intervals and extend in different directions; The second chip layer is disposed on one side of the first chip layer and is attached to the first chip layer; the second chip layer and the first chip layer are stacked, and the second chip layer is provided with a plurality of second channels, which are arranged at intervals and extend in different directions; the plurality of second channels and the plurality of first channels are at different height positions and are arranged at intervals. A docking seat is disposed on one side of the second chip layer and is attached to the second chip layer; the docking seat has a first docking channel and a second docking channel, the first docking channel and the second docking channel are arranged adjacently and spaced apart from each other; the first docking channel docks with the corresponding first flow channel and is in communication with the corresponding first flow channel, the first flow channel is connected to the corresponding threaded interface through the corresponding through hole; the second docking channel docks with the corresponding second flow channel and is in communication with the corresponding second flow channel, the second flow channel is connected to the corresponding threaded interface through the corresponding through hole.

[0005] Optionally, the threaded interface has multiple threads, and the multiple threaded interfaces are divided into two groups of threaded interfaces, with the two groups of threaded interfaces having a symmetrical structure. Multiple first flow channels are located at the same height and have a symmetrical structure to connect the mating threaded interfaces; Multiple second flow channels are located at the same height and are arranged in a symmetrical structure to connect the mating threaded interfaces.

[0006] Optionally, the docking seat is provided with a docking interface, which is connected to the first docking channel and the second docking channel. The first docking channel and the second docking channel extend from the docking interface in different directions, so that the liquid sample injected through the docking interface diffuses in different directions along the first docking channel and the second docking channel.

[0007] Optionally, the first docking channel extends directly along the thickness direction of the docking seat; The second chip layer is provided with a first through hole, which extends directly along the thickness direction of the second chip layer; the first through hole is located between the first docking channel and the first flow channel, and connects the first docking channel and the first flow channel; the first through hole and the second flow channel are arranged at intervals.

[0008] Optionally, the first flow channel includes a first sub-flow channel, a second sub-flow channel, and a first branch flow channel, wherein the first sub-flow channel, the second sub-flow channel, and the first branch flow channel are connected in sequence. The first sub-channel is connected to the first through hole in the vertical direction; The second sub-channel is disposed on one side of the first sub-channel and is arranged perpendicular to the first sub-channel.

[0009] Optionally, the first branch channel extends in a different direction from the end of the second sub-channel away from the first sub-channel and connects two adjacent vias.

[0010] Optionally, the second docking channel forms at least two sub-docking channels, and each of the sub-docking channels is arranged side by side; Each of the sub-dating channels is connected to the corresponding second flow channel. The second flow channel includes a third sub-flow channel and a fourth sub-flow channel. The third sub-flow channel, the fourth sub-flow channel and the corresponding second docking channel are connected in a connected structure. The fourth sub-channel is disposed on one side of the third sub-channel and is arranged perpendicular to the third sub-channel.

[0011] Optionally, the second flow channel further includes a second branch flow channel, which extends in a different direction from the end of the fourth sub-flow channel that is away from the third sub-flow channel.

[0012] Optionally, the first chip layer is provided with a second via, which extends radially along the thickness direction of the first chip layer; The second through hole connects to the fourth sub-channel and to the corresponding threaded interface; Alternatively, the second through hole connects to the second branch flow channel and to the corresponding threaded interface.

[0013] Optionally, the base, the first chip layer, the second chip layer, and the docking seat are stacked along the height direction.

[0014] Compared with the prior art, the beneficial effects of this utility model are: This invention provides a flow channel assembly for a microfluidic chip. The base has a through-hole and a threaded interface, the threaded interface being connected to the through-hole and used for docking with an external pipe. A first chip layer is disposed on one side of the base and adheres to it. The first chip layer has multiple first flow channels, which are spaced apart and extend in different directions. A second chip layer is disposed on one side of the first chip layer and adheres to it. The second chip layer and the first chip layer are stacked. The second chip layer has multiple second flow channels, which are spaced apart and extend in different directions. The multiple second flow channels and the multiple first flow channels are at different heights and are spaced apart. A docking seat is disposed on one side of the second chip layer. The device is attached to the second chip layer. The docking seat has a first docking channel and a second docking channel, which are arranged adjacently and spaced apart from each other. The first docking channel docks with the corresponding first flow channel and is in a connected state with the corresponding first flow channel. The first flow channel is connected to the corresponding threaded interface through the corresponding via. The second docking channel docks with the corresponding second flow channel and is in a connected state with the corresponding second flow channel. The second flow channel is connected to the corresponding threaded interface through the corresponding via, so that different samples can pass through different branches to realize the simultaneous testing of multiple different samples. This avoids the problem that only a single branch can be used to test only one type of sample, thus improving the testing efficiency of the flow channel components of the microfluidic chip. Attached Figure Description

[0015] To more clearly illustrate the technical solutions in the embodiments of this application, the accompanying drawings used in the description of the embodiments will be briefly introduced below. Obviously, the drawings described below are only some embodiments of this application, and those skilled in the art can obtain other drawings based on these drawings without creative effort.

[0016] To gain a more complete understanding of this application and its beneficial effects, the following description will be provided in conjunction with the accompanying drawings. In the following description, the same reference numerals denote the same parts.

[0017] Figure 1 A schematic diagram of a microfluidic chip according to an embodiment of this application is shown.

[0018] Figure 2 It shows Figure 1 A magnified view of a portion of point A in the middle.

[0019] Figure 3 A schematic diagram of the base of the microfluidic chip according to an embodiment of this application is shown.

[0020] Figure 4 A schematic diagram of the structure of a microfluidic chip according to an embodiment of this application is shown. Figure 5A schematic diagram of the first chip layer of a microfluidic chip according to an embodiment of this application is shown.

[0021] Figure 6 A schematic diagram of the second chip layer of the microfluidic chip according to an embodiment of this application is shown.

[0022] Attached Figure

[0023] 100. Flow channel components of microfluidic chips; 10. Base; 10a. Through hole; 10b. Threaded interface; 20. First chip layer; 20a. Second via; 21. First flow channel; 211. First sub-flow channel; 212. Second sub-flow channel; 213. First branch flow channel; 30. Second chip layer; 30a. First via; 31. Second flow channel; 311. Third sub-flow channel; 312. Fourth sub-flow channel; 313. Second branch flow channel; 40. Dating seat; 40a. Dating interface; 41. First docking channel; 42. Second docking channel. Detailed Implementation

[0024] The technical solutions of the embodiments of this application will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only a part of the embodiments of this application, and not all of them. All other embodiments obtained by those skilled in the art based on the embodiments of this application without creative effort are within the scope of protection of this application.

[0025] Please refer to the attached document. Figures 1-6 This application provides a flow channel assembly 100 for a microfluidic chip, which is used to allow multiple samples to flow so that different samples can be tested simultaneously.

[0026] Please refer to the attached document. Figures 1-6In this embodiment, the flow channel assembly 100 of the microfluidic chip includes a base 10, a first chip layer 20, a second chip layer 30, and a docking seat 40. The base 10 is provided with a through hole 10a and a threaded interface 10b, which is connected to the through hole 10a and used to dock with an external pipe. The first chip layer 20 is disposed on one side of the base 10 and is attached to the base 10. The first chip layer 20 is provided with a plurality of first flow channels 21, which are spaced apart and extend in different directions. The second chip layer 30 is disposed on one side of the first chip layer 20 and is attached to the first chip layer 20. The second chip layer 30 and the first chip layer 20 are stacked. The second chip layer 30 is provided with a plurality of second flow channels 31, which are spaced apart and extend in different directions. The plurality of second flow channels 31 and the plurality of first flow channels 21 are at different height positions and are spaced apart. The docking seat 40 is disposed on one side of the second chip layer 30 and is attached to the second chip layer 30. The docking seat 40 is provided with a first docking channel 41 and a second docking channel 42. The first docking channel 41 and the second docking channel 42 are arranged adjacent to each other and spaced apart from each other. The first docking channel 41 docks with the corresponding first flow channel 21 and is in a connected state with the corresponding first flow channel 21. The first flow channel 21 is connected to the corresponding threaded interface 10b through the corresponding through hole 10a. The second docking channel 42 docks with the corresponding second flow channel 31 and is in a connected state with the corresponding second flow channel 31. The second flow channel 31 is connected to the corresponding threaded interface 10b through the corresponding through hole 10a. This allows different samples to pass through different branches, so that multiple different samples can be tested at the same time. This avoids the situation where only a single branch can be used to test only one type of sample, and improves the testing efficiency of the flow channel assembly 100 of the microfluidic chip.

[0027] Please refer to the attached document. Figures 1-6 In this embodiment of the application, the base 10 is provided with a through hole 10a and a threaded interface 10b. The threaded interface 10b is connected to the through hole 10a and is used to connect to an external pipe. This allows the base 10 to be threadedly connected to the external pipe through the threaded interface 10b, ensuring the stability of the connection between the base 10 and the external pipe.

[0028] The first chip layer 20 is disposed on the upper side of the base 10 and is attached to the base 10 so that the first chip layer 20 is fixed on the upper side of the base 10, ensuring the sealing effect between the first chip layer 20 and the base 10; the first chip layer 20 is provided with a plurality of first flow channels 21, which are arranged at intervals and extend along different directions.

[0029] The second chip layer 30 is disposed on the upper side of the first chip layer 20 and is attached to the first chip layer 20. The second chip layer 30 and the first chip layer 20 are stacked to fix the second chip layer 30 on the upper side of the first chip layer 20, ensuring the sealing effect between the second chip layer 30 and the first chip layer 20. The second chip layer 30 is provided with multiple second flow channels 31, which are arranged at intervals and extend in different directions. The multiple second flow channels 31 and the multiple first flow channels 21 are at different height positions and are arranged at intervals to allow the multiple second flow channels 31 and the multiple first flow channels 21 to be arranged independently.

[0030] The docking seat 40 is disposed on the upper side of the second chip layer 30 and fits against the second chip layer 30, so that the docking seat 40 is fixed on the upper side of the second chip layer 30, ensuring the sealing effect between the docking seat 40 and the second chip layer 30. The docking seat 40 is provided with a first docking channel 41 and a second docking channel 42, which are arranged adjacent to each other and spaced apart from each other; the first docking channel 41 docks with the corresponding first flow channel 21 and is in a connected state with the corresponding first flow channel 21, and the first flow channel 21 is connected to the corresponding threaded interface 10b through the corresponding through hole 10a, so that the first docking channel 41, the first flow channel 21, the corresponding through hole 10a and the corresponding threaded interface 10b are sequentially connected to form a first branch. The second docking channel 42 docks with the corresponding second flow channel 31 and is in a connected state with the corresponding second flow channel 31. The second flow channel 31 is connected to the corresponding threaded interface 10b through the corresponding through hole 10a, so that the second docking channel 42, the second flow channel 31, the corresponding through hole 10a and the corresponding threaded interface 10b are connected in sequence to form a second branch. This allows different samples to pass through different branches, so that multiple different samples can be tested at the same time. This avoids the problem of only being able to test one type of sample through a single branch, and improves the testing efficiency of the flow channel component 100 of the microfluidic chip.

[0031] In this embodiment, there are multiple threaded interfaces 10b, which are divided into two groups of threaded interfaces 10b, and the two groups of threaded interfaces 10b are in a symmetrical structure; so that the two groups of threaded interfaces 10b can be arranged separately, thereby making it easier to distinguish different external pipes.

[0032] Multiple first flow channels 21 are located at the same height and have a symmetrical structure to connect to the threaded interface 10b; multiple second flow channels 31 are located at the same height and have a symmetrical structure to connect to the threaded interface 10b, so that samples flowing through multiple first flow channels 21 and multiple second flow channels 31 can flow to different external pipes through different threaded interfaces 10b, thereby facilitating the simultaneous testing of different samples and avoiding the limitation of testing only one type of sample through a single branch, thus improving the testing efficiency of the flow channel assembly 100 of the microfluidic chip.

[0033] In this embodiment, the docking seat 40 is provided with a docking interface 40a, which is connected to the first docking channel 41 and the second docking channel 42. The first docking channel 41 and the second docking channel 42 extend from the docking interface 40a in different directions, so that the liquid sample injected through the docking interface 40a diffuses in different directions along the first docking channel 41 and the second docking channel 42, so that the liquid sample flows towards the docking interface 40a to the first docking channel 41 and the second docking channel 42 respectively, avoiding the liquid sample being injected into the first docking channel 41 and the second docking channel 42 respectively, thus improving the convenience of liquid sample injection.

[0034] In this embodiment, the first docking channel 41 extends directly along the thickness direction of the docking seat 40 to facilitate the flow of liquid sample from top to bottom along the first docking channel 41. The second chip layer 30 is provided with a first through hole 30a, which extends directly along the thickness direction of the second chip layer 30. The first through hole 30a is located between the first docking channel 41 and the first flow channel 21 and connects the first docking channel 41 and the first flow channel 21, so that the first docking channel 41 can be connected to the first flow channel 21 through the first through hole 30a. This allows the liquid sample to pass sequentially through the first docking channel 41, the first through hole 30a, the first flow channel 21, the corresponding through hole 10a, and the corresponding threaded interface 10b to form a first branch, so that the first type of liquid sample can be transported in the first branch. When transporting the first type of liquid sample, air bubbles can be separated to reduce the large amount of diffusion during transportation. The first through hole 30a and the second flow channel 31 are arranged at intervals so that the first through hole 30a and the second flow channel 31 can be arranged separately, avoiding the liquid sample from the first through hole 30a from flowing to the second flow channel 31 and avoiding the mixing of multiple liquid samples.

[0035] In this embodiment of the application, the first flow channel 21 includes a first sub-flow channel 211, a second sub-flow channel 212, and a first branch flow channel 213. The first sub-flow channel 211, the second sub-flow channel 212, and the first branch flow channel 213 are connected in sequence. The first sub-flow channel 211 is connected to the first through hole 30a in the vertical direction. The second sub-flow channel 212 is disposed on one side of the first sub-flow channel 211 and is arranged perpendicular to the first sub-flow channel 211, so that the first liquid sample passing through the first through hole 30a can flow sequentially to the first sub-flow channel 211, the second sub-flow channel 212, and the first branch flow channel 213.

[0036] In this embodiment, the first branch channel 213 extends from the end of the second sub-channel 212 away from the first sub-channel 211 in different directions and connects to two adjacent through holes 10a, so that the first liquid sample can flow to two external pipes through the two through holes 10a respectively through the first branch channel 213, thereby improving the testing efficiency of the first liquid sample.

[0037] In this embodiment, the second docking channel 42 has at least two sub-docking channels arranged side by side. Each sub-docking channel is connected to the corresponding second flow channel 31, so that the liquid sample can flow through each sub-docking channel to the corresponding second flow channel 31. The second flow channel 31 includes a third sub-flow channel 311 and a fourth sub-flow channel 312. The third sub-flow channel 311, the fourth sub-flow channel 312 and the corresponding second docking channel are connected. The fourth sub-flow channel 312 is disposed on one side of the third sub-flow channel 311 and is arranged perpendicular to the third sub-flow channel 311, so that the second liquid sample through each sub-docking channel can flow sequentially to the third sub-flow channel 311 and the fourth sub-flow channel 312.

[0038] In this embodiment of the application, the second flow channel 31 further includes a second branch flow channel 313. The second branch flow channel 313 extends from the end of the fourth sub-flow channel 312 away from the third sub-flow channel 311 in different directions. The fourth sub-flow channel 312 is connected to the second branch flow channel 313 so as to realize the branch flow of the second liquid sample through the second branch flow channel 313, thereby improving the testing efficiency of the second liquid sample.

[0039] In this embodiment of the application, the first chip layer 20 is provided with a second through hole 20a, which extends directly along the thickness direction of the first chip layer 20; the second through hole 20a connects to the fourth sub-channel 312 and connects to the corresponding threaded interface 10b; so that the second liquid sample of the fourth sub-channel 312 can flow through the second through hole 20a to the corresponding threaded interface 10b.

[0040] Alternatively, the second through hole 20a connects to the second branch flow channel 313 and the corresponding threaded interface 10b, so that the second liquid sample of the second branch flow channel 313 can flow through the second through hole 20a to the corresponding threaded interface 10b.

[0041] In this embodiment, the base 10, the first chip layer 20, the second chip layer 30 and the docking seat 40 are stacked along the height direction so that the liquid sample can flow from top to bottom under its own gravity, ensuring the smooth flow of the liquid sample.

[0042] Compared with the prior art, the beneficial effects of this utility model are: This invention provides a flow channel assembly 100 for a microfluidic chip. A base 10 has a through-hole 10a and a threaded interface 10b, the threaded interface 10b being connected to the through-hole 10a and used for docking with an external pipe. A first chip layer 20 is disposed on one side of the base 10 and attached to it. The first chip layer 20 has multiple first flow channels 21, which are spaced apart and extend in different directions. A second chip layer 30 is disposed on one side of the first chip layer 20 and attached to it. The second chip layer 30 and the first chip layer 20 are stacked. The second chip layer 30 has multiple second flow channels 31, which are spaced apart and extend in different directions. The multiple second flow channels 31 and the multiple first flow channels 21 are at different heights and are spaced apart. A docking seat 40 is disposed on the second chip layer. The first docking channel 41 is attached to the second chip layer 30 on one side and is bonded to the second chip layer 30. The docking seat 40 is provided with a first docking channel 41 and a second docking channel 42. The first docking channel 41 and the second docking channel 42 are arranged adjacent to each other and spaced apart from each other. The first docking channel 41 docks with the corresponding first flow channel 21 and is in a connected state with the corresponding first flow channel 21. The first flow channel 21 is connected to the corresponding threaded interface 10b through the corresponding through hole 10a. The second docking channel 42 docks with the corresponding second flow channel 31 and is in a connected state with the corresponding second flow channel 31. The second flow channel 31 is connected to the corresponding threaded interface 10b through the corresponding through hole 10a. This allows different samples to pass through different branches, so that multiple different samples can be tested at the same time. This avoids the problem that only a single branch can be used to test only one type of sample, and improves the testing efficiency of the flow channel assembly 100 of the microfluidic chip.

[0043] In the above embodiments, the descriptions of each embodiment have different focuses. For parts not described in detail in a certain embodiment, please refer to the relevant descriptions in other embodiments.

[0044] In the description of this application, the terms "first" and "second" are used for descriptive purposes only and should not be construed as indicating or implying relative importance or implicitly specifying the number of technical features indicated. Thus, features defined with "first" and "second" may explicitly or implicitly include one or more features.

[0045] This document uses specific examples to illustrate the principles and implementation methods of this application. The descriptions of the above embodiments are only for the purpose of helping to understand the methods and core ideas of this application. At the same time, for those skilled in the art, there will be changes in the specific implementation methods and application scope based on the ideas of this application. Therefore, the content of this specification should not be construed as a limitation of this application.