Overlay mark
By designing overlay marks during semiconductor fabrication, including a first alignment mark, a second alignment mark, and a third alignment mark, the problem of measurement failure due to deformation and overlap of overlay marks is solved. This enables effective measurement of overlay offset at different exposure ratios, simplifies the measurement process, and reduces costs.
Patent Information
- Application Number
- CN202522754930.2
- Authority / Receiving Office
- CN · China
- Patent Type
- Utility models(China)
- Current Assignee / Owner
- Filing Date
- 2025-12-25
- Publication Date
- 2026-11-03
- Estimated Expiration
- 2035-12-25
AI Technical Summary
In the semiconductor fabrication process, when using photolithography processes with different exposure ratios, the overlay marks are prone to deformation, leading to measurement failure. Furthermore, when overlay marks of different layers overlap, the overlay offset cannot be effectively measured, increasing the measurement time and cost.
Design an overlay mark, including a first alignment mark set on the reference layer and a second alignment mark set on the current layer. The second alignment mark is a hollow rectangle with a line width greater than that of the first alignment mark, and a third alignment mark is set around it. The third alignment mark is symmetrical about the hollow rectangle. The offset is measured by replacing the second alignment mark with the third alignment mark in the case of overlap, thus avoiding mark deformation.
It enables effective measurement of overlay offset at different exposure ratios, avoids mark deformation, simplifies the measurement process, and reduces time costs.
Smart Images
Figure CN224934302U_ABST
Abstract
Description
Technical Field
[0001] This application relates to the field of semiconductor fabrication technology, specifically providing an overlay mark. Background Technology
[0002] Photolithography is a common process in semiconductor fabrication, and overlay marks are used to measure the overlay offset between different layers in the photolithography process. Common overlay marks include bar-in-bar and box-in-box overlay marks. In the bar-in-bar and box-in-box overlay marks, two bars or two boxes come from two different process layers, and under orthographic projection, the overlay mark of the first layer is inside, while the overlay mark of the reference layer (i.e., the previous layer) is outside. However, when the reference layer uses a 4X / 5X step exposure method, and the first layer uses a 1X proximity exposure method, the mixed exposure of different wavelengths causes severe deformation of the overlay mark inside, making automated testing difficult. Furthermore, when the overlay marks of different process layers overlap, the overlay measurement equipment will not be able to obtain a valid alignment signal, easily leading to measurement failure.
[0003] In addition, in layout design, the marks for measuring overlay offset are often placed together, while the marks for measuring critical dimension CD are placed together. Since the two are not in the same position, it is necessary to locate the measurement position twice, which increases the time cost of measurement. Utility Model Content
[0004] This application aims to solve the above-mentioned technical problems and provide an overlay mark to avoid deformation of the mark in the current layer and to effectively measure the overlay offset when there is overlap between overlay marks in different layers.
[0005] To achieve the above objectives, the overprinting marks provided in this application include:
[0006] The first alignment mark is set on the reference layer of the wafer;
[0007] A second alignment mark is disposed on the current layer above the reference layer of the wafer. The second alignment mark includes a hollow rectangular frame. The line width of the hollow rectangular frame is greater than the line width of the first alignment mark. When the center of the hollow rectangular frame coincides with the center of the first alignment mark, the orthographic projection of the hollow rectangular frame is located outside the orthographic projection of the first alignment mark and is spaced apart. Each side of the hollow rectangular frame is spaced a first distance from the first alignment mark.
[0008] The third alignment mark is set on the current layer, located on the outer perimeter of the hollow rectangle, and is symmetrical about the central axes of the hollow rectangle in two mutually perpendicular directions.
[0009] In some embodiments, the third alignment mark includes four sets of first auxiliary patterns, which correspond one-to-one with the four sides of the hollow rectangular frame and are spaced apart, and the four sets of first auxiliary patterns are spaced apart from the corresponding sides of the hollow rectangular frame by a second distance.
[0010] In some embodiments, the lengths of the four sets of first auxiliary patterns are all greater than the lengths of the corresponding sides of the hollow rectangular frame.
[0011] In some embodiments, the orthographic projection of the hollow rectangular frame is a centrally symmetrical figure, and the four sets of first auxiliary patterns all adopt the same size setting, wherein the length of the first auxiliary pattern is equal to the sum of the length of the corresponding side of the hollow rectangular frame and the second distance.
[0012] In some embodiments, the first auxiliary pattern is a set of bar gratings, the set of bar gratings comprising N bars, where N is an odd number greater than or equal to 3.
[0013] In some embodiments, the wafer includes a plurality of chip regions, wherein adjacent bars in a set of bar gratings are spaced a third distance apart, the linewidth of the bars and the third distance are configured to be equal to the critical dimension of a main pattern of the chip region, the main pattern being a pattern on which functional circuitry is to be fabricated.
[0014] In some embodiments, the overlay mark further includes a fourth alignment mark disposed on the reference layer, located around the first alignment mark. When the center of the hollow rectangle coincides with the center of the first alignment mark, the first alignment mark and the fourth alignment mark are symmetrical about the central axes of the hollow rectangle in two mutually perpendicular directions. The orthographic projection of the fourth alignment mark is located outside the orthographic projection of the hollow rectangle and does not overlap with the orthographic projection of the third alignment mark, the hollow rectangle, or the first alignment mark.
[0015] The fourth alignment mark includes four sets of second auxiliary patterns, which correspond one-to-one with the four apex corners of the hollow rectangular frame.
[0016] In some embodiments, the first alignment mark is a hollow rectangle or a non-closed rectangle surrounded by four bars; the second auxiliary pattern is a cross shape.
[0017] In some embodiments, the third alignment mark includes four sets of first auxiliary patterns. When the four sets of first auxiliary patterns correspond one-to-one with the four sides of the hollow rectangular frame and are spaced apart, the minimum interval between the second auxiliary pattern and each of the two adjacent sets of first auxiliary patterns is a fourth distance, which is less than the first distance.
[0018] In some embodiments, the first distance is configured to be equal to the overlay accuracy.
[0019] The overlay marking provided in this application includes a first alignment mark on the reference layer of the wafer, and a second and a third alignment mark on the current layer of the reference layer. The second alignment mark is a hollow rectangular frame disposed around the first alignment mark. By setting the second alignment mark of the current layer to be located around the first alignment mark of the reference layer, and setting the line width of the hollow rectangular frame of the second alignment mark to be greater than the line width of the first alignment mark, the line width and length of the current layer mark are increased. During the testing process, it is beneficial to identify the second alignment mark and avoid mark deformation caused by mixed exposure of different exposure wavelengths. It can realize the effective measurement of overlay offset at different magnifications. The third alignment mark is located around the hollow rectangular frame of the second alignment mark and is symmetrical about the central axis of the hollow rectangular frame in two mutually perpendicular directions. When the second alignment mark and the first alignment mark overlap, the third alignment mark can replace the second alignment mark, so that the offset can also be effectively measured even in the case of overlap, so as to provide overlay offset compensation value for the machine to process subsequent wafers. Attached Figure Description
[0020] The preferred embodiments of this application are described below with reference to the accompanying drawings, in which:
[0021] Figure 1 This is a schematic diagram of the overlay markings provided in Embodiment 1 of this application;
[0022] Figure 2 This is a schematic diagram of the overlay markings provided in Embodiment 2 of this application;
[0023] Figure 3 This is a schematic diagram of the front layer marking provided in the embodiments of this application;
[0024] Figure 4 This is a schematic diagram of the current layer marking provided in the embodiments of this application;
[0025] Figure 5 This is a schematic diagram of the overlay mark when the offset is small, provided in an embodiment of this application;
[0026] Figure 6 yes Figure 5 A partial structural diagram;
[0027] Figure 7 This is a schematic diagram of the overlay marks when the first alignment mark and the second comparison mark overlap, as provided in the embodiments of this application;
[0028] Figure 8 yes Figure 7 A partial structural diagram. Detailed Implementation
[0029] To make the objectives, technical solutions, and advantages of the embodiments of this application clearer, the technical solutions of the embodiments of this application will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some, not all, of the embodiments of this application. Based on the described embodiments of this application, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of this application.
[0030] The terms “first,” “second,” “third,” and similar terms used in this application do not indicate any order, quantity, or importance, but are merely used to distinguish different components.
[0031] See Figure 1 As shown, Figure 1 This is a schematic diagram of an overlay mark provided in Embodiment 1 of this application, which includes:
[0032] The system includes a first alignment mark 11 disposed on the reference layer of the wafer; a second alignment mark 12 disposed on the current layer above the reference layer of the wafer, wherein the second alignment mark 12 includes a hollow rectangular frame, the line width of which is greater than the line width of the first alignment mark 11, and when the center of the hollow rectangular frame coincides with the center of the first alignment mark 11, the orthographic projection of the hollow rectangular frame is located outside the orthographic projection of the first alignment mark 11 and is spaced apart, wherein each side of the hollow rectangular frame is spaced from the first alignment mark 11 by a first distance D1; and a third alignment mark 13 disposed on the current layer, located outside the hollow rectangular frame, and symmetrical about the central axes of the hollow rectangular frame in two mutually perpendicular directions.
[0033] The first alignment mark 11 can adopt a conventional pattern in the art, such as a hollow rectangle or a non-closed rectangle enclosed by four strips. Figure 1 The example illustrates setting the first alignment mark 11 as a non-closed rectangle enclosed by four bars. The length of each bar can be represented as L1, and the line width of each bar can be represented as W1.
[0034] In the embodiments of this application, such as Figure 1 As shown, the second alignment mark 12 adopts a hollow rectangular frame. When the center of the hollow rectangular frame coincides with the center of the first alignment mark 11, the hollow rectangular frame is symmetrical about its own center line in both the horizontal and vertical directions.
[0035] like Figure 1 As shown, in an embodiment where the first alignment mark 11 is a rectangle or a non-closed rectangle formed by four strips, each side of the hollow rectangular frame of the second alignment mark 12 can be set to correspond one-to-one with each side of the first alignment mark 11, and the side of the hollow rectangular frame of the second alignment mark 12 can be greater than the length of the corresponding side in the first alignment mark 11.
[0036] Each side of the hollow rectangular frame of the second alignment mark 12 is spaced from the corresponding side of the first alignment mark 11 by a first distance D1, such as... Figure 1 As shown, when the first alignment mark 11 adopts a centrally symmetric figure such as a square or a non-closed square surrounded by four sets of strips, the hollow rectangular frame of the corresponding second alignment mark 12 can be a hollow square frame, the side length of which can be represented as L2, and the line width of which can be represented as W2. The dimensions of the hollow square frame and the first alignment mark 11 satisfy: L2 > L1, W2 > W1.
[0037] In some embodiments, the first distance D1 can be configured to be equal to the overlay accuracy. When the first alignment mark 11 overlaps or touches the corresponding edge of the hollow rectangular frame, the offset is greater than or equal to the first distance D1. Therefore, by configuring the first distance D1 to be equal to the overlay accuracy, it is possible to intuitively and conveniently determine whether the offset exceeds the process specifications by judging whether the first alignment mark 11 overlaps or touches the corresponding edge of the hollow rectangular frame. If the offset does not meet the standard, rework is required. Here, the overlay accuracy is the maximum allowable deviation of the process, which can be flexibly set according to the actual application scenario.
[0038] The third alignment mark 13 can serve as an auxiliary mark for the current layer, assisting the second alignment mark 12 in measuring the overlay offset. In other words, the third alignment mark 13 and the first alignment mark 11 can be used together to measure the overlay offset, thus expanding the applicable scenarios for offset measurement using the overlay mark, as follows: Figure 7 As shown, this method is applicable to scenarios where the orthographic projections of the first alignment mark 11 and the second alignment mark 12 overlap, making it impossible to measure the offset using the first alignment mark 11 and the second alignment mark 12.
[0039] like Figure 1 As shown, the third alignment mark 13 includes four sets of first auxiliary patterns 131. These four sets of first auxiliary patterns 131 correspond one-to-one with the four sides of the hollow rectangular frame of the second alignment mark 12 and are spaced apart. The corresponding sides of the four sets of first auxiliary patterns 131 and the hollow rectangular frame of the second alignment mark 12 are all spaced apart by a second distance D2. Each first auxiliary pattern 131 is a set of bar gratings, comprising N bars, where N is an odd number greater than or equal to 3. The N bars in a set of bar gratings can have the same length and line width. The length of the first auxiliary pattern 131 is the length of one bar in the bar grating, which can be represented as L3.
[0040] In some embodiments, for ease of identification, the lengths of the four sets of first auxiliary patterns 131 can be set to be greater than the lengths of the corresponding sides of the hollow rectangular frame, i.e., L3>L2.
[0041] In some embodiments, the two sets of first auxiliary patterns located on the left and right sides of the hollow rectangular frame among the four sets of first auxiliary patterns 131 can have the same size, and the two sets of first auxiliary patterns located on the top and bottom sides of the hollow rectangular frame can have the same size, but different size from the two sets of first auxiliary patterns located on the left and right sides of the hollow rectangular frame. When the same size is used, the length, line width, bar arrangement, and spacing between adjacent bars of the first auxiliary pattern can all be the same. When different size is used, at least one of the following can be different: the length, line width, bar arrangement, and spacing between adjacent bars of the first auxiliary pattern.
[0042] In other embodiments, the four sets of first auxiliary patterns 131 may all adopt the same size setting, such as Figure 1 As shown, the orthographic projection of the hollow rectangular frame of the second alignment mark 12 is a centrally symmetrical figure. The four sets of first auxiliary patterns 131 all adopt the same size setting. The length of the first auxiliary pattern 131 is equal to the sum of the length of the corresponding side of the hollow rectangular frame and the second distance D2. That is, the length of the bar of the first auxiliary pattern 131 and the length of the hollow rectangular frame satisfy: L3=L2+D2. The line width of each bar in the bar grating is the same, which can be represented as W3.
[0043] like Figure 1 As shown, in a set of bar gratings, the distance between two adjacent bars is a third distance D3. To save space and time, the linewidth of the bars and the third distance D3 are set to be equal to the critical dimension of the main pattern of the chip region for critical dimension measurement, such as measuring linewidth or the spacing between lines. This allows for the measurement of overlay offset and critical dimensions at the same location, and facilitates the measurement of overlay offset and critical dimensions after exposure in lithography machines at different magnifications using automated measurement equipment. The wafer can include multiple chip regions, the main pattern can be the pattern of the target functional circuit on the chip region, and the critical dimension is the minimum linewidth of the target functional circuit pattern on the chip region.
[0044] In other embodiments, W3 can also be set to D3.
[0045] See Figure 2 As shown, Figure 2 This is a schematic diagram of an overlay mark provided in Embodiment 2 of this application, which may further include:
[0046] The fourth alignment mark 14 is set on the reference layer, located outside the first alignment mark 11, and symmetrical about the central axes of the first alignment mark 11 in two mutually perpendicular directions. When the hollow rectangle of the second alignment mark 12 coincides with the center of the first alignment mark 11, the orthographic projection of the fourth alignment mark 14 is located outside the orthographic projection of the hollow rectangle of the second alignment mark 12, and does not overlap with the orthographic projection of the third alignment mark 13, the hollow rectangle, or the first alignment mark 11. The fourth alignment mark 14 includes four sets of second auxiliary patterns 141, each corresponding to one of the four vertices of the hollow rectangle of the second alignment mark 12. By setting the fourth alignment mark 14, it is beneficial to quickly achieve coarse offset detection. For example, it can be directly determined whether the third alignment mark 13 and the fourth alignment mark 14 overlap; if so, it can be preliminarily determined that the current layer has offset relative to the reference layer.
[0047] In some embodiments, such as Figure 3 As shown, the second auxiliary pattern 141 is in the shape of a cross.
[0048] like Figure 2 As shown, when the third alignment mark 13 includes four sets of first auxiliary patterns 131, and the four sets of first auxiliary patterns 131 correspond one-to-one with the four sides of the hollow rectangular frame of the second alignment mark 12 and are spaced apart, the minimum interval between the second auxiliary pattern 141 and each of the two adjacent sets of first auxiliary patterns 131 is the fourth distance D4.
[0049] In some examples, such as Figure 2 As shown, the second auxiliary pattern 141 is cross-shaped, and its length can be represented as L4, and its line width can be represented as W4, satisfying: L4=W3×N+D3×(N-1), W4=W3, D4=D2 / 2. That is to say, the length of the second auxiliary pattern 141 is the sum of the line width of the N strips in the first auxiliary pattern 131 and the N-1 third distances.
[0050] In addition, to improve measurement accuracy, the overlay marks of one of the current layer and the reference layer can be set to a groove type, while the overlay marks of the other of the current layer and the reference layer can be set to a convex type. The overlay marks can be set in the dicing channels of the wafer. Multiple chip regions can be set in the area on the wafer excluding the dicing channels. The overlay marks of the current layer can use the same setting method as the pattern in the chip region of the current layer, such as both the overlay marks of the current layer and the pattern in the chip region of the current layer using a groove type or a convex type. Similarly, the overlay marks of the reference layer also use the same setting method as the image in the chip region of the reference layer.
[0051] In some embodiments, Figure 2 The corresponding overlay marks can be prepared through the following steps S1 to S3.
[0052] S1: First, before depositing the material layer to be etched, an etch stop layer is deposited on the substrate to prevent inconsistent etching depths between the overlay marking pattern and the main cell (the main pattern in the chip area) due to differences in pattern size, which would affect the marking accuracy. Specifically, if the material layer to be etched is a dielectric layer, the etch stop layer material can be a nitride; if the material layer to be etched is a metal, the etch stop layer material can be an oxide.
[0053] S2: The deposited dielectric layer serves as the material to be etched. Then, after photolithography and etching, a mark is formed. This dielectric layer serves as the reference layer, such as... Figure 3 As shown, the front layer markings include a first alignment mark 11 and a fourth alignment mark 14. Both the first alignment mark 11 and the fourth alignment mark 14 can be groove-shaped. The pattern of the first alignment mark 11 is a non-closed rectangle surrounded by four strips, and the pattern of the fourth alignment mark 14 is a cross.
[0054] S3: Deposited metal layer, etched by photolithography to form the current layer marker. The metal layer can be used as the current layer; see [link / reference]. Figure 4 As shown, the layer markings may include a second alignment mark 12 and a third alignment mark 13. Both the second alignment mark 12 and the third alignment mark 13 may be convex. The pattern of the second alignment mark 12 is a hollow rectangular frame, and the pattern of the third alignment mark 13 is four sets of bar gratings.
[0055] In step S2 above, if the material layer to be etched is metal, the front layer mark can be convex; correspondingly, in step S3, if a medium layer is deposited, the layer mark can be grooved.
[0056] like Figure 5 As shown, when the offset is small, the second alignment mark 12 of the current layer and the first alignment mark 11 of the reference layer can be used to perform overlay testing using conventional measurement methods. Figure 6 yes Figure 5 A partial structural diagram, such as Figure 6As shown, in the X direction, the distance between the center line of the left bar (strip) of the first alignment mark 11 and the center line of the left border of the second alignment mark 12 is X1; the distance between the center line of the right bar of the first alignment mark 11 and the center line of the right border of the second alignment mark 12 is X2. The offset DX = (X2 - X1) / 2, where DX < 0 indicates that the current layer is offset to the left relative to the reference layer; DX > 0 indicates that the current layer is offset to the right relative to the reference layer. Similarly, in the Y direction, the distance between the center line of the lower bar of the first alignment mark 11 and the center line of the lower border of the second alignment mark 12 is Y1; the distance between the center line of the upper bar of the first alignment mark 11 and the center line of the upper border of the second alignment mark 12 is Y2. The offset DY = (Y2 - Y1) / 2, where DY < 0 indicates that the current layer is offset downward relative to the reference layer; DY > 0 indicates that the current layer is offset upward relative to the reference layer.
[0057] See Figure 7 As shown, when the first alignment mark 11 and the second alignment mark 12 overlap (i.e., when the offset is large), the overlay measurement machine cannot obtain an effective alignment signal, which can easily lead to measurement failure. At this time, overlay testing can be performed based on the third alignment mark 13 and the first alignment mark 11, which can provide overlay offset compensation value for subsequent wafer processing.
[0058] Offset measurement can be performed between two centrally symmetrical bars selected from the two sets of bar gratings located on the left and right sides of the hollow rectangular frame of the third alignment mark 13 and the bar not covered by the first alignment mark 11. Figure 8 As shown, Figure 8 yes Figure 7A partial structural diagram is shown. The innermost bar of the two sets of bar gratings on the left and right sides of the third alignment mark 13 can be selected for testing. The distance between the bar on the left side of the third alignment mark 13 and the uncovered bar on the left side of the first alignment mark 11 (the bar not covered by the second alignment mark 12 in the X direction) is X1'. The distance between the bar on the right side of the third alignment mark 13 and the bar on the left side of the first alignment mark 11 is X2'. The offset DX'=|[k×(X2'-X1')-S] / 2|, where S represents the distance between the center lines of the two bars on the left and right sides of the first alignment mark 11, which can be expressed as S=D0+W1. D0 represents the interval distance between the two bars on the left and right sides of the first alignment mark 11. k represents the direction coefficient. When the visible bar in the first alignment mark 11 is its left bar or lower bar, k=1. When the visible bar in the first alignment mark 11 is its right bar or upper bar, k=-1. Measuring the bar to the left of the first alignment mark 11 (the bar to the left of the first alignment mark 11 is not covered by the second alignment mark 12) represents a leftward offset; measuring the bar to the right of the first alignment mark 11 (the bar to the right of the first alignment mark 11 is not covered by the second alignment mark 12) represents a rightward offset; similarly, two bars that are centrally symmetrical can be selected from the two sets of bar gratings located on the upper and lower sides of the hollow rectangular frame of the third alignment mark 13 for measurement. The distance between the lower bar of the third alignment mark 13 and the upper bar of the first alignment mark 11 (the bar not covered by the second alignment mark 12 in the Y direction) is Y1', and the distance between the upper bar of the third alignment mark 13 and the upper bar of the first alignment mark 11 is Y2'. The offset DY' = |[k×(Y2'-Y1')-S] / 2|; measuring the upper bar of the first alignment mark 11 represents an upward offset; measuring the lower bar of the first alignment mark 11 represents a downward offset.
[0059] In some embodiments, with Figure 2 Taking the overlay mark shown as an example, by setting the fourth alignment mark 14, setting the fourth distance D4 as the offset inner control line, and setting the first distance D1 to be equal to the overlay accuracy (i.e., the first distance D1 can be set as the overlay specification line), an overlay mark that can be used for visual inspection and can directly and quickly identify the offset can be obtained. The offset inner control line can be set according to requirements; it can be smaller than the overlay specification line to facilitate early warning. The overlay specification line is the maximum allowable deviation limit of the process. By visually inspecting whether the first alignment mark 11 overlaps or touches the corresponding edge of the hollow rectangle, it can be directly determined whether the offset exceeds the overlay specification line. By visually inspecting whether the fourth alignment mark 14 overlaps or touches the third alignment mark 13, it can be directly determined whether the offset exceeds the inner control line.
[0060] Specifically, taking the lower left cross mark as an example, the line width of the cross mark can be consistent with the line width of the bar in the first auxiliary pattern 131; the center lines of the horizontal and vertical bars of the cross mark correspond to the center lines of a set of bar gratings located on the left side of the hollow rectangular frame and the center lines of a set of bar gratings located on the lower side of the hollow rectangular frame in the first auxiliary pattern 131, and the spacing is the fourth distance D4. When the lower left cross mark does not overlap with a set of strip gratings located on the lower and left sides of the hollow rectangular frame of the first auxiliary pattern 131, it can be determined that the overlay offset is within the inner control line. When the lower left cross mark overlaps with a set of strip gratings located on the lower or left side of the hollow rectangular frame of the first auxiliary pattern 131, it indicates that the offset has exceeded the inner control line. At this time, it can be further determined whether the offset exceeds the overlay specification line: 1) When the outer edge of the first alignment mark 11 does not align with the inner edge of the hollow rectangular frame, it indicates that the offset is outside the inner control line but within the overlay specification line, and the product is qualified and can continue production; 2) When the outer edge of the first alignment mark 11 overlaps with the inner edge of the hollow rectangular frame, it indicates that the offset exceeds the overlay specification line and rework is required. At this time, the offset can be measured by the third alignment mark to provide overlay offset compensation value for subsequent wafer processing by the machine.
[0061] The technical solutions of this application have been described above with reference to the preferred embodiments shown in the accompanying drawings. However, it will be readily understood by those skilled in the art that the scope of protection of this application is obviously not limited to these specific embodiments. Without departing from the principles of this application, those skilled in the art can make equivalent changes or substitutions to the relevant technical features, and the technical solutions after these changes or substitutions will all fall within the scope of protection of this application.
Claims
1. A type of overprinted mark, characterized in that, include: The first alignment mark is set on the reference layer of the wafer; A second alignment mark is disposed on the current layer above the reference layer of the wafer. The second alignment mark includes a hollow rectangular frame. The line width of the hollow rectangular frame is greater than the line width of the first alignment mark. When the center of the hollow rectangular frame coincides with the center of the first alignment mark, the orthographic projection of the hollow rectangular frame is located outside the orthographic projection of the first alignment mark and is spaced apart. Each side of the hollow rectangular frame is spaced a first distance from the first alignment mark. The third alignment mark is set on the current layer, located on the periphery of the hollow rectangular frame, and is symmetrical about the central axes of the hollow rectangular frame in two mutually perpendicular directions.
2. The overprinting mark according to claim 1, characterized in that, The third alignment mark includes four sets of first auxiliary patterns. The four sets of first auxiliary patterns correspond one-to-one with the four sides of the hollow rectangular frame and are spaced apart. The four sets of first auxiliary patterns are spaced apart from the corresponding sides of the hollow rectangular frame by a second distance.
3. The overprinting mark according to claim 2, characterized in that, The lengths of all four sets of first auxiliary patterns are greater than the lengths of the corresponding sides of the hollow rectangular frame.
4. The overprinting mark according to claim 3, characterized in that, The orthographic projection of the hollow rectangular frame is a centrally symmetrical figure. All four sets of first auxiliary patterns are set with the same size. The length of the first auxiliary pattern is equal to the sum of the length of the corresponding side of the hollow rectangular frame and the second distance.
5. The overlay mark according to any one of claims 2 to 4, characterized in that, The first auxiliary pattern is a set of bar gratings, which includes N bars, where N is an odd number greater than or equal to 3.
6. The overlay mark according to claim 5, characterized in that, The wafer includes multiple chip regions, wherein adjacent bars in a set of bar gratings are spaced by a third distance, the linewidth of the bars and the third distance are configured to be equal to the critical dimensions of the main pattern of the chip region, the main pattern being a pattern on which functional circuitry is to be fabricated.
7. The overprinting mark according to claim 1, characterized in that, The overlay mark also includes a fourth alignment mark, which is disposed on the reference layer and located outside the first alignment mark. When the center of the hollow rectangular frame coincides with the center of the first alignment mark, the first alignment mark and the fourth alignment mark are symmetrical about the central axes of the hollow rectangular frame in two mutually perpendicular directions. Furthermore, the orthographic projection of the fourth alignment mark is located outside the orthographic projection of the hollow rectangular frame and does not overlap with the orthographic projection of the third alignment mark, the hollow rectangular frame, or the first alignment mark. The fourth alignment mark includes four sets of second auxiliary patterns, which are set one-to-one with the four apex corners of the hollow rectangular frame.
8. The overprinting mark according to claim 7, characterized in that, The first alignment mark is a hollow rectangle or a non-closed rectangle surrounded by four bars; the second auxiliary pattern is a cross shape.
9. The overlay mark according to claim 8, characterized in that, The third alignment mark includes four sets of first auxiliary patterns. When the four sets of first auxiliary patterns correspond one-to-one with the four sides of the hollow rectangular frame and are spaced apart, the minimum interval between the second auxiliary pattern and the two adjacent sets of first auxiliary patterns is a fourth distance, which is less than the first distance.
10. The overprinting mark according to claim 1, characterized in that, The first distance is configured to be equal to the overlay accuracy.