An adaptive capacitor pre-charge circuit

Abstract

The utility model discloses a kind of self-adapting capacitor pre-charging circuit, including anti-reverse and current-limiting unit, input monitoring unit, control loop unit, freewheeling loop unit, capacitor voltage monitoring unit and capacitor group unit;Anti-reverse and current-limiting unit is connected input power supply and exports to input detection unit and control loop unit;Input monitoring unit connects anti-reverse and current-limiting unit;Control loop unit is connected with power supply voltage and single-chip microcontroller, and control loop unit includes the bootstrap circuit of drive chip U1 and drive MOS tube Q1, diode D2 and capacitor C3;Freewheeling loop unit is connected with control loop unit, and freewheeling loop unit charges capacitor group unit when drive MOS tube Q1 is closed;Capacitor voltage monitoring unit is connected with freewheeling loop unit and capacitor group unit;Capacitor group unit is connected with capacitor group voltage CAP, and capacitor group unit charges under the control of control loop unit. The circuit improves the adaptability and stability of circuit, while giving consideration to charging efficiency and security.

Description

Technical Field

[0001] This application belongs to the field of capacitor pre-charging technology, specifically referring to an adaptive capacitor pre-charging circuit. Background Technology

[0002] In conventional capacitor pre-charge circuits, the pre-charge current increases with rising input voltage, potentially leading to overheating or component damage, affecting equipment stability and lifespan. Furthermore, a fixed-value pre-charge resistor cannot accommodate the pre-charge requirements of capacitors with varying capacities, resulting in low charging efficiency and increased system power consumption.

[0003] When the pre-charge resistor value is small, the required power rating of the resistor needs to increase exponentially, leading to a larger size and a larger footprint. Conversely, a large pre-charge resistor value can negatively impact the capacitor's charging efficiency, making it difficult to balance efficiency and size. Furthermore, when the input power source is a battery, the voltage fluctuates drastically due to load changes, causing the charging current to change accordingly. Over long-term use, this can lead to the pre-charge resistor failing. Utility Model Content

[0004] To overcome the shortcomings of the prior art, this application provides an adaptive capacitor pre-charging circuit, which improves the adaptability and stability of the circuit while taking into account both charging efficiency and safety.

[0005] This invention provides an adaptive capacitor pre-charging circuit, which includes an anti-reverse and current limiting unit, an input monitoring unit, a control loop unit, a freewheeling loop unit, a capacitor voltage monitoring unit, and a capacitor bank unit. The reverse current protection and current limiting unit is connected to the input power supply voltage POWER and outputs voltage to the input detection unit and the control loop unit. The reverse current protection and current limiting unit prevents current backflow and limits current in the circuit. The input monitoring unit is connected to the anti-reverse and current limiting unit, and the input monitoring unit measures the input power supply voltage POWER. The control loop unit is connected to the circuit power supply voltage VDD and an external microcontroller. The control loop unit includes a bootstrap circuit composed of a driver chip U1, a driver MOSFET Q1, a diode D2, and a capacitor C3. The driver chip U1 receives the PWM signal from the microcontroller to control the on / off state of the bootstrap circuit. The freewheeling circuit unit is connected to the control circuit unit, and the freewheeling circuit unit charges the capacitor bank unit when the driving MOS transistor Q1 is turned off; The capacitor voltage monitoring unit is connected to the freewheeling circuit unit and the capacitor bank unit, and measures the voltage of the capacitor bank unit. The capacitor bank unit is connected to the capacitor bank voltage CAP, and the capacitor bank unit is charged under the control of the control loop unit.

[0006] Furthermore, according to the adaptive capacitor pre-charging circuit provided in this application, the anti-reverse and current limiting unit includes a diode D1 and a current limiting resistor R1. The positive terminal of the diode D1 is connected to the input power supply voltage POWER, the negative terminal of the diode is connected to the current limiting resistor R1, and the other end of the current limiting resistor R1 is connected to the input monitoring unit and the control loop unit. Furthermore, according to the adaptive capacitor pre-charge circuit provided in this application, the input monitoring unit includes a voltage divider resistor R2, a voltage divider resistor R3, and a filter capacitor C1. The voltage divider resistor R3 and the filter capacitor C1 form a first RC unit. One end of the voltage divider resistor R2 is connected to the current-limiting resistor R1, and the other end of the voltage divider resistor R2 is connected to the first RC unit. The other end of the first RC unit is grounded. The connection node between the voltage divider resistor R2 and the first RC unit is connected to the ADC-POW terminal of the microcontroller. Furthermore, according to the adaptive capacitor pre-charging circuit provided in this application, the control loop unit further includes a filter capacitor C2, a resistor R4, a resistor R5, a resistor R6, and a capacitor C4. The VCC terminal of the driver chip U1 is connected to the circuit power supply voltage VDD, and the IN terminal of the driver chip U1 is connected to the PWM-CTRL terminal of the microcontroller to receive PWM signals; one end of the filter capacitor C2 is connected to the circuit power supply voltage VDD, and the other end of the filter capacitor C2 is connected to the COM terminal of the driver chip U1; the anode of the diode D2 is connected to the circuit power supply voltage VDD, and the cathode of the diode D2 is connected to the VB terminal of the driver chip U1; one end of the capacitor C3 is connected to the VB terminal of the driver chip U1, and the other end of the capacitor C3 is connected to the VS terminal of the driver chip U1; the... One end of resistor R4 is connected to the VS terminal of the driver chip U1, and the other end of resistor R4 is grounded; one end of resistor R5 is connected to the HO terminal of the driver chip U1, and the other end of resistor R5 is connected to capacitor C4; the gate of the driver MOSFET Q1 is connected to the junction of resistor R5 and capacitor C4, the source of the driver MOSFET Q1 is connected to the freewheeling circuit unit, and the drain of the driver MOSFET Q1 is connected to the current limiting resistor R1; the other end of capacitor C4 is connected to the freewheeling circuit unit; one end of resistor R6 is connected to the gate of the driver MOSFET Q1, and the other end of resistor R6 is connected to the freewheeling circuit unit.

[0007] Furthermore, according to the adaptive capacitor pre-charging circuit provided in this application, the driving MOS transistor Q1 is an NMOS transistor. Furthermore, according to the adaptive capacitor pre-charging circuit provided in this application, the freewheeling circuit unit includes an inductor L1, a diode D3, a diode D4, and a capacitor C5. The inductor L1, the diode D3, and the diode D4 are connected in series to form a freewheeling circuit, and the capacitor C5 is connected in parallel with the freewheeling circuit. Furthermore, according to the adaptive capacitor pre-charging circuit provided in this application, the positive terminal of diode D3 is grounded, and the negative terminal of diode D3 is connected to inductor L1; the other end of inductor L1 is connected to the positive terminal of diode D4, and the negative terminal of diode D4 is connected to the capacitor voltage monitoring unit; one end of capacitor C5 is connected to the positive terminal of diode D3, and the other end of capacitor C5 is connected to the negative terminal of diode D4. The source of the driving MOS transistor Q1, one end of the resistor R6, one end of the capacitor C4, and the VS terminal of the driving chip U1 are all connected to the connection node between the negative terminal of the diode D3 and the inductor L1. Furthermore, according to the adaptive capacitor pre-charging circuit provided in this application, the capacitor voltage monitoring unit includes a voltage divider resistor R7, a voltage divider resistor R8, and a filter capacitor C6; the voltage divider resistor R8 and the filter capacitor C6 form a second RC unit; one end of the voltage divider resistor R7 is connected to the negative terminal of the diode D4 and the capacitor bank voltage CAP, and the other end of the voltage divider resistor R7 is connected to the second RC unit; the other end of the second RC unit is grounded; the connection node between the voltage divider resistor R7 and the second RC unit is connected to the ADC-CAP terminal of the microcontroller. Furthermore, according to the adaptive capacitor pre-charging circuit provided in this application, the capacitor bank unit includes several capacitors connected in parallel, and the capacitor bank unit is connected in parallel to the capacitor voltage monitoring unit; one end of the capacitor bank unit is connected to the capacitor bank voltage CAP, and the other end is grounded.

[0008] The beneficial effects of this utility model are as follows: This application provides an adaptive capacitor pre-charging circuit, which can monitor the power input voltage and the voltage of the capacitor bank unit through the capacitor voltage monitoring unit, and automatically adjust the pre-charging current through the control loop unit. This can effectively suppress the instantaneous surge current when the circuit is powered on, and the pre-charging current is controlled in real time, resulting in high reliability and very low loss. Furthermore, it can adapt to different input voltages or voltage fluctuations, and capacitors of different capacities, adjusting the charging current and charging time to ensure safety, stability, and charging efficiency. Attached Figure Description

[0009] The technical solution and other beneficial effects of this application will become apparent from the following detailed description of specific embodiments in conjunction with the accompanying drawings.

[0010] Figure 1 This is a schematic diagram of the adaptive capacitor pre-charging circuit provided in this embodiment. Detailed Implementation

[0011] The technical solutions of the embodiments of this application will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only a part of the embodiments of this application, and not all of them. All other embodiments obtained by those skilled in the art based on the embodiments of this application without creative effort are within the scope of protection of this application.

[0012] In the description of this application, it should be understood that the terms "center," "longitudinal," "lateral," "length," "width," "thickness," "upper," "lower," "front," "rear," "left," "right," "vertical," "horizontal," "top," "bottom," "inner," "outer," "clockwise," and "counterclockwise," etc., indicating orientation or positional relationships based on the orientation or positional relationships shown in the accompanying drawings, are only for the convenience of describing this application and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, or be constructed and operated in a specific orientation, and therefore should not be construed as a limitation of this application. Furthermore, the terms "first" and "second" are used for descriptive purposes only and should not be construed as indicating or implying relative importance or implicitly specifying the number of indicated technical features. Thus, features defined with "first" and "second" may explicitly or implicitly include one or more of the stated features. In the description of this application, "a plurality of" means two or more, unless otherwise explicitly specified.

[0013] The following disclosure provides many different embodiments or examples for implementing different structures of this application. To simplify the disclosure, specific examples of components and arrangements are described below. Of course, these are merely examples and are not intended to limit the scope of this application. Furthermore, reference numerals and / or letters may be repeated in different examples; such repetition is for simplification and clarity and does not in itself indicate a relationship between the various embodiments and / or arrangements discussed. In addition, various specific examples of processes and materials are provided in this application, but those skilled in the art will recognize the application of other processes and / or the use of other materials.

[0014] The embodiments of this application will now be further described in conjunction with the accompanying drawings and specific implementation details.

[0015] Figure 1 This is a schematic diagram of the adaptive capacitor pre-charging circuit provided in this embodiment.

[0016] like Figure 1As shown, in this embodiment, the circuit includes an anti-reverse and current limiting unit, an input monitoring unit, a control loop unit, a freewheeling loop unit, a capacitor voltage monitoring unit, and a capacitor bank unit. The circuit includes a reverse current protection and current limiting unit connected to the input power supply voltage POWER and outputting voltage to the input detection unit and the control loop unit. This unit prevents reverse current flow and limits current in the circuit. An input monitoring unit connected to the reverse current protection and current limiting unit measures the input power supply voltage POWER. The control loop unit connected to the circuit power supply voltage VDD and an external microcontroller includes a bootstrap circuit composed of a driver chip U1, a driver MOSFET Q1, a diode D2, and a capacitor C3. The driver chip U1 receives the PWM signal from the microcontroller to control the bootstrap circuit's on / off state. A freewheeling circuit unit connected to the control loop unit charges the capacitor bank unit when the driver MOSFET Q1 is off. A capacitor voltage monitoring unit connected to the freewheeling circuit unit and the capacitor bank unit measures the voltage of the capacitor bank unit. The capacitor bank unit is connected to the capacitor bank voltage CAP and is charged under the control of the control loop unit.

[0017] Specifically, such as Figure 1 As shown, the reverse connection protection and current limiting unit includes a diode D1 and a current limiting resistor R1. Diode D1 provides input reverse connection protection, and current limiting resistor R1 is an input current limiting resistor with a resistance on the order of mΩ. In the entire circuit, current limiting resistor R1 is negligible. The anode of diode D1 is connected to the input power supply voltage POWER, and the cathode of diode D1 is connected to the current limiting resistor R1. The other end of current limiting resistor R1 is connected to the input monitoring unit and the control loop unit.

[0018] The input monitoring unit measures the input voltage. The input monitoring unit includes voltage divider resistors R2 and R3 and a filter capacitor C1. Voltage divider resistors R3 and C1 form a first RC unit. One end of voltage divider resistor R2 is connected to the current-limiting resistor R1, and the other end of voltage divider resistor R2 is connected to the first RC unit. The other end of the first RC unit is grounded. The connection point between voltage divider resistor R2 and the first RC unit is connected to the ADC-POW terminal of the microcontroller.

[0019] The control loop unit also includes a filter capacitor C2, a resistor R4, a resistor R5, a resistor R6, and a capacitor C4; the driver chip U1 is a high-side driver chip, mainly used to receive the PWM waveform output by an external microcontroller (usually an MCU).

[0020] The VCC terminal of the driver chip U1 is connected to the circuit power supply voltage VDD, and the IN terminal of the driver chip U1 is connected to the PWM-CTRL terminal of the microcontroller to receive PWM signals; one end of the filter capacitor C2 is connected to the circuit power supply voltage VDD, and the other end of the filter capacitor C2 is connected to the COM terminal of the driver chip U1; the anode of the diode D2 is connected to the circuit power supply voltage VDD, and the cathode of the diode D2 is connected to the VB terminal of the driver chip U1; one end of the capacitor C3 is connected to the VB terminal of the driver chip U1, and the other end of the capacitor C3 is connected to the VS terminal of the driver chip U1; the... One end of resistor R4 is connected to the VS terminal of the driver chip U1, and the other end of resistor R4 is grounded; one end of resistor R5 is connected to the HO terminal of the driver chip U1, and the other end of resistor R5 is connected to capacitor C4; the gate of the driver MOSFET Q1 is connected to the junction of resistor R5 and capacitor C4, the source of the driver MOSFET Q1 is connected to the freewheeling circuit unit, and the drain of the driver MOSFET Q1 is connected to the current limiting resistor R1; the other end of capacitor C4 is connected to the freewheeling circuit unit; one end of resistor R6 is connected to the gate of the driver MOSFET Q1, and the other end of resistor R6 is connected to the freewheeling circuit unit.

[0021] In this embodiment, the driving MOS transistor Q1 is described as an NMOS transistor. In other embodiments, the driving MOS transistor Q1 can also be a PMOS transistor. When the driving MOS transistor Q1 is a PMOS transistor, the connection method of the driving MOS transistor Q1 changes accordingly.

[0022] The freewheeling circuit unit includes an inductor L1, a diode D3, a diode D4, and a capacitor C5. The inductor L1, diode D3, and diode D4 are connected in series to form the freewheeling circuit, and the capacitor C5 is connected in parallel with the freewheeling circuit. This freewheeling circuit continues to charge the capacitor bank unit when the driving MOSFET Q1 is turned off.

[0023] Specifically, the positive terminal of diode D3 is grounded, and the negative terminal of diode D3 is connected to inductor L1; the other end of inductor L1 is connected to the positive terminal of diode D4, and the negative terminal of diode D4 is connected to the capacitor voltage monitoring unit; one end of capacitor C5 is connected to the positive terminal of diode D3, and the other end of capacitor C5 is connected to the negative terminal of diode D4. The source of the driving MOS transistor Q1, one end of the resistor R6, one end of the capacitor C4, and the VS terminal of the driving chip U1 are all connected to the connection node between the negative terminal of the diode D3 and the inductor L1.

[0024] The capacitor voltage monitoring unit is used to monitor the voltage on the capacitor bank unit. The capacitor voltage monitoring unit includes voltage divider resistors R7 and R8, and a filter capacitor C6; the voltage divider resistors R8 and C6 form a second RC unit; one end of the voltage divider resistor R7 is connected to the cathode of the diode D4 and the capacitor bank voltage CAP, and the other end of the voltage divider resistor R7 is connected to the second RC unit; the other end of the second RC unit is grounded; the connection point between the voltage divider resistor R7 and the second RC unit is connected to the ADC-CAP terminal of the microcontroller. The capacitor bank unit comprises several capacitors connected in parallel, and the capacitor bank unit is connected in parallel to the capacitor voltage monitoring unit; one end of the capacitor bank unit is connected to the capacitor bank voltage CAP, and the other end is grounded. The capacitor bank unit is composed of multiple capacitors, such as capacitors CE1, CE2, CE3...CEx, connected in parallel, and the total capacity of the capacitor bank unit is relatively large.

[0025] The working principle of the adaptive capacitor pre-charge circuit provided in this embodiment is as follows: When the driving MOSFET Q1 is turned on, the capacitor bank voltage CAP charges the capacitor bank unit at the back end, and the charging resistor in the circuit... as follows:

[0026] in, A fixed charging resistor is provided in the circuit loop; its resistance value is on the order of mΩ, or it can be omitted. The resistance of the driving MOSFET Q1 when it is turned on can be obtained from the device datasheet; The DC resistance of the inductor L1 can be obtained from the device datasheet; The equivalent resistance of all capacitors in the capacitor bank unit connected in parallel is much smaller than the previous three and can be ignored.

[0027] Then, the input voltage can be determined through the ADC-POW and ADC-CAP pins of the microcontroller. and capacitor voltage The magnitude of the current, and then the duty cycle D of the PWM signal at the PWM-CTRL terminal of the microcontroller, can be used to obtain the charging current. The calculation formula is as follows:

[0028] Therefore, the charging current can be controlled by adjusting the duty cycle D. Size.

[0029] After a short pre-charging period t, the total capacity of the capacitor bank unit can be estimated using the following capacitor charging formula. :

[0030] Calculate the total capacity of the capacitor bank unit. Then, the pre-charging time can be controlled to adapt to the needs of the entire control system.

[0031] In summary, the adaptive capacitor pre-charging circuit provided in this application can monitor the power input voltage through a capacitor voltage monitoring unit. and the voltage of the capacitor bank unit The control loop unit automatically adjusts the pre-charge current, effectively suppressing instantaneous surge current when the circuit is powered on. The pre-charge current is controlled in real time, ensuring high reliability and very low loss. Furthermore, it can adapt to different input voltages or voltage fluctuations, as well as capacitors of different capacities, adjusting the charging current and charging time to ensure safety, stability, and charging efficiency.

[0032] Although preferred embodiments of the present invention have been described, those skilled in the art, upon learning the basic inventive concept, can make other changes and modifications to these embodiments. Therefore, the appended claims are intended to be interpreted as including both the preferred embodiments and all changes and modifications falling within the scope of the present invention. Finally, it should be noted that in this document, relational terms such as "first" and "second" are used merely to distinguish one entity or operation from another, and do not necessarily require or imply any such actual relationship or order between these entities or operations. Furthermore, the terms "comprising," "including," or any other variations thereof are intended to cover non-exclusive inclusion, such that a process, method, article, or terminal device that comprises a list of elements includes not only those elements but also other elements not expressly listed, or elements inherent to such a process, method, article, or terminal device. Without further limitations, an element defined by the phrase "comprising one..." does not exclude the presence of other identical elements in the process, method, article, or terminal device that includes said element.

[0033] The above provides a detailed description of an adaptive capacitor pre-charging circuit provided in the embodiments of this application. Specific examples have been used to illustrate the principles and implementation methods of this application. The descriptions of the above embodiments are only for the purpose of helping to understand the technical solutions and core ideas of this application. Those skilled in the art should understand that modifications can still be made to the technical solutions described in the foregoing embodiments, or equivalent substitutions can be made to some of the technical features. These modifications or substitutions do not cause the essence of the corresponding technical solutions to deviate from the scope of the technical solutions of the embodiments of this application.

Claims

1. An adaptive capacitor pre-charging circuit, characterized in that, The circuit includes an anti-reverse and current limiting unit, an input monitoring unit, a control loop unit, a freewheeling loop unit, a capacitor voltage monitoring unit, and a capacitor bank unit. The reverse current protection and current limiting unit is connected to the input power supply voltage POWER and outputs voltage to the input detection unit and the control loop unit. The reverse current protection and current limiting unit prevents current backflow and limits current in the circuit. The input monitoring unit is connected to the anti-reverse and current limiting unit, and the input monitoring unit measures the input power supply voltage POWER. The control loop unit is connected to the circuit power supply voltage VDD and an external microcontroller. The control loop unit includes a bootstrap circuit composed of a driver chip U1, a driver MOSFET Q1, a diode D2, and a capacitor C3. The driver chip U1 receives the PWM signal from the microcontroller to control the on / off state of the bootstrap circuit. The freewheeling circuit unit is connected to the control circuit unit, and the freewheeling circuit unit charges the capacitor bank unit when the driving MOS transistor Q1 is turned off; The capacitor voltage monitoring unit is connected to the freewheeling circuit unit and the capacitor bank unit, and measures the voltage of the capacitor bank unit. The capacitor bank unit is connected to the capacitor bank voltage CAP, and the capacitor bank unit is charged under the control of the control loop unit.

2. The adaptive capacitor pre-charging circuit according to claim 1, characterized in that, The anti-reverse and current limiting unit includes a diode D1 and a current limiting resistor R1. The positive terminal of the diode D1 is connected to the input power supply voltage POWER, and the negative terminal of the diode is connected to the current limiting resistor R1. The other end of the current limiting resistor R1 is connected to the input monitoring unit and the control loop unit.

3. The adaptive capacitor pre-charging circuit according to claim 2, characterized in that, The input monitoring unit includes a voltage divider resistor R2, a voltage divider resistor R3, and a filter capacitor C1. The voltage divider resistor R3 and the filter capacitor C1 form a first RC unit. One end of the voltage divider resistor R2 is connected to the current limiting resistor R1, and the other end of the voltage divider resistor R2 is connected to the first RC unit. The other end of the first RC unit is grounded. The connection node between the voltage divider resistor R2 and the first RC unit is connected to the ADC-POW terminal of the microcontroller.

4. The adaptive capacitor pre-charging circuit according to claim 2, characterized in that, The control loop unit also includes a filter capacitor C2, a resistor R4, a resistor R5, a resistor R6, and a capacitor C4. The VCC terminal of the driver chip U1 is connected to the circuit power supply voltage VDD, and the IN terminal of the driver chip U1 is connected to the PWM-CTRL terminal of the microcontroller to receive PWM signals; one end of the filter capacitor C2 is connected to the circuit power supply voltage VDD, and the other end of the filter capacitor C2 is connected to the COM terminal of the driver chip U1; the anode of the diode D2 is connected to the circuit power supply voltage VDD, and the cathode of the diode D2 is connected to the VB terminal of the driver chip U1; one end of the capacitor C3 is connected to the VB terminal of the driver chip U1, and the other end of the capacitor C3 is connected to the VS terminal of the driver chip U1; the... One end of resistor R4 is connected to the VS terminal of the driver chip U1, and the other end of resistor R4 is grounded; one end of resistor R5 is connected to the HO terminal of the driver chip U1, and the other end of resistor R5 is connected to capacitor C4; the gate of the driver MOSFET Q1 is connected to the junction of resistor R5 and capacitor C4, the source of the driver MOSFET Q1 is connected to the freewheeling circuit unit, and the drain of the driver MOSFET Q1 is connected to the current limiting resistor R1; the other end of capacitor C4 is connected to the freewheeling circuit unit; one end of resistor R6 is connected to the gate of the driver MOSFET Q1, and the other end of resistor R6 is connected to the freewheeling circuit unit.

5. The adaptive capacitor pre-charging circuit according to claim 4, characterized in that, The driving MOS transistor Q1 is an NMOS transistor.

6. The adaptive capacitor pre-charging circuit according to claim 4, characterized in that, The freewheeling circuit unit includes an inductor L1, a diode D3, a diode D4, and a capacitor C5. The inductor L1, the diode D3, and the diode D4 are connected in series to form a freewheeling circuit, and the capacitor C5 is connected in parallel with the freewheeling circuit.

7. The adaptive capacitor pre-charging circuit according to claim 6, characterized in that, The positive terminal of diode D3 is grounded, and the negative terminal of diode D3 is connected to inductor L1; the other end of inductor L1 is connected to the positive terminal of diode D4, and the negative terminal of diode D4 is connected to the capacitor voltage monitoring unit; one end of capacitor C5 is connected to the positive terminal of diode D3, and the other end of capacitor C5 is connected to the negative terminal of diode D4. The source of the driving MOS transistor Q1, one end of the resistor R6, one end of the capacitor C4, and the VS terminal of the driving chip U1 are all connected to the connection node between the negative terminal of the diode D3 and the inductor L1.

8. The adaptive capacitor pre-charging circuit according to claim 7, characterized in that, The capacitor voltage monitoring unit includes a voltage divider resistor R7, a voltage divider resistor R8, and a filter capacitor C6; the voltage divider resistor R8 and the filter capacitor C6 form a second RC unit; one end of the voltage divider resistor R7 is connected to the negative terminal of the diode D4 and the capacitor bank voltage CAP, and the other end of the voltage divider resistor R7 is connected to the second RC unit; the other end of the second RC unit is grounded; the connection node between the voltage divider resistor R7 and the second RC unit is connected to the ADC-CAP terminal of the microcontroller.

9. The adaptive capacitor pre-charging circuit according to claim 8, characterized in that, The capacitor bank unit includes several capacitors connected in parallel, and the capacitor bank unit is connected in parallel to the capacitor voltage monitoring unit; one end of the capacitor bank unit is connected to the capacitor bank voltage CAP, and the other end is grounded.

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