analog front end sampling chip, battery management system, electric vehicle and energy storage device

Abstract

The application provides an analog front-end sampling chip, a battery management system, an electric vehicle and an energy storage device. The analog front-end sampling chip comprises a battery voltage sampling port, a feedback control port, an active equalization control port, a charging and discharging control port and a battery temperature acquisition port. The analog front-end sampling chip can output a charging control signal and / or a discharging control signal through the charging and discharging control port to perform overall charging and discharging control on a battery pack. The control switch and digital logic circuit related to passive equalization do not need to be arranged in the chip, and energy equalization can be realized based on the overall charging and discharging control on the battery pack, thereby effectively reducing the number of general input and output ports required for the chip to realize the energy equalization control of the battery pack. Enough general input and output ports can be saved to fully meet the full configuration requirement of temperature acquisition of each single battery, the rate and accuracy of temperature acquisition are higher, and the complexity and cost of chip design are lower.

Description

Technical Field

[0001] This application relates to the field of battery management, specifically to an analog front-end sampling chip, a battery management system, electric vehicles, and energy storage devices. Background Technology

[0002] In lithium-ion battery packs, there are inherent differences in capacity, internal resistance, and self-discharge rate among individual cells, and these differences are already present during the manufacturing process. As usage cycles increase, the differences in battery aging rates further exacerbate these inconsistencies, ultimately leading to the "weakest link effect"—that is, the usable capacity of the battery pack depends on the capacity of the weakest individual cell.

[0003] To improve battery efficiency and safety, balancing technology is commonly used to balance parameters such as voltage and capacity of individual cells within a module. Existing technologies are mainly divided into passive balancing and active balancing. Passive balancing uses resistor heating to dissipate excess energy and reduce voltage differences between cells, while active balancing relies on a single balancing module and a gating unit to achieve energy transfer. Currently, active balancing solutions for battery management systems (BMS) are not yet mature enough. For example, inductive active balancing leads to repeated charging and discharging of the battery and is difficult to integrate; capacitive active balancing suffers from difficulties in controlling the balancing current, poor dynamic response characteristics, and circuit reliability risks.

[0004] For the reasons mentioned above, existing BMS_AFEs are usually equipped with passive equalization functions as standard. As the most important sensing layer of the BMS, the AFE also needs to collect battery voltage and temperature signals. Therefore, traditional AFE chips often face insufficient GPIO (general purpose input / output) ports when dealing with a large number of batteries, so they need to be paired with chips such as 3 / 8 decoders to expand the I / O function. Utility Model Content

[0005] In view of the above-mentioned technical problems, the purpose of this application is to provide an analog front-end sampling chip, a battery management system, an electric vehicle, and an energy storage device. The analog front-end sampling chip does not incorporate a passive balancing switch or related digital logic circuits for passive balancing control. Instead, more GPIO circuits can be designed. Furthermore, the analog front-end sampling chip uses a small number of ports to control multiple cascaded active balancing modules and external charging / discharging modules to achieve energy balancing control of the battery pack. This reduces the number of general-purpose input / output ports required to achieve the same balancing control function, saving more general-purpose input / output ports. Even in scenarios with a large number of individual cells in the battery pack, there is no need to expand the temperature acquisition port through decoders or analog switches. This not only improves the temperature acquisition rate and accuracy but also reduces the use of discrete components, effectively reducing the chip's design complexity. Additionally, the absence of a passive balancing switch in the analog front-end sampling chip lowers the chip's operating temperature, indirectly improving its reliability. The fewer pins also allow for smaller and cheaper packaging, resulting in lower costs.

[0006] According to a first aspect of this application, an analog front-end sampling chip is provided, characterized in that it comprises: A battery voltage sampling port is used to connect to each individual cell in the battery pack and receive the battery voltage sampling signal of each individual cell. The battery pack includes m individual cells connected in series, where m is an integer greater than 1. The feedback control port is used to connect to the control unit, output the battery voltage sampling signal of each individual cell, and receive equalization control commands; An active balancing control port is used to connect to the first-level active balancing module in a cascaded set of multiple active balancing modules, and outputs active balancing drive data. The multiple active balancing modules are sequentially connected to at least one group of batteries in the battery pack, and control the energy balance between the at least one group of batteries according to the active balancing drive data. A charge / discharge control port is used to connect to a charge / discharge module and output a charging control signal and / or a discharging control signal. The charge / discharge module is connected to the positive and negative terminals of the battery pack and is used to perform overall charge / discharge control on the battery pack according to the charging control signal and / or the discharging control signal. The battery temperature acquisition port is used to simultaneously receive the temperature sampling signals of each individual battery cell in the battery pack.

[0007] Optionally, the battery temperature acquisition port includes m general-purpose input / output ports, which are used to directly connect to the signal output terminals of the m temperature acquisition devices corresponding to the m individual batteries.

[0008] Optionally, the battery voltage sampling port includes m+1 general-purpose input / output ports, which are respectively used to connect the positive terminal of the m individual cells to the reference ground.

[0009] Optionally, the analog front-end sampling chip and the first-stage active equalization module are connected via an I2C bus.

[0010] Optionally, the active equalization control port includes: a first general-purpose input / output port, a second general-purpose input / output port, and a third general-purpose input / output port; The first general purpose input / output port and the second general purpose input / output port are used to connect to the first I2C port of the first-stage active equalization module; The third general-purpose input / output port is used to connect to the first enable port of the first-stage active equalization module.

[0011] Optionally, the charge / discharge control port includes a fourth general-purpose input / output port.

[0012] Optionally, the charging and discharging module includes: A discharge resistor and a first switch are connected in series between the positive and negative terminals of the battery pack. The fourth general-purpose input / output port is used to connect to the control terminal of the first switch to output the discharge control signal to the control terminal of the first switch.

[0013] Optionally, the charging and discharging module includes: a DC power supply and an inter-box equalization control unit connected in series; The fourth general-purpose input / output port is used to connect to the control terminal of the inter-cabinet equalization control unit to output the charging control signal to the control terminal of the inter-cabinet equalization control unit.

[0014] Optionally, the charge / discharge control port includes a fourth general-purpose input / output port and the fifth general-purpose input / output port.

[0015] Optionally, the charging and discharging includes: A discharge resistor and a first switch are connected in series between the positive and negative terminals of the battery pack. The fourth general-purpose input / output port is used to connect to the control terminal of the first switch to output the discharge control signal to the control terminal of the first switch. A DC power supply and an inter-box equalization control unit are connected in series. The fifth general-purpose input / output port is used to connect to the control terminal of the inter-box equalization control unit to output the charging control signal to the control terminal of the inter-box equalization control unit.

[0016] Optionally, the charging and discharging module further includes: The transformer includes a primary winding and a secondary winding. The DC power supply and the inter-tank equalization control unit are connected in series between the first and second ends of the primary winding. The first end of the secondary winding is connected to the positive terminal of the battery pack, and the second end of the secondary winding is connected to the negative terminal of the battery pack.

[0017] According to a second aspect of this application, a battery management system is provided, characterized in that it includes: an analog front-end sampling chip as disclosed in any embodiment of this application.

[0018] According to a third aspect of this application, an electric vehicle is provided, characterized in that it comprises: At least one set of batteries; Battery management system as disclosed in any embodiment of this application.

[0019] According to a fourth aspect of this application, an energy storage device is provided, characterized in that it comprises: At least one set of energy storage elements; Battery management system as disclosed in any embodiment of this application.

[0020] The beneficial effects of this application include at least the following: The analog front-end sampling chip, battery management system, electric vehicle, and energy storage device provided in this application are configured such that the analog front-end sampling chip controls multiple cascaded active balancing modules through an active balancing control port to achieve active balancing control of the battery pack. The charge / discharge control port controls charge / discharge modules located outside the analog front-end sampling chip to perform overall charge / discharge control of the battery pack. Compared to existing solutions that require multiple ports (such as multiple general-purpose input / output ports of the analog front-end sampling chip, or expansion chips to obtain multiple connection ports) to achieve active balancing of each individual battery cell, the analog front-end sampling chip disclosed in this application only needs a small number of general-purpose input / output ports to achieve active balancing control of the battery pack based on multiple cascaded active balancing modules, thus achieving energy balancing among the individual batteries in the battery pack. Furthermore, compared to existing solutions that require multiple passive balancing switches and related control circuits within the analog front-end sampling chip, the analog front-end sampling chip disclosed in this application does not require multiple passive balancing switches and related control circuits within the analog front-end sampling chip itself. The chip incorporates passive balancing functionality, eliminating the need for passive balancing control switches and related digital logic circuits within the analog front-end sampling chip. This frees up space for GPIO circuit design. Furthermore, this application utilizes only a small number of general-purpose input / output (GPIO) ports to achieve passive balancing control of the battery pack and / or inter-cell balancing control based on an external charging / discharging module. While achieving the same balancing control function, fewer GPIO ports are required, freeing up more ports to allow the analog front-end sampling chip's battery temperature acquisition port to simultaneously receive temperature sampling signals from each individual cell in the battery pack. This fully meets the full configuration requirements for temperature acquisition of each individual cell, improving the reporting speed and accuracy of temperature sampling signals, thus more accurately reflecting the real-time temperature changes of each cell. It also reduces the number of discrete components used in the system, effectively lowering the design complexity and cost of the analog front-end sampling chip.

[0021] It should be noted that the above general description and the following detailed description are merely exemplary and explanatory, and do not limit this application. Attached Figure Description

[0022] Figure 1 This illustrates the structural framework of a battery management system in the relevant technology; Figure 2 This illustrates the structural framework of a battery management system provided according to a first embodiment of this application; Figure 3 This illustrates the structural framework of a battery management system provided according to a second embodiment of this application; Figure 4This diagram illustrates the connection structure between the analog front-end sampling chip and the temperature acquisition unit according to an embodiment of this application. Detailed Implementation

[0023] The preferred embodiments of this disclosure are described in detail below with reference to the accompanying drawings, but this disclosure is not limited to these embodiments. This disclosure covers any alternatives, modifications, equivalent methods, and solutions made within the spirit and scope of this disclosure.

[0024] In order to provide the public with a thorough understanding of this disclosure, specific details are described in detail in the following preferred embodiments of this disclosure, but those skilled in the art can fully understand this disclosure without these details.

[0025] The present disclosure is described in more detail below by way of example with reference to the accompanying drawings. It should be noted that the drawings are in a simplified form and use non-precise scales, and are only used to facilitate and clarify the illustration of the embodiments of the present disclosure.

[0026] To facilitate understanding of this application, a more complete description will be provided below with reference to the accompanying drawings. Preferred embodiments of this application are shown in the drawings. However, this application may be implemented in various forms and is not limited to the embodiments described herein. Rather, these embodiments are provided to provide a thorough and complete understanding of the disclosure of this application.

[0027] References to "one embodiment" or "some embodiments" as described in this specification mean that one or more embodiments of this application include a specific feature, structure, or characteristic described in connection with that embodiment. Therefore, the phrases "in one embodiment," "in some embodiments," "in other embodiments," "in still other embodiments," etc., appearing in different parts of this specification do not necessarily refer to the same embodiment, but rather mean "one or more, but not all, embodiments," unless otherwise specifically emphasized. The terms "comprising," "including," "having," and variations thereof mean "including but not limited to," unless otherwise specifically emphasized.

[0028] In the description of this application, words such as "exemplary" or "for example" are used to indicate that they are examples, illustrations, or descriptions. Any embodiment described as "exemplary" or "for example" in this application should not be construed as being more preferred or advantageous than other embodiments. The term "and / or" in this document describes the relationship between related objects, indicating that three relationships can exist. For example, A and / or B can represent: A alone, A and B simultaneously, and B alone. "Multiple" refers to two or more. Furthermore, to facilitate a clear description of the technical solutions of the embodiments of this application, the terms "first," "second," etc., are used to distinguish identical or similar items with substantially the same function and effect. Those skilled in the art will understand that the terms "first," "second," etc., do not limit the quantity or execution order, and that "first," "second," etc., do not necessarily imply differences.

[0029] Furthermore, the same reference numerals in the figures denote the same or similar structures, thus repeated descriptions of them will be omitted. That is, the various parts in this specification are described using a combination of parallel and progressive methods, with each part focusing on its differences from the others. Similar or identical parts can be referred to interchangeably. Terms expressing position and direction described in this application are illustrative based on the accompanying drawings, but changes can be made as needed, and all such changes are included within the scope of protection of this application. The accompanying drawings in this application are for illustrating relative positional relationships only and do not represent actual scale.

[0030] Figure 1 This illustrates the structural framework of a battery management system in related technologies. For example... Figure 1 As shown, the battery management system includes: an analog front-end sampling module (AFE) 110, a voltage sampling and passive equalization control module 120, a temperature sampling unit 130, and a pin expansion unit 140. The voltage sampling and passive equalization control module 120 is connected to the battery pack 300 to acquire the battery voltages VCO-VC16 of multiple individual cells BAT1-BAT16 in the battery pack 300 and transmit the acquired battery voltages VCO-VC16 to the AFE 110. The temperature sampling unit 130 includes multiple temperature acquisition devices NTC1-NTC16 corresponding one-to-one with the multiple individual cells BAT1-BAT16. These multiple temperature acquisition devices NTC1-NTC16 are connected to the AFE 110 through the pin expansion unit 140 to transmit the acquired temperature data of each individual cell BAT1-BAT16 to the AFE 110. AFE 110 is used to control the passive balancing of each individual cell BAT1-BAT16 based on the voltage and temperature data of each cell.

[0031] In this related solution, the AFE 110 integrates passive balancing switches and digital logic circuits for each individual battery cell (BAT1-BAT16), making it difficult to reduce chip costs and resulting in significant heat generation during operation, which to some extent affects chip reliability. Furthermore, taking a battery pack 300 containing 16 individual batteries as an example... Figure 1 The AFE 110 in the text requires a large number of pins to perform voltage sampling and passive equalization of 16 individual cells. This not only results in a larger AFE package, making it difficult to reduce the topology area of ​​the system circuit, but also limits the number of pins available for other functions. For example, the AFE 110 can only perform temperature sampling through 5 GPIO ports. When there are many individual cells requiring temperature sampling, the GPIO ports available in the AFE 100 to receive temperature data from each individual cell become insufficient, failing to meet the full configuration requirement of "one sample per cell." In this case, either only the temperature of some individual cells is sampled, or additional expansion chips (such as multi-channel analog switches) 1 and 2 are added to achieve temperature sampling of all individual cells. However, adding additional expansion chips (such as multi-channel analog switches) not only increases system cost but also affects the real-time performance of temperature acquisition. Furthermore, when Figure 1 When the battery management system in the system also needs to implement active balancing, the number of available ports on the AFE 100 is even smaller.

[0032] Based on this, this application provides a new battery management solution that can simultaneously achieve voltage sampling, active balancing, overall charging and discharging, and temperature sampling of the battery pack based on the limited number of pins of the analog front-end sampling chip without the need for additional pin expansion. This not only ensures the real-time nature of parameter acquisition but also reduces cost and area.

[0033] refer to Figure 2 , Figure 3 ,and Figure 4 ,in, Figure 2 The structural framework of the battery management system provided in the first embodiment of this application is shown. Figure 3 The structural framework of the battery management system provided in the second embodiment of this application is shown. Figure 4 A schematic diagram of the connection structure between the analog front-end sampling chip and the temperature acquisition unit provided in an embodiment of this application is shown.

[0034] Combination Figure 2 , Figure 3 and Figure 4 In this application, the battery management system 200 is connected to the battery pack 300 and is used to perform battery management on the battery pack 300, including battery voltage sampling, battery temperature sampling, and energy balancing.

[0035] The battery pack 300 includes multiple individual cells BAT1 to BATm connected in series, where m is a positive integer greater than 1. In some other examples, the battery pack 300 may also be replaced by an energy storage module consisting of multiple supercapacitors or other energy storage elements.

[0036] The battery management system 200 includes: a control unit 210, an analog front-end sampling chip (AFE) 220, multiple cascaded active balancing modules 231~23n, a charge / discharge module 240, and a temperature sampling module 260, wherein n is a positive integer greater than 1.

[0037] The control unit 210 and the analog front-end sampling chip (AFE) 220 communicate via a differential connection such as daisy chain or CAN. In some other embodiments, the battery management system 200 also includes an Iso SPI communication converter disposed between the control unit 210 and the AFE 220. The control unit 210 and the Iso SPI communication converter communicate via an SPI signal line, and the Iso SPI communication converter and the AFE 220 communicate via a communication isolation transformer. Optionally, the control unit 210 may be any one of a microcontroller unit (MCU), a digital signal processor (DSP), a complex programmable logic device (CPLD), and a field programmable gate array (FPGA). In this embodiment, a microcontroller unit (MCU) is preferred, but this is not intended to limit the embodiments of this application. In other embodiments, it may be replaced by the above or other devices or components capable of performing digital signal control.

[0038] Multiple cascaded active balancing modules 231-23n are sequentially connected to at least one group of batteries in the battery pack 240 to control the energy balance among the at least one group of batteries. In this embodiment, the solution of this application is illustrated by taking the connection of multiple cascaded active balancing modules 231-23n to multiple series-connected individual batteries BAT1-BATm as an example. Optionally, the topology of the basic unit (or module) inside each active balancing module 231-23n can be selected from non-isolated Boost, Buck, and Boost-Buck converter circuits, or from bidirectional DC / DC converter circuits or other isolated flyback topologies. Depending on different applicable scenarios and system requirements, other components or modules that are easily conceived by those skilled in the art can be flexibly adjusted or replaced, and no limitations are imposed here.

[0039] like Figure 2 and Figure 3 As shown, in this embodiment, each active balancing module includes: a first I2C port (including a first clock port DSCL and a first data port DSDA), a first enable port DEN, a second I2C port (including a second clock port USCL and a second data port USDA), a second enable port UEN, and a battery connection port. The first I2C port and the first enable port DEN are respectively connected to the second I2C port and the second enable port UEN of the previous active balancing module, for enabling drive data transmission with the previous active balancing module; the second I2C port and the second enable port UEN are respectively connected to the first I2C port and the first enable port DEN of the next active balancing module, for enabling drive data transmission with the next active balancing module; the battery connection port is connected to the positive and negative terminals of at least one individual battery cell. That is to say, in these examples, adjacent active balancing modules are connected via an I2C bus for data communication using the I2C bus protocol. Of course, in other embodiments, adjacent active balancing modules or multiple cascaded active balancing modules can also be connected and cascaded through other conventional communication interfaces. It should be noted that in the cascaded active balancing modules, the first I2C port and the first enable port DEN of the first-stage active balancing module are connected to the AFE 220 to enable drive data transmission with the AFE 220.

[0040] Each active balancing module's battery connection ports include, for example, a first connection port VP, a second connection port VM, and a third connection port GND. Each active balancing module can simultaneously connect to the positive and negative terminals of two adjacent individual cells through its battery connection ports. For example, an active balancing module can connect to the positive and negative terminals of a first individual cell through its first connection port VP and second connection port VM, and to the positive and negative terminals of a second individual cell through its second connection port VM and third connection port GND. The first and second individual cells are adjacent to each other. Of course, other implementations are also possible. For example, in other embodiments of this application, the battery connection ports may include a greater number of connection ports, thereby enabling simultaneous connection to three or more adjacent individual cells. This application does not impose strict limitations on this.

[0041] The charging / discharging module 240 is connected to the positive and negative terminals of the battery pack 300 as a whole, and is used to perform overall charging / discharging control of the battery pack 300 according to the charging control signal and / or discharging control signal.

[0042] exist Figure 2In the illustrated embodiment, the charging / discharging module 240 includes a discharge resistor R1 and a switch Q1 connected in series between the positive and negative terminals of the battery pack 300. The control terminal of the switch Q1 receives a discharge control signal. When the discharge control signal is valid, the switch Q1 is in a conducting state under the control of the valid discharge control signal. At this time, the discharge resistor R1 is connected between the positive and negative terminals of the battery pack 300, thereby discharging the battery pack 300 as a whole. When the discharge control signal is valid, the switch Q1 is in a deactivated state under the control of an invalid discharge control signal. At this time, the discharge circuit between the positive and negative terminals of the battery pack 300 is broken. The type of switch Q1 is not limited in this application; it can be a bipolar transistor, a field-effect transistor, or any other component capable of switching between on and off states.

[0043] exist Figure 3 In the illustrated embodiment, the charging / discharging module 240 includes a transformer TR, a DC power supply Vcc, and an inter-tank equalization control unit 250. The transformer TR includes a primary winding and a secondary winding. The DC power supply Vcc and the inter-tank equalization control unit 250 are connected in series between the first and second ends of the primary winding of the transformer TR. The first end of the secondary winding of the transformer TR is connected to the positive terminal of the battery pack 300, and the second end of the secondary winding of the transformer TR is connected to the negative terminal of the battery pack 300. The control terminal of the inter-tank equalization control unit 250 receives a charging control signal. When the charging control signal is valid, the inter-tank equalization control unit 250 connects the DC power supply Vcc to the charging path of the battery pack 300, thereby charging the entire battery pack 300. When the charging control signal is invalid, the inter-tank equalization control unit 250 disconnects the DC power supply Vcc from the charging path of the battery pack 300.

[0044] Optionally, in some other embodiments, the charging and discharging module 240 may also include a discharge resistor R1 and a switch Q1, as well as a transformer TR, a DC power supply Vcc and an inter-pack equalization control unit 250. In this case, the battery management system 200 can realize the control of the battery pack 300 by both overall charging and overall discharging equalization strategies.

[0045] Optionally, in some other embodiments, when the battery management system 200 needs to perform inter-packet equalization strategy control for overall charging of the battery pack 300, the transformer TR in the charge / discharge module 240 can also be omitted. That is, at this time, the DC power supply Vcc and the inter-packet equalization control unit 250 are directly connected in series between the positive and negative terminals of the battery pack 300.

[0046] like Figure 4As shown, the temperature sampling module 260 includes m temperature acquisition devices NTC1~NTCm. These m temperature acquisition devices NTC1~NTCm correspond one-to-one with the m individual cells BAT1~BATm in the battery pack 300; that is, each temperature acquisition device is positioned near a corresponding individual cell to collect its temperature. In this embodiment, one end of each of the m temperature acquisition devices NTC1~NTCm is connected to reference ground GND, and the other end is directly connected to AFE 220.

[0047] In this embodiment, the AFE 220 specifically includes: a battery voltage sampling port, a feedback control port, an active balancing control port, a charge / discharge control port, and a battery temperature acquisition port. The battery voltage sampling port, feedback control port, active balancing control port, charge / discharge control port, and battery temperature acquisition port of the AFE 220 can, for example, be implemented by at least one GPIO (General Purpose Input / Output) port.

[0048] The battery voltage sampling port of AFE 220 is used to connect to each individual cell in the battery pack 300, for reference. Figure 4 The AFE 220's battery voltage sampling ports include, for example, m+1 general purpose input / output ports, namely VC0~VCm. VC0 is used to connect to a reference ground, and VC1~VCm are used to connect to the positive terminals of m individual cells BAT1~BATm, respectively. The AFE 220 can receive battery voltage sampling signals C20~C2m from the m individual cells BAT1~BATm through its m+1 general purpose input / output ports VC0~VCm.

[0049] The feedback control port of AFE 220 is used to connect to control unit 210. AFE 220 can transmit the battery voltage sampling signals C20~C2m of m individual cells BAT1~BATm to control unit 210 through its feedback control port, and receive equalization control commands sent by control unit 210. For example, in... Figure 2 and Figure 3 In the illustrated embodiment, the feedback control port of AFE 220 is connected to control unit 210, for example, via signal lines IP and IM.

[0050] The active equalization control port of AFE 220 is used to connect to the first-stage active equalization module 231 in a series of cascaded active equalization modules. AFE 220 can output active equalization drive data through its active equalization control port.

[0051] In this embodiment, AFE 220 and the first-stage active equalization module 231, as well as adjacent active equalization modules, are connected via an I2C bus for data communication. Of course, in other embodiments, adjacent active equalization modules or multiple cascaded active equalization modules can also be connected and cascaded through other conventional communication interfaces. For example, in... Figure 2 and Figure 3 In the illustrated embodiment, the active equalization control port of AFE 220 includes, for example, a first general purpose input / output port GPIO1, a second general purpose input / output port GPIO2, and a third general purpose input / output port GPIO3. The first general purpose input / output port GPIO1 and the second general purpose input / output port GPIO2 are used to connect to the first I2C port of the first-stage active equalization module 231, and the third general purpose input / output port GPIO3 is used to connect to the first enable port of the first-stage active equalization module 231.

[0052] The drive data includes at least one of: enable data, address data, and drive control data. Enable data is transmitted through a corresponding enable port, while address data and drive control data are transmitted through corresponding I2C ports. Specifically, the enable data controls the data transmission of each active balancing module; that is, when the enable data is valid, the active balancing module is enabled, and can receive drive data input from the upper-level active balancing module and transmit the drive data to the lower-level active balancing module. Address data is used to locate the active balancing module; based on the address data, drive control data can be transmitted to a specific active balancing module. Drive control data is used to control the active balancing module to perform active balancing operations. In some preferred examples, the drive control data further includes at least one of: balancing activation direction configuration data, balancing current configuration data, and operating frequency configuration data. In this embodiment, the AFE 220 can precisely control the balancing activation direction (e.g., buck or boost), balancing current magnitude, and operating frequency of a specified active balancing module during active balancing through the active balancing control port.

[0053] The charging and discharging control port of AFE 220 is used to connect to the charging and discharging module 240. AFE 220 can output charging control signals and / or discharging control signals to the control terminal of the charging and discharging module 240 through its charging and discharging control port.

[0054] Optionally, when the charge / discharge module 240 is equipped with a discharge resistor R1 and a switch Q1, such as Figure 2As shown, the charging and discharging control port of AFE 220 includes a fourth general purpose input / output port (GPIO4). AFE 220 can connect to the control terminal of switch Q1 in the charging and discharging module 240 through GPIO4 to output a discharge control signal to the control terminal of switch Q1. When the charging and discharging module 240 is equipped with a DC power supply Vcc and an inter-box equalization control unit 250, as shown... Figure 3 As shown, the charging and discharging control port of AFE 220 includes a fourth general-purpose input / output port GPIO4. In this case, AFE 220 can connect to the control terminal of the inter-tank equalization control unit 250 in the charging and discharging module 240 through GPIO4, so as to output a charging control signal to the control terminal of the inter-tank equalization control unit 250. When the charging and discharging module 240 is simultaneously equipped with a discharge resistor R1, a switch Q1, a DC power supply Vcc, and the inter-tank equalization control unit 250, the charging and discharging control port of AFE 220 includes a fourth general-purpose input / output port GPIO4 and a fifth general-purpose input / output port (not shown). In this case, AFE 220 can connect to the control terminal of the switch Q1 in the charging and discharging module 240 through GPIO4, and to the control terminal of the inter-tank equalization control unit 250 in the charging and discharging module 240 through the fifth general-purpose input / output port, so as to output a charging control signal to the control terminal of the switch Q1 while simultaneously outputting a discharging control signal to the control terminal of the inter-tank equalization control unit 250.

[0055] Understandably, on the one hand, compared to existing solutions that require an analog front-end sampling chip (such as AFE 110) to be directly connected to the active balancing circuit of each individual battery cell using multiple general-purpose input / output ports, the AFE 220 disclosed in this application only needs to use a small number of general-purpose input / output ports (GPIO) to achieve active balancing control of the battery pack 300 based on multiple cascaded active balancing modules 231~23n to achieve energy balancing between individual batteries in the battery pack (e.g., only 3 GPIO ports are needed). On the other hand, compared to existing solutions that require an analog front-end sampling chip (such as AFE 110) to be directly connected to the active balancing circuit of each individual battery cell, the AFE 220 disclosed in this application only needs to use a small number of general-purpose input / output ports (GPIO) to achieve active balancing control of the battery pack 300 based on multiple cascaded active balancing modules 231~23n to achieve energy balancing between individual batteries in the battery pack (e.g., only 3 GPIO ports are needed). By setting multiple passive balancing switches and related control circuits in 110), the AFE220 disclosed in this application does not need to set passive balancing function in the chip, that is, it does not need to set passive balancing control switches and related digital logic circuits in the chip. Therefore, more space can be used to design GPIO circuits. At the same time, this application only needs to use a small number of GPIO ports to realize passive balancing control and / or inter-cell balancing control of battery pack 300 based on external charging and discharging module 240 (for example, only 1 to 2 GPIO ports are needed). While achieving the same balancing control function, this application requires fewer GPIO ports in AFE 220, thereby saving more GPIO ports. This allows AFE 220 to simultaneously receive temperature sampling signals of each individual cell in battery pack 300 without port expansion.

[0056] The battery temperature acquisition port of AFE 220 is used to directly connect to the signal output terminals of the m temperature acquisition units NTC1~NTCm in the temperature sampling module 260. AFE 220 can simultaneously receive the temperature sampling signals of each individual cell in the battery pack 300 through its battery temperature acquisition port. For example, in Figure 4 In the illustrated embodiment, the battery temperature acquisition port of AFE 220 includes m general-purpose input / output ports RT1~RTm, which can be directly connected to the signal output terminals of m temperature acquisition devices NTC1~NTCm in a one-to-one correspondence.

[0057] It is understood that the AFE 220 without passive equalization disclosed in the embodiments of this application can be configured with enough general-purpose input / output ports (such as RT1~RTm) specifically for temperature sampling of each individual battery cell, without the need for chip pin expansion through decoders or other chips / analog switches, which is beneficial for achieving faster and more accurate battery temperature sampling.

[0058] It should be noted that, in some other embodiments, depending on the actual number of battery packs 300, the battery management system 200 may be equipped with multiple sets of analog front-end sampling chips (AFE) 220, multiple sets of cascaded active balancing modules 231~23n, multiple sets of charge-discharge modules 240, and multiple sets of temperature sampling modules 260, so that each battery pack 300 has an analog front-end sampling chip (AFE) 220, multiple cascaded active balancing modules 231~23n, charge-discharge module 240, and temperature sampling module 260 corresponding to it.

[0059] Furthermore, one embodiment of this application also provides an electric vehicle, including: at least one set of batteries (or supercapacitors), and a battery management system 200 as disclosed in any of the foregoing embodiments.

[0060] Furthermore, another embodiment of this application also provides an energy storage device, including: at least one set of energy storage elements (such as batteries or supercapacitors), and a battery management system 200 as disclosed in any of the foregoing embodiments.

[0061] By installing the aforementioned battery management system 200 in electric vehicles, energy storage devices, and other equipment, real-time balancing during charging and discharging can be fully realized, maximizing the potential of each battery cell. This ensures that each battery cell is fully charged during charging and discharged to its minimum limit during discharging, while maintaining the same voltage throughout the charging and discharging process. This allows the capacity of each battery cell in the battery pack to be fully utilized, thus effectively extending the lifespan of the entire battery pack.

[0062] In summary, compared with the prior art, the analog front-end sampling chip and its battery management system provided in this application have at least the following effects and advantages: 1. The analog front-end sampling chip lacks a passive balancing function, which not only reduces the number of pins used for battery energy balancing control but also eliminates the passive balancing control switch and related digital logic circuitry. This effectively reduces the complexity of the analog front-end sampling chip, improves system reliability, and reduces its package size, allowing for the use of conventional low-cost packages to lower costs. Furthermore, the analog front-end sampling chip allows for more space to design more general-purpose input / output (GPIO) ports to meet the full configuration requirements for temperature acquisition of each individual battery cell (one cell corresponds to one temperature). Regarding temperature sampling signal transmission, the analog front-end sampling chip can directly and simultaneously receive the temperature sampling signal from each individual battery cell without the need for time-division transmission via analog switches. This improves the reporting speed of temperature sampling signals from each individual battery cell in the battery pack 300, enabling a more accurate understanding of the real-time temperature changes of each individual battery cell. 2. The cascaded active balancing chip solution has high integration, which can reduce the number of discrete components (such as IO expansion chips, MOS switch groups, etc.) used in the system; and has a large dynamic control range, large operating current, and high efficiency, especially in the application of large-capacity cells, where the active balancing efficiency is even higher. 3. It can achieve overall charging and discharging of the battery pack, and the control of battery voltage is more efficient. 4. Compared with existing analog front-end sampling chip designs that can simultaneously achieve equalization and battery temperature sampling functions, the solution in this application can save the number of general purpose input / output (GPIO) ports required. 5. Lower system cost.

[0063] Finally, it should be noted that the above embodiments are merely examples for clearly illustrating this application and are not intended to limit the implementation. Those skilled in the art can make other variations or modifications based on the above description. It is neither necessary nor possible to exhaustively list all possible implementations here. However, obvious variations or modifications derived therefrom are still within the scope of protection of this application.

Claims

1. An analog front-end sampling chip, characterized in that, include: A battery voltage sampling port is used to connect to each individual cell in the battery pack and receive the battery voltage sampling signal of each individual cell. The battery pack includes m individual cells connected in series, where m is an integer greater than 1. The feedback control port is used to connect to the control unit, output the battery voltage sampling signal of each individual cell, and receive equalization control commands; An active balancing control port is used to connect to the first-level active balancing module in a cascaded set of multiple active balancing modules, and outputs active balancing drive data. The multiple active balancing modules are sequentially connected to at least one group of batteries in the battery pack, and control the energy balance between the at least one group of batteries according to the active balancing drive data. A charge / discharge control port is used to connect to a charge / discharge module and output a charging control signal and / or a discharging control signal. The charge / discharge module is connected to the positive and negative terminals of the battery pack and is used to perform overall charge / discharge control on the battery pack according to the charging control signal and / or the discharging control signal. The battery temperature acquisition port is used to simultaneously receive the temperature sampling signals of each individual battery cell in the battery pack.

2. The analog front-end sampling chip according to claim 1, wherein, The battery temperature acquisition port includes m general-purpose input / output ports, which are used to directly connect to the signal output terminals of the m temperature acquisition devices corresponding to the m individual batteries.

3. The analog front-end sampling chip according to claim 1, wherein, The battery voltage sampling port includes m+1 general-purpose input / output ports, which are used to connect the positive terminal of the m individual cells to the reference ground, respectively.

4. The analog front-end sampling chip according to claim 1, wherein, The analog front-end sampling chip and the first-stage active equalization module are connected via an I2C bus.

5. The analog front-end sampling chip according to claim 4, wherein, The active equalization control port includes: a first general-purpose input / output port, a second general-purpose input / output port, and a third general-purpose input / output port; The first general purpose input / output port and the second general purpose input / output port are used to connect to the first I2C port of the first-stage active equalization module; The third general-purpose input / output port is used to connect to the first enable port of the first-stage active equalization module.

6. The analog front-end sampling chip according to claim 1, wherein, The charge / discharge control port includes a fourth general-purpose input / output port.

7. The analog front-end sampling chip according to claim 6, wherein, The charging / discharging module includes: A discharge resistor and a first switch are connected in series between the positive and negative terminals of the battery pack. The fourth general-purpose input / output port is used to connect to the control terminal of the first switch to output the discharge control signal to the control terminal of the first switch.

8. The analog front-end sampling chip according to claim 6, wherein, The charging and discharging module includes: a DC power supply and an inter-box equalization control unit connected in series; The fourth general-purpose input / output port is used to connect to the control terminal of the inter-cabinet equalization control unit to output the charging control signal to the control terminal of the inter-cabinet equalization control unit.

9. The analog front-end sampling chip according to claim 1, wherein, The charge / discharge control port includes a fourth general-purpose input / output port and a fifth general-purpose input / output port.

10. The analog front-end sampling chip according to claim 9, wherein, The charging / discharging module includes: A discharge resistor and a first switch are connected in series between the positive and negative terminals of the battery pack. The fourth general-purpose input / output port is used to connect to the control terminal of the first switch to output the discharge control signal to the control terminal of the first switch. A DC power supply and an inter-box equalization control unit are connected in series. The fifth general-purpose input / output port is used to connect to the control terminal of the inter-box equalization control unit to output the charging control signal to the control terminal of the inter-box equalization control unit.

11. The analog front-end sampling chip according to claim 8 or 10, wherein, The charging and discharging module also includes: The transformer includes a primary winding and a secondary winding. The DC power supply and the inter-tank equalization control unit are connected in series between the first and second ends of the primary winding. The first end of the secondary winding is connected to the positive terminal of the battery pack, and the second end of the secondary winding is connected to the negative terminal of the battery pack.

12. A battery management system, characterized in that, include: The analog front-end sampling chip as described in any one of claims 1-11.

13. An electric vehicle, characterized in that, include: At least one set of batteries; The battery management system as described in claim 12.

14. An energy storage device, characterized in that, include: At least one set of energy storage elements; The battery management system as described in claim 12.

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