Battery sheet and photovoltaic module
By rationally setting the width and number of sub-grids, optimizing the balance between resistance and light shading, and designing reasonable edge grid lines and connection structures, the problem of increased cell resistance in existing technologies has been solved, improving the electrical and optical performance of the cells and saving silver paste usage.
Patent Information
- Application Number
- CN202522501955.1
- Authority / Receiving Office
- CN · China
- Patent Type
- Utility models(China)
- Current Assignee / Owner
- Filing Date
- 2025-11-25
- Publication Date
- 2026-11-03
- Estimated Expiration
- 2035-11-25
AI Technical Summary
In existing technologies, increasing the number or width of grid lines to reduce the series resistance of the battery can easily lead to a negative effect of parallel resistance, resulting in a decrease or deterioration in battery performance and making it difficult to improve the fill factor and battery efficiency.
By rationally setting the width and number of sub-gates and distributing them within a certain range, optimizing the balance between resistance and light shading, and designing reasonable edge gate lines and connection structures, the effective collection and transmission of current can be ensured.
This approach achieves a balance between the electrical and optical properties of the solar cells, improves current collection efficiency, reduces resistance loss, enhances the conversion efficiency and fill factor of the solar cells, and saves on silver paste usage, thereby reducing costs.
Smart Images

Figure CN224936018U_ABST
Abstract
Description
Technical Field
[0001] This disclosure relates to the field of photovoltaic cell technology, specifically to a solar cell and a photovoltaic module. Background Technology
[0002] A photovoltaic (PV) cell is a semiconductor device that directly converts solar energy into electrical energy through the photovoltaic effect. Its front side typically features metal electrodes (grid lines) consisting of a main grid and a sub-grid, used to collect photogenerated carriers and conduct current. The design of the electrode structure is one of the key factors affecting the cell's conversion efficiency; it requires achieving an optimal balance between reducing series resistance and minimizing the shading area of the grid lines.
[0003] In related technologies, increasing the number or width of grid lines is commonly used to reduce the series resistance of batteries. However, when the number of sub-grids is too large or too dense, it can trigger a "parallel resistance negative effect." That is, after exceeding the optimal collection range, the additional current collected by the newly added grid lines is negligible, but the resistance of these grid lines themselves and the contact resistance formed with the silicon wafer will be superimposed due to the parallel connection. This may cause the overall resistance to stop decreasing or even increase, ultimately preventing the battery's fill factor (FF) from improving or even causing it to deteriorate, thus affecting battery performance. Utility Model Content
[0004] The purpose of this disclosure is to provide a solar cell and a photovoltaic module that improves the performance of the solar cell by reasonably setting the grid line parameters, so as to at least partially solve the above-mentioned technical problems.
[0005] To achieve the above objectives, according to a first aspect of this disclosure, a solar cell is provided, wherein the light-receiving surface of the solar cell includes a sub-grid extending along a first direction of the solar cell, wherein the width of the sub-grid in a second direction of the solar cell is M mm, the number of sub-grids in the second direction is N, and the dimension of the solar cell in the second direction is W mm, wherein M, N, and W satisfy the following condition: (a) 0.5 ≤ N / W ≤ 1.2; (b) 0.018 < (M) N) / W<0.023.
[0006] In some possible implementations, the spacing S1 between two adjacent subgates is 1 mm to 2 mm.
[0007] In some possible implementations, the battery cell further includes circumferentially surrounding edge grid lines, the edge grid lines including a first edge grid line disposed on the light-receiving surface and a second edge grid line disposed on the backlight surface opposite to the light-receiving surface, wherein the distance L1 between the first edge grid line and the edge of the battery cell is less than the distance L2 between the second edge grid line and the edge of the battery cell.
[0008] In some possible implementations, the distance L1 between the first edge grid line and the edge of the battery cell satisfies: 0.5mm ≤ L1 < 1mm; and / or, The distance L2 between the second edge grid line and the edge of the battery cell satisfies: L2≥0.8mm.
[0009] In some possible implementations, on the backlight surface, the second edge grid line includes a first grid line portion parallel to the first direction and a second grid line portion parallel to the second direction, wherein the distance L3 between the second grid line portion and the edge of the battery cell in the first direction is greater than the distance L4 between the first grid line portion and the edge of the battery cell in the second direction.
[0010] In some possible implementations, the sub-gate overlaps the edge gate line in the first direction and extends a first preset distance LY1 toward the edge of the battery cell, the first preset distance LY1 satisfying: 0.02mm ≤ LY1 ≤ 0.05mm; and / or, The edge grid line includes a first grid line segment parallel to the first direction and a second grid line segment parallel to the second direction. A chamfer is provided at the connection between the first grid line segment and the second grid line segment. The first grid line segment protrudes beyond the second grid line segment in the first direction and overlaps the chamfer in the first direction, extending a second preset distance LY2 towards the edge of the battery cell. The second preset distance LY2 satisfies: 0.02mm ≤ LY2 ≤ 0.05mm; and / or, the chamfer overlaps the first grid line segment and extends a third preset distance LY3 towards the edge of the battery cell. The third preset distance LY3 satisfies: 0.02mm ≤ LY3 ≤ 0.05mm; and / or, The battery cell includes a harpoon, the harpoon line is connected to the sub-grid, the edge grid line overlaps the harpoon line and extends into the harpoon by a fourth preset distance LY4, the fourth preset distance LY4 satisfying: 0.05mm≤LY4≤0.08mm.
[0011] In some possible implementations, along the first direction, the sub-gate has a gate line edge portion and a gate line middle portion, the width of the gate line edge portion being greater than the width of the gate line middle portion; and / or, The battery cell includes a first edge region and a first middle region in the first direction, and the sub-gate has a higher density in the first edge region than in the first middle region.
[0012] In some possible implementations, at least a portion of the subgate is provided with a connecting solder joint, the connecting solder joint including a straight section parallel to the first direction, and a tapered section disposed at both ends of the straight section and gradually decreasing in width away from the straight section.
[0013] In some possible implementations, the straight section is used to connect with the solder strip, and along the first direction, the length of the straight section is greater than twice the width of the solder strip.
[0014] In some possible implementations, the length of the connection solder joint along the first direction is greater than 0.6 mm.
[0015] In some possible implementations, along the second direction, the battery cell includes a second edge region and a second intermediate region, wherein the distance L5 between two adjacent sub-gates located in the second intermediate region is greater than the distance L6 between two adjacent sub-gates located in the second edge region.
[0016] In some possible implementations, the aspect ratio of the subgate is greater than 0.35.
[0017] According to a second aspect of this disclosure, a photovoltaic module is provided, including the aforementioned solar cells.
[0018] In some possible implementations, the photovoltaic module further includes a plurality of solder strips spaced apart on the cell along the first direction, and the cell further includes an edge grid line arranged circumferentially around it, wherein in the first direction, the distance between the edge grid line and the adjacent solder strip is less than the distance between two adjacent solder strips.
[0019] In some possible implementations, the photovoltaic module includes a battery string comprising a plurality of sequentially connected cells, wherein the visible length of the harpoon of the cells is greater than 6 mm along the length of the battery string.
[0020] The above technical solution can limit the distribution density of the sub-grids within a certain range. By rationally setting the width and number of sub-grids, sufficient contact of the sub-grids can be ensured, reducing the contact resistance of the sub-grids and achieving an optimal balance between resistance and light shading, thereby improving battery performance. Specifically, it can disperse the sub-grids, shortening the current transmission path and reducing losses; and it can also prevent the number of sub-grids from becoming excessive, avoiding a rise in the overall resistance of the battery cell due to a high sub-grid distribution density.
[0021] Other features and advantages of this disclosure will be described in detail in the following detailed description section. Attached Figure Description
[0022] The accompanying drawings are provided to further illustrate the present disclosure and form part of the specification. They are used together with the following detailed description to explain the present disclosure, but do not constitute a limitation thereof. In the drawings: Figure 1 This is a schematic diagram of the structure of the light-receiving surface of the battery cell provided in an exemplary embodiment of this disclosure; Figure 2 This is a schematic diagram of the structure of the backlight surface of the battery cell provided in an exemplary embodiment of this disclosure; Figure 3 yes Figure 1 An enlarged schematic diagram of part A in the middle; Figure 4 yes Figure 3 An enlarged schematic diagram of part A1 in the middle; Figure 5 yes Figure 1 Enlarged schematic diagram of part B; Figure 6 yes Figure 1 An enlarged schematic diagram of section C; Figure 7 yes Figure 2 An enlarged schematic diagram of part D in the middle.
[0023] Explanation of reference numerals in the attached figures 10. Solar cell; 101. Light-receiving surface; 102. Backlighting surface; 103. First edge region; 104. First middle region; 105. Second edge region; 106. Second middle region; 1. Sub-gate; 11. Edge portion of gate line; 12. Middle portion of gate line; 2. Edge gate line; 21. First edge gate line; 22. Second edge gate line; 221. First gate line portion; 222. Second gate line portion; 23. First gate line segment; 24. Second gate line segment; 25. Chamfered portion; 3. Harpoon; 31. Harpoon line; 4. Connecting solder joint; 41. Straight section; 42. Tapered section. Detailed Implementation
[0024] The specific embodiments of this disclosure will be described in detail below with reference to the accompanying drawings. It should be understood that the specific embodiments described herein are for illustration and explanation only and are not intended to limit this disclosure.
[0025] In this disclosure, unless otherwise stated, "inner" and "outer" refer to the interior and exterior of the outline of the corresponding component; "far" and "near" refer to the distance of the corresponding component relative to another component in terms of spatial position. Furthermore, the terms "first," "second," etc., used in this disclosure are for distinguishing one element from another and do not have sequential or importance. When the following description relates to the accompanying drawings, unless otherwise indicated, the same numbers in different drawings represent the same or similar elements.
[0026] In related technologies, increasing the number or width of grid lines is commonly used to reduce the series resistance of batteries. However, the inventors discovered that when the number of sub-grids is too large or too dense, it can trigger a "parallel resistance negative effect." That is, after exceeding the optimal collection range, the additional current collected by the newly added grid lines is negligible, but the resistance of these grid lines themselves and the contact resistance formed with the silicon wafer will be superimposed due to the parallel connection. This may cause the overall resistance to stop decreasing or even increase, ultimately preventing the battery's fill factor (FF) from improving or even worsening, thus affecting battery performance.
[0027] Based on this, and in accordance with the first aspect of this disclosure, reference is made to... Figures 1 to 7 As shown, this disclosure provides a battery cell 10, which includes a light-receiving surface 101 and a backlighting surface 102 disposed opposite to each other. The light-receiving surface 101 includes sub-gates 1 extending along a first direction of the battery cell 10. The width of the sub-gates 1 in a second direction of the battery cell 10 is M mm, the number of sub-gates 1 in the second direction is N, and the size of the battery cell in the second direction is W mm. M, N, and W satisfy the following conditions: (a) 0.5 ≤ N / W ≤ 1.2; (b) 0.018 < (M / W) / W. N) / W<0.023.
[0028] Understandably, based on the simulation model of the impact of the width and number of sub-gates 1 on cell efficiency, the total width of the sub-gates 1 is set within a certain range to achieve a balance between the optical and electrical performance of the cell 10, thereby improving the performance of the cell 10. For example, 2000μm... <M N < 2500 μm, W = 106.7 mm.
[0029] The above technical solution can limit the distribution density of the sub-grids 1 within a certain range. By reasonably setting the width and number of the sub-grids 1, sufficient contact of the sub-grids 1 can be ensured, reducing the contact resistance of the sub-grids 1, achieving an optimal balance between resistance and light shading, and improving battery performance. Specifically, on the one hand, the sub-grids 1 can be dispersed, resulting in a shorter current transmission path and reduced losses; on the other hand, the number of sub-grids 1 can be kept from being excessive, avoiding a large distribution density of sub-grids 1 that would lead to an increase in the overall resistance of the battery cell 10.
[0030] Understandably, the gridless design of the solar cell 10 reduces light-blocking losses and increases the effective light-receiving area, thereby improving optical performance and ultimately enhancing the efficiency of the solar cell 10 and the optical components. Furthermore, it enables shorter current transmission paths and better current collection uniformity, reduces resistive losses, and improves electrical performance. Simultaneously, it saves on silver paste usage, reduces costs, and offers better aesthetics.
[0031] The sub-grid 1 extends along a first direction and is arranged along a second direction. The first direction can be the length direction of the battery cell 10, and the second direction can be the width direction of the battery cell 10. For example, the first direction can refer to... Figure 1 and Figure 2 The X direction is shown; the second direction can be referenced. Figure 1 and Figure 2 Y direction shown.
[0032] In some possible implementations, refer to Figure 3 As shown, the spacing S1 between two adjacent sub-grids 1 is 1mm to 2mm. This effectively reduces the series resistance of the cell 10, lowers electrical losses, and allows current to be collected more efficiently and easily, improving the fill factor (FF) and open-circuit voltage (Voc) of the cell. Simultaneously, the sub-grids 1 do not form a large area of light-blocking, thus avoiding the generation of more photogenerated carriers and directly increasing the short-circuit current (Isc) of the cell. Therefore, this spacing range achieves a better balance between optical and electrical benefits for the cell 10, improving its conversion efficiency.
[0033] In some possible implementations, refer to Figure 1 and Figure 2 As shown, the battery cell 10 also includes circumferentially surrounding edge grid lines 2, wherein the edge grid lines 2 include a first edge grid line 21 disposed on the light-receiving surface 101 and a second edge grid line 22 disposed on the backlight surface 102, as shown in the reference diagram. Figure 3 and Figure 7 As shown, the distance L1 between the first edge grid line 21 and the edge of the solar cell 10 is less than the distance L2 between the second edge grid line 22 and the edge of the solar cell 10. It is understood that the backlight surface 102 of the solar cell 10 needs to be insulated from the light-receiving surface 101, therefore a safety area needs to be reserved to prevent short circuits at the edge of the solar cell 10 and subsequent damage. Considering that the light-receiving surface 101 of the solar cell 10 receives light, this safety area is located on the backlight surface 102. Furthermore, the edge grid line 2 of the backlight surface 102 is positioned further away from the edge of the solar cell 10, which helps reduce leakage current paths through the edge, thereby helping to maintain a higher open-circuit voltage (Voc) and fill factor (FF), and improving the performance of the solar cell 10.
[0034] By appropriately setting the distance between the edge grid line 21 and the edge of the battery cell 10, the efficiency of the battery cell 10 can be improved. In some possible embodiments, the distance L1 between the first edge grid line 21 and the edge of the battery cell 10 satisfies: 0.5mm ≤ L1 < 1mm. Thus, by setting the distance L1 between the first edge grid line 21 and the edge of the battery cell 10 within the aforementioned reasonable range, the effective area of the light-receiving surface 101 of the battery cell 10 can be fully utilized, maximizing the light-receiving area. Furthermore, it can reduce the possibility that the edge grid line 2 cannot be printed onto the light-receiving surface 101 and the backlight surface 102 of the battery cell 10 due to printing errors, ensuring the normal function of the battery cell 10.
[0035] It is understandable that the distance between the first edge grid line 21 and the edge of the battery cell 10 is less than the distance between the second edge grid line 22 and the edge of the battery cell 10. The distance L2 between the second edge grid line 22 and the edge of the battery cell 10 satisfies: L2≥0.8mm. In this way, setting the aforementioned safety area on the backlight surface 102 can avoid affecting the light-receiving area of the light-receiving surface 101 of the battery cell 10 and ensure the efficiency of the battery cell 10.
[0036] For example, the distance L1 between the first edge grid line 21 and the edge of the battery cell 10 can be 0.55 mm, the distance L2 between the second edge grid line 22 and the edge of the battery cell 10 can be 0.8 mm, and the width of the safety area can be 0.3 mm. This disclosure is not limited thereto.
[0037] In some possible implementations, refer to Figure 7 As shown, on the backlight surface 102, the second edge grid line 22 includes a first grid line portion 221 parallel to the first direction and a second grid line portion 222 parallel to the second direction. The distance L3 between the second grid line portion 222 and the edge of the battery cell 10 in the first direction is greater than the distance L4 between the first grid line portion 221 and the edge of the battery cell 10 in the second direction.
[0038] Understandably, during the manufacturing process of the solar cell 10, especially in the screen printing stage, the deformation of the screen varies in different directions. The printing direction of the sub-grid 1 is parallel to the first direction, resulting in a larger deformation of the screen in this direction. Consequently, the positional deviation of the sub-grid 1 in the first direction is also greater. Therefore, setting a larger allowance in the extension direction of the sub-grid 1 helps ensure proper printing. Furthermore, the positional deviation in the arrangement direction of the sub-grid 1 is smaller. Therefore, setting a smaller allowance in the arrangement direction of the sub-grid 1 can improve the current collection efficiency at the edge of the solar cell 10.
[0039] In some possible implementations, refer to Figure 4 and Figure 7As shown, both the light-receiving surface 101 and the backlight surface 102 include a sub-grid 1 extending along a first direction of the solar cell 10. The sub-grid 1 overlaps with the edge grid line 2 in the first direction and extends a first preset distance LY1 toward the edge of the solar cell 10. The first preset distance LY1 satisfies: 0.02mm ≤ LY1 ≤ 0.05mm. It is understood that the sheet resistance of the edge region of the solar cell 10 is usually higher than that of the center region, resulting in poor current collection efficiency at the edge of the solar cell 10. In EL testing (detecting internal defects of the solar cell 10 through the principle of electroluminescence), black edges and black corners are prone to appear, which limits the improvement of the efficiency of the solar cell 10.
[0040] In this way, by connecting the sub-grid 1 and the edge grid line 2, the effective connection between the sub-grid 1 and the edge grid line 2 can be ensured, the effective collection of edge current can be ensured, the black edges and black corners of the cell 10 during the test can be reduced, and the efficiency of the cell 10 can be improved.
[0041] In addition, refer to Figure 3 and Figure 4 , Figure 7 As shown, the edge grid line 2 may include a first grid line segment 23 parallel to the first direction and a second grid line segment 24 parallel to the second direction. A chamfered portion 25 is provided at the connection between the first grid line segment 23 and the second grid line segment 24. This can achieve a smoother current transmission path, alleviate stress concentration at the corners, distribute the current density evenly, reduce the series resistance at the corners, and improve the fill factor and efficiency of the cell 10 to a certain extent.
[0042] The two ends of the second grid segment 24 can be bent inward to form a chamfer 25. The first grid segment 23 protrudes from the second grid segment 24 in the length direction. The first grid segment 23 overlaps with the chamfer 25 in a first direction and extends towards the edge of the solar cell 10 by a second preset distance LY2, which satisfies the condition: 0.02mm ≤ LY2 ≤ 0.05mm. Furthermore, the chamfer 25 overlaps with the first grid segment 23 and extends towards the edge of the solar cell 10 by a third preset distance LY3, which satisfies the condition: 0.02mm ≤ LY3 ≤ 0.05mm. Thus, the overlap of the first grid segment 23 and the second grid segment 24 ensures an effective connection between them, guaranteeing effective current collection and transmission, and improving the efficiency of the solar cell 10.
[0043] In some possible implementations, refer to Figure 5As shown, the solar cell 10 may include a harpoon 3, wherein the harpoon 3 includes a harpoon wire 31. The harpoon wire 31 is connected to the sub-grid 1, serving a similar function to the main grid for collecting current. It is understood that the edge grid wire 2 overlaps with the harpoon wire 31 and extends inwards towards the harpoon 3 by a fourth preset distance LY4, which satisfies the condition: 0.05mm ≤ LY4 ≤ 0.08mm. Thus, through the overlap between the edge grid wire 2 and the harpoon wire 31, the effective collection of current by the harpoon 3 can be ensured, improving the efficiency of the solar cell 10.
[0044] Understandably, the photogenerated carriers (currents) generated at the edge of the solar cell 10 are collected via a different path than those in the central region. They can only flow unidirectionally towards the sub-gate 1 inside the solar cell 10, resulting in a longer path and increased lateral transport resistance. These carriers are more likely to be lost due to recombination before reaching the sub-gate 1, thus reducing the current and fill factor of the solar cell 10.
[0045] Thus, in some possible implementations, refer to Figure 6 As shown, along the first direction, the sub-gate 1 may have a gate line edge portion 11 and a gate line middle portion 12, wherein the width of the gate line edge portion 11 is greater than the width of the gate line middle portion 12. This reduces the resistance of the gate line edge portion 11, optimizes the current path, and allows the collected current to be transmitted more efficiently, compensating for the current collection efficiency in the edge region and improving the performance of the solar cell 10.
[0046] Furthermore, the solar cell 10 may include a first edge region 103 and a first intermediate region 104 in a first direction, wherein the sub-gate 1 has a higher density in the first edge region 103 than in the first intermediate region 104. It is understood that, exemplarily, the first edge region 103 may include the area between the edge of the solar cell 10 and an adjacent solder joint, which can be used to connect solder strips. In the first direction, the first intermediate region 104 is disposed between the two first edge regions 103. This shortens the average distance that edge carriers travel to the nearest sub-gate 1, directly reducing the transmission resistance, increasing the current and fill factor of the solar cell 10, and thus directly improving the conversion efficiency.
[0047] Understandably, the welding quality between the solder strip and the battery sub-grid 1 directly affects the performance and lifespan of the module. If the welding point design is unreasonable, it is easy to cause incomplete welding due to misalignment during welding, or to detach the solder due to external force or vibration during module transportation, affecting the use of the module.
[0048] In some possible implementations, refer to Figure 5As shown, at least a portion of the sub-gate 1 is provided with connecting solder joints 4. The connecting solder joints 4 may include a straight section 41 parallel to the first direction, and a tapered section 42 located at both ends of the straight section 41, with its width gradually decreasing away from the straight section 41. In this way, the straight section 41 can be used to connect the solder strip, and the tapered section 42 can ensure the connection stability between the connecting solder joint 4 and the sub-gate 1, while also reducing the amount of silver paste used and lowering costs.
[0049] For example, along the first direction, the length of the connecting solder joint 4 is greater than 0.6 mm, and the length of the straight section 41 is greater than twice the width of the solder strip. It is understood that the connection between the solder strip and the battery cell 10 mainly relies on the connecting solder joint 4. Therefore, setting the length of the straight section 41 to be greater than twice the width of the solder strip ensures effective connection with the connecting solder joint 4 and the sub-grid 1, even if the solder strip is misaligned during welding due to equipment precision, thus ensuring the transmission of current.
[0050] In some embodiments, along the first direction, the length of the connecting solder joint 4 is greater than 1 mm, wherein the length of the straight section 41 is greater than twice the width of the solder strip used to connect to the connecting solder joint 4, and the two ends of the straight section 41 are respectively formed with tapered sections 42. While satisfying the welding reliability, the cost can also be reduced by reducing the amount of silver paste used.
[0051] In some possible implementations, refer to Figure 1 and Figure 5 As shown, along the second direction, the solar cell 10 may include a second edge region 105 and a second intermediate region 106. The distance between two adjacent sub-gates 1 located in the second intermediate region 106 is greater than the distance between two adjacent sub-gates 1 located in the second edge region 105. Exemplarily, the second edge region 105 may include the area between the edge of the solar cell 10 and the end of the harpoon 3 away from the edge of the solar cell 10 along the second direction. In the second direction, the second intermediate region 106 is disposed between the two second edge regions 105. This shortens the average distance for charge carriers in the second edge region 105 to reach the sub-gate 1, thereby significantly reducing the transmission resistance loss in this region, ensuring that the electrical energy generated at the edge of the solar cell 10 is efficiently collected, improving the current collection at the edge of the solar cell 10, and directly improving the fill factor and short-circuit current of the solar cell 10.
[0052] Furthermore, the central region of the solar cell 10 receives the strongest light and is the main area for current generation. Simultaneously, charge carriers can flow to the two side sub-gates 1, resulting in naturally higher collection efficiency. Therefore, appropriately increasing the spacing between the sub-gates 1 here, although slightly increasing electrical losses, can significantly reduce the light-blocking area of the sub-gates 1, thereby greatly increasing the photocurrent. This makes the sum of optical and electrical losses across the entire solar cell 10 smaller, thus improving the conversion efficiency of the solar cell 10.
[0053] In some possible implementations, the aspect ratio of the sub-gate 1 can be greater than 0.35, meaning the ratio of the height to the width of the sub-gate 1 is greater than 0.35. This larger aspect ratio allows for a reduction in the width of the sub-gate 1 while maintaining the same cross-sectional area (ensuring conductivity), thereby reducing shading losses, increasing short-circuit current, and improving the efficiency of the solar cell 10. Furthermore, the larger aspect ratio of the sub-gate 1 compensates for the loss of cross-sectional area due to the narrower width by increasing its height. Therefore, it achieves both a smaller width to reduce shading and a sufficiently large current throughput, significantly reducing the resistance of the sub-gate 1 itself, thereby improving the fill factor and overall efficiency of the cell.
[0054] According to a second aspect of this disclosure, a photovoltaic module is provided, including the aforementioned solar cell 10. This photovoltaic module possesses all the beneficial effects of the aforementioned solar cell 10, which will not be elaborated further herein.
[0055] In some possible implementations, the photovoltaic module may further include a plurality of solder strips spaced apart on the cell 10 along a first direction. The cell 10 includes circumferentially arranged edge grid lines 2. It is understood that the sheet resistance of the edge region of the cell 10 is generally higher than that of the central region, resulting in poor current collection efficiency at the edge of the cell 10. Therefore, in the first direction, the distance between the edge grid line 2 and the adjacent solder strip is smaller than the distance between two adjacent solder strips. This can improve the current collection effect at the edge of the cell 10. For example, the solder strips are soldered to the cell 10 along a second direction. In the first direction, the spacing between two adjacent solder strips is 8.5 mm, and the distance between the edge grid line 2 and the adjacent solder strip is less than 8.5 mm. For example, this distance can be 7.5 mm, but this disclosure is not limited thereto.
[0056] In some possible implementations, the photovoltaic module includes a cell string comprising multiple sequentially connected solar cells 10. Along the length of the cell string, the visible length of the fork 3 of the solar cell 10 is greater than 6 mm. This longer visible length means a longer connection area between the solder ribbon and the fork 3, providing greater connection force and electrical contact area. This ensures that after welding, the solder ribbon has a free dimension to resist external forces and vibrations during the transport of the cell string, reducing the possibility of solder joint detachment.
[0057] For example, two adjacent battery cells 10 can have a positive gap when connected, that is, there is a gap between the two battery cells 10, in which case the length of the harpoon 3 of both battery cells 10 is greater than 6mm. In addition, two adjacent battery cells 10 can also have a negative gap, that is, one battery cell 10 can cover the top of the other battery cell 10, in which case the visible length of the harpoon 3 of the lower battery cell 10 is greater than 6mm.
[0058] The preferred embodiments of this disclosure have been described in detail above with reference to the accompanying drawings. However, this disclosure is not limited to the specific details of the above embodiments. Within the scope of the technical concept of this disclosure, various simple modifications can be made to the technical solutions of this disclosure, and these simple modifications all fall within the protection scope of this disclosure.
[0059] It should also be noted that the various specific technical features described in the above specific embodiments can be combined in any suitable manner without contradiction. In order to avoid unnecessary repetition, this disclosure will not describe the various possible combinations separately.
[0060] Furthermore, various different embodiments of this disclosure can be combined in any way, as long as they do not violate the spirit of this disclosure, they should also be regarded as the content disclosed in this disclosure.
Claims
1. A battery cell, characterized in that, The light-receiving surface of the solar cell includes a sub-grid extending along a first direction of the solar cell. The width of the sub-grid in a second direction of the solar cell is M mm, the number of sub-grids in the second direction is N, and the dimension of the solar cell in the second direction is W mm. M, N, and W satisfy the following condition: (a) 0.5 ≤ N / W ≤ 1.2; (b)0.018<(M N) / W<0.023。 2. The battery cell according to claim 1, characterized in that, The spacing S1 between two adjacent sub-gates is 1mm to 2mm.
3. The battery cell according to claim 1, characterized in that, The battery cell also includes circumferentially surrounding edge grid lines. The edge grid lines include a first edge grid line disposed on the light-receiving surface and a second edge grid line disposed on the backlight surface opposite to the light-receiving surface. The distance L1 between the first edge grid line and the edge of the battery cell is less than the distance L2 between the second edge grid line and the edge of the battery cell.
4. The battery cell according to claim 3, characterized in that, The distance L1 between the first edge grid line and the edge of the battery cell satisfies: 0.5mm ≤ L1 < 1mm; and / or, The distance L2 between the second edge grid line and the edge of the battery cell satisfies: L2≥0.8mm.
5. The battery cell according to claim 3, characterized in that, On the backlight surface, the second edge grid line includes a first grid line portion parallel to the first direction and a second grid line portion parallel to the second direction. The distance L3 between the second grid line portion and the edge of the battery cell in the first direction is greater than the distance L4 between the first grid line portion and the edge of the battery cell in the second direction.
6. The battery cell according to claim 3, characterized in that, The sub-grid overlaps the edge grid line in the first direction and extends a first preset distance LY1 toward the edge of the battery cell, wherein the first preset distance LY1 satisfies: 0.02mm ≤ LY1 ≤ 0.05mm; and / or, The edge grid line includes a first grid line segment parallel to the first direction and a second grid line segment parallel to the second direction. A chamfer is provided at the connection between the first grid line segment and the second grid line segment. The first grid line segment protrudes beyond the second grid line segment in the first direction and overlaps the chamfer in the first direction, extending a second preset distance LY2 towards the edge of the battery cell. The second preset distance LY2 satisfies: 0.02mm ≤ LY2 ≤ 0.05mm; and / or, the chamfer overlaps the first grid line segment and extends a third preset distance LY3 towards the edge of the battery cell. The third preset distance LY3 satisfies: 0.02mm ≤ LY3 ≤ 0.05mm; and / or, The battery cell includes a harpoon, the harpoon line is connected to the sub-grid, the edge grid line overlaps the harpoon line and extends into the harpoon by a fourth preset distance LY4, the fourth preset distance LY4 satisfying: 0.05mm≤LY4≤0.08mm.
7. The battery cell according to claim 1, characterized in that, Along the first direction, the sub-gate has a gate line edge portion and a gate line middle portion, the width of the gate line edge portion being greater than the width of the gate line middle portion; and / or, The battery cell includes a first edge region and a first middle region in the first direction, and the sub-gate has a higher density in the first edge region than in the first middle region.
8. The battery cell according to claim 1, characterized in that, At least a portion of the sub-gate is provided with a connecting solder joint, the connecting solder joint including a straight section parallel to the first direction, and a tapered section located at both ends of the straight section and gradually decreasing in width away from the straight section.
9. The battery cell according to claim 8, characterized in that, The straight section is used to connect with the solder strip, and along the first direction, the length of the straight section is greater than twice the width of the solder strip.
10. The battery cell according to claim 8, characterized in that, Along the first direction, the length of the connecting solder joint is greater than 0.6 mm.
11. The battery cell according to claim 1, characterized in that, Along the second direction, the battery cell includes a second edge region and a second intermediate region, wherein the distance L5 between two adjacent sub-gates located in the second intermediate region is greater than the distance L6 between two adjacent sub-gates located in the second edge region.
12. The battery cell according to claim 1, characterized in that, The aspect ratio of the sub-gate is greater than 0.
35.
13. A photovoltaic module, characterized in that, Includes the battery cell described in any one of claims 1-12.
14. The photovoltaic module according to claim 13, characterized in that, The photovoltaic module further includes a plurality of solder strips spaced apart on the solar cell along the first direction. The solar cell also includes an edge grid line arranged circumferentially. In the first direction, the distance between the edge grid line and the adjacent solder strip is less than the distance between two adjacent solder strips.
15. The photovoltaic module according to claim 13, characterized in that, The photovoltaic module includes a battery string, which includes multiple battery cells connected in sequence. In the length direction of the battery string, the visible length of the battery cells is greater than 6mm.
