Test device, display device and method for checking the validity of display signals

Abstract

Test device (11) for testing the validity of display signals related to a predetermined image, with a device (28) for determining image data from the display signals, wherein a defined range of image data is determined from the display signals and wherein the state of an enable signal (42, 53) is evaluated to determine the image data, with a device (28) for determining a test value from the image data and with a comparator unit (27) for comparing the determined test value with a stored test value related to the image, wherein in the event that the two test values ​​match, a validity of the display signals is determined.

Description

State of the art

[0001] The invention is based on a test device, a display device, and a method for checking the validity of display signals. A method and device for checking signals of an LCD interface are already known from JP 09-288136 A Abstract. To check whether the display signal is correct, both the clock signal and the synchronization signals are measured and compared with stored values ​​for these control variables. If the stored values ​​match, the image signal is deemed to be valid. Disclosure of the invention

[0002] US 6 839 055 B1 discloses a system for providing an error indication of video data received from a first connection of a data interface between a computer system video controller and a display system, and for providing the error indication to the video controller from the display system via a second connection of the data interface. Such a system can be used to determine whether an error condition exists in the video data path between the video controller and the display system.

[0003] US 7 006 117 B1 discloses a test device that performs an analysis of received digital graphics data. The analysis results are sent back to a graphics device. Advantages of the invention

[0004] The test device according to the invention with the features of the independent claim has the advantage that only those data from the display signals are taken into account that are relevant to the image display as such. A check is advantageously carried out in a simple manner by generating a check value from this image data according to a given rule. The check value for the entire image data for an entire image to be displayed or for a defined sub-area of ​​an overall image must result in a check value that can be predetermined and stored for the image. This makes it possible to check the correctness of the displayed image itself. In this case, the check is not dependent on an evaluation of the additional control signals, but can evaluate the image content itself.By creating a check value for the entire data, for example through summation or a cyclic redundancy check, the computational effort can be kept very simple.

[0005] The measures listed in the dependent claims enable advantageous refinements and improvements of the test device specified in the independent claim. It is advantageous that the test device has an interface for transmitting at least one additional test value. This allows test values ​​for additional images to be tested to be transmitted to the test device.

[0006] In particular, a display device is advantageous which has a test device according to the invention. By providing such a test device in a display device, the correctness of image data of the display device can be checked in a simple manner and without great effort. This is particularly important in a safety-relevant environment in which the display device must always output correct image data. Furthermore, in particular in the case where image generation is carried out remotely from the display device, it can be easily enabled in this way to check the correctness of the transport of the display signals to the

[0007] The display device can be checked and thus also ensure that correct image data is output or, if not, that a user is warned. Accordingly, it is advantageous to provide an interface via which a respective test value of an image shown on the display can be transmitted to the test device so that the latter can compare the calculated test value with the transmitted test value.

[0008] To test a data connection between the graphics controller and the display, the test device advantageously accesses the data connection between the graphics controller and the display device, particularly on the side of the data connection assigned to the display. This makes it possible to easily detect, in particular, a data connection overload.

[0009] Furthermore, it is advantageous to provide a memory module in the display device in which at least one test value is stored, in order to easily provide a test value. For example, in an initialization mode of the display device, the stored test value can be directly used and compared with a test value, preferably a test value of a test image specified by the display device itself. Furthermore, if the image remains constant, a test value can be stored and compared with a subsequently determined test value for the same image content.

[0010] A display device according to the invention can be advantageously used in a motor vehicle, particularly to display driving-relevant data, because the inventive verification of the validity of the display signals ensures that a correct image is output on the display device. A driver can thus be reliably informed about the driving-relevant data of his vehicle.

[0011] Corresponding advantages result from a method according to the invention for checking the validity of display signals. The check value is advantageously calculated by taking into account the bit value of a pixel assigned to a clock pulse when calculating the check value.

[0012] It is advantageous to evaluate only those image data whose validity is determined by the enable signal. This ensures that the test value is generated only from valid image data.

[0013] A particularly reliable determination of the check value is achieved when polynomial division is included in the determination of the check value. One such method is the cyclic redundancy check (CRC). The CRC method can be applied continuously to the data stream of the image data signals.

[0014] Furthermore, it is advantageous to first determine and save a check value for a constant image, so that the check value calculation can be repeated the next time the same image is transmitted. If the image data is valid in both cases, the same check value must be obtained in each case. If this is not the case, the image data is invalid in at least one case. Short description of the drawings

[0015] Embodiments of the invention are illustrated in the drawings and explained in more detail in the following description.

[0016] They show: Fig. 1 a display device or test device according to the invention, Fig. 2 a test device according to the invention in detail, Fig. 3 a first representation of display signals for carrying out the method according to the invention, Fig. 4 shows a further embodiment of display signals for carrying out the method according to the invention, Fig. 5 an embodiment of a process sequence of the method according to the invention. Embodiments of the invention

[0017] The test device according to the invention can be used to test any display signals. In a first embodiment, it can be integrated into a display device to provide information about whether the display signal intended for the display is valid. If the signal is valid, it can be assumed that the display also represents a correct, expected image. Image errors based on the display signals can thus be ruled out. In a further embodiment, however, it is also possible to connect the test device merely to a source of display signals, for example an output of a graphics controller or a data line that generates the display signals from a graphics controller. An actually present display unit is then not required to check the validity of the display signals.In this way, both the function of the graphics controller and the function of the data transmission line for the display signals can be checked. The invention is explained below using the example of a display in a vehicle, in which the display signals are checked in accordance with the invention.

[0018] In this case, the term “display signal” should be understood to mean all of the signals that are output from a graphics controller to a display for image representation. The display signals are designed for direct reproduction by the display device itself. The display signals consist of both the image data content, which is present, for example, in an RGB data format, and control signals, such as a clock signal, a horizontal synchronization signal, a vertical synchronization signal and an enable signal. The term “image data” should be understood to mean a set of individual digital data values, each of which specifies image values ​​for individual pixels of a display. In RGB format, this would be a set of data that specifies a brightness value for each individual color. This image data is each digitally encoded.For example, a pixel is described by an RGB color value consisting of three times six bits.

[0019] In the Fig. 1 shows a display device 1 having a graphics unit 2 and a display unit 3. The graphics unit 2 has a graphics controller 4. In a first embodiment, the graphics controller 4 processes image information supplied to the graphics unit 2 via an input 5. In a further embodiment, the graphics unit 2 can also have a computing unit 6, which calculates display signals and forwards them to the graphics controller 4 for display. Furthermore, further control information can also be supplied to the graphics controller 4 via a connection 7 from a data bus 8.

[0020] The graphics controller 4 converts the corresponding image data into display signals for the display unit 3 according to corresponding specifications, adapted to the display unit 3. The display signals are adapted, for example, to the number of pixels, for example 800×600 pixels, of the display unit 3. The display signals are transmitted from the graphics controller 4 to the display unit 3 via a preferably multi-wire data line 9. In the display unit 3, the display signals are converted directly into the display 10. The display 10 is embodied, for example, as a liquid crystal display. According to the control signals, the image data is written line by line into the display matrix of the liquid crystal display. The line break or image break is carried out via the control data. The writing of the image data is controlled by a clock signal, which is also transmitted via the data connection 9.In one embodiment, it is possible, for example, to implement the data connection 9 as an LVDS interface. If errors occur, for example, due to an overload of the LVDS interface, these can be detected using a test device according to the invention.

[0021] Within the display device, a test device 11 is connected in a first embodiment between an input 12 of the display unit 3 and the display 10. The test device 11 checks the validity of the display signals that are sent to the display unit 3 via the input 12. In a first embodiment, the test device 11 performs this check automatically when the display device 1 is switched on. In another embodiment, a corresponding request can also be sent to the display unit 3 via the data bus 8 via a connection 13 of the display device. Furthermore, it is also possible to transmit a test value for the image that the graphics controller 4 is currently outputting to the display unit 3 to the test device 11 via the data bus 8 and the connection 13.

[0022] In a first embodiment, the display signals are always passed through the test device 11. In another embodiment, the test device 11 taps the signals from the connection between the input 12 and the display 10, so that the display signals are passed directly from the input 12 to the display 10 along the dashed line 14.

[0023] The result of the validity check is output by the test device 11. In the embodiment shown, the output is via connection 13 on the data bus 8. The test result is thus available both for the graphics unit 2 and for other devices connected to the data bus 8. If, for example, the display is not functioning or no longer functions properly, a warning device connected to the data bus 8, such as an acoustic signal generator, can output a warning signal to a user of the display.

[0024] In one embodiment, the test device 11 can be arranged, for example, on a central display of a vehicle to which image information or control signals are supplied from various image sources.

[0025] The display in the vehicle can have a connection via which the test device 11 can be connected, for example, during production in the factory or in the workshop. Furthermore, the test device 11 can also be integrated into the display in the vehicle.

[0026] In the Fig. 2 shows the operation of the test device 11 in detail. The test device 11, which is implemented, for example, as an FPGA, has a control unit 20 to which the horizontal synchronization signal is supplied via a first input 21, the vertical synchronization signal via a second input 22, and the enable signal via a third input 23. Furthermore, the control unit 20 has a fourth input 24, which is controlled, for example, from the data bus 8 via the connection 13 of the display unit 3. The start of a test can be initiated via the fourth input 24. In a first embodiment, the test device 11 has a memory 25 in which at least one test value is stored for checking the validity of the display signals. In another embodiment, at least one further test value can be stored in the memory 25 via a fifth input 26.The test value stored in memory 25 is read by a comparator unit 27. In a further embodiment, a test value can also be forwarded directly to a comparator unit 27 via the fifth input 26. The fifth input 26 can be implemented, for example, as a UART, an SBI, or an I2C interface.

[0027] In a further embodiment, only a test value of an image can be calculated and stored in a first step. If the same image is transmitted immediately afterwards, continuously, or at a later time, the test value determination is repeated. If the subsequently calculated and stored test value do not match, at least in one case, valid data was not present.

[0028] Alternatively or additionally, in a further embodiment, the memory 25 can also be designed to store image data of one or more test images, which can be read out for determining test values.

[0029] The test device 11 also has a computing unit 28, which is used to calculate the test value. For this purpose, the image data is fed to the computing unit 28 via an input 29. Furthermore, the clock signal is also transmitted to the computing unit 28 via an input 30. The image data is, for example, RGB data with a color depth of 16, 18, or even 24 bits. According to a clock signal, the RGB data of a pixel is read out by the computing unit 28. However, the data present via input 29 is only read out if a start signal is issued by the control unit 20 via an interface 31. In addition, reading out the data also requires a set enable signal, which is passed via an interface 32 from the third input 23 via the control unit 20 to the computing unit 28.As long as the enable signal is set, image data in the computing unit 28 is included in the test value calculation according to a predetermined rule. Once image transmission is complete, at the latest when the vertical synchronization signal 22 is set, a stop signal is output from the control unit 20 to the computing unit 28 via an interface 33. The stop signal is also sent accordingly to the comparator unit 27. The comparator unit 27 now reads the calculated test value from the computing unit 28. It compares this value with the value stored in the memory 25. If both values ​​match, a corresponding signal is output via an output 34 of the test device 11. If the two values ​​do not match, an error signal is output. In the simplest way, the signal at output 34 can be set to "high" or "low" accordingly.

[0030] In a first simple embodiment, the bit values ​​can be added together as a rule for determining the check value. In one embodiment, a simple summation of the transmitted data is possible. For this purpose, the data stream is broken down into packets of a predetermined length, for example 18 bits, and the individual data records created thereby are added together. To achieve greater security, however, more complex rules are used to determine the check value. For example, it is possible to additionally multiply the individual data blocks created by breaking down the data stream by a fixed number and then add them together. Particularly reliable detection is achieved by using a cyclic redundancy check, in which polynomial division is performed instead of simple addition.Here, the incoming data is divided by a specified polynomial, and the remainder of the division is considered the check value. One such method is the CRC32 check algorithm, which can also be applied to a data stream—in this case, a data stream of valid image data.

[0031] In principle, any image can be used for such a test. However, it is advantageous to provide a predefined test image for a specific display, which is stored, for example, in the display device. By prompting the system to perform a test, the system can thus test itself without the display itself having to be commissioned. Furthermore, no dedicated video input or output is required, as the test can be easily integrated into the display device itself.

[0032] To detect specific errors, such as transmission errors caused by a poor power supply, special test patterns can also be used. For example, test patterns with vertical white and black lines can reveal errors, whereas standard test patterns that simply show RGB color gradients do not reveal errors in such cases. To reliably determine the functionality of the display device, not just a single test pattern is run, but a sequence of specially provided test patterns is run to verify the functionality of the display device under various load conditions.

[0033] In the Fig. Figure 3 shows an exemplary embodiment of signals during testing by the test device. A first signal 41 is a regular clock signal that specifies the readout clock for the image data. The second signal 42 is the enable signal. While it is set to "low," the data is not included in the test value; when it is set to "high," the corresponding image data, namely the digital values ​​for each transmitted pixel represented in the third signal 43, are included in the test value calculation in accordance with the specified test specification. A calculation thus takes place between the first time 44 and the second time 45. Any subsequent or previous image data that may have been transmitted are not included in the test value determination.

[0034] In the Fig. 4 shows a further embodiment in which the readout is further refined. The clock signal is again shown in the first line 51. The vertical synchronization signal is shown in the second line 52, and the horizontal synchronization signal in the fourth line 54. The third line 53 also denotes the enable signal here. The sixth line 56 shows the start signal, which initially resets the counter and subsequently enables calculation of the test value. The seventh line shows the stop signal 47, which stops the calculation of the test value. In the present case, however, image data is only included if the VSYNC signal, the enable signal, and the HSYNC signal are set. Thus, data is not constantly included in the test value calculation between the first time 58 and the second time 59, but only when these three conditions are met.This ensures that all the useful image data, and preferably only this data, is captured from the display signals and supplied to the test value. After the stop signal is reset at the third time 60, the next image can be transmitted.

[0035] In the embodiment shown here, all of the image data of an image content is captured. However, in another embodiment, it is also possible to define a specific section of the image, for example the top left corner of the image with a pixel frame of 100×200 pixels, or even an image section in the center of the image. This allows the validity check to be restricted to a smaller sub-area of ​​the image that, for example, has a particularly dynamic image or a particularly high relevance with regard to the displayed content. A corresponding control signal would have to be provided by the control unit so that a respective pixel is checked to determine whether it is contained in the target area to be checked and is therefore included in the test value calculation or not.

[0036] Although the clock signal 51 is not directly monitored, errors in the clock signal can also be detected. If a clock signal fails or is not synchronized with the transmitted image signals, this also leads to an error in the generation of the test value, since a value is then either included twice or not included at all in the test value. Thus, errors in the clock signal can also be detected indirectly, as such an error also leads to an incorrect test value.

[0037] In the Fig.5 shows a sequence of the method according to the invention for checking validity. Starting from an initialization step 70, a check of subsequent display signals is initiated. In this case, a counter for the check value from the image data is set to zero. In a first check step 71, a check is carried out to determine whether all conditions for the possible presence of valid image data are met. For example, the presence of the enable signal and the correct state of the synchronization signals are checked. If no corresponding prerequisites are met, it can be assumed that no valid image data is present at input 29 of the test device 11. In this case, the program branches back and the first test step 71 is performed again. If, on the other hand, all prerequisites for valid image data are met, the program branches off to an acquisition step 72.The corresponding image data present at input 29 are added to the test value according to the given specification, for example, additively. The program then branches to a second test step 73. In the second test step 73, it is checked whether the entire specified image frame has been processed. If this is not the case, the program branches back to the acquisition step 72 and the next image data set specified by the clock signal is read out and included in the test value calculation. Once the end of the specified image frame is reached, the program branches to the comparison step 74, in which the comparator unit 27 compares the calculated test value with the specified test value. The program then branches to a third test step 75.If both values ​​match, valid image data is present, and the process branches to a final step 76, in which the validity is confirmed and a corresponding signal is output by the test device 11. If the calculated test value does not match the stored test value, the process branches to a final step 77, in which, however, an error signal is output by the test device 11.

Claims

[1] Test device (11) for testing the validity of display signals related to a predetermined image, with a device (28) for determining image data from the display signals, wherein a defined range of image data is determined from the display signals and wherein the state of an enable signal (42, 53) is evaluated to determine the image data, with a device (28) for determining a test value from the image data and with a comparator unit (27) for comparing the determined test value with a stored test value related to the image, wherein in the event that the two test values ​​match, a validity of the display signals is determined. [2] Test device according to claim 1, characterized by an interface (26) for transmitting test values ​​related to further images. [3] Display device with a display for image representation, with a graphics controller (4) for generating display signals which serve to generate an image in the display (10), characterized by a test device (11) according to one of the preceding claims. [4] Display device according to claim 3, characterized by an interface (13) for transmitting a respective test value to the test device (11) which is related to the image represented by output display signals. [5] Display device according to one of claims 3-4, characterized by a data connection (9) between the graphics controller and the display (10) such that the test device (11) accesses the display signals between the data connection (9) and the display (10). [6] Display device according to one of claims 3-5, characterized by a memory (25) in which image data of at least one test image and / or at least one test value are stored. [7] Use of a display device (1) according to one of claims 3-6 for displaying information in a motor vehicle. [8] Method for checking the validity of display signals, wherein the display signals are generated from image data of a given image, wherein a defined range of image data is determined from the display signals, wherein a test value is formed from the determined image data, wherein the determined test value is compared with a stored test value for the corresponding image and wherein a validity of the display signals is only determined if the determined and the stored test value match, characterized by that the state of an enable signal (42, 53) is evaluated to determine the image data. [9] Method according to claim 8, characterized bythat when forming the test value, bit values ​​from display signals assigned to a clock (41, 51) are each added to a test value. [10] Method claim 8, characterized by that the formation of the test value involves polynomial division. [11] Method according to one of claims 8-10, characterized by that the stored test value is determined from acquired image data of the given image.

Images