Light sensor with vertical diode junctions

Abstract

A light sensor (100), comprising: a substrate (102) with dopant of a first conductivity type; a diffusion region (106) formed in the substrate (102), the diffusion region (106) having dopant of a second conductivity type; a plurality of first groups of trenches (104), each comprising a plurality of trenches (104) formed in the diffusion region (106) that extend entirely along a first axis aligned parallel to a surface of the substrate (102);a plurality of second groups of trenches (104), each comprising a plurality of trenches (104) formed in the diffusion region (106) extending entirely along a second axis oriented parallel to a surface of the substrate (102), the first axis being oriented perpendicular to the second axis, the first groups of trenches (104) being adjacent to the second groups of trenches (104), and the plurality of second groups of trenches (104) not overlapping the plurality of first groups of trenches (104);wherein the diffusion region (106) occupies the entire space of the substrate (102) between the trenches (104) of a corresponding group of trenches (104), wherein a pn junction (108) is formed between the dopant of the first conductivity type and the dopant of the second conductivity type, wherein the diffusion region (106) is configured to create a depletion region (112) adjacent to the pn junction (108), wherein the depletion region (112) extends beyond a depth and length of the corresponding group of trenches (104) and creates an electric field to absorb electron-hole pairs generated by light in the infrared spectrum;

Description

BackgroundElectronic devices, such as smart phones, tablet computers, digital media players, and so forth, increasingly use light sensors to control the actuation of a variety of functions provided to the device. For example, light sensors may be used by an electronic device to sense ambient lighting conditions to control the brightness of the display screen of the device. Typical light sensors use photodetectors, such as photodiodes, phototransistors, or the like, that convert received light into an electrical signal (e.g., a current or voltage). Corresponding light sensors are disclosed, for example, in the documents US 2011 / 0 309 240 A1, US 2009 / 0 116 029 A1 and U.S. Pat. No. 3,969,746 A. US 2011 / 0 309 240 A1 discloses a light sensor with differently structured subpixels, so that the subpixels are sensitive to different polarization states of the incident light. US 2009 / 0 116 029 A1 discloses a device for wavelength-selective image measurement. The device comprises a substrate on which microperiodic irregular lattice structures are arranged. These structures include a plurality of microscopic element regions having varying lattice shapes and periods. The alternating arrangement of materials with high and low refractive indices produces a wavelength filter with a photonic crystal structure. U.S. Pat. No. 3,969,746 A discloses a solar cell in which parallel grooves are selectively produced in a monocrystalline silicon body by an orientation-dependent etching process. Dopants of a conductivity type opposite to silicon are inserted into the grooves to produce PN junctions.SummaryLight sensors are described that include an integrated trench structure. In an embodiment, the light sensor includes a substrate including a dopant of a first conductivity type. The light sensor also includes a diffusion region formed in the substrate. The diffusion region contains a dopant of a second conductivity type. A plurality of first groups of trenches are provided, each comprising a plurality of trenches formed in the diffusion region, which extend completely along a first axis oriented parallel to a surface of the substrate. In addition, the light sensor comprises a plurality of second groups of trenches, each comprising a plurality of trenches formed in the diffusion region, which extend completely along a second axis oriented parallel to a surface of the substrate, wherein the first axis is oriented perpendicular to the second axis, wherein the first groups of trenches are adjacent to the second groups of trenches, and wherein the plurality of second groups of trenches do not overlap with the plurality of first groups of trenches. The diffusion region occupies the complete space of the substrate between the trenches of a corresponding group of trenches, wherein a p-n junction is formed between the dopant of the first conductivity type and the dopant of the second conductivity type. The diffusion region is configured to create a depletion region adjacent the p-n junction, the depletion region extending beyond a depth and length of the corresponding group of trenches and generating an electric field to absorb electron-hole pairs generated by light in the infrared spectrum.Brief Description of the DrawingsThe detailed description will be made with reference to the accompanying drawings. In the figures, the leftmost position of the reference numeral denotes the figure in which the reference numeral appears first. The use of the same reference numerals at different locations in the specification and figures may indicate similar or identical elements. FIG. 1-1 is a partial schematic sectional view illustrating an embodiment of a light sensor according to an exemplary embodiment of the present disclosure, the light sensor including a plurality of trenches having a diffusion region formed around the trenches to cause generation of a depletion region proximate to the trenches. FIG. 1-2 is a schematic top view of an embodiment of the light sensor shown in FIGS. 1-1, according to another exemplary embodiment of the present disclosure, wherein the light sensor includes a plurality of trench regions and each trench region includes a subgroup of trenches. FIG. 2 is a flow diagram illustrating a method in an example embodiment for manufacturing light sensors having a trench formed therein, such as the sensors shown in FIGS. 1-1 and 1-2. FIGS. 3-6 are schematic partial cross-sectional views illustrating the fabrication of a light sensor, such as the light sensor shown in FIGS. 1-1 and 1-2, in accordance with the method shown in FIG. 2.Detailed DescriptionOverviewIncreasingly, gesture sensing by electronic devices is used to sense user input for various applications associated with the electronic device. Such electronic devices typically include light sensor arrays that use a number of photodetectors to improve the range and function (e.g., spurious rejection) of gesture sensing. These sensor arrangements may also provide limited tracking and sensing of complicated gestures (e.g., from gestures in and out, diagonal swipe gestures, and so forth). In addition, these electronic devices use illumination sources, such as IR light sources, for emitting light. The emitted light may be reflected from an object in the vicinity of the electronic device, and the reflected light is detected by the photodetectors.Light sensors are described that include a trench structure integrated therein. In an embodiment, the light sensor includes a substrate having a dopant of a first conductivity type and multiple trenches disposed therein. For example, the substrate may comprise a P --- doped substrate. In some embodiments, a first subset of trenches may be at least substantially adjacent to a second subset of trenches. The light sensor also includes a diffusion region formed proximate to the trenches. The diffusion region contains a dopant of a second conductivity type. For example, the diffusion region may comprise an N +- doped diffusion region. A depletion region is formed at the interface of the dopant of the first conductivity type and the dopant of the second conductivity type. The depletion region is configured to attract charge carriers to the depletion region, at least substantially a majority of the charge carriers generated due to light incident on the substrate. By using a plurality of trenches, the density of depletion regions can be improved. In addition, by including depletion regions around the trenches, light, such as infrared light, that generates charge carriers deeper in the substrate (e.g., charge carriers deeper than two micrometers (2 μm or more)) can be detected using the deeper trench regions.Example Light SensorFIGS. 1-1 and 1-2 illustrate an example light sensor 100 (e.g., a photodetector) according to example embodiments of the present disclosure. As shown, the light sensor 100 includes a substrate 102. The substrate 102 includes a base material used to form one or more integrated circuit devices with various semiconductor fabrication techniques such as photolithography, ion implantation, deposition, etching, and so forth. In one or more embodiments, the substrate 102 includes a portion of a silicon wafer that may be configured in a variety of ways. For example, the substrate 102 may include a portion of an n-type silicon wafer or a portion of a p-type silicon wafer. In one embodiment, the substrate 102 may include Group V elements (e.g., phosphorus, arsenic, antimony, etc.) capable of providing n-type charge carrier elements. In another embodiment, the substrate 102 may include Group IIIA elements (e.g., boron, etc.) suitable for providing p-type charge carrier elements. In a particular embodiment, the substrate 102 includes a P —- region. However, it is contemplated that other conductivity types may be used, such as a P -- region, a P-region, or the like.The substrate 102 includes a plurality of trenches 104 formed therein. In embodiments, the trenches 104 may be elongated trenches. The trenches 104 have a depth of about twenty micrometers (20 μm) or more. For example, the depths of the trenches 104 may range from about twenty micrometers (20 μm) to about forty micrometers (40 μm). In a particular embodiment, the width of each trench 104 may be about five hundred nanometers (500 nm) or less, and the depth of each trench 104 may be about thirty micrometers (30 μm). The spacing of the trenches 104 may be about eight hundred nanometers (800 nm), or less in some arrangements. The length of the trenches may be two micrometers (2 μm) to twenty micrometers (20 μm). In one or more embodiments, the trenches 104 may have an aspect ratio of about fifty to one (50:1) to about one hundred fifty to one (150:1).The trenches 104 allow a subsequent N +- diffusion region 106 (e.g., a portion of the substrate 102 enclosing the trenches 104 is formed from the N +- diffusion region 106) proximate to (e.g., surrounding) the trenches 104. The N +- diffusion region 106 is disposed within the P —- region of the substrate 102 (see FIG. 1 ). In a particular embodiment, the P —- region of the substrate 102 may be doped with 1×10 19 atoms per square centimeter to allow for a larger depletion region (e.g., as compared to a depletion region created by a P -- or a P region). The N +- diffusion region 106 may be doped with more than 1×10 19atoms per square centimeter to achieve a suitable doping profile for high aspect ratio trenches. Thus, a p-n barrier layer 108 is formed at the interface 110 of the region 102 and the region 106. The p-n junction 108 serves to cause the generation of a depletion region 112 proximate the trenches 104. In a particular embodiment, the depletion region 112 is an elongated depletion region 112. Additionally, the depletion region 112 may extend beyond the depth of the trenches 104. The depletion region 112 causes generation of an electric field due to exchange of charge carriers between the P —- region 102 and the N +- diffusion region 106 (which in turn leaves charged ions in the regions 102, 106, respectively, and causes generation of the electric field). As described in more detail herein, the depletion region 112 is used to absorb (e.g., intercept) electron-hole pairs generated by light incident on the substrate 102.The depth of the trenches 104 allows absorption of light occurring in the infrared light spectrum. For example, light occurring at about nine hundred fifty nanometers (e.g., light having a wavelength value at about nine hundred fifty nanometers) will penetrate further into the substrate 102 compared to light occurring at less than nine hundred fifty nanometers. (For example, light continues to enter the substrate 102 before causing generation of an electron-hole pair.) Thus, electron-hole pairs are generated deeper (e.g., further) in the substrate 102 by the light occurring at the value of nine hundred fifty nanometers compared to electron-hole pairs generated by light occurring at values less than nine hundred fifty nanometers. (For example, light occurring within the visible spectrum causes electron-hole pairs to be generated within the substrate 102 at a shallower depth compared to light occurring in the infrared spectrum.) Due to the extended depth of the trenches 104, the depletion region 112 formed around the trenches 104 may absorb or trap electrons generated due to light that occurred in the infrared spectrum. Thus, the electric field generated due to the presence of the depletion region 112 during the operation of the light sensor 100 attracts the generated charge carriers to the depletion region 112, which may increase the amount of charge carriers in the depletion region 112 (and cause an increase in current).As shown, the trenches 104 may include one or more layers 114. The layers 114 may comprise a variety of materials. In an embodiment, the layers 114 may include an optically transparent layer (e.g., a layer configured to be transparent to light occurring within wavelengths of interest). For example, the optically transparent layer 114 may include an n-doped polysilicon layer providing an electrical connection (e.g., a terminal). In another embodiment, the layer 114 may comprise (an) insulation layer(s). For example, the insulation layers may comprise a silicon dioxide (SiO 2) layer.As shown in FIGS. 1-2, the light sensor 100 includes a plurality of trench regions 116. Each trench region 116 (e.g., a subset of trenches 104) includes a plurality of trenches 104 formed in the substrate 102. As shown, the trenches 104 of a respective trench region 116 are at least substantially parallel to one another within the trench region 116. For example, the substrate 102 includes a first trench region 116- 1 and a second trench region 116- 2. The trenches 104 of the first trench region 116- 1 are at least substantially parallel to the other trenches 104 of the first trench region 116- 1, and the trenches 104 formed in the second trench region 116- 2 are at least substantially parallel to the other trenches 104 of the second trench region 116- 2.The trenches 104 of a trench region 116 are at least substantially perpendicular to the trenches 104 of the adjacent trench regions 116. For example, the trenches 104 of the first trench region 116- 1 are at least substantially perpendicular to the trenches 104 of the second trench region 116- 2. Thus, the trenches 104 of each respective trench region 116 are at least substantially perpendicular to the trenches 104 of the adjacent trench regions 116 (i.e., adjacent in the x and y directions). For example, as shown in FIGS. 1-2, the light sensor 100 includes alternating vertical trench regions 116. The perpendicular orientation of the trenches 104 in adjacent trench regions 116 may provide for facilitating stress management and gesture recognition (e.g., light recognition) of at least about ninety degrees (90°) with respect to the surface of the light sensor 100. In some cases, the perpendicular orientation may reduce wafer bending and buckling. Thus, a greater percentage of the substrate 102 may be used for other integrated components, such as integrated circuit devices, capacitors, and so forth. In addition, the alignment of the trench regions 116 may increase the sensitivity of the light sensor 100 compared to a light sensor having trenches aligned parallel to each other. For example, the orientation of the first trench region 116- 1 may detect a greater amount of light incident on the light sensor 100 from a first direction than the second trench region 116- 2 detects. In another example, the orientation of the first trench region 116- 2 may detect a greater amount of light incident on the light sensor 100 from a second direction (e.g., a direction other than the first direction) than the first trench region 116- 1 detects.Exemplary Manufacturing MethodsFIG. 2 illustrates an example method 200 that uses semiconductor processing techniques to fabricate light sensors having a trench structure integrated therein, such as light sensor 100 shown in FIGS. 1-1 through 1-2. FIGS. 3-6 illustrate the formation of example light sensors 500 in an example semiconductor wafer 302. As shown in FIG. 2, a hard mask layer is formed over a semiconductor wafer (block 202). In an embodiment, as shown in FIG. 3, the wafer 302 includes a dopant material of a first conductivity type. For example, wafer 302 is a P —- semiconductor wafer. (For example, the wafer P is —- doped). A hard mask layer 304 is formed (e.g., deposited) over a surface 306 of the wafer 302. In an embodiment, the thickness of the hard mask layer 304 may be in the range of about two micrometers (2 μm) to about six micrometers (6 μm). The hard mask layer 304 may be an oxide layer or the like.A plurality of trench regions are formed in the semiconductor wafer (block 204). More specifically, a plurality of trenches are formed that define the trench regions (block 206). As described above with respect to FIGS. 1-1 and 1-2, multiple trench regions (e.g., trench regions 116 shown in FIGS. 1-2 ) are formed in the semiconductor wafer 302 by forming at least one trench 308 in the trench regions. Thus, multiple trenches 308 are formed in the semiconductor wafer to form and / or define the trench regions. Suitable i-line or deep ultraviolet lithography techniques may be used to form the plurality of trenches 308 (see FIG. 4 ). For example, the hard mask layer 304 may receive a pattern (e.g., depositing a photoresist over the hard mask layer and patterning the photoresist) and be etched (e.g., using a reactive ion depth etch technique) to form the trenches 308. The thickness of the hard mask layer 304 helps to allow the formation of trenches 308 having a depth in the range of about twenty micrometers (20 μm) to about forty micrometers (40 μm). In a particular embodiment, a suitable Bosch etch technique may be used to etch the wafer 302 to form the trenches 308. As described above, the trenches 308 of a respective capacitor region (e.g., subgrouping of trenches 308) are at least substantially perpendicular to the trenches 308 of the adjacent capacitor region.Once the trench regions and the trenches are formed, an N +- diffusion region is formed proximate the trenches (block 208) such that the trenches are at least substantially encapsulated by the N +- diffusion region. As shown in FIG. 5, the trench sidewalls 310 are subjected to diffusion deposition to form a second conductivity type dopant diffusion region 312. For example, the diffusion region 312 is an N +- diffusion region 312 proximate (e.g., adjacent) to the trenches 308. In an embodiment, the N +- diffusion deposition is performed prior to the removal of the hard mask layer 304 to allow the N +- diffusion region 312 to self-align with the trenches 308. The N +- diffusion region 312 may also provide capacitor-to-capacitor block separation. In one embodiment, the N +- diffusion doping concentration is greater than 1×10 19atoms per square centimeter. Forming the N +- diffusion region 312 serves to create the p-n barrier layer 314 in the wafer 302. The p-n junction 314 causes the generation of a depletion region 316 that extends at least substantially to the depth of the trenches 308. In some embodiments, the depletion region 316 extends beyond the depth of the trenches 308. Additionally, in one embodiment, a phosphoryl chloride (POCl 3-) doping step may be performed at less than nine hundred degrees Celsius (<900 ° C.), which may slow the reaction kinetics so that the sidewall and bottom of the trenches 308 are at least substantially uniformly doped. For example, the temperature of the doping process may range from at least about eight hundred seventy five degrees Celsius (875 ° C.) to at least about achthundertfünfundneunzig degrees Celsius (895° C.). In another example, the temperature of the doping process may be in the range of at least about eight hundred eighty degrees Celsius (880 ° C.) to at least about eight hundred ninety degrees Celsius (890 ° C.).An isolation layer is formed over the semiconductor wafer (block 210). As shown in FIG. 6, a layer 318 is formed over the surface 306 of the wafer 302. The layer 318 may be a doped polysilicon layer for making an electrical contact, an isolation layer (e.g., a silicon dioxide (SiO 2)) layer, or the like.

Claims

A light sensor (100) comprising: a substrate (102) including dopant of a first conductivity type; a diffusion region (106) formed in the substrate (102), the diffusion region (106) including dopant of a second conductivity type; a plurality of first groups of trenches (104) each including a plurality of trenches (104) formed in the diffusion region (106) that extend entirely along a first axis oriented parallel to a surface of the substrate (102); a plurality of second groups of trenches (104) each comprising a plurality of trenches (104) formed in the diffusion region (106) that extend fully along a second axis oriented parallel to a surface of the substrate (102), wherein the first axis is oriented perpendicular to the second axis, wherein the first groups of trenches (104) are adjacent to the second groups of trenches (104), and wherein the plurality of second groups of trenches (104) do not overlap with the plurality of first groups of trenches (104); wherein the diffusion region (106) occupies the complete space of the substrate (102) between the trenches (104) of a corresponding group of trenches (104), wherein a p-n junction (108) is formed between the dopant of the first conductivity type and the dopant of the second conductivity type, wherein the diffusion region (106) is formed to produce a depletion region (112) adjacent to the p-n junction (108), wherein the depletion region (112) extends beyond a depth and length of the corresponding group of trenches (104) and generates an electric field to absorb electron-hole pairs produced by light in the infrared spectrum.The light sensor (100) of claim 1, wherein the trenches (104) have an aspect ratio in the range of about fifty to one to about one hundred fifty to one.The light sensor (100) of claim 1, wherein the depth of the trenches (104) is at least about twenty micrometers.The light sensor (100) of claim 1, wherein dopant of the first conductivity type comprises a P —- material and the dopant of the second conductivity type comprises an N +- material.A light sensor (100) comprising: a substrate (102) comprising a P —- dopant; a diffusion region (106), the diffusion region (106) comprising N +- dopant; a plurality of first groups of trenches (104) each comprising at least four trenches (104) formed in the diffusion region (106) that extend entirely along a first axis oriented parallel to a surface of the substrate (102); a plurality of second groups of trenches (104) each comprising at least four trenches (104) formed in the diffusion region (106) and extending fully along a second axis oriented parallel to a surface of the substrate (102), wherein the first axis is oriented perpendicular to the second axis, wherein the first groups of trenches (104) are adjacent to the second groups of trenches (104), and wherein the plurality of second groups of trenches (104) do not overlap with the plurality of first groups of trenches (104); wherein the diffusion region (106) occupies the complete space of the substrate (102) between the trenches (104) of a corresponding group of trenches (104), wherein a p-n junction (108) is formed between the N +- dopant and the P —- dopant, wherein the diffusion region (106) is formed to produce a depletion region (112) adjacent to the p-n junction (108), wherein the depletion region (112) extends beyond a depth and length of the corresponding group of trenches (104) and generates an electric field to absorb electron-hole pairs produced by light in the infrared spectrum.The light sensor (100) of claim 5, wherein the trenches (104) have an aspect ratio in the range of about fifty to one to about one hundred fifty to one.The light sensor (100) of claim 5, wherein the depth of the trenches (104) is at least about twenty micrometers.The light sensor (100) of claim 5, wherein the depth of the trenches (104) is in the range of at least about twenty micrometers to at least about forty micrometers.

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