Organic light-emitting display and pixel compensation circuit and pixel compensation method for an organic light-emitting display

Abstract

Pixel compensation circuit for an organic light emission display comprising a first transistor (M1), a second transistor (M2), a third transistor (M3), a fourth transistor (M4), a driver transistor (M0) and a first capacitor (Cst), wherein the first transistor (M1), which is under the control of a first drive signal (S1), is configured to control the transmission of a data signal (Vdata) to a first plate of the first capacitor (Cst), the second transistor (M2), which is under the control of a second drive signal (S2), is configured to control the application of a reference voltage (Vref) to the first plate of the first capacitor (Cst), the driver transistor (M0) is configured to determine a magnitude of a driver current, wherein the driver current depends on a voltage difference between a gate electrode and a source electrode of the driver transistor (M0), the third transistor (M3), which is under the control of the first driver signal (S1), is configured to control the connection and disconnection between the gate electrode and the drain electrode of the driver transistor (M0), and the fourth transistor (M4), which is under the control of a third drive signal (S3), is configured to conduct the drive current from the drive transistor (M0) to an organic light-emitting element, and wherein: a first electrode of the first transistor (M1) is connected to a data signal line (Vdata) and a second electrode of the first transistor (M1) is connected to a second electrode of the second transistor (M2) and the first plate of the first capacitor (Cst), a first electrode of the second transistor (M2) is connected to a reference voltage line, the source electrode of the driver transistor (M0) is connected to a power supply voltage line, and the drain electrode of the driver transistor (M0) is connected to a second electrode of the third transistor (M3) and a first electrode of the fourth transistor (M4), a first electrode of the third transistor (M3) is connected to the gate electrode of the driver transistor (M0) and a second plate of the first capacitor (Cst), and a second electrode of the fourth transistor (M4) is connected to the organic light-emitting element.

Description

Technical FieldThe present invention relates to organic light emitting display technologies, and more particularly to an organic light emitting display, and a pixel compensation circuit and method for an organic light emitting display.Prior ArtAn organic light emitting display is a film light emitting device formed of an organic semiconducting material and driven by a DC voltage, the film light emitting device comprising a glass substrate and a very thin layer of an organic material deposited on the glass substrate. When a current flows through the organic material, the organic material actively emits light without a backlight.Because the brightness of the light emitted by the organic light emitting display is related to the magnitude of the current flowing through the organic light emitting display, the electrical characteristics of thin film transistors (TFTs) functioning as drivers for the organic light emitting display directly affect the display effect of the organic light emitting display. In particular, a threshold voltage of the thin film transistor tends to drift, resulting in uneven brightness of the entire organic light emitting display.In order to improve the display effect of the organic light emitting display, a driving circuit is usually configured for pixel compensation in the organic light emitting display. FIG. 1 is a schematic view of a pixel compensation circuit for an organic light emitting display of the related art. As shown in Fig. 1, the pixel compensation circuit includes a capacitor and five thin film transistors, wherein the thin film transistors T2 and T4 are turned on or off under the control of a signal SELECT, and wherein the thin film transistors T3 and T5 are turned on or off under the control of a signal EMIT. A reference voltage Vref is input through the thin film transistor T3, a data voltage Vdata is input through the thin film transistor T2, and a power supply voltage Vdd is input through a thin film transistor T1.During a driving process of the pixel compensation circuit, the signal SELECT is initially at a low level and the signal EMIT is at a high level, so that data DATA is input at one end of the capacitor C 1 and a threshold voltage Vth of the thin film transistor T 1 is detected at the other end of the capacitor C 1 so that the voltages at both ends of the capacitor C 1 are Vdd-Vth and Vdata, respectively. Then, the signal SELECT jumps to a high level and the signal EMIT jumps to a low level, so that the potential at a point B is Vref and the potential at a point A is Vref-Vdata+Vdd-Vth, due to the coupling effect of the capacitor C1.Then, a driving current for light emission of the organic light emitting element OLED in FIG. 1 is: wherein K is a constant. Here, the magnitude of the driving current of the organic light emitting element OLED is irrelevant to the threshold voltage of the driving transistor, so that a function of pixel compensation is realized.The above calculation is theoretically ideal. In practice, voltages at both ends of the capacitor C1 change simultaneously when the signal SELECT is at a low level and the signal EMIT is at a high level. If the size of the data DATA in the current frame is much larger than the data DATA in the previous frame, then due to the coupling effect of the capacitor C1, when the signal SELECT changes from a high level to a low level, the potential at the point A is immediately pulled up to a very high level. As a result, in the period of detecting the threshold voltage of the thin film transistor T1, the detected threshold voltage Vth' is inaccurate and differs from the actual threshold voltage Vth by ΔVth, resulting in imprecision in the following threshold compensation. Thus, when the potential at the point A is Vref-Vdata+Vdd-Vth', the driving current of the organic light emitting element is OLED:From the above equation, it is clear that the effect of the pixel compensation is not satisfactory because ΔVth is present, and thus the organic light emitting display is still problematic due to uneven brightness.US 2011 / 0063198A1 discloses a pixel circuit and an organic light emitting diode (OLED) using the pixel circuit. The pixel circuit includes: an OLED; a third NMOS transistor coupled to a data line and a first scan line and configured to apply a data signal to a first node; a storage capacitor having one terminal coupled to the first node and the other terminal coupled to another node; a fourth NMOS transistor connected between a first power supply and the second node and configured to apply a voltage of the power supply to the second node; a first NMOS transistor having a first electrode, a second electrode, and a gate electrode coupled to the second node; a second NMOS transistor connected between the second node and the first electrode of the first NMOS transistor and configured to diode-couple the first NMOS transistor.US 8 159 421 B2 discloses an OLED display comprising a plurality of data lines to which data voltages are applied; a plurality of pairs of gate lines each comprising a first gate line to which a first strobe pulse is applied and a second gate line to which a second strobe pulse partially overlapping with reverse phase is applied; an OLED emitting light due to a current flowing between a high potential of the drive voltage source and a low potential of the drive voltage source; a driver for controlling the current flowing through the OLED in accordance with a gate-source voltage applied between a gate electrode connected to a first node and a source electrode connected to the low potential of the drive voltage source; a storage capacitor connected between the first node and the second node, and a switch circuit.SUMMARY OF THE INVENTIONIn view of this, the present invention provides a pixel compensation circuit and a pixel compensation method for an organic light emitting display to solve the technical problem of low precision of pixel compensation for the organic light emitting display and implement accurate compensation for the threshold voltage.An aspect of the present invention provides a pixel compensation circuit for an organic light emission display, comprising a first transistor, a second transistor, a third transistor, a fourth transistor, a driver transistor, a first capacitor, and an organic light emission element, wherein the first transistor under control of a first driver signal is configured to control transmission of a data signal to a first plate of the first capacitor, wherein the second transistor under control of a second driver signal is configured to control application of a reference voltage to the first plate of the first capacitor, wherein the driver transistor is configured to determine the magnitude of a driver current, wherein the driver current depends on a voltage difference between a gate electrode and a source electrode of the driver transistor, wherein the third transistor, which is under the control of the first drive signal is configured to control the connection and disconnection between the gate electrode and the drain electrode of the drive transistor, wherein the fourth transistor which is under the control of a third drive signal is configured to conduct the drive current from the drive transistor to an organic light emitting element, and wherein the organic light emitting element is configured to emit light in response to the drive current.Another aspect of the present invention provides a method for performing pixel compensation using the pixel compensation circuit, the pixel compensation circuit comprising a first transistor, a second transistor, a third transistor, a fourth transistor, a driver transistor, and a first capacitor, the first transistor being under control of a first driver signal configured to control transmission of a data signal to a first plate of the first capacitor, the second transistor being under control of a second driver signal configured to control application of a reference voltage to the first plate of the first capacitor, the driver transistor configured to determine the magnitude of a driver current, the driver current depending on a voltage difference between a gate electrode and a source electrode of the driver transistor, wherein the third transistor under the control of the first driving signal is configured to control the connection and disconnection between the gate and drain of the driving transistor, and wherein the fourth transistor under the control of a third driving signal is configured to supply the driving current from the driving transistor to an organic light emitting element, wherein the first transistor, the second transistor, the third transistor, the fourth transistor and the driving transistor are p-type transistors or the first transistor, the second transistor, the third transistor and the fourth transistor are n-type transistors and the driving transistor is a p-type transistor, the method comprising: a node reset step, a threshold detection step, a data input step and a light emitting step.In the node reset step, when the first transistor, the second transistor, the third transistor, the fourth transistor, and the driver transistor are p-type transistors, the first driver signal and the third driver signal are at a low level and the second driver signal is at a high level, so that the first transistor, the third transistor, the fourth transistor, and the driver transistor are turned on and the second transistor is turned off, and when the first transistor, the second transistor, the third transistor, and the fourth transistor are n-type transistors and the driver transistor is a p-type transistor, the first driver signal and the third driver signal are at a high level and the second driver signal is at a low level, so that the first transistor, the third transistor, and the like are at a high level, the fourth transistor and the driver transistor are turned on and the second transistor is turned off.In the threshold detection step, when the first transistor, the second transistor, the third transistor, the fourth transistor, and the driver transistor are p-type transistors, the first driver signal is at a low level, the second driver signal is at a high level, and the third driver signal jumps from a low level to a high level, so that the first transistor and the third transistor are turned on, the second transistor and the fourth transistor are turned off, and the driver transistor are turned off when a voltage difference between the gate electrode and the source electrode of the driver transistor is equal to a threshold voltage of the driver transistor, andwhen the first transistor, the second transistor, the third transistor, and the fourth transistor are n-type transistors and the driver transistor is a p-type transistor, the first driver signal is at a high level, the second driver signal is at a low level, and the third driver signal jumps from a high level to a low level, so that the first transistor and the third transistor are turned on, the second transistor and the fourth transistor are turned off, and the driver transistor is turned off when the voltage difference between the gate electrode and the source electrode of the driver transistor is equal to the threshold voltage of the driver transistor.The present invention reduces the effect of a parasitic capacitance coupling effect on the potential at a node and solves the problem of inaccurate threshold detection by ensuring that voltages at both ends of a voltage capacitor do not change simultaneously during the process of compensating the threshold voltage and the power line voltage drop, so that the threshold voltage is compensated precisely to achieve a good display effect.DESCRIPTION OF THE DRAWINGSFIG. 1 is a schematic view of a pixel compensation circuit for an organic light emitting display of the related art. FIG. 2 is a schematic view of a pixel compensation circuit for an organic light emitting display according to an embodiment of the present invention. FIG. 3 is a time sequence diagram of driving signals of the pixel compensation circuit for an organic light emission display according to an embodiment of the present invention. FIG. 4 is a schematic view showing a current path during a node reset phase T 11 of the pixel compensation circuit for an organic light emission display according to an embodiment of the present invention. FIG. 5 is a schematic view showing a current path during a threshold detection phase T 12 of the pixel compensation circuit for an organic light emission display according to an embodiment of the present invention. FIG. 6 is a schematic view showing a current path during a data input phase T 13 of the pixel compensation circuit for an organic light emission display according to an embodiment of the present invention. FIG. 7 is a schematic view showing a current path during a light emission phase T 14 of the pixel compensation circuit for an organic light emission display according to an embodiment of the present invention. FIG. 8 is a flowchart of a pixel compensation method for an organic light emission display according to an embodiment of the present invention. FIG. 9 is a timing chart for driving signals of the pixel compensation circuit according to an embodiment of the present invention.DETAILED DESCRIPTION OF PREFERRED EMBODIMENTSHereinafter, technical solutions of the present invention will be described by way of specific embodiments with reference to the accompanying drawings. It should be understood that the specific embodiments described herein are merely exemplary of the invention and are not intended to limit the invention in any way. It is further to be noted that for the sake of simplicity of illustration only the parts relevant to the invention are shown in the accompanying drawings.FIG. 2 is a schematic view of a pixel compensation circuit for an organic light emitting display according to an embodiment of the present invention. As shown in FIG. 2, the pixel compensation circuit of this embodiment includes a first transistor M 1, a second transistor M 2, a third transistor M 3, a fourth transistor M 4, a driving transistor M 0, a first capacitor Cst, and an organic light emitting element OLED.A first electrode of the first transistor M 1 is connected to a data signal line to receive a data signal Vdata, a second electrode of the first transistor M 1 is connected to a second electrode of the second transistor M 2 and a first plate of the first capacitor Cst, and a first electrode of the second transistor M 2 is connected to a reference voltage line to receive a reference voltage Vref. A source electrode of the driving transistor M 0 is connected to a power supply voltage line to receive a power supply voltage PVDD, and a drain electrode of the driving transistor M 0 is connected to a second electrode of the third transistor M 3 and a first electrode of the fourth transistor M 4. A first electrode of the third transistor M 3 is connected to a gate electrode of the driving transistor M 0 and a second plate of the first capacitor Cst. A second electrode of the fourth transistor M 4 is connected to the organic light emitting element OLED.In the pixel compensation circuit of this embodiment, the first transistor M1 is controlled by a first drive signal S1 to control the transmission of the data signal Vdata to the first plate of the first capacitor Cst. The second transistor M 2 is controlled by a second drive signal S 2 to control the transmission of the reference voltage Vref to the first plate of the first capacitor Cst. The driving transistor M 0 is configured to determine the magnitude of a driving current depending on a voltage difference between the gate electrode and the source electrode of the driving transistor M 0. The third transistor M 3 is controlled by the first drive signal S 1 to control the connection or disconnection between the gate electrode and the drain electrode of the drive transistor M 0. The fourth transistor M 4 is controlled by a third drive signal S 3 to supply the drive current from the drive transistor M 0 to the organic light emitting element OLED. The organic light emitting element OLED is configured to emit light in response to the driving current.FIG. 3 is a time sequence diagram of driving signals of the pixel compensation circuit for an organic light emission display according to an embodiment of the present invention. Note that the time sequence diagram of FIG. 3 is merely an example of the case where the first transistor M 1, the second transistor M 2, the third transistor M 3, the fourth transistor M 4, and the driving transistor M 0 are p-type transistors.Specifically, the first drive signal S 1 controls the first transistor M 1 and the third transistor M 3, the second drive signal S 2 controls the second transistor M 2, the third drive signal S 3 controls the fourth transistor M 4, and Vdata represents a data signal. The first drive signal S 1, the second drive signal S 2, and the third drive signal S 3 are provided through a gate electrode drive line of the organic light emitting display.The timing sequence for driving the pixel compensation circuit of this embodiment includes a node reset phase, a threshold detection phase, a data input phase, and a light emission phase, which correspond to the time periods T11, T12, T13, and T14 of FIG. 3, respectively.FIG. 4 is a schematic view showing a current path during the node reset phase T 11. FIG. 5 is a schematic view showing a current path during the threshold detection phase T 12. FIG. 6 is a schematic view showing a current path during the data input phase T 13. FIG. 7 is a schematic view showing a current path during the light emission phase T 14. For convenience of illustration, in FIGS. 4 to 7, the current paths are represented by arrows and the transistors in an off state are represented by broken lines.Next, the operation principles of the pixel compensation circuit for the organic light emitting display of an embodiment of the present invention will be described with reference to FIGS. 2 to 7.As shown in FIGS. 3 and 4, in the node reset phase T 11, the first drive signal S 1 is at a low level, so that the first transistor M 1 and the third transistor M 3 are turned on. The second drive signal S 2 is at a high level, so that the second transistor is turned off. The third drive signal S 3 is at a low level, so that the fourth transistor M 4 is turned on. From FIG. 4, it is understood that the data signal Vdata is transmitted to a first node N 1, i.e., to the first plate of the first capacitor Cst via the first transistor M 1. At this time, a current path is formed between the third transistor M 3 and the fourth transistor M 4, and a low level PVEE at a cathode of the organic light emitting element OLED is applied to a second node N 2 via the current path between the third and fourth transistors M 3 and M 4 so that the second plate of the first capacitor Cst and the gate electrode of the driving transistor M 0 are at a low level, thereby completing the node reset phase of the pixel compensation circuit.As shown in FIGS. 3 and 5, in the threshold detection phase T 12, the first drive signal S 1 is at a low level, so that the first transistor M 1 and the third transistor M 3 are turned on. The second drive signal S 2 is at a high level, so that the second transistor M 2 is turned off. The third drive signal S 3 is at a high level, so that the fourth transistor M 4 is turned off. It is understood from FIG. 5 that the gate electrode of the driving transistor M 0 is at a low level, so that the driving transistor M 0 is turned on in the node reset phase T 11 so that a current path is formed between the driving transistor M 0 and the third transistor M 3, and the power supply voltage PVDD is applied to the second node N 2 via the current path formed between the driving transistor M 0 and the third transistor M 3 to progressively pull up the potential at the second node N 2. Thus, according to the voltage-current characteristic of a transistor, when the voltage difference between the gate electrode and the source electrode of the transistor is less than the threshold voltage of the transistor, the transistor is turned off. Thus, when the voltage of the gate electrode of the driving transistor M 0 is pulled up so far that the voltage difference between the gate electrode and the source electrode of the driving transistor M 0 is equal to or less than the threshold voltage Vth of the driving transistor M 0, the driving transistor M 0 is turned off. The potential at the source of the driving transistor M 0 is maintained at the power supply voltage PVDD because the source is connected to the power supply voltage line, so that when the driving transistor M 0 is turned off, the potential at the gate of the driving transistor M 0 is changed to PVDD-Vth, where PVDD represents the power supply voltage and Vth represents the threshold voltage of the driving transistor M 0.At this time, the voltage difference Vc between the first plate and the second plate of the first capacitor Cst is: where V2 represents the potential at the second node N2 and V1 represents the potential at the first node N1.During the threshold detection phase T 12, the voltage difference Vc between the first plate and the second plate of the first capacitor Cst includes the threshold voltage Vth of the driving transistor M 0. That is, the threshold voltage Vth of the driving transistor M 0 has been detected in the threshold detection phase T 12 and stored in the first capacitor Cst.As shown in FIGS. 3 and 6, in the data input phase T 13, the first drive signal S 1 is at a high level, so that the first transistor M 1 and the third transistor M 3 are turned off. The second drive signal S 2 is at a low level, so that the second transistor is turned on. The third drive signal S 3 is at a high level, so that the fourth transistor M 4 is turned off. From FIG. 6, it is clear that the reference voltage Vref is applied via the second transistor M 2 to the first node N 1, i.e., to the first plate of the first capacitor Cst. Meanwhile, the third transistor M 3, the fourth transistor M 4, and the driving transistor M 0 are in an off state, so that the second plate of the first capacitor Cst hangs (is disconnected), and therefore the voltage difference Vc between the first plate and the second plate of the first capacitor Cst is kept constant. However, because the potential of the first node N 1 is changed to Vref, the potential at the second node N 2 is changed to:That is, the data signal Vdata is coupled to the second plate of the first capacitor Cst via the first capacitor Cst.As shown in FIGS. 3 and 7, in the light emission phase T 14, the first drive signal S 1 is at a high level, so that the first transistor M 1 and the third transistor are turned off. The second drive signal S 2 is at a low level, so that the second transistor M 2 is turned on. The third drive signal S 3 is at a low level, so that the fourth transistor M 4 is turned on. It is clear from FIG. 7 that a current path is formed between the driving transistor M 0 and the fourth transistor M 4. Here, the voltage Vgs across the gate electrode and the source electrode of the driving transistor M 0 is:Because the driving transistor M 0 is operated in a saturation region, a driving current flowing through a channel of the driving transistor M 0 is determined by the voltage difference between the gate electrode and the source electrode of the driving transistor M 0. Therefore, according to the electrical characteristics of the transistor operated in the saturation region, the driving current is obtained as: where I represents the driving current generated by the driving transistor M0, K is a constant, Vref represents the reference voltage, and Vdata represents the data signal.Because the fourth transistor M 4 is operated in a linear region, the driving current I may flow to the organic light emitting element OLED via the fourth transistor M 4 to drive the organic light emitting element OLED to emit light for display,Note that the first transistor M 1, the second transistor M 2, the third transistor M 3, and the fourth transistor M 4 may be n-type transistors, while the driving transistor M 0 is a p-type transistor. It should be apparent to those skilled in the art that the actions in each of the above-described steps can also be achieved when the first drive signal S 1, the second drive signal S 2 and the third drive signal S 3 are inverted, but this is not specifically described here.It is understood from the above equation (6) that the magnitude of the driving current I depends only on the reference voltage and the data signal and does not depend on the threshold voltage of the driving transistor and the power supply voltage, so that the effect of compensating the threshold voltage and a power supply line voltage drop is obtained. Further, during the entire driving process of the pixel compensation circuit, it is ensured that the voltages at both ends of a storage capacitor do not change simultaneously, thereby reducing the effect of a parasitic capacitance coupling effect on the potential of a node and solving the problem of inaccurate threshold detection, so that an accurate pixel compensation effect is obtained in the organic light emitting display, and thus a good display effect.FIG. 8 is a flowchart of a pixel compensation method for an organic light emission display according to an embodiment of the present invention. In this embodiment, the first transistor M 1, the second transistor M 2, the third transistor M 3, the fourth transistor M 4, and the driving transistor M 0 are each in p-type transistor. As shown in FIG. 8, the pixel compensation method includes the following steps 801 to 804.Step 801: Node ResetSpecifically, in the node reset step, the first drive signal and the third drive signal are at a low level and the second drive signal is at a high level, in which case the first transistor, the third transistor, the fourth transistor, and the drive transistor are turned on and the second transistor is turned off. The data signal is transmitted to the first plate of the first capacitor via the first transistor.Step 802: Threshold DetectionSpecifically, in the threshold detection step, the first drive signal is at a low level, the second drive signal is at a high level, and the third drive signal jumps from the low level to the high level, in which case the first transistor and the third transistor are turned on, the second transistor and the fourth transistor are turned off, and the drive transistor is turned off when the voltage difference between the gate electrode and the source electrode of the drive transistor is equal to a threshold voltage of the drive transistor. When the driver transistor is off, the threshold voltage of the driver transistor is stored in the first capacitor.Step 803: Data InputSpecifically, in the data input step, the first drive signal jumps from the low level to the high level, the second drive signal jumps from a high level to a low level, and the third drive signal is at a high level, so that the first transistor, the third transistor, the fourth transistor, and the drive transistor are turned off and the second transistor is turned on. The data signal is coupled to the second plate of the first capacitor via the first transistor.Step 804: Light emissionSpecifically, in the light emitting step, the first driving signal is at a high level, the second driving signal is at a low level, and the third driving signal jumps from a high level to a low level, so that the first transistor and the third transistor are turned off, the second transistor and the fourth transistor are turned on, and the driving current of the driving transistor depends on the voltage difference between the gate electrode and the source electrode of the driving transistor. The driving current flows to the organic light emitting element via the fourth transistor, so that the organic light emitting element emits light for display in response to the driving current.Fig. 9 is a time sequence diagram of drive signals of one embodiment of the present invention. In this embodiment of the present invention, as shown in FIG. 9, in the node reset step, in correspondence with a time sequence T21, the data signal Vdata jumps from a low level to a high level. In the threshold detection step corresponding to a time sequence T 22, the data signal Vdata jumps from a high level to a low level. Further, in the node reset step corresponding to the time sequence T21, after the data signal Vdata has jumped from the low level to the high level, the first drive signal S1 jumps from a high level to a low level. In the threshold detection step corresponding to the time sequence T22, before the data signal Vdata jumps from a high level to a low level, the first drive signal S1 jumps from a low level to a high level. That is, the time period during which the first transistor M1 is in an on state is slightly shorter than the time period during which the data signal Vdate is at a high level. In this way, it is ensured that when the first transistor M 1 is turned on under the control of the first drive signal S 1, the data signal Vdata is forcibly transmitted through the first transistor M 1 to the first node N 1 and thus to the first plate of the first capacitor Cst, so that the data signal Vdata remains unchanged while the first drive signal S 1 is turned on.In this preferred embodiment, the variations of the second drive signal S 2 and the third drive signal S 3 and the variations of each signal in the data input step (corresponding to the time sequence T 23) and the light emission step (corresponding to the time sequence T 24) are as described above, so a repeated description is omitted here.Note that the first transistor M 1, the second transistor M 2, the third transistor M 3, and the fourth transistor M 4 may be n-type transistors, while the driving transistor M 0 is a p-type transistor. It should be apparent to those skilled in the art that the actions in each of the above-described steps can also be achieved by inverting the first drive signal S 1, the second drive signal S 2, and the third drive signal S 3, which is not specifically described here. Thus, if the first transistor, the second transistor, the third transistor and the fourth transistor are n-type transistors while the driver transistor is a p-type transistor, thenIn the node reset step, the first drive signal and the third drive signal are at the high level, and the second drive signal is at a low level, so that the first transistor, the third transistor, the fourth transistor, and the drive transistor are turned on and the second transistor is turned off,In the threshold detection step, when the first drive signal is at a high level, the second drive signal is at a low level, and the third drive signal jumps from a high level to a low level, so that the first transistor and the third transistor are turned on, the second transistor and the fourth transistor are turned off, and the drive transistor is turned off when the voltage difference between the gate electrode and the source electrode of the drive transistor is equal to the threshold voltage of the drive transistor,In the data input step, when the first drive signal jumps from a high level to a low level, the second drive signal jumps from a low level to a high level and the third drive signal is at a low level, so that the first transistor, the third transistor, the fourth transistor and the drive transistor are turned off and the second transistor is turned on, andIn the light emitting step, when the first driving signal is at a low level, the second driving signal is at a high level, and the third driving signal jumps from a low level to a high level, so that the first transistor and the third transistor are turned off, the second transistor and the fourth transistor are turned on, and the driving current of the driving transistor is determined by the voltage difference between the gate electrode and the source electrode of the driving transistor.The effect of compensating the threshold voltage and the power supply line voltage drop is realized by this embodiment. Further, during the entire driving process of the pixel compensation circuit, it is ensured that the voltages at both ends of a storage capacitor do not change simultaneously, thereby reducing the effect of a parasitic capacitance coupling effect on the potential of a node and reducing the problem of inaccurate threshold detection, so that the threshold voltage is accurately compensated for achieving a good display effect.Note that only some embodiments and the technical principles of the present invention are described above. It should be apparent to those skilled in the art that the present invention is not limited to the specific embodiments described herein, and various changes, rearrangements, and substitutions may be made therein without departing from the scope of the invention. While the invention has been described in detail with reference to various embodiments, the invention is not limited thereto and may include other equivalent embodiments without departing from the scope thereof. The scope of the invention is defined by the following claims.

Claims

A pixel compensation circuit for an organic light emission display, comprising a first transistor (M1), a second transistor (M2), a third transistor (M3), a fourth transistor (M4), a driver transistor (M0), and a first capacitor (Cst), wherein the first transistor (M1) under control of a first driver signal (S1) is configured to control transmission of a data signal (Vdata) to a first plate of the first capacitor (Cst), the second transistor (M2) under control of a second driver signal (S2) is configured to control application of a reference voltage (Vref) to the first plate of the first capacitor (Cst), the driver transistor (M0) is configured to, to determine a magnitude of a driving current, wherein the driving current depends on a voltage difference between a gate electrode and a source electrode of the driving transistor (M0), the third transistor (M3) under control of the first driving signal (S1) is configured to control connection and disconnection between the gate electrode and the drain electrode of the driving transistor (M0), and the fourth transistor (M4) under control of a third driving signal (S3) is configured to guide the driving current from the driving transistor (M0) to an organic light emitting element, and wherein: a first electrode of the first transistor (M1) is connected to a data signal line (Vdata), and a second electrode of the first transistor (M1) is connected to a second electrode of the second transistor (M2) and the first plate of the first capacitor (Cst), a first electrode of the second transistor (M2) is connected to a reference voltage line, the source electrode of the driving transistor (M0) is connected to a power supply voltage line, and the drain electrode of the driving transistor (M0) is connected to a second electrode of the third transistor (M3) and a first electrode of the fourth transistor (M4), a first electrode of the third transistor (M 3) is connected to the gate electrode of the driving transistor (M 0) and a second plate of the first capacitor (Cst), and a second electrode of the fourth transistor (M 4) is connected to the organic light emitting element.The pixel compensation circuit according to claim 1, wherein: the first transistor (M1), the second transistor (M2), the third transistor (M3), the fourth transistor (M4), and the driving transistor (M0) are p-type transistors, or the first transistor (M1), the second transistor (M2), the third transistor (M3), and the fourth transistor (M4) are n-type transistors, and the driving transistor (M0) is a p-type transistor.The pixel compensation circuit according to claim 1, wherein the first drive signal (S1), the second drive signal (S2), and the third drive signal (S3) are provided through a gate electrode drive line of the organic light emitting display.The pixel compensation circuit according to any one of claims 1 to 3, wherein a time sequence of the pixel compensation circuit comprises a node reset phase, a threshold detection phase, a data input phase, and a light emission phase.The pixel compensation circuit according to claim 5, wherein in the node reset phase, a low voltage is applied to a cathode of the organic light emitting element, which is applied to the gate electrode of the driving transistor (M0) via the third transistor (M3) and the fourth transistor (M4) to control the driving transistor (M0) to turn on, and the data signal (Vdata) is transmitted to the first plate of the first capacitor (Cst) via the first transistor (M1).The pixel compensation circuit according to claim 4, wherein in the threshold detection phase, a power supply potential is applied to the second plate of the first capacitor (Cst) under the control of the third transistor (M3) and the driving transistor (M0), and the driving transistor (M0) is turned off, when the potential difference between the gate electrode and the source electrode of the driving transistor (M0) is equal to a threshold voltage, and when the driving transistor (M0) is turned off, the threshold voltage of the driving transistor (M0) is stored at the first capacitor (Cst).The pixel compensation circuit according to claim 5, wherein in the data input phase, the reference voltage (Vref) is applied to the first plate of the first capacitor (Cst) via the second transistor (M2).The pixel compensation circuit according to claim 5, wherein in the light emission phase, the driving transistor (M0), a potential of the gate electrode is configured to determine a magnitude of the driving current, and the fourth transistor (M4) is configured to supply the driving current to the organic light emitting element, the driving current depending on the voltage difference between the gate electrode and the source electrode of the driving transistor (M0), and the organic light emitting element emits light in response to the driving current.A method for pixel compensation using a pixel compensation circuit, the pixel compensation circuit comprising a first transistor (M1), a second transistor (M2), a third transistor (M3), a fourth transistor (M4), a driver transistor (M0), and a first capacitor (Cst), wherein the first transistor (M1) under control of a first driver signal (S1) is configured to control transmission of a data signal (Vdata) to a first plate of the first capacitor (Cst), the second transistor (M2) under control of a second driver signal (S2) is configured to control application of a reference voltage (Vref) to the first plate of the first capacitor, the driver transistor (M0) is configured to:, to determine the magnitude of a driving current, the driving current depending on a voltage difference between a gate electrode and a source electrode of the driving transistor (M0), the third transistor (M3) under the control of the first driving signal (S1) is configured to control the connection and disconnection between the gate electrode and the drain electrode of the driving transistor (M0), and the fourth transistor (M4) under the control of a third driving signal (S3) is configured to guide the driving current from the driving transistor (M0) to an organic light emitting element, wherein the first transistor (M1), the second transistor (M2), the third transistor (M3), the fourth transistor (M 4) and the driving transistor (M 0) are p-type transistors, or the first transistor (M 1), the second transistor (M 2), the third transistor (M 3), and the fourth transistor (M 4) are n-type transistors, and the driving transistor (M 0) is a p-type transistor, the method comprising: a node reset step, a threshold detection step, a data input step, and a light emission step.The method for pixel compensation according to claim 9, wherein in the node reset step: when the first transistor (M1), the second transistor (M2), the third transistor (M3), the fourth transistor (M4), and the driving transistor (M0) are p-type transistors, the first driving signal (S1) and the third driving signal (S3) are at a low level (PVEE), and the second driving signal (S2) is at a high level, so that the first transistor (M1), the third transistor (M3), the fourth transistor (M4), and the driving transistor (M0) are turned on and the second transistor (M2) is turned off when the first transistor (M1), the second transistor (M2) is turned off, the third transistor (M3) and the fourth transistor M4) are n-type transistors, and the driver transistor (M0) is a p-type transistor, the first driver signal (S1) and the third driver signal (S3) are at a high level and the second driver signal (S2) is at a low level (PVEE), such that the first transistor (M1), the third transistor (M3), the fourth transistor (M4) and the driver transistor (M0) are turned on and the second transistor (M2) is turned off.The method for pixel compensation according to claim 9, wherein in the threshold detection step: when the first transistor (M1), the second transistor (M2), the third transistor (M3), the fourth transistor (M4), and the driving transistor (M0) are p-type transistors, the first driving signal (S1) is at a low level (PVEE), the second driving signal (S2) is at a high level, and the third driving signal (S3) jumps from a low level (PVEE) to a high level, so that the first transistor (M1) and the third transistor (M3) are turned on, the second transistor (M2) and the fourth transistor (M4) are turned off, and the driving transistor (M0) is turned off, when a voltage difference between the gate and the source of the driving transistor (M0) is equal to a threshold voltage of the driving transistor (M0), and when the first transistor (M1), the second transistor (M2), the third transistor (M3), and the fourth transistor (M4) are n-type transistors, and the driving transistor is a p-type transistor, the first driving signal (S1) is at a high level, the second driving signal (S2) is at a low level (PVEE), and the third driving signal (S3) jumps from a high level to a low level (PVEE), so that the first transistor (M1) and the third transistor (M3) are turned on, the second transistor (M 2) and the fourth transistor (M 4) are turned off and the driving transistor (M 0) is turned off when the voltage difference between the gate electrode and the source electrode of the driving transistor (M 0) is equal to the threshold voltage of the driving transistor (M 0).The method for pixel compensation according to claim 9, wherein in the data input step: when the first transistor (M1), the second transistor (M2), the third transistor (M3), the fourth transistor (M4), and the driving transistor (M0) are p-type transistors, the first driving signal (S1) jumps from a low level (PVEE) to a high level, the second driving signal (S2) jumps from a high level to a low level (PVEE), and the third driving signal (S3) is at a high level, so that the first transistor (M1), the third transistor (M3), the fourth transistor (M4), and the driving transistor (M0) are turned off and the second transistor (M2) is turned on, and when the first transistor (M1), the second transistor (M2), the third transistor (M3), and the fourth transistor (M4) are n-type transistors, and the driving transistor (M0) is a p-type transistor, the first driving signal (S1) jumps from a high level to a low level (PVEE), the second driving signal (S2) jumps from a low level (PVEE) to a high level, and the third driving signal (S3) is at a low level (PVEE), such that the first transistor (M1), the third transistor (M3), the fourth transistor (M4), and the driving transistor (M0) are turned off, and the second transistor (M2) is turned on.The method for pixel compensation according to claim 9, wherein in the light emitting step: when the first transistor (M1), the second transistor (M2), the third transistor (M3), the fourth transistor (M4), and the driving transistor (M0) are p-type transistors, the first driving signal (S1) is at a high level, the second driving signal (S2) is at a low level (PVEE), and the third driving signal (S3) jumps from a high level to a low level (PVEE), so that the first transistor (M1) and the third transistor (M3) are turned off, the second transistor (M2) and the fourth transistor (M4) are turned on and the driving current of the driving transistor (M0) is determined by the voltage difference between the gate electrode and the source electrode of the driving transistor (M0), and when the first transistor (M1), the second transistor (M2), the third transistor (M3) and the fourth transistor (M4) are n-type transistors, and the driving transistor (M0) is a p-type transistor, the first driving signal (S1) is at a low level (PVEE), the second driving signal (S2) is at a high level, and the third driving signal (S3) jumps from a low level (PVEE) to a high level, such that the first transistor (M 1) and the third transistor (M 3) are turned off, the second transistor (M 2) and the fourth transistor (M 4) are turned on, and the driving current of the driving transistor (M 0) is determined by the voltage difference between the gate electrode and the source electrode of the driving transistor (M 0).The method for pixel compensation according to claim 9, wherein in the node reset step, the data signal (Vdata) jumps from a low level (PVEE) to a high level, and in the threshold detection step, the data signal (Vdata) jumps from a high level to a low level (PVEE).The method for pixel compensation according to claim 14, wherein in the node reset step, the first drive signal (S1) jumps after the data signal (Vdata) jumps from the low level (PVEE) to the high level, and in the threshold detection step, the first drive signal (S1) jumps before the data signal (Vdata) jumps from the high level to the low level (PVEE).An organic light emission display comprising a pixel compensation circuit and an organic light emission element, the pixel compensation circuit comprising a first transistor (M1), a second transistor (M2), a third transistor (M3), a fourth transistor (M4), a driver transistor (M0), and a first capacitor (Cst), wherein the first transistor (M1) under control of a first driver signal (S1) is configured to control transmission of a data signal (Vdata) to a first plate of the first capacitor (Cst), the second transistor (M2) under control of a second driver signal (S2) is configured to control application of a reference voltage (Vref) to the first plate of the first capacitor (Cst), the driving transistor (M0) is configured to determine the magnitude of a driving current, the driving current depending on a voltage difference between a gate electrode and a source electrode of the driving transistor (M0), the third transistor (M3) under control of the first driving signal (S1) is configured to control connection and disconnection between the gate electrode and the drain electrode of the driving transistor (M0), and the fourth transistor (M4) under control of a third driving signal (S3) is configured to guide the driving current from the driving transistor (M0) to an organic light emitting element, the organic light emitting element being configured to emit light in response to the driving current output by the pixel compensation circuit.

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