Semiconductor device

Abstract

Semiconductor device, which is discreetly designed and which exhibits: - a semiconductor base plate (1) having a main plane and a back side opposite the main plane; - a semiconductor element (2) provided on the main plane of the semiconductor base plate (1); - an electrode pad (3a, 3b, 3c) provided on the main plane of the semiconductor base plate (1) and connected to the semiconductor element (2); - a protective ring (6) surrounding the semiconductor element (2) and the electrode pad (3a, 3b, 3c) and provided on the main plane of the semiconductor base plate (1); - an insulating film (7), (i) covering an entire area of ​​a semiconductor of the main plane of the semiconductor base plate (1) that is exposed within the guard ring (6) from the electrode pad (3a, 3b, 3c), and (ii) covering the guard ring (6) and part of the semiconductor base plate (1) outside the guard ring (6), and - a metal foil (4) provided on the back of the semiconductor base plate (1), where: - the insulating film (7) is made of a waterproof material and - the rear metal foil (4) is connected to the electrode pad (3a, 3b, 3c) via a through hole (5) in the semiconductor base plate (1).

Description

Background of the invention; Field of the invention

[0001] The present invention relates to a semiconductor device which is provided with high moisture resistance. State of the art

[0002] Rapid progress is being made in the general use of high-frequency semiconductor devices characterized by field-effect transistor elements and composite semiconductors such as GaAs and GaN. Previously, due to the high degree of sealing within the packages in which the semiconductor devices are mounted, there was no need to consider the effects of water from the external environment in high-frequency semiconductor devices. However, in recent years, with the increasing use of cost-effective plastic casting materials for package assembly, cost reductions have become a significant factor. Since preventing water ingress into plastic casting materials is difficult, ensuring moisture resistance is becoming a critical consideration in guaranteeing product reliability.

[0003] A semiconductor device is provided in which a guard ring made of a conductive semiconductor is constructed in an environmental area of ​​a semiconductor device, and part of the guard ring is exposed by an insulating film (see e.g. Fig. 7 and Fig. 8 on p.29 in the published Japanese patent application JP 2008- 227 116 A). Summary of the invention

[0004] When a field-effect transistor (FET) is manufactured according to the disclosed Japanese patent application JP 2008-227 116 A, although it is assumed that it is possible to prevent degradation of a semiconductor layer formed in an environmental area and to prevent contamination from penetrating the semiconductor device through a gap between the semiconductor layer and a protective film, thereby improving moisture resistance, there are cases in which the semiconductor of the protective ring exposed by the insulating film corrodes. For this reason, almost no advantage with regard to corrosion in the semiconductor layer of the chip's edge region is observed compared to conventional semiconductor devices that do not employ the configuration disclosed in Japanese patent application JP 2008-227 116 A.Furthermore, corrosion of the semiconductor in the guard ring gradually progresses towards the drain electrode pad, eventually leading to corrosion of even the metal part of the electrode pad. This also causes the insulating film protecting the pad area to crack or peel, thus damaging the transistor area. This problem is particularly noticeable in GaN devices requiring high-voltage operation.

[0005] US Patent 5,814,860 A relates to a semiconductor integrated circuit (IC) device that is not affected by a decrease in dielectric strength caused by a leakage current flowing across the surface of the semiconductor device. The IC device comprises a semiconductor chip with a first functional area, a second functional area, and a third functional area, wherein a current flowing through the third functional area is caused by an electrical signal input into the first functional area. First and second pads are provided on the surface of the semiconductor chip and serve as electrical terminals for the first and second functional areas. The pads are arranged so that they are located close to each other substantially in the center of the surface of the semiconductor chip.If no electrical signal is input into the first area, a depletion area is formed, surrounding the first and second functional areas and the third functional area, to improve the dielectric strength between the first and second functional areas and the third functional area.

[0006] WO 2014 / 109 044 A1 discloses a semiconductor device in which a chip area is formed by split exposure. An intermediate insulating film has a via and a connection trench in one element formation area and a guard ring hole in another guard ring area. A conductive interconnect layer is formed in the via and the connection trench. A conductive guard ring layer is formed in the guard ring hole. The minimum width dimension of the conductive guard ring layer is larger than the minimum width dimension of the conductive interconnect layer in the via.

[0007] DE 10 2015 103 709 A1 discloses a power semiconductor device with a semiconductor body and with a passivation layer arranged over at least one section of the semiconductor body, wherein the passivation layer contains an organic dielectric material having a water absorption of less than or equal to 0.5 wt.% at saturation.

[0008] In view of the problems described above, one object of the present invention is to provide a semiconductor device that has high moisture resistance.

[0009] The problem underlying the invention is solved according to the invention in a semiconductor device by the features of claim 1. Advantageous further developments are the subject of the respective dependent claims.

[0010] According to the present invention, a discrete semiconductor device is constructed. This device comprises: a semiconductor base plate having a main plane and a back plane opposite the main plane; a semiconductor element provided on the main plane of the semiconductor base plate; an electrode pad provided on the main plane of the semiconductor base plate and connected to the semiconductor element; a guard ring surrounding the semiconductor element and the electrode pad, provided on the main plane of the semiconductor base plate; and an insulating film covering an entire area of ​​a semiconductor on the main plane of the semiconductor base plate exposed within the guard ring, the insulating film being made of a water-impermeable material.Furthermore, according to the invention, a metal foil is provided on the back of the semiconductor base plate and connected to the electrode pad via a through hole in the semiconductor base plate.

[0011] In the present invention, the insulating film, which covers the entire area in which the semiconductor of the semiconductor base plate is exposed within the protective ring, consists of a water-impermeable material. Thus, it is possible to obtain a semiconductor device that is provided with high moisture resistance.

[0012] Other and further tasks, features and advantages of the invention will become clearer from the following description. Brief description of the drawings Fig. Figure 1 is a cross-sectional view representing a semiconductor device according to a first embodiment of the present invention. Fig. Figure 2 is a top view showing the semiconductor device according to the first embodiment of the present invention. Fig. Figure 3 is a cross-sectional view showing the semiconductor device according to the first embodiment of the present invention mounted in a package. Fig. Figure 4 is a cross-sectional view showing a semiconductor device according to a second embodiment of the present invention. Fig. Figure 5 is a top view showing the semiconductor device according to the second embodiment of the present invention. Fig. Figure 6 is a cross-sectional view showing the semiconductor device according to the second embodiment of the present invention mounted in a package. Detailed description of preferred embodiments

[0013] A semiconductor device according to the embodiments of the present invention is described with reference to the drawings. The same components are identified by the same symbols, and their repeated description may be omitted. First embodiment

[0014] Fig. Figure 1 is a cross-sectional view representing a semiconductor device according to a first embodiment of the present invention. Fig. Figure 2 is a top view showing the semiconductor device according to the first embodiment of the present invention. A semiconductor base plate 1 is either a Si base plate, a GaAs base plate, an InP base plate, a SiC base plate or a GaN base plate, and has a multilayer semiconductor film structure for performing a predetermined transistor function.

[0015] A semiconductor element 2 is provided on a main plane of the semiconductor base plate 1. Here, the semiconductor element 2 is a field-effect transistor element used for a high-power output amplifier, but it could also be a bipolar transistor element or similar. The semiconductor element 2 has a gate electrode 2a, a source electrode 2b, and a drain electrode 2c.

[0016] A gate electrode pad 3a, a source electrode pad 3b, and a drain electrode pad 3c are provided on the main plane of the semiconductor base plate 1 and are each connected to the gate electrode 2a, the source electrode 2b, and the drain electrode 2c of the semiconductor element 2, respectively. A rear metal foil 4 is provided on the back side of the semiconductor base plate 1, and the rear metal foil 4 is connected to the source electrode pad 3b via a through-hole 5.

[0017] A protective ring 6, surrounding the semiconductor element 2 and the electrode pads 3a, 3b, and 3c, is provided in a surrounding area around the chip on the main plane of the semiconductor base plate 1. An insulating film 7 covers the entire area of ​​the semiconductor of the semiconductor base plate 1 that is exposed by the electrodes 2a, 2b, 2c and the electrode pads 3a, 3b, and 3c within the protective ring. It should be noted that the area covered by something other than the semiconductor, such as the gate electrode pad 3a, the source electrode pad 3b, and the drain electrode pad 3c, must not be covered by the insulating film 7. These areas must be electrically connected to the outside.

[0018] In the present embodiment, the guard ring 6 consists of a conductive semiconductor, and the insulating film 7 also covers the entire guard ring 6. In the area on the side of the chip outside the guard ring 6, an inter-chip interface is provided for cutting the wafer into individual chips, and the insulating film 7 in the outermost surrounding area of ​​the chip may be open. The interface between the metal and the semiconductor on the side of the chip inside the guard ring 6 must be covered with the insulating film.

[0019] Here, the insulating film 7 consists of a water-impermeable material or a material that is at least more water-impermeable than a resin film. For example, it is preferred to use a silicon nitride film or similar material capable of preventing water penetration or diffusion as the insulating film 7. The silicon nitride film is often formed using plasma CVD and is preferably formed under conditions similar to Si3N4, which is a stoichiometric composition. In general, water penetration or diffusion through the silicon nitride film varies when its composition deviates from a stoichiometric one.For this reason, it is necessary to develop a film thickness of the silicon nitride foil that is large enough to prevent water penetration up to any metal material that makes up the main plane of the semiconductor base plate 1 and the transistor, for the foil-forming condition of the silicon nitride foil.

[0020] Fig. Figure 3 is a cross-sectional view showing the semiconductor device according to the first embodiment of the present invention mounted in a package. The rear metal foil 4 of the semiconductor device is connected to a package base material 8 via a solder material 9. Since the package base material 8 is connected to ground (GND, 0V), which is a reference potential, the source electrode 2b of the semiconductor device receives the reference potential via the through-hole 5 and the source electrode pad 3b. The guard ring 6 also receives the reference potential. No potential difference is generated in the semiconductor layer outside the guard ring 6, which is kept at 0V. This prevents corrosion by electrochemical reaction.

[0021] Although a potential difference is generated between the drain electrode pad 3c, which receives a positive potential, and the guard ring 6, which receives the reference potential, it is possible to eliminate the effects of water because the semiconductor surface is protected by the insulating film 7 or the metal electrode pads 3a, 3b, and 3c. Therefore, it is also possible to prevent corrosion of the metal electrode pads 3a, 3b, and 3c, breakage or flaking of the insulating film 7, or the propagation of damage towards the transistor area, all of which are consequences of a corrosion reaction in the semiconductor.

[0022] The insulating film 7, which covers the entire area where the semiconductor of the semiconductor base plate 1 is exposed within the protective ring 6, is made of a waterproof material. This makes it possible to obtain a semiconductor device with high moisture resistance.

[0023] If the protective ring 6 consists of a conductive semiconductor, the semiconductor of the protective ring 6 will also become a starting point for a corrosion reaction. However, the insulating film 7 covers the entire protective ring 6 and can therefore prevent a corrosion reaction.

[0024] The semiconductor element 2 can also include a passive element such as a resistor, a capacitor, or an inductor. The area in which this passive element is formed, and the area where the semiconductor of the semiconductor base plate 1 is exposed, is also covered with the insulating film 7. Second embodiment

[0025] Fig. Figure 4 is a cross-sectional view showing a semiconductor device according to a second embodiment of the present invention. Fig. Figure 5 is a top view showing the semiconductor device according to the second embodiment of the present invention. Fig. Figure 6 is a cross-sectional view showing the semiconductor device according to the second embodiment of the present invention mounted in a package.

[0026] In the present embodiment, the guard ring 6 is metallic. The source electrode pad 3b also serves as part of the guard ring layer. The insulating film 7 covers the guard ring 6, and the insulating film 7 on the source electrode pad 3b (part of the guard ring 6) is open. The remainder of the arrangement is similar to that in the first embodiment.

[0027] If the guard ring 6 is metallic, the semiconductor, which would otherwise become a starting point for a corrosion reaction, is not exposed, even if part of the guard ring 6 is exposed by the insulating film 7. Therefore, it is possible to obtain a semiconductor device with high moisture resistance, as in the case of the first embodiment. Furthermore, if the guard ring 6 is metallic, even if the insulating film 7 is open on the side of the chip outside the guard ring 6, no potential difference is generated in the area where the semiconductor is exposed on the side of the chip outside the guard ring 6, which is held at 0 V, and the moisture resistance never deteriorates.

Claims

[1] Semiconductor device, which is discreetly designed and which exhibits: - a semiconductor base plate (1) having a main plane and a back side opposite the main plane; - a semiconductor element (2) provided on the main plane of the semiconductor base plate (1); - an electrode pad (3a, 3b, 3c) provided on the main plane of the semiconductor base plate (1) and connected to the semiconductor element (2); - a protective ring (6) surrounding the semiconductor element (2) and the electrode pad (3a, 3b, 3c) and provided on the main plane of the semiconductor base plate (1); - an insulating film (7), (i) covering an entire area of ​​a semiconductor of the main plane of the semiconductor base plate (1) that is exposed within the guard ring (6) from the electrode pad (3a, 3b, 3c), and (ii) covering the guard ring (6) and part of the semiconductor base plate (1) outside the guard ring (6), and - a metal foil (4) provided on the back of the semiconductor base plate (1), where: - the insulating film (7) is made of a waterproof material and - the rear metal foil (4) is connected to the electrode pad (3a, 3b, 3c) via a through hole (5) in the semiconductor base plate (1). [2] Semiconductor device according to claim 1, wherein the guard ring (6) consists of a conductive semiconductor and the insulating film (7) covers the entire guard ring (6). [3] Semiconductor device according to claim 1, wherein the guard ring (6) is metallic. [4] Semiconductor device according to claim 3, wherein a part of the insulating film (7) on the electrode pad (3a, 3b, 3c) is open. [5] Semiconductor device according to any one of the preceding claims, wherein the semiconductor base plate (1) is either a Si base plate, a GaAs base plate, an InP base plate, a SiC base plate or a GaN base plate.

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