Method for determining the resistance deflection of a Wheatstone bridge in a high-temperature environment and arrangement for detecting pressure with a pressure diaphragm

Abstract

Method for determining the resistance deflection of a Wheatstone bridge in a high-temperature environment, where The Wheatstone bridge is powered by an ASIC circuit, and the output voltage derived from the Wheatstone bridge is used as an input voltage signal (V). IN ) is passed to an ASIC signal path and in a first step is converted into a current signal, wherein in a second step the current signal is converted into a time signal and the time signal into a pulse width modulated (PWM) signal, wherein the value of a relative resistance deflection (ΔR / R) of the Wheatstone bridge is determined from the time lengths within the phase sequence of the pulse width modulated signal, characterized by the fact that the input voltage (V IN) before being passed to an instrumentation amplifier (INA) to a first switching matrix (SW1), whereby the first switching matrix performs a time-controlled switching between the input voltage signal (V) IN ), an inverted input voltage signal (V INV ), a zero-voltage signal V IN =0, V inp =V inn =V REF / 2 and a span-voltage signal V IN =V REF / K is performed, where K is a device-dependent factor, wherein a second switching matrix initiates a charging and discharging cycle of a capacity (C) and a conversion of a differential signal between V inp and V inn a time signal is generated and a digital component (DIG) switches between the charging and discharging cycles of the capacity, the pulse width modulated signal (PWM) is output via a comparator circuit (COMP) and the digital section (DIG).

Description

[0001] The invention relates to a method for determining a resistance deflection of a Wheatstone bridge in a high-temperature environment according to claim 1 and an arrangement for detecting a pressure with a pressure diaphragm according to claim 10.

[0002] Various sensor evaluation circuits for Wheatstone bridges are known from the prior art. Both analog and digital evaluation circuits are used.

[0003] US Patent 4,934,188 A discloses a flow sensor for temperature detection. The patent discloses a device and a circuit consisting of a flow tube and temperature sensor elements. The resistances of these elements are temperature-dependent. The temperature sensor elements are connected together with fixed resistors to form a Wheatstone bridge. The output signal obtained from the Wheatstone bridge is applied as an input signal to a differential amplifier and then converted via a voltage-to-frequency converter circuit into a signal whose frequency is a measure of the voltage supplied by the Wheatstone bridge.

[0004] US Patent 2016 / 0097693 A1 discloses an algorithm for correcting offset drift in periodic signals. The patent addresses drift correction in recurring measurement cycles, particularly in pressure measurements in cyclically operating internal combustion engines. According to the disclosed teaching, the procedure involves first determining a target value for a measured parameter within the measurement cycles. Based on this, a difference between the target value and a signal corresponding to the measured value is determined. The number of steps required to align the drifting measurement signal with the target value is then calculated.

[0005] DE 10 2007 052 ​​215 A1 discloses a method for detecting the breakage of a resistive sensor, a breakage detection device, a pressure sensor, a force sensor, a transmitter, and a scale. According to the teaching disclosed therein, a comparison is provided between an excitation voltage at the resistive sensor or a corresponding series resistance voltage on the one hand and a predetermined reference voltage on the other. The circuit registers the exceeding of a defined maximum voltage deviation as a breakage of the sensor and outputs a corresponding signal.

[0006] The use of amplifier circuits to amplify and condition the analog output signal of the Wheatstone bridge is a known practice. The resulting sensor value is transmitted to a control unit via a connection. Such systems are available for temperatures ranging from -40 to 225°C, but they are expensive. However, use in high-temperature environments presents additional requirements that are not, or only inadequately, met by existing designs. None of the available circuits are suitable for operating the sensor and ASIC in different, independent temperature ranges.

[0007] Currently, temperature drift in the measuring bridge and its evaluation circuitry is compensated for by additional circuit components based on the ASIC temperature, which significantly increases the complexity of the circuit. However, this only compensates for linear effects through calibration, and additional steps are required before commissioning. The aging of necessary trim resistors, which are essential for such calibration, is not yet taken into account, even though they have a significant impact on the accuracy of the measurement result, especially in high-temperature environments.

[0008] Digital corrections are performed after analog-to-digital conversion through additional measurements and calibrations. A high-temperature ADC and the digital circuitry significantly increase the system's complexity in high-temperature applications. Calibrating such a system also requires storage for the acquired calibration data, which must be determined during commissioning. Here, too, aging effects are not currently taken into account, and the measured value is corrected using interpolated, mostly linear approximations.

[0009] The task is therefore to specify a method by which the evaluation of the measurement signal given by a Wheatstone bridge can be carried out in a high-temperature environment, whereby the complex influences of aging and temperature can be practically eliminated with minimal circuitry effort.

[0010] The problem is solved by a method for determining the resistance displacement of a Wheatstone bridge in a high-temperature environment, comprising the features of claim 1. The dependent claims contain advantageous and / or expedient embodiments of the method.

[0011] The procedure for determining a relative resistance displacement ΔR / R of a Wheatstone bridge in a high-temperature environment includes the following steps: The output voltage derived from the Wheatstone bridge is passed as an input voltage signal to an ASIC signal path and, in a first step, converted into a current signal, whereby the current signal is converted in a second step into a time signal and the time signal into a pulse-width modulated signal, whereby the value of a relative resistance deflection of the Wheatstone bridge is determined from the time lengths within the phase sequence of the pulse-width modulated signal.

[0012] The method is characterized according to the invention in that the input voltage is passed to a first switching matrix before being passed to an instrumentation amplifier, wherein the first switching matrix performs a time-controlled switching between the input voltage signal, an inverted input voltage signal, a zero-voltage signal, V inp =V inn =V REF / 2 and a span voltage signal V IN =V REF / K is performed, where K is a device-dependent factor. V inp is the voltage at a positive V IN -Node at the first switching matrix, V inn the voltage at a negative V IN -Node at the first switching matrix and V REF the bridge reference voltage.

[0013] A second switching matrix initiates a charging and discharging cycle of a capacity, and a differential signal is converted between V. inp and V inninto a time signal and a digital section switches between the charging and discharging cycles of the capacity, with the pulse width modulated signal being output via a comparator circuit and the digital section.

[0014] In one configuration, the input voltage is converted into a current signal via an instrumentation amplifier. This current signal is summed with an offset current to form a total current signal. Subsequently, the total current signal is converted into a time signal using a capacitor, and this time signal is then transmitted via a comparator to a digital section for generating a pulse-width modulated signal.

[0015] In one embodiment, the input voltage is passed to a first switching matrix before being passed to the instrumentation amplifier, wherein the first switching matrix performs a time-controlled switching between the input voltage signal, an inverted input voltage signal, a zero voltage signal and a span voltage signal.

[0016] In one embodiment, the instrumentation amplifier is designed as a voltage / current transformer with a resistor and the input current signal as the output value, wherein a differential signal between a positive node of the input voltage signal and a negative node of the input voltage signal is applied via a first and a second amplifier input, and a subsequent summation of the input current signal with the offset current signal takes place via a transistor circuit.

[0017] In another embodiment, the offset current signal is generated via a circuit consisting of a bandgap source, a (largely) temperature-independent resistor and an amplifier in conjunction with a current mirror, wherein the current mirror simultaneously generates currents for the charging and discharging cycles of the capacitance and the currents generated by the circuit are proportional to the temperature.

[0018] In one embodiment, the comparator circuit is operated as part of a precision Schmitt trigger, with an RS flip-flop of the precision Schmitt trigger being operated as part of the digital section.

[0019] The digital part is designed as a finite-state machine, whereby the digital part performs a switch to the next state when a lower or upper voltage limit is detected by the comparator circuit, with the states being switched cyclically.

[0020] In this embodiment, the states are grouped into a series of phases, each phase including a charging process of the capacity and a PWM high state as well as a discharging process with a PWM low state, with the states being switched serially by the digital part DIG.

[0021] In one embodiment of the method, a bridge temperature sensor is provided in the area of ​​the Wheatstone bridge, wherein a voltage generated by the bridge temperature sensor is projected onto a reference resistor by means of an amplifier circuit to generate a temperature sensor current, wherein the temperature sensor current discharges the capacitance in one of the phases, the discharge time corresponding to a duration of one of the phases within the phase sequence in the PWM signal.

[0022] The resistance deflection is determined in particular by evaluating the time lengths of the phases within the phase sequence of the PWM signal, whereby measurement offsets and interference influences are eliminated by forming a ratio.

[0023] One application of the method is, in particular, the detection of pressure using a Wheatstone bridge and the detection of the relative resistance deflection of the Wheatstone bridge. The Wheatstone bridge is applied to a pressure diaphragm by means of a thin-film coating, whereby the expansion of the pressure diaphragm caused by the pressure change results in a change in the resistance of the Wheatstone bridge.

[0024] An arrangement for sensing pressure, consisting of a pressure diaphragm and a Wheatstone bridge circuit applied to the diaphragm via a thin-film coating, is designed such that the Wheatstone bridge circuit exhibits a relative resistance deflection resulting from deformation of the pressure diaphragm. A component combining the pressure diaphragm and the ASIC, along with a PWM signal output for connection to a downstream evaluation unit, is also included.

[0025] This involves an ASIC signal path consisting of a first switching matrix, an instrumentation amplifier, a second switching matrix, a comparator circuit, and a digital section. The instrumentation amplifier and an external resistor are used for current conversion, and a capacitor is used for conversion to a time signal. The second switching matrix initiates a charging and discharging cycle for the capacitor, and the digital section switches between the charging and discharging cycles and between the external and other internal signals.

[0026] The pulse-width modulated signal output by the comparator circuit and the digital section has pulse lengths for subsequent processing and determination of the relative resistance deflection. The circuit can calculate and assign any errors to individual phases within the pulse-width modulated signal. A correction algorithm then calculates the relative resistance deflection from the time lengths of individual phases of the pulse-width modulated signal.

[0027] In one embodiment, a temperature sensor is additionally arranged in the area of ​​the Wheatstone bridge on the pressure diaphragm.

[0028] The method and arrangement for detecting pressure will be explained in more detail below using exemplary embodiments. The following serve to illustrate this: Fig. 1 to 11. The same reference symbols are used for identical or equivalent components.

[0029] It shows: Fig. 1. An exemplary equivalent circuit diagram of a Wheatstone bridge, Fig. 2 an exemplary equivalent circuit diagram of an ASIC signal path according to the invention, Fig. 3 an exemplary equivalent circuit diagram of an instrumentation amplifier, Fig. 4 an exemplary equivalent circuit diagram of an input stage, Fig. 5 an exemplary equivalent circuit diagram for generating the offset current I0, Fig. 6 An exemplary equivalent circuit diagram of a generator for generating the reference voltage V REF , Fig. 7 an exemplary equivalent circuit diagram of a temperature sensor, Fig. 8 a diagram to illustrate the relationship between time duration and voltage difference, Fig. 8a an exemplary phase sequence of the PWM signal with a representation of an exemplary delay generator for generating the PWM signal arranged below it, Fig. 9 an exemplary representation of the processing of the PWM signal for measuring bridge calibration and for reading the measured value, Fig. 10 an exemplary arrangement of the circuit components on a circuit board, Fig. 11 an exemplary representation of a pressure sensor.

[0030] The following description of exemplary embodiments of the method is based on exemplary components that together form a pressure sensor front end. This consists of a pressure diaphragm with a Wheatstone bridge, a power supply ASIC, which may optionally be designed with two separate analog and digital power supplies, and a signal ASIC with external adjustment resistors, which serves as a sensor interface ASIC.

[0031] The basic idea behind the method described below is to determine the relative resistance deflection of a Wheatstone bridge using an analog circuit, i.e., without analog-to-digital conversion. This is achieved by first tapping the output voltage of the Wheatstone bridge and then converting it into a current. This current essentially serves as the charging current for a capacitor present in the analog circuit. The circuit implements a series of clocked charging and discharging cycles on the capacitor. The duration of these charging and discharging cycles depends on the respective current flow. The circuit registers when the corresponding charging or discharging cycles are completed, thus ultimately transforming a current measurement into the measurement of individual time intervals.These measured time lengths are now converted by the circuit into a pulse-width modulated signal, whereby the time lengths of the individual phases, in particular their ratios and differences, are evaluated by a downstream processing unit.

[0032] It turns out that, through the time recording explained below and the associated evaluation of the time signals, all temperature dependencies and aging effects of the Wheatstone bridge and the circuit components in the signal path can be eliminated.

[0033] The following description focuses primarily on the signal ASIC and its interaction with the Wheatstone bridge.

[0034] The measurement signal derived from the Wheatstone bridge is processed and output as a time signal, i.e., a pulse-width modulated signal. In the example shown here, the power supply and signal transmission are handled via separate lines. However, an implementation with two combined lines is also possible. In such a case, the power supply for both the ASICs and the Wheatstone bridge is provided via an offset output current of, for example, 4 mA.

[0035] The operating temperature range of both the Wheatstone bridge and the ASIC is between 0 °C and 300 °C, thus also including the high temperature range.

[0036] Fig. Figure 1 shows an exemplary equivalent circuit diagram of a Wheatstone bridge. In this example, it consists of four resistors R1, R2, R3, and R4. If the Wheatstone bridge is to serve as an electrical component of a pressure sensor, it can, for example, be applied to a pressure diaphragm using thin-film technology. In such a case, a change in external pressure changes the expansion of the diaphragm and thus also the resistance of the Wheatstone bridge, which manifests itself as a change in resistance ΔR.

[0037] A simple linear regulator is used to supply power to the Wheatstone bridge. As explained below, this generates a bridge reference voltage V. REF based on a bandgap voltage and an attached reference voltage divider.

[0038] For the in Fig. The following relationships apply to the equivalent circuit shown in step 1: VIN=VR2−VR4; VR2 / VREF=R2 / (R1+R2) and VR4 / VREF=R4 / (RR3+R4).

[0039] In an ideally balanced state, under the balancing pressure, all resistances R1 to R4 are identical and equal to a single resistance R. Therefore, in the Fig. 1 shown circuit diagram V IN = 0. Due to a suitable arrangement of the resistors, the following applies under an applied measuring pressure: R1=R4=R−ΔR and R2=R3=R+ΔR

[0040] Together with the relationships mentioned above, it follows that: V IN = ΔR / R · V REF . V IN This is the output voltage at the Wheatstone bridge and simultaneously the input voltage, which is processed in the subsequent signal path, especially in the signal ASIC.

[0041] V REF Here, is the supply voltage of the bridge. R is the nominal resistance and total resistance of the bridge – this can be specified, for example, as 5 to 10 kΩ.

[0042] The effect of pressure on resistance can be described as follows: ΔR / R = f (p, T, t) = S(T, t) · Δp / p + Z(T, t). This relationship involves a strong dependence on the material and structure of the pressure diaphragm (both of which are only indirectly considered in the formula), temperature, and time, i.e., aging, and is therefore very complex. The ASIC used to measure this quantity should therefore not increase the complexity of the evaluation by further distorting the measurement signal.

[0043] Fig. Figure 2 shows an exemplary signal path that can be used in the method according to the invention.

[0044] A difference signal between V INP (positive V IN -node) and V INN (negative VIN node) is connected to a first switching matrix SW1 and is processed in an instrumentation amplifier INA via an external resistor R G into a stream I Gconverted, with the two input signals corresponding to the bridge output. The resulting current signal I G The signal is summed with an offset current I0. The resulting signal is then converted into a time signal via a capacitor C. A digital section DIG switches between the capacitor's charging and discharging cycles, and between the external and other internal signals. These cycles are initiated by a second switching matrix SW2. A pulse-width modulated (PWM) signal is then output via a comparator circuit COMP and the digital section DIG. The pulse lengths of this PWM signal are subsequently processed, and the relative resistance deflection ΔR / R is determined from them. The following subsections will discuss the details of the blocks shown here.

[0045] In the first switching matrix SW1, a switch is made between the input signal, the inverted input signal, a zero signal (V). REF / 2 at both inputs of the INA instrumentation amplifier) ​​and a span signal (V INP - V INN = V REF / K). K is a device-dependent factor. The three additional circuits make it possible to compensate for any errors, especially amplifier offsets, current mirror errors, and auxiliary currents, of the ASIC and are assigned to the individual phases in the PWM signal in the order mentioned.

[0046] Fig. Figure 3 shows an example equivalent circuit of the instrumentation amplifier INA. In this example, the instrumentation amplifier is an amplifier circuit consisting of an amplifier A1 and an amplifier A2 in conjunction with a resistor R. G to generate the current signal I G .

[0047] The amplifier A1 acts as a current source for I G (if V GP > V GN ; otherwise as a current sink) and maintains the voltage V GP equal to V INPTherefore, V holds true. GP =V INP +V A1 The amplifier A2, in turn, holds V GN equal to V INN Therefore, the following applies: VGN=VINN+VA2.

[0048] V A1 and V A2 These are so-called amplifier offsets. They are caused by a voltage difference across R. G will the current I G generated. With a negative I G I0 serves as a source as long as I0 + I G > 0. This means that current should always flow through the transistor whose gate is controlled by A2. Otherwise, the accuracy drops considerably. The following applies to the entire circuit diagram: I G = [(V INP - V INN ) + (V A1 - V A2 )] / R G . Here V A1 - V A2 = V INA the resulting offset voltage of both amplifiers.

[0049] Fig. Figure 4 shows an exemplary equivalent circuit diagram of an input stage, which is essentially of the embodiment according to Figure 4. Fig. 3 corresponds. In the embodiment presented here, a current mirror CM is also provided. This generates an offset current I0.

[0050] Fig. Figure 5 shows an exemplary equivalent circuit for generating the offset current I0. The generation of I0 is implemented in two blocks. The first block is a bandgap source which, in addition to the operating currents, also generates IPTAT currents (i.e., currents proportional to temperature) and from these an internal bandgap voltage V. BGI This voltage is generated. This voltage serves as a reference for two blocks. One of these is the bridge operating voltage generation V. REF and secondly, the generation of the offset current I0 and all currents derived from it.

[0051] The I PTAT - and V BGIThe voltage generation can be dimensioned via the diodes used. Generally, R is used. BG_PTAT_ADJ the absolute value of IPTAT1 is set and R BG_TDRIFT_ADJ the temperature behavior of V BGI IPTAT2 is derived from IPTAT1. Amplifier A4 regulates V BG equal to V BGI and via the resistance R BG will V BG transformed into the "original I0". The streams I0, I BP1 , I BP2 and I BN1 These currents are derived from the "ur-I0" via a current mirror. The last three currents are used for the charging and discharging cycles of the capacity C.

[0052] The equation for I0 is accordingly as follows: I0=Iur0⋅GM1+IM1=VBGI+VA4RBG⋅GM1+IM1

[0053] V applies here BG = V BGI + V A4 . Analogous to the blocks before, V A4 the amplifier offset of A4, G M1This is the current-mirror transformation ratio. For example, this is 4 : 2 – that is, 0.5. M1 This is the mirror offset current. It is normally in the pA to nA range. It can be neglected because it is very small compared to the other currents, which are in the range of a few µA.

[0054] The in Fig. The two identifiable comparators COMP are part of a precision Schmitt trigger, whose RS flip-flop is located in the digital section DIG. The comparator detects when the upper and lower charge levels of the capacitor C are reached and reports this to the digital section.

[0055] The digital section DIG is implemented as a finite state machine. Whenever the upper or lower voltage limit is detected by the comparators, the digital section switches from one state to the next, with the first state following after the last state is completed.

[0056] In this example, the states are grouped into seven phases, 0 to 6. Each phase includes a charging process of the capacity. Fig. 2 with one PWM signal state high and one discharge process with one PWM signal state low.

[0057] Accordingly, there are a total of 14 states that the digital section DIG switches through sequentially. Depending on the phase, the switching matrix SW1 and the switching matrix SW2 are brought into a defined state such that each phase is assigned a signal.

[0058] The assignment is, for example, as follows: Phase 0: Synchronization (the high time is twice as long as in the other phases), Phase 1: Bridge signal, Phase 2: inverted bridge signal, Phase 3: Zero signal, Phase 4: Span signal, Phase 5: external temperature sensor, Phase 6: Internal temperature sensor (IPTAT).

[0059] The signal information is always contained in the discharge times, i.e., the low times in the PWM signal waveform. The charge times serve solely for synchronization. The equations for the discharge currents in the individual phases are as follows: IP0=C⋅ΔUtL0=IBN1 IP1=C⋅ΔUtL1=(I0+IG1)⋅GM2+IM2+IP0 IP2=C⋅ΔUtL2=(I0+IG2)⋅GM2+IM2+IP0 IP3=C⋅ΔUtL3=(I0+IG3)⋅GM2+IM2+IP0 IP4=C⋅ΔUtL4=(I0+IG4)⋅GM2+IM2+IP0 IP5=C⋅ΔUtL5=(IPT1+IP0) IP6=C⋅ΔUtL6=IPTAT1⋅GM3+IM3+IP0

[0060] In the equations mentioned, C is the capacity according to Fig. 2, ΔU the voltage range of the comparators, G M2 a current mirror factor, which ideally equals 1, and I M2 the offset of the same current mirror. For G M3 and I M3 The same applies as for sizes G M2 and I M2 .

[0061] The following section will discuss the generation of the reference voltage V. REF This will be discussed in more detail. As already mentioned, the internal bandgap voltage V is used in the examples shown here. BGI used as a reference to determine the bridge operating voltage V REF to generate. The equivalent circuit for this is in Fig. 6 shows an example. Amplifier A3 maintains a voltage V loop , which is equal to the voltage V BGI is. Through a voltage divider consisting of the resistors R REF1 and R REF2 The output voltage V REFhigher. The equation for this is: VREF=(VBGI+VA3)⋅RREF1+RREF2RREF1=(VBGI+VA3)⋅(1+RREF2RREF1)

[0062] The voltage V A3 This represents the offset voltage of amplifier A3.

[0063] Based on the current I ZT3 = I ur0 / 2 A voltage is generated via a temperature-dependent resistor located on the sensor membrane. This is measured by means of a Fig. Amplifier circuit A7 shown in section 7 is connected to a reference resistor R. REF_PT5000 projected. Thus, a current I is projected there. PT1 generated, which discharges the capacity in phase 6.

[0064] The corresponding equations are: IZT3=VBG1+VA4RBG⋅GM4+IM4 and IPT1=IZT3⋅RPT5000+VA7RREF,PT5000

[0065] In the first equation, the current I can be calculated. M4 be neglected. V A7This is the offset voltage of amplifier A7. This current, which depends on the bridge temperature, can be used to compensate for the temperature dependence of the bridge.

[0066] The bridge signal can be calculated from the aforementioned equations. Phases 1, 3, and 4 mentioned above are required for this calculation. Their phase lengths are determined by the discharge times. The reciprocal discharge times can be determined as follows: 1tL1=(I0+IG1)⋅GM2+IM2+IP0C⋅ΔU 1tL3=(I0+IG3)⋅GM2+IM2+IP0C⋅ΔU 1tL4=(I0+IG4)⋅GM2+IM2+IP0C⋅ΔU

[0067] After subtraction and quotient formation, the following expression is obtained from these equations, from which the relative resistance deflection ΔR / R can be determined solely from the discharge times and thus from the corresponding phase durations in the PWM signal, whereby all offsets and other unknown quantities are eliminated: 1tL1−1tL31tL4−1tL3=(VINP−VINN)⋅KVREF=ΔRR⋅K.

[0068] K is a constant determined by the design and easily ascertainable through calibration. Using phase 2 of the PWM signal, the thermoelectric effects of different materials, which lead to the so-called Seebeck effect, can be at least partially eliminated. The following equation is used for this purpose, and the reciprocal of time 1 / t is applied accordingly. L2 resolved: 1tL2=(I0+IG2)⋅GM2+IM2+IP0C⋅ΔU

[0069] Subtraction finally yields: 1tL1−1tL2=(IG1−IG2)⋅GM2C⋅ΔU=(VINP−VINN)⋅2GM2RG⋅C⋅ΔU

[0070] Analogous to the equation mentioned above, the following relationship can now be established: 1tL1−1tL21tL4−1tL3=(VINP−VINN)⋅2⋅KVREF=ΔRR⋅2⋅K.

[0071] In this expression, all temperature and aging effects of the ASIC are compensated: Both internal effects, such as amplifier offsets, and the influence of external resistances are eliminated.

[0072] Parasitic components can be compensated for via calibration together with the bridge. The bridge temperature is determined via the reciprocal of the duration of phase 5: 1tL5=IPT1+IP0C⋅ΔU and you get: 1tL5−1tL0=IPT1C⋅ΔU=IZT3⋅RPT5000+VA7RREF⋅PT5000⋅C⋅ΔU.

[0073] The IC temperature is analogous to the bridge temperature: 1tL6−1tL0=IPTAT1⋅GM3+IM3C⋅ΔU.

[0074] Fig. Figure 8 additionally shows a diagram illustrating the dependence of a potential difference ΔU on a charging or discharging time Δt across a capacitor, assuming a constant current. Voltage differences can thus be directly converted into time intervals. In the method presented here, a charging process is signaled by a high signal (logic 1), and a discharging process by a low signal (logic 0). This principle can be implemented with temperature stability because a voltage divider for generating the voltage difference ΔU on an integrated circuit can be designed such that the temperature dependencies cancel each other out. The capacitor also exhibits no temperature dependence. Therefore, the duration of the phases in the PWM signal is also independent of temperature.

[0075] Fig. Figure 8a shows an exemplary phase sequence of the PWM signal with a representation of an exemplary delay generator for generating the PWM signal arranged below it.

[0076] As can be seen from the signal sequence, the PWM signal consists of individual phases, each of which is evaluated separately. The individual phases have a characteristic duration, determined by the discharge behavior of the capacitor. In each phase, the durations of the low states are evaluated as mentioned above, depending characteristically on the applied currents.

[0077] The respective assignment between the individual currents and the capacitance is carried out via the clocked switching matrix, which works together with a second switching matrix referred to here as a decider, ultimately outputting the PWM signal.

[0078] Fig. Figure 9 shows an example of processing the PWM signal for measuring bridge calibration and reading the measured value. The PWM signal is passed to a SYNC circuit for synchronization and timing measurement, which measures the length of the high and low sections within the individual phases 0 to 6. In this case, only the low states of the individual phases and their respective duration t are measured. L recorded.

[0079] A subsequent correction algorithm then calculates from the t L The values ​​of phases 1, 3, and 4 provide the corresponding measured value for the resistance deflection ΔR / R. The individual calculation steps of the correction algorithm are implemented in hardware via appropriate circuits. Additionally, a value for the bridge temperature is transmitted via phase 6 of the PWM signal, which is used as a further value in the calibration of the Wheatstone bridge.

[0080] Fig. Figure 10 shows an exemplary block diagram of the overall arrangement for carrying out the method. The arrangement is formed by an integrated sensor front end 1, which can be installed and replaced as a whole. In this case, the front end comprises a series of ceramic circuit boards 2 on which the corresponding electronic components are arranged together with their conductor tracks.

[0081] The components of the Wheatstone bridge 3 are located on a first ceramic circuit board, along with a temperature sensor, which is previously separated by the resistor R. PT5000 has been realized.

[0082] A second ceramic circuit board contains a first ASIC circuit 4, a temperature sensor 5, and the bandgap generator 6. Next to the ASIC, a series of adjustable resistors are provided for setting an offset 7 and the bandgap reference voltage 8.

[0083] The second ceramic board also contains a second ASIC 9, which serves for voltage regulation. Furthermore, a power supply 10 is assigned to the aforementioned components.

[0084] Fig. Figure 11 shows an exemplary pressure sensor 11 in which the described method can be used. The pressure sensor has a pressure diaphragm 12, which has a Wheatstone bridge 13 on its surface in the form of a circuit applied using thin-film technology. A temperature sensor 14 is located in the immediate vicinity of the printed Wheatstone bridge. This can also be arranged in the area of ​​the Wheatstone bridge 13.

[0085] The electronic components 15, i.e., in particular the aforementioned ASIC components for generating the PWM signal, are located directly next to the pressure diaphragm 12. The entire arrangement consists of Fig.11 is housed in a single enclosure, so that the electronics are located in close proximity to the pressure sensors and are exposed to the same physical conditions, in particular the same pressure and temperature influences.

[0086] The subject matter of the invention has been explained with reference to exemplary embodiments. Further embodiments are possible within the scope of expert knowledge. These are also described in the dependent claims. Reference symbol list A1, A2, A3, A4 Amplifier A5, A6, A7 Amplifier C capacity CM power mirror COMP comparator circuit DIG Digital Section INA instrumentation amplifier PWM Pulse Width Modulated Signal R1, R2, R3, R4 resistors in Wheatstone bridge ΔR resistance change SW1 first switching matrix SW2 second switching matrix SYNC synchronization circuit V REF Bridge reference voltage 1 Sensor front end 2 ceramic circuit boards 3 Wheatstone Bridge 4 ASIC circuits 5 Temperature sensor 6 Bandgap Generator 7 Resistor for offset adjustment 8 Resistance for bandgap adjustment 9 second ASIC circuit 10 Power supply 11 Pressure sensor 12 Pressure diaphragm 13 Wheatstone bridge as a thin-film coating 14 Temperature sensor at Wheatstone bridge 15 Electrical components

Claims

[1] Method for determining the resistance displacement of a Wheatstone bridge in a high-temperature environment, where The Wheatstone bridge is powered by an ASIC circuit, and the output voltage derived from the Wheatstone bridge is used as an input voltage signal (V). IN ) is passed to an ASIC signal path and in a first step is converted into a current signal, wherein in a second step the current signal is converted into a time signal and the time signal into a pulse width modulated (PWM) signal, wherein the value of a relative resistance deflection (ΔR / R) of the Wheatstone bridge is determined from the time lengths within the phase sequence of the pulse width modulated signal, characterized by , that the input voltage (V IN) before being passed to an instrumentation amplifier (INA) to a first switching matrix (SW1), whereby the first switching matrix performs a time-controlled switching between the input voltage signal (V) IN ), an inverted input voltage signal (V INV ), a zero-voltage signal V IN =0, V inp =V inn =V REF / 2 and a span-voltage signal V IN =V REF / K is performed, where K is a device-dependent factor, wherein a second switching matrix initiates a charging and discharging cycle of a capacity (C) and a conversion of a differential signal between V inp and V inn a time signal is generated and a digital component (DIG) switches between the charging and discharging cycles of the capacity, the pulse width modulated signal (PWM) is output via a comparator circuit (COMP) and the digital section (DIG). [2] Method according to claim 1, characterized by , that the input voltage is converted via the instrumentation amplifier (INA) into an input current signal (I) G ) is transferred and the input current signal (I G ) with an offset current signal (I0) to a total current signal (I SUM ) is summed, whereby the total current signal is converted into a time signal by means of a capacitor (C), wherein the time signal is transmitted via a comparator circuit (COMP) to the digital part (DIG) to generate a pulse width modulated signal (PWM). [3] Method according to claim 2, characterized by that the instrumentation amplifier (INA) is a voltage / current transformer with a resistor (R) G ) and the input current signal (I G ) is configured as an output value, wherein a differential signal between a positive node (V) is generated across a first and a second amplifier input, and a differential signal is generated between a first and a second amplifier input. INP ) of the input voltage signal (V IN) and a negative node (V INN ) of the input voltage signal (V IN ) is applied and a subsequent summation of the input current signal (I G ) with the offset current signal (I0) via a transistor circuit. [4] Method according to claim 2, characterized by , that the offset current signal (I0) is generated via a circuit consisting of a bandgap source and an amplifier (A4) in conjunction with a current mirror, the current mirror simultaneously generating currents (I BP1 and I SP2 ) for the charging and discharging cycles of the capacity (C) and the currents generated by the circuit are proportional to the temperature. [5] Method according to claim 2, characterized by , that the comparator circuit (COMP) is operated as part of a precision Schmitt trigger, with an RS flip-flop of the precision Schmitt trigger being operated as part of the digital part (DIG). [6] Method according to one of claims 2 or 5, characterized by , that the digital part (DIG) is designed as a finite state machine, wherein the digital part performs a switching to the next state when a lower and / or an upper voltage limit is detected by the comparator circuit (COMP), with the states being switched cyclically. [7] Method according to claim 6, characterized by , that the states are grouped into a series of phases, each phase including a charging process of the capacity (C) and a PWM state high as well as a discharging process with a PWM state low, with the states being switched serially by the digital part (DIG). [8] Method according to claim 1, characterized by, that a bridge temperature sensor is provided in the area of ​​the Wheatstone bridge, wherein a voltage generated by the bridge temperature sensor is projected onto a reference resistor by means of an amplifier circuit (A7) to generate a temperature sensor current, wherein the temperature sensor current discharges the capacitance in one of the phases, wherein the discharge time corresponds to a duration of one of the phases within the phase sequence in the PWM signal. [9] Method according to claim 7, characterized by , that the relative resistance deflection ΔR / R is determined by evaluating the time lengths of the phases within the phase sequence of the PWM signal, whereby measurement offsets and interferences are eliminated by forming a ratio. [10] Arrangement for sensing pressure with a pressure diaphragm (12) and a Wheatstone bridge circuit (13) applied to the pressure diaphragm by means of a thin-film coating, wherein the Wheatstone bridge circuit has a relative resistance deflection ΔR / R caused by deformation of the pressure diaphragm, in conjunction with an ASIC component structurally integrated with the pressure diaphragm and a PWM signal output for connection to a downstream evaluation unit, wherein an ASIC signal path is provided consisting of a first switching matrix (SW1), an instrumentation amplifier (INA), a second switching matrix (SW2), a comparator (COMP) and a digital part (DIG), wherein the instrumentation amplifier (INA) and an external resistor (RG) are provided for current conversion and a capacitor (C) for conversion into a time signal, wherein the second switching matrix (SW2) is used to initiate a charging and discharging cycle of the capacity (C) and the digital part (DIG) is used to switch between the charging and discharging cycle of the capacity (C) and between the external and other internal signals, wherein the pulse width modulated (PWM) signal output by the comparator circuit (COMP) and the digital part (DIG) has temporal pulse lengths for subsequent processing and determination of the relative resistance deflection ΔR / R, wherein any errors can be calculated out by the circuit and assigned to individual phases in the pulse width modulated signal (PWM), wherein the relative resistance deflection ΔR / R can be calculated from the time lengths of individual phases of the pulse width modulated signal (PWM) by means of a correction algorithm. [11] Arrangement according to claim 10, characterized by, that in the area of ​​the Wheatstone bridge (12) an additional temperature sensor (14) is arranged on the pressure diaphragm (12).

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