Semiconductor device, film stack and method for their manufacture

Abstract

Semiconductor device (10), comprising: a first conductive layer (12) over a substrate (20), a second conductive layer (14) above the first conductive layer (12) and electrically connected to it, a barrier layer (16) between the first conductive layer (12) and the second conductive layer (14), and a multilayer film (18) enclosing side walls (14S) of the second conductive layer (14) and covering an upper surface (14U) of the second conductive layer (14), wherein the multilayer film (18) comprises several first metal-containing films (181) and second metal-containing films (182) arranged alternately, the first metal-containing film (181) and the second metal-containing film (182) comprising the same metal element, and the concentration of the metal element in the second metal-containing film (182) being higher than that in the first metal-containing film, wherein the concentration of the metal element in the second metal-containing film (182) being greater than 75%.

Description

STATE OF THE ART

[0001] Tantalum nitride (TaN) film has been widely used in the semiconductor industry due to its anti-diffusion and corrosion protection properties. However, its intrinsically high compressive stress and brittle nature lead to delamination and particle shedding problems in tantalum nitride films that must be addressed. Reference is made to US 2003 / 0 015 799 A1, US 2013 / 0 200 525 A1, US 2014 / 0 131 841 A1, US 2014 / 0 264 867 A1, US 2010 / 0 187 693 A1, and US 2002 / 0 000 665 A1. BRIEF DESCRIPTION OF THE DRAWINGS

[0002] Aspects of the present disclosure are best understood from the following detailed description when read in conjunction with the accompanying figures. It should be noted that, in accordance with industry standard practice, various structures are not drawn to scale. Rather, the dimensions of the various structures may be arbitrarily exaggerated or reduced for clarity of discussion. Fig. 1 is a flow diagram illustrating a method of forming a film stack on a substrate according to some embodiments of the present disclosure. Fig. 2 is a flow diagram illustrating a method of forming a film stack on a substrate according to some embodiments of the present disclosure. Fig. 3 is a flow diagram illustrating a method of forming a film stack on a substrate according to some embodiments of the present disclosure. Fig. 4A is an EDS (energy dispersive spectroscopy) illustrating a film stack of tantalum nitride layers and tantalum-rich tantalum nitride layers according to some embodiments of the present disclosure. Fig. 4B is an EDS illustrating a film stack of tantalum nitride layers and tantalum-rich tantalum nitride layers according to some other embodiments of the present disclosure. Fig. Figure 5A is a schematic diagram illustrating a metal-nonmetal interconnect film formed over a substrate. Fig. Figure 5B is a schematic diagram illustrating a film stack of a metal-nonmetal interconnect film and a metal-rich metal-nonmetal interconnect film formed on a substrate. Fig. 6 is a schematic diagram illustrating a semiconductor device according to some embodiments of the present disclosure. Fig. 7 is a schematic diagram illustrating a semiconductor device according to some embodiments of the present disclosure. Fig. 8 is a schematic diagram illustrating a semiconductor device according to some embodiments of the present disclosure. Fig. 9 is a schematic diagram illustrating a semiconductor device according to some embodiments of the present disclosure. Fig. 10 is a schematic diagram illustrating a semiconductor device according to some embodiments of the present disclosure. DETAILED DESCRIPTION

[0003] The following disclosure provides many different embodiments, or examples, for implementing various features of the present subject matter. Specific examples of elements and arrangements are described below to simplify the present disclosure. For example, in the following description, forming a first feature over or on a second feature may include embodiments in which the first and second features are formed in direct contact, and may also include embodiments in which additional features may be formed between the first and second features such that the first and second features may not be in direct contact. Additionally, the present disclosure may repeat reference numbers and / or letters throughout the various examples.This repetition is for the purpose of simplicity and clarity and does not, in itself, prescribe any relationship between the various embodiments and / or configurations discussed.

[0004] In addition, terms relating to spatial relativity, such as "beneath," "under," "lower," "above," "upper," "upon," and the like, may be used herein for ease of discussion to describe the relationship of one element or feature to another element or feature(s) as illustrated in the figures. The terms relating to spatial relativity are intended to encompass various orientations of the device being used or operated in addition to the orientation illustrated in the figures. The device may be oriented in a different manner (rotated 90 degrees or oriented differently), and the terms relating to spatial relativity used herein may be equally construed accordingly.

[0005] As used herein, terms such as "first" and "second" describe various elements, components, regions, layers, and / or sections. These elements, components, regions, layers, and / or sections should not be limited by these terms. These terms may only be used to distinguish one element, component, region, layer, or section from another. Terms such as "first" and "second," when used herein, do not imply a sequence or order unless clearly indicated by the context.

[0006] As used herein, the term "metal-containing film" refers to a metal film, a metal-nonmetal compound film, an alloy film, or any other film comprising a metallic material. The first metal-containing film and the second metal-containing film comprise the same metallic element(s), and the concentration of the metallic element in the second metal-containing film is higher than the concentration of the metallic element in the first metal-containing film. In this context, the term "first metal-containing film" and the term "metal-nonmetal compound film" (or "metal-poor metal-nonmetal compound film") are interchangeable, and the term "second metal-containing film" and the term "metal-rich metal-nonmetal compound film" are interchangeable.

[0007] As used herein, the terms "metal-rich metal-nonmetal interconnect film" and "metal-nonmetal interconnect film" refer to two metal-nonmetal interconnect films that have substantially the same metal and nonmetal components but in different ratios. In some embodiments, the concentration of a metal component in a metal-rich metal-nonmetal interconnect film is comparatively higher than that in a metal-nonmetal interconnect film. In some embodiments, the concentration of a metal element is higher than the concentration of a nonmetallic element in a metal-rich metal-nonmetal interconnect film. Compared to a metal-rich metal-nonmetal interconnect film, a metal-nonmetal interconnect film may also be referred to as a metal-poor metal-nonmetal interconnect film.

[0008] In the present disclosure, a multilayer film (also referred to as a film stack) is formed by alternately stacking metal-nonmetal interconnect films and metal-rich metal-nonmetal interconnect films. In some embodiments, the multilayer film is designed to provide an adhesive effect to prevent particle shedding. In some embodiments, the multilayer film is designed to reduce stress to prevent peeling. In some embodiments, the multilayer film is designed to reduce resistance to increase electrical characteristics to improve barrier and protection performance.

[0009] Fig. 1 is a flowchart illustrating a method of forming a film stack on a substrate according to some embodiments of the present disclosure. The method 100 begins at operation 110, in which a first metal-containing film is formed over the substrate. The method 100 proceeds to operation 120, in which a second metal-containing film is formed over the first metal-containing film. The first metal-containing film and the second metal-containing film comprise the same metal element, and a concentration of the metal element in the second metal-containing film is higher than that in the first metal-containing film. The method 100 proceeds to operation 130 by repeating operations 110 and 120 to form a film stack from the first metal-containing films and the second metal-containing films, which are alternately arranged until a desired film stack thickness is achieved.

[0010] Method 100 is merely an example and is not intended to limit the present disclosure beyond what is expressly recited in the claims. Additional acts may be provided for additional embodiments of the method before, during, and after method 100, and some described acts may be substituted, eliminated, or shifted.

[0011] In some embodiments, the first metal-containing film and the second metal-containing film comprise the same metallic element and non-metallic element, but differ in the proportions. The concentration of the metallic element in the second metallic film is greater than the concentration of the non-metallic element in the second metallic film. The concentration of the metallic element in the first metallic film is substantially less than or equal to the concentration of the non-metallic element in the first metallic film. According to the invention, the concentration of the metallic element in the second metallic film is greater than 75%. In some embodiments, the concentration of the metallic element in the first metallic film is less than or substantially equal to 50%.

[0012] Fig. 2 is a flow diagram illustrating a method of forming a film stack on a substrate according to some embodiments of the present disclosure. The method 200 begins at operation 210 by sputtering a metal target in the presence of a reactive gas at a first amount to form a first metal-containing film over the substrate. The method 200 continues at operation 220 by sputtering the metal target in the presence of the reactive gas at a second amount less than the first amount to form a second metal-containing film over the first metal-containing film. The method 200 continues at operation 230 by repeating operations 210 and 220 to form a film stack of the first metal-containing films and the second metal-containing films arranged alternately until a desired film stack thickness is achieved.

[0013] In some embodiments, the metal-nonmetal interconnect films and the metal-rich metal-nonmetal interconnect films are formed using, but not limited to, physical vapor deposition (PVD) such as sputtering. In some embodiments, the substrate is placed in a PVD reaction chamber. At operation 210, a bias voltage is applied, and a metal target is sputtered in the presence of a first amount of the reactive gas to form the metal-nonmetal interconnect film. At operation 220, the metal target is sputtered again under the bias voltage, but a second amount of the reactive gas, less than the first amount, is applied to the reaction chamber.The ratio of a metal element to a non-metallic element in the metal-nonmetal compound film or in the metal-rich metal-nonmetal compound film can be adjusted by individually controlling the amount of reactive gas or other parameters of the sputtering process. In some embodiments, the amount of reactive gas is modified by controlling the time period for supplying the reactive gas. For example, the time period for supplying the reactive gas is shorter in operation 220 than in operation 210. In some embodiments, the amount of reactive gas can be adjusted by modifying other parameters, such as a flow rate or a ratio of the reactive gas supplied to the reaction chamber.

[0014] Method 200 is merely an example and is not intended to limit the present disclosure beyond what is expressly recited in the claims. Additional operations may be provided for additional embodiments of the method before, during, and after method 200, and some described operations may be substituted, eliminated, or shifted.

[0015] Fig. 3 is a flow diagram illustrating a method of forming a film stack on a substrate according to some embodiments of the present disclosure. The method 300 begins at operation 310 by sputtering a metal target to form a first metal film, and then treating the first metal film with a reactive gas of a first amount to form the first metal-containing film. The method 300 continues at operation 320 by sputtering the metal target to form a second metal film over the first metal-containing film, and then treating the second metal film with the reactive gas of a second amount less than the first amount to form the second metal-containing film.The method 300 continues with operation 330 by repeating operations 310 and 320 to form a film stack from the first metal-containing films and the second metal-containing films arranged alternately until a desired film stack thickness is achieved.

[0016] Method 300 is merely an example and is not intended to limit the present disclosure beyond what is expressly recited in the claims. Additional acts may be provided for additional embodiments of the method before, during, and after method 300, and some described acts may be substituted, eliminated, or shifted.

[0017] In some embodiments, the metal target comprises a tantalum target, and the reactive gas comprises a nitrogen gas. Accordingly, the metal-nonmetal interconnect film is a tantalum nitride film, and the metal-rich metal-nonmetal interconnect film is a tantalum-rich tantalum nitride film. In some embodiments, the metal target comprises a tantalum target, and the reactive gas comprises an oxygen gas. Accordingly, the metal-nonmetal interconnect film is a tantalum oxide film, and the metal-rich metal-nonmetal interconnect film is a tantalum-rich tantalum oxide film. In some other embodiments, the metal-nonmetal interconnect film and the metal-rich metal-nonmetal interconnect film may comprise other metallic and nonmetallic elements.

[0018] In some embodiments, the desired thickness of the film stack is greater than 120 nanometers (1200 angstroms). In some embodiments, the desired thickness of the film stack is greater than 180 nanometers (1800 angstroms). In some embodiments, the desired thickness of the film stack is greater than 200 nanometers (2000 angstroms). In some embodiments, the desired thickness of the film stack is greater than 300 nanometers (3000 angstroms).

[0019] In alternative embodiments, the second metal-containing films may be metal films. That is, the film stack may comprise alternating metal films and metal-nonmetal interconnect films. The film stack of metal films and metal-nonmetal interconnect films may be formed in various ways. In some embodiments, the metal film is formed by sputtering a metal target in the absence of a reactive gas. The metal-nonmetal interconnect film may be formed by sputtering the metal target in the presence of a reactive gas. In some other embodiments, the metal-nonmetal interconnect film may be formed by sputtering the metal target in the absence of a reactive gas to form a metal film and then treating the metal film with a reactive gas.

[0020] Fig. 4A is an EDS (energy dispersive spectroscopy) illustrating a film stack of tantalum nitride layers and tantalum-rich tantalum nitride layers according to some embodiments of the present disclosure, and Fig. 4B is an EDS illustrating a film stack of tantalum nitride layers and tantalum-rich tantalum nitride layers according to some other embodiments of the present disclosure. As shown in Fig. 4A, the film stack 5 comprises two tantalum nitride layers 5a and two tantalum-rich tantalum nitride layers 5b, which are formed alternately. In the present embodiment, the total thickness of the film stack 5 is approximately 200 nanometers (2000 angstroms), and the thickness of one tantalum nitride layer 5a and one tantalum-rich tantalum nitride layer 5b is approximately 100 nanometers (1000 angstroms). In some embodiments, the thickness ratio of the tantalum-rich tantalum nitride layer 5b to the tantalum nitride layer 5a is approximately 1:4. The thickness ratio of the tantalum-rich tantalum nitride layer 5b to the tantalum nitride layer 5a can be modified, for example, by changing the time duration of operations 210 and 220 in Fig. 2, or by adjusting the amount of a reactive gas during treatment in operations 310 and 320. As in Fig. As shown in Figure 4B, the film stack 5 includes three tantalum nitride layers 5a and three tantalum-rich tantalum nitride layers 5b, which are formed alternately. In the present embodiment, the total thickness of the film stack 5 is approximately 180 nanometers (1800 angstroms), and the thickness of one tantalum nitride layer 5a and one tantalum-rich tantalum nitride layer 5b is approximately 60 nanometers (600 angstroms). In some embodiments, the thickness ratio of the tantalum-rich tantalum nitride layer 5b to the tantalum nitride layer 5a is approximately 1:3.

[0021] As in Fig. 4A and Fig. 4B, the EDS analysis shows distinct peaks and valleys, which means that the film stack comprising the metal-nonmetal compound films and the metal-rich metal-nonmetal compound films can be separated using the above method described in Fig. 1 to 3 disclosed process.

[0022] It is understood that the number and thickness of the metal-nonmetal interconnection films and the metal-rich metal-nonmetal interconnection films are not limited to the above embodiments and can be modified based on a desired requirement and specification.

[0023] A metal-nonmetal interconnect film, such as tantalum nitride film or tantalum oxide film, is used as a protective layer and a barrier layer due to its anti-diffusion and anti-corrosive properties. However, a metal-nonmetal interconnect film suffers from delamination and particle shedding, especially when a thick film thickness is required in some applications. The film stack of the metal-nonmetal interconnect films and the metal-rich metal-nonmetal interconnect films is designed to form a thick protective layer or barrier layer without suffering from delamination or particle shedding.

[0024] In addition to mitigating delamination and particle release, the film stack of metal-nonmetal interconnect films and metal-rich metal-nonmetal interconnect films also reduces stress. Furthermore, the film stack of metal-nonmetal interconnect films and metal-rich metal-nonmetal interconnect films is capable of reducing resistance. Compared with a thick metal-nonmetal interconnect layer, the film stack of metal-nonmetal interconnect films and metal-rich metal-nonmetal interconnect films exhibits lower resistance, leading to improved electrical characteristics.

[0025] Fig. Figure 5A is a schematic diagram illustrating a metal-nonmetal interconnect film formed over a substrate. As shown in Fig. As shown in Figure 5A, a metal-nonmetal compound film 2 is formed on a substrate 1. As the thickness increases, inherent pinholes 3 or grain boundaries 4 tend to propagate along the thickness direction of the metal-nonmetal compound film 2, resulting in delamination. Furthermore, the propagating pinholes 3 and grain boundaries 4 affect the anti-diffusion and anti-corrosion performance of the metal-nonmetal compound film 2 when designed as a barrier layer and a protective layer. Furthermore, particle shedding becomes significant as the thickness of the metal-nonmetal compound film 2 increases to approximately 120 nanometers (1200 angstroms) or more. Particle shedding is expected to result from particles falling off the reaction chamber wall during operation because a metal-nonmetal compound film 2, such as tantalum nitride, has intrinsically large compressive stress and brittle properties.

[0026] Fig. Figure 5B is a schematic diagram illustrating a film stack formed on a substrate comprising a metal-nonmetal interconnect film and a metal-rich metal-nonmetal interconnect film. As shown in Fig. As shown in Figure 5B, the film stack of a metal-nonmetal interconnect film 2a and a metal-rich metal-nonmetal interconnect film 2b is designed to block a propagation path of pinholes 3 and grain boundaries 4. Specifically, the propagation path of pinholes 3 and grain boundaries 4 is blocked at the interface between the metal-nonmetal interconnect film 2a and the metal-rich metal-nonmetal interconnect film 2b. Therefore, the barrier and protection effect of the film stack of the metal-nonmetal interconnect film 2a and the metal-rich metal-nonmetal interconnect film 2b is more reliable. Furthermore, the peeling problem is alleviated.

[0027] The metal-rich metal-nonmetal compound film is also designed as an adhesion layer to mitigate particle shedding. Specifically, since the metal-nonmetal compound film 2a and the metal-rich metal-nonmetal compound film 2b are alternately stacked on the substrate 1, the metal-nonmetal compound film 2a and the metal-rich metal-nonmetal compound film 2b are also formed on the wall of the reaction chamber. The metal-rich metal-nonmetal compound film 2b on the wall of the reaction chamber is capable of adhering the particles of the brittle metal-nonmetal compound film 2a, thereby reducing particle shedding from the wall of the reaction chamber. Accordingly, particle shedding is mitigated, especially when the thickness of the film stack exceeds 120 nanometers (1200 angstroms).

[0028] Fig. 6 is a schematic diagram illustrating a semiconductor device according to some embodiments of the present disclosure. As shown in Fig. 6, the semiconductor device 10 includes a substrate 20, an intermetal dielectric (IMD) layer 11, a first conductive layer 12, a passivation layer 22, a second conductive layer 14, a barrier layer 16, and a multilayer film 18. The substrate 20 includes a semiconductor substrate or wafer over which devices, such as semiconductor devices and other active or passive devices, are to be formed. In some embodiments, the substrate 20 includes a semiconductor substrate, such as a bulk semiconductor substrate. The bulk semiconductor substrate includes an elemental semiconductor, such as silicon or germanium, a compound semiconductor, such as silicon germanium, silicon carbide, gallium arsidate, gallium phosphide, indium phosphide, or indium arsenide, or combinations thereof. In some embodiments, the substrate 20 includes a multilayer substrate, such asan SOI (silicon on an insulator) substrate comprising a bottom semiconductor layer, a buried oxide layer (BOX), and a top semiconductor layer.

[0029] In some embodiments, the IMD layer 11 is a topmost IMD layer, and the first conductive layer 12 is a topmost metallization layer of an interconnect layer. The first conductive layer 12 is formed over the substrate 20, and a portion of the first conductive layer 12 is exposed through the IMD layer 11. The first conductive layer 12 may be treated using a planarization process, such as chemical mechanical polishing (CMP), resulting in a planarized surface that is substantially planar with the IMD layer 11. The material of the first conductive layer 12 may include, but is not limited to, copper, a copper alloy, or copper-based conductive materials, for example. In some embodiments, the IMD layer 11 is a low-k dielectric layer having a dielectric constant less than approximately 3.9.For example, the material of the IMD layer 11 may include, but is not limited to, silicon oxide, silicon nitride, silicon oxynitride, phosphosilicate glass (PSG), borophosphosilicate glass (BPSG), fluorine-containing silicon oxide, or other suitable inorganic and / or organic dielectric materials.

[0030] In some embodiments, the passivation layer 22 is formed over the IMD layer 11 to protect the first conductive layer 12. The passivation layer 22 includes an opening 22H exposing at least a portion of a top surface 12U of the first conductive layer 12. The material of the passivation layer 22 may include, but is not limited to, silicon oxide, such as TEOS oxide, silicon nitride, or any other suitable insulating materials.

[0031] The second conductive layer 14 is formed over the first conductive layer 12 and electrically connected thereto. In some embodiments, the material of the second conductive layer 14 may include, but is not limited to, aluminum or copper. The material of the second conductive layer 14 may include copper or any other suitable conductive materials. In some embodiments, the surface 14U of the second conductive layer 14 is substantially planar.

[0032] The barrier layer 16 is formed between the first conductive layer 12 and the second conductive layer 14. The barrier layer 16 is configured as a diffusion barrier layer to prevent diffusion from the first conductive layer 12. The barrier layer 16 may also be configured to enhance adhesion between the first conductive layer 12 and the second conductive layer 14 and may be configured as a stress buffer layer. The barrier layer 16 may be single-layer or multi-layered. In some embodiments, the barrier layer 16 is conductive. In some embodiments, the material of the barrier layer 16 may include, but is not limited to, tantalum, titanium, tantalum nitride, titanium nitride, tungsten, a combination thereof, or any other suitable conductive and barrier materials. In some embodiments, the barrier layer 16 is substantially conformal to and filled within the opening 22H of the passivation layer 22.

[0033] The multilayer film 18 includes a plurality of metal-nonmetal interconnect films 181 and metal-rich metal-nonmetal interconnect films 182 that are alternately arranged and stacked on top of each other. In some embodiments, the metal-nonmetal interconnect film 181 is a metal nitride film, and the metal-rich metal-nonmetal interconnect film 182 is a metal-rich metal nitride film. For example, the metal-nonmetal interconnect film 181 is a tantalum nitride film, and the metal-rich metal-nonmetal interconnect film 182 is a tantalum-rich tantalum nitride film. In some other embodiments, the metal-nonmetal interconnect film 181 is a metal oxide film, and the metal-rich metal-nonmetal interconnect film 182 is a metal-rich metal oxide film. For example, the metal-nonmetal interconnection film 181 is a tantalum oxide film, and the metal-rich metal-nonmetal interconnection film 182 is a tantalum-rich tantalum oxide film.

[0034] In some embodiments, the thickness of the multilayer film 18 is greater than 120 nanometers (1200 angstroms). In some embodiments, the thickness of the multilayer film 18 is greater than 180 nanometers (1800 angstroms). In some embodiments, the thickness of the multilayer film 18 is greater than 200 nanometers (2000 angstroms). In some embodiments, the thickness of the multilayer film 18 is greater than 300 nanometers (3000 angstroms).

[0035] The concentration of the metal element in the metal-rich metal-nonmetal compound film 182 is greater than the concentration of the non-metallic element in the metal-rich metal-nonmetal compound film 182. According to the invention, the concentration of the metal element in the metal-rich metal-nonmetal compound film 182 is greater than 75%.

[0036] In some embodiments, the multilayer film 18 encloses sidewalls 14A and covers an area 14U of the second conductive layer 14. The multilayer film 18 is designed to prevent the second conductive layer 14 from being corroded during subsequent operations. Because the multilayer film 18, formed from metal-nonmetal interconnect films 181 and metal-rich metal-nonmetal interconnect films 182, is capable of mitigating the propagation of pinholes and grain boundaries, the multilayer film 18 surrounding the second conductive layer 14 can provide a significant barrier and protection effect.Furthermore, since the metal-rich metal-nonmetal compound with a higher amount of a metal element has a reduced resistance compared to a metal-nonmetal compound with a lower amount of a metal element, the multilayer film 18 comprising the metal-nonmetal compound films 181 and the metal-rich metal-nonmetal compound films 182 has a reduced resistance. Compared with a single-layer thick metal-nonmetal compound layer, the multilayer film 18 has a lower resistance, resulting in an improvement in electrical characteristics.

[0037] Fig. 7 is a schematic diagram illustrating a semiconductor device according to some embodiments of the present disclosure. As shown in Fig. 7, one of the differences between the semiconductor device 10A in Fig. 7 and the semiconductor device 10 in Fig. 6 in that the area 14U of the second conductive layer 14 is recessed. Accordingly, the multilayer film 18 comprising the metal-nonmetal interconnection films 181 and the metal-rich metal-nonmetal interconnection films 182 engages the recessed area 14U, thereby improving adhesion between the multilayer film 18 and the second conductive layer 14.

[0038] Fig. 8 is a schematic diagram illustrating a semiconductor device according to some embodiments of the present disclosure. As shown in Fig. 8, a dielectric layer 24 is formed in the semiconductor device 10B surrounding a lateral side of the multilayer film 18. The material of the dielectric layer 24 may comprise any suitable dielectric materials. The multilayer film 18 has an opening 18H exposing at least a portion of the surface 14U of the second conductive layer 14. In some embodiments, a peripheral portion of the surface 14U located near the sidewall 14a of the second conductive layer 14 is covered with the multilayer film 18.

[0039] In some embodiments, the dielectric layer 24 and the opening 18H of the multilayer film 18 may be patterned using the same photolithographic process, but are not limited thereto. For example, the dielectric layer 24 and the multilayer film 18 may be patterned using a wet etch. Therefore, the multilayer film 18 surrounding the sidewalls 14S of the second conductive layer 14 is designed to prevent the second conductive layer 14 from being corroded by etching or cleaning solutions.

[0040] In some embodiments, a portion of the multilayer film 18 extends substantially along the sidewall 14S of the conductive layer 14. Such a portion is configured as a spacer to surround the sidewall 14S. The curvature or morphology of the portion substantially follows the curvature or morphology of the sidewall 14S. Therefore, the multilayer film 18 provides a composite sidewall spacer around the sidewall 14S. The composite sidewall spacer is a metal-containing structure.

[0041] The semiconductor device 10B further includes a conductor 26 over the second conductive layer 14, which is electrically connected to the second conductive layer 14 via the opening 18H of the multilayer film 18. In some embodiments, the conductive feature 26 may be a bond pad, a conductive bump, or any other conductive feature.

[0042] In some embodiments, the conductor 26 is partially surrounded by the multilayer film 18. The surrounded portion of the conductor 26 is located near the surface 14U, which is also an interface between the conductor 26 and the second conductive layer 14.

[0043] Fig. 9 is a schematic diagram illustrating a semiconductor device according to some embodiments of the present disclosure. As shown in Fig. As shown in Figure 9, one of the differences between the semiconductor device 10C in Fig. 9 and the semiconductor device 10B in Fig. 8 is that in the semiconductor device 10C, the surface 14U of the second conductive layer 14 is recessed. Accordingly, the conductor 26 engages the recessed surface 14U, thereby improving adhesion between the conductor 26 and the second conductive layer 14.

[0044] Fig. 10 is a schematic diagram illustrating a semiconductor device according to some embodiments of the present disclosure. As shown in Fig. As shown in Figure 10, semiconductor device 10D further includes an electronic device 30. Electronic device 30 may include a light-emitting device, an integrated circuit chip, an interposer, or any other suitable electronic device. Electronic device 30 may be connected to conductor 26 via flip-chip bonding, wire bonding, or any other suitable bonding method.

[0045] In the present disclosure, the multilayer film (film stack) comprises metal-nonmetal interconnect films and metal-rich metal-nonmetal interconnect films alternately formed in a multi-step deposition. The multilayer film can provide particle adhesion, reduce stress to prevent detachment, reduce resistance to improve electrical characteristics, and improve barrier and protection performance.

[0046] The invention is defined by the main claim and the subordinate claim. Further embodiments of the invention are recited in the dependent claims.

Claims

[1] A semiconductor device (10) comprising: a first conductive layer (12) over a substrate (20), a second conductive layer (14) over the first conductive layer (12) and electrically connected thereto, a barrier layer (16) between the first conductive layer (12) and the second conductive layer (14), and a multilayer film (18) enclosing sidewalls (14S) of the second conductive layer (14) and covering an upper surface (14U) of the second conductive layer (14), wherein the multilayer film (18) comprises a plurality of first metal-containing films (181) and second metal-containing films (182) alternately arranged on top of one another, the first metal-containing film (181) and the second metal-containing film (182) comprise the same metal element, and a concentration of the metal element in the second metal-containing film (182) is higher than that in the first metal-containing film, the concentration of the metal element in the second metal-containing film (182) being greater than 75%. [2] The semiconductor device (10) according to claim 1, wherein the first metal-containing films (181) and the second metal-containing films (182) comprise the same non-metallic element. [3] The semiconductor device (10) according to claim 2, wherein the metal element of the first metal-containing films (181) and the second metal-containing films (182) comprises tantalum, and the non-metallic element of the first metal-containing films (181) and the second metal-containing films (182) comprises nitrogen. [4] The semiconductor device (10) according to claim 2, wherein the metal element of the first metal-containing films (181) and the second metal-containing films (182) comprises tantalum, and the non-metallic element of the first metal-containing films (182) and the second metal-containing films (182) comprises oxygen. [5] A semiconductor device (10) according to any one of the preceding claims, wherein a total thickness of the multilayer film (18) is greater than 120 nanometers. [6] The semiconductor device (10) of claim 5, wherein the total thickness of the multilayer film (18) is greater than 200 nanometers. [7] A semiconductor device (10) according to any one of the preceding claims, wherein a material of the second conductive layer (14) comprises copper or aluminum-copper. [8] A semiconductor device (10) according to any one of the preceding claims, wherein a portion of a surface of the second conductive layer (14) is exposed through the multilayer film (18). [9] A semiconductor device (10) according to any one of the preceding claims, wherein the upper surface (14U) of the second conductive layer (14) is recessed, and wherein the multilayer film (18) engages the recessed upper surface (14U). [10] The semiconductor device (10) according to claim 3, wherein the thickness ratio of the second metal-containing film (182) to the first metal-containing film (181) is 1:

4. [11] A semiconductor device (10) according to any one of the preceding claims, wherein a concentration of the metal element in the first metal-containing film (181) is less than 50%. [12] A method of forming a film stack (18) on a substrate (20), comprising: (a) forming a first metal-containing film (181) over the substrate (20), (b) forming a second metal-containing film (182) over the first metal-containing film (181), wherein the first metal-containing film (181) and the second metal-containing film (182) comprise the same metal element, and a concentration of the metal element in the second metal-containing film (182) is higher than that in the first metal-containing film (181), and (c) repeating operations (a) and (b) to form a film stack (18) from the first metal-containing films (181) and the second metal-containing films (181) arranged alternately until a desired thickness of the film stack (18) is achieved, wherein the concentration of the metal element in the second metal-containing film (182) is greater than 75%. [13] The method of claim 12, wherein forming the first metal-containing film (181) over the substrate (20) comprises sputtering a metal target in the presence of a reactive gas in a first amount, and forming the second metal-containing film (182) over the first metal-containing film (181) comprises sputtering the metal target in the presence of the reactive gas in a second amount that is less than the first amount. [14] The method of claim 12, wherein forming the first metal-containing film (181) over the substrate (20) comprises: sputtering a metal target to form a first metal film (181) over the substrate (20), and treating the first metal film (181) with a reactive gas in a first amount, and forming the second metal-containing film (182) over the first metal-containing film (181) comprises: sputtering the metal target to form a second metal film (182) over the first metal-containing film (181), and treating the second metal film (182) with the reactive gas in a second amount that is less than the first amount. [15] The method according to any one of claims 12 to 14, wherein the first metal-containing film (181) and the second metal-containing film (182) comprise tantalum nitride films. [16] The method of any one of claims 12 to 14, wherein the first metal-containing film (181) and the second metal-containing film (182) comprise tantalum oxide films. [17] The method according to any one of claims 12 to 16, wherein the concentration of the metal element in the first metal-containing film (181) is 50%.

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