ELECTRONIC CONTROL UNIT

Abstract

Electronic control unit with: - a storage device storing application software (41), the application software including a coordinated control application (41a, 41b) and an independent control application (41c), the coordinated control application exercising control in coordination with another electronic control unit and the independent control application exercising independent control independently of the other electronic control unit; and - a microcontroller (48) executing a process included in the coordinated control application and a process included in the independent control application, the microcontroller having at least one microprocessing unit as a resource, wherein - the microcontroller (48) further comprises as software structural elements: - a determination section (S120) which, when a process included in the coordinated control application and a process included in the independent control application need to be executed simultaneously, determines priorities of the processes indicating which of the processes is to be executed preferentially, based on the contents of the processes; and - a resource allocation section (S130) which - resources required for the execution of processes are collected in sequence from high-priority processes to low-priority processes based on the priorities determined by the determination section, and - allocates the recorded resources to the processes, and - the resource allocation section determines whether a low priority process is executable by the microprocessing unit during a waiting time of the microprocessing unit, and assigns the microprocessing unit to the low priority process if the low priority process is suitable.

Description

[0001] The present invention relates to an electronic control unit which not only performs control in coordination with another electronic control unit (ie, another electronic control unit) but also performs control independently of the another electronic control unit (ie, the other electronic control unit).

[0002] From JP 2011-014 033 A, an in-vehicle information processing device is known which allows a plurality of ECUs mounted in a vehicle to share certain information used for functional coordination between them before each of the ECUs uses the certain information for a vehicle control application.

[0003] In such an in-vehicle information processing device, for example, a first ECU executing an application program for navigation is connected via an in-vehicle LAN to a second ECU executing an application program for transmission control.

[0004] The first ECU executes a map search application, which is a program for searching maps, and a drawing application for drawing map data for navigation using database-based map information. When the map search application executed by the first ECU detects a steep, winding hill ahead of the vehicle, the transmission can be automatically shifted based on the gradient and curvature of the road, effectively increasing fuel efficiency.

[0005] The second ECU thus shares data with the first ECU for the purpose of functional coordination. Specifically, the first ECU is prompted to send map data to the second ECU before the second ECU performs transmission control. Consequently, when transmission control is performed, the second ECU can immediately refer to detailed map information.

[0006] When the first ECU and the second ECU execute coordinated control as shown in the above example, the first ECU may need to simultaneously execute a coordinated control application (such as a map search application) for exercising control in coordination with the second ECU and an independent control application (such as a drawing application) for independently exercising control.

[0007] Assume that the first ECU in sequence executes processes at the times when the processes are to be executed, regardless of whether each of the processes is included in the coordinated control application or the independent control application. In such a case, the processes may not be executed correctly or efficiently.

[0008] A process scheduler (from the English "schedule" for "time schedule"), an arbitration logic that regulates the temporal execution of multiple processes in operating systems, is also known from the following Wikipedia entry: Process scheduler; Wikipedia, the free encyclopedia. Edited on September 10, 2015. URL: https: / de.wikipedia.org / w / index.php?title=Prozess-Scheduler&oldid=145901136 [accessed on February 23, 2025].

[0009] DE 10 2005 055 173 A1 generally relates to a vehicle network for connecting one or more electrical or electronic control units. DE 10 2010 038 466 A1 relates to a common electronic control unit and a forwarding program implemented therein. DE 11 2009 001 877 T5 discloses a control device and a computer program for controlling various devices, for example, attached to a vehicle. DE 10 2012 217 328 A1 relates to a method for simulating a control unit and an arrangement for implementing the method. DE 10 2008 020 589 A1 relates to a communication system with a ring topology. DE 10 2010 003 684 A1 discloses a system for controlling the behavior of vehicle-mounted objects.

[0010] It is an object of the present invention to provide an electronic control unit that executes control processes appropriately and efficiently when control is exercised in coordination with and independently of another electronic control unit.

[0011] The problem is solved by the subject matter of the main claim. Advantageous further developments are specified in the subclaims.

[0012] According to the invention, the coordinated control application and the independent control application are not dependent on each other. One process does not need to be started after the other process has finished. This means that the coordinated control application and the independent control application can be processed in parallel by a microcontroller. However, the processing capacity of the microcontroller is limited. The coordinated control application and the independent control application cannot always be processed in parallel.

[0013] The electronic control unit includes a determination section and a resource allocation section. The determination section determines, based on the contents of the processes, whether the process for the coordinated control application or the process for the independent control application should be executed preferentially. The resource allocation section acquires resources required for executing processes in order, from high-priority processes to low-priority processes, based on the priorities determined by the determination section, and allocates the acquired resources to the processes.

[0014] When the loads imposed by concurrently executing processes are small, the processes can be executed in parallel by acquiring resources and allocating them. The coordinated control application process and the independent control application process can be executed efficiently. However, when parallel processing cannot be performed because the microcontroller's processing capacity is exceeded by the sum of the loads imposed by concurrently executing processes, resources are acquired and allocated to the processes sequentially based on the priorities assigned to the processes. Processing can be initiated by preferentially executing a process that is scheduled to execute early.If only either the coordinated tax application process or the independent tax application process can occur, the processes can be carried out in an appropriate order.

[0015] The above and other objects, features, and advantages of the present invention will become more apparent from the following detailed description with reference to the accompanying drawings. In the drawings: Fig. 1 is a diagram illustrating a configuration of a control system according to a first embodiment; Fig. 2 is a diagram illustrating the software structures of a master ECU and slave ECUs and the connection relationship between the master ECU and the slave ECUs; Fig. 3 a figure illustrating the roles of a domain abstraction layer in the master ECU; Fig. 4 is a flowchart illustrating a process performed by the domain abstraction layer; Fig. 5 a flowchart for further illustration of a priority determination process in the flowchart of the Fig. 4; and Fig. 6 is a diagram illustrating a software structure of an electronic control unit according to an alternative embodiment. (Embodiments)

[0016] An electronic control unit (also referred to as an electronic control device) according to an embodiment will be described below with reference to the accompanying drawings. The following embodiment mainly serves to explain the present invention, which is embodied in one of the modifications following this embodiment, particularly the detailed example. Hereinafter, it is assumed that the electronic control unit is applied to a control system for a vehicle.

[0017] As in Fig. As shown in Figure 1, the vehicle control system is applied to a hybrid vehicle having an internal combustion engine and an electric motor (motor generator) as travel power sources, and is used to control various in-vehicle devices mounted in the hybrid vehicle. However, the control system is not always applied to control in-vehicle devices in a hybrid vehicle, but may be applied to control in-vehicle devices in an ordinary vehicle having only an internal combustion engine or in an electric vehicle having only an electric motor.

[0018] Fig. 1 shows a functional block diagram illustrating exemplary functions that the control system 1 includes to control several in-vehicle devices in the hybrid vehicle. Fig. 1 shows, although not all of the included functions are shown, only an exemplary configuration of the control system 1 of the present embodiment for illustrative purposes.

[0019] The control system 1 contains, as in Fig. 1, functions for controlling in-vehicle devices such as a cooling mechanism 30, an internal combustion engine (VM) 31, a transmission (TM) 32, a motor generator (MG) 33, a braking device 34, and a steering device 35. The control system 1 may, as described above, further include functions for controlling various other in-vehicle devices such as a suspension, a high-voltage battery, and an air conditioner.

[0020] As in Fig. 1, the control system 1 is configured by dividing the functions for controlling various in-vehicle devices 30-35 into a plurality of logical blocks (functional blocks) 12-16, 22-26, while defining the connection relationship between the logical blocks 12-16, 22-26. That is, a logical structure for controlling the in-vehicle devices 30-35 in the control system 1 is defined by (i) the logical blocks 12-16, 22-26 and (ii) the connection relationship between the logical blocks 12-16, 22-26. The logical blocks 12-16, 22-26, operating in a coordinated manner based on the defined connection relationship, enable the control system 1 to control the various in-vehicle devices 30-35.

[0021] Although not in the Fig. As shown in Figure 1, each logical block 12-16, 22-26 comprises at least one control block and typically many control blocks. Each logical block 12-16, 22-26 performs its function (role) by appropriately combining the computational processes of the many control blocks.

[0022] An engine control section (ICC) 24, serving as a logic block, includes a control block that receives sensor signals from various sensors for detecting the operating state of the engine 31 and converts the received sensor signals into a form suitable for use in the logic block. The engine control section 24 further includes a control block that not only calculates a currently generated torque from the operating state of the engine 31 indicated by the sensor signals, but also calculates a target engine operating state for eliminating any difference between the currently generated torque and a command torque determined by a higher-level logic block (powertrain coordinator (PTC) 22).The engine control section 24 additionally includes a control block that calculates a throttle opening degree, a fuel injection amount, a fuel injection timing, and an ignition timing to achieve the target engine operating state. However, these control blocks serve merely as examples. The engine control section 24 may include a control block that executes a different calculation process as needed to perform its function. The control blocks in the engine control section 24, including the illustrated control blocks, may be combined or divided as needed.

[0023] The control system 1 is actually embodied by distributing the logical blocks 12-16, 22-26, as control software for a program or database, among several electronic control units. The electronic control units are either (i) connected via individual communication lines to maintain the connection relationship between the logical blocks 12-16, 22-26, or (ii) connected to a common network to enable the electronic control units to communicate with each other according to the connection relationship. The logical blocks 12-16, 22-26 do not always have to be implemented in separate electronic control units. Alternatively, some logical blocks may be implemented in a common electronic control unit.

[0024] The control system 1 of the present embodiment is divided into a plurality of domains based on the functions of the in-vehicle devices 30-35. That is, the control system 1 is divided into a plurality of domains 10, 20 based on a group of functions to be performed by the logic blocks 12-16, 22-26.

[0025] The in-vehicle devices 30-35 are each assigned to either domain 10 or domain 20. Domain control parts 11, 21 in the domains 10, 20 calculate a control target value for each in-vehicle device 30-35 and output the calculated control target value directly to the in-vehicle device 30 or output the calculated control target value to in-vehicle device control parts 15, 16, 24-26 that control the in-vehicle devices 31-35. As shown in Fig. 1, the domain control parts 11, 21 each have at least one logical block.

[0026] More specifically, the tax system 1 in the Fig. 1 is divided into the motion domain 10 and the energy domain 20. The motion domain 10 includes the motion domain control part 11, which performs a function of controlling the behavior of the vehicle in the front-rear direction and in the lateral direction. The energy domain 20 includes the energy domain control part 21, which performs a function of controlling the vehicle's power to accelerate or decelerate the vehicle or to maintain the vehicle's speed.

[0027] As in Fig. As shown in Figure 1, the control system 1 includes in-vehicle device control parts 15, 16, 24-26 located under the domain control parts 11, 21 for controlling the operating state of the in-vehicle devices 31-35 according to a command (control target value) from the domain control parts 11, 21. The in-vehicle device control parts 15, 16, 24-26 generate control signals that adjust the operating state of the in-vehicle devices 31-35 approximately to the control target values ​​from the domain control parts 11, 21, and output the generated control signals to the in-vehicle devices 31-35.

[0028] More specifically, the brake control part 15 and the steering control part 16 are located, as shown in Fig. 1, under the motion domain control part 11. The braking control part 15 controls the braking device 34. The steering control part 16 controls the steering device 35. Furthermore, the engine control part 24, the transmission (TM) control part 25, and the MG control part 26 are located under the energy domain control part 21. The engine control part 24 controls the engine 31. The transmission (TM) control part 25 controls the transmission 32. The MG control part 26 controls the motor generator 33.

[0029] The motor generator 33 generates regenerative energy while the vehicle is decelerating. The motor generator coordinator (MGC) 23, which is a higher-level logic block for the MG control section 26, further manages the generation of regenerative energy, which is converted into direct current by an inverter and stored in the high-voltage battery (not shown).

[0030] Below are various functions of the control system 1 that are used in the Fig. 1 as the logical blocks 12-16, 22-26 are described in more detail.

[0031] A variety of information required to enable the logic blocks 12-16, 22-26 to perform their assigned functions is provided to the control system 1. To drive the hybrid vehicle, various sensors (not shown) detect operations performed on various operating units (accelerator pedal, brake pedal, gear shift lever, steering wheel, and the like) by a driver of the vehicle, and the various sensors output the resulting operation detection signals to the control system 1. Furthermore, operation detection signals from sensors that detect the vehicle driving condition (speed, acceleration, yaw rate, and the like) and from sensors that detect the operating condition (engine temperature, engine speed, gear ratio, inverter temperature, engine speed, oil brake pressure, steering angle, and the like) of the in-vehicle devices 30-35 are also provided to the control system 1.

[0032] The above-mentioned various signals are given to the domain control parts 11, 21 and the in-vehicle device control parts 15, 16, 24-26 of the control system 1.

[0033] For example, operation detection signals indicating operations performed by the driver on various operation units and operation detection signals from sensors detecting the driving state of the vehicle are input to the motion domain control part 11. Then, according to a general rule, the motion domain control part 11 calculates control target values ​​for the braking device 34 and the steering device 35 so that the vehicle behaves based on the driver's operations performed on the operation units. Specifically, the vehicle behavior control part 12 outputs a target acceleration (deceleration) in a front-to-rear direction to a front-to-rear behavior control part 13 and a target acceleration in a left-to-right direction to a left-to-right behavior control part 14 to control the vehicle behavior in response to the driver's operations while stabilizing the vehicle behavior.To achieve the specified target acceleration (deceleration) in the front-to-rear direction, the front-to-rear behavior control part 13 outputs a target drive torque (acceleration torque or braking torque) to the powertrain coordinator (PTC) 22 in the energy domain control part 21 and a target braking torque describing a control target value for the braking device 34 to the braking control part 15. Furthermore, to achieve the specified target acceleration in the left-right direction, the left-right behavior control part 14 outputs a target assist torque describing a control target value for the steering device 35 to the steering control part 16.

[0034] Information about the vehicle's external environment, such as detection information about a white line demarcating a vehicle lane, and information about preceding vehicles and obstacles, can be input to the motion domain control part 11. Consequently, the motion domain control part 11 can calculate a control target value for adjusting the assistance (assistance power) of the steering device 35 (lane keeping control) to prevent the vehicle from departing from a lane demarcated by the white line. Furthermore, the motion domain control part 11 can calculate a control target value for the braking device 34 or the steering device 35 to avoid a collision with the preceding vehicles or obstacles.

[0035] A sensor signal indicating the voltage and current of the high-voltage battery (not shown) and a sensor signal indicating the driving state of the vehicle are input to the energy-domain control part 21. Based on the sensor signals, the MGC 23 in the energy-domain control part 21 calculates the amount of electricity stored in the high-voltage battery. Furthermore, the MGC 23 calculates, primarily based on the amount of electricity stored in the high-voltage battery, a maximum MG torque that can be generated by the motor generator 33 and inputs the calculated maximum MG torque to the PTC 22.To achieve the target drive torque (acceleration torque) calculated by the motion domain control part 11 with the highest efficiency, the PTC 22 calculates a target engine torque to be generated by the engine 31, a target gear ratio to be achieved by the transmission 32, and a target MG torque to be generated by the motor generator 33, while taking into account the maximum MG torque available from the motor generator 33 and the vehicle driving condition. The calculated target engine torque, the calculated target gear ratio, and the calculated target MG torque are respectively input to the engine control part 24, the TM control part 25, and the MGC 23 as control target values.A control target value regarding a clutch operation (connection start timing for a clutch, a time required for completion of the clutch connection, and the like) is also given to the TM control part 25.

[0036] Similarly, when the vehicle is decelerated, the MGC 23 in the energy-domain control part 21 calculates the amount of regenerative energy that can be generated by the motor generator 33, primarily based on the amount of electricity stored in the high-voltage battery. Information about a regenerative braking torque corresponding to the amount of regenerative energy is provided from the MGC 23 via the PTC 22 to the front-rear behavior control part 13 in the motion-domain control part 11.

[0037] When the target deceleration is given from the vehicle behavior control part 12, the front-rear behavior control part 13 calculates the target braking torque to achieve the target deceleration. If the regenerative braking torque can be generated by the motor generator 33, the front-rear behavior control part 13 determines the target braking torque to be generated by the braking device 34 and a regenerative target braking torque to be generated by regenerative braking to form the majority of the regenerative braking torque. The regenerative target braking torque is given, as a control target value, to the MGC 23 in the energy domain control part 21 via the PTC 22.

[0038] Furthermore, the PTC 22 performs (i) coordinated inter-domain control exercised in coordination with the front-rear behavior control part 13 in the motion domain 10, (ii) coordinated intra-domain control exercised in coordination with the MGC 23, the internal combustion engine control part 24 and the TM control part 25, and further (iii) independent control which is temperature control with the cooling mechanism 30 and is exercised independently of other logical blocks (electronic control units).

[0039] The cooling mechanism 30 for the hybrid vehicle is designed such that a cooling system for the internal combustion engine 31 and a cooling system for the MG (motor generator) inverter 33 are integrated into a common cooling mechanism, allowing the same cooling water to circulate through the internal combustion engine 31 and the MG inverter 33. The cooling mechanism 30 includes a radiator for cooling the heated cooling water through heat exchange with air, a pump for circulating the cooling water, a water temperature sensor for detecting the temperature of the cooling water, and a three-way valve or other channel selector valve for changing the circulation path of the cooling water.

[0040] For example, the cooling water temperature, the engine temperature, and the inverter temperature are input to the PTC 22. The PTC 22 calculates control target values ​​for the pump and the channel selector valve of the cooling mechanism 30 based on the cooling water temperature, the engine temperature, and the inverter temperature, and controls the pump and the channel selector valve so that their operating state values ​​approach the corresponding control target values.Specifically, depending on the temperature control needs (cooling, etc.) of the engine 31 and the inverter of the MG 33, the PTC 22 assumes a state where the cooling water circulates neither through the engine 31 nor through the inverter of the MG 33, a state where the cooling water circulates only through the engine 31, a state where the cooling water circulates only through the inverter of the MG 33, or a state where the cooling water circulates through both the engine 31 and the inverter. Furthermore, the PTC 22 controls the flow rate of the cooling water by changing the speed of the pump based on the cooling water temperature, the engine temperature, and the inverter temperature. The PTC 22 can thus appropriately adjust the amount of heat generated by the engine 31 and / or the inverter.

[0041] The brake control part 15 controls the brake device 34 based on the target braking torque given by the front-rear behavior control part 13 as a control target value for the brake device 34. More specifically, the brake control part 15 outputs a control signal for controlling a brake fluid pressure to enable the brake device 34 to generate the target braking torque. Furthermore, the steering control part 16 controls an assist torque to be generated by the steering device 35 by outputting a control signal to enable the steering device 35 to generate the target assist torque determined by the left-right behavior control part 14.

[0042] The engine control part 24 outputs a control signal to the engine 31 to achieve the target engine torque calculated by the PTC 22. Specifically, the engine control part 24 receives sensor signals from various sensors (such as a speed sensor, a temperature sensor, and an air flow rate sensor) that detect the operating state of the engine 31. The engine control part 24 then calculates the currently generated torque from the engine operating state indicated by the sensor signals.The engine control part 24 (i) calculates an engine operating condition that causes the currently generated torque to approach the target engine torque, (ii) determines the fuel injection amount, fuel injection timing, and ignition timing to achieve the calculated engine operating condition, (iii) generates a fuel injection control signal and an ignition control signal suitable for the determined values, and (iv) outputs the generated signals to the engine 31.

[0043] Similarly, the TM control part 25 outputs a control signal to the transmission 32 to achieve the target gear ratio calculated by the PTC 22. When the gear ratio of the transmission 32 is changed, the TM control part 25 additionally outputs a control signal to control the operation of the clutch according to a clutch operation control target value.

[0044] When the target MG torque is determined by the MGC 23, the MG control part 26 outputs a control signal to the inverter of the motor generator 33 to generate the target MG torque. Meanwhile, when the target regenerative braking torque is determined by the MGC 23, the MG control part 26 outputs a control signal to the inverter of the motor generator 33 so that a braking force corresponding to the target regenerative braking torque is applied from the motor generator 33 to an axle.

[0045] Some electronic control units applied to the domain control parts 11, 21 in the control system 1, such as the PTC 22 in the control system 1, have a coordinated control application and an independent control application. The coordinated control application exercises control (coordinated inter-domain control and coordinated intra-domain control) in coordination with another electronic control unit. The independent control application exercises independent control (temperature control) independently of any other electronic control unit. Therefore, in some cases, an electronic control unit must simultaneously execute the coordinated control application and the independent control application in a microcontroller.The same situation may occur in a particular ECU belonging to a domain control part 11, 21 different from the PTC 22 if an in-vehicle device intended for independent control is not assigned to the particular ECU via an in-vehicle device control part.

[0046] If the electronic control unit executes processes sequentially at the times the processes are to be executed, without considering whether each of the processes is included in the coordinated control application or the independent control application, the processes may not be executed appropriately or efficiently. For example, a relatively important process may be executed at a later time, thereby delaying the execution of overall control regarding such an important process, or a specific process may be put into a standby state until a preceding process is fully completed. The capacity of the microcontroller cannot be fully utilized, so overall process execution proves inefficient.

[0047] The coordinated control application and the independent control application are not dependent on each other; one process does not need to be started after the other process has finished. The coordinated control application and the independent control application can be executed in parallel by the microcontroller in the electronic control unit. However, the processing capacity of the microcontroller is limited; the coordinated control application and the independent control application cannot always run in parallel.

[0048] The electronic control unit determines, based on the contents of the processes, whether the process for the coordinated control application or the process for the independent control application should be executed preferentially. It then acquires microcontroller resources required for executing processes in order, from high-priority processes to low-priority processes, based on the determined priorities, and allocates the acquired microcontroller resources to the processes. Consequently, when the loads imposed by processes to be executed concurrently are small, the processes can be executed in parallel by acquiring microcontroller resources and allocating them to the processes. The process for the coordinated control application and the process for the independent control application can be executed efficiently.However, when parallel processing cannot be performed because the processing capacity of the microcontroller is exceeded by the cumulative load imposed by the processes to be executed concurrently, resources are acquired and allocated to the processes sequentially based on the priorities assigned to the processes. Thus, processing can be performed appropriately by preferentially executing an important process that must be executed early. If only either the process for the coordinated control application or the process for the independent control application is executable, the processes can be executed in an appropriate order.

[0049] Below is the electronic control unit with the above functions with reference to the Fig. 2 to 5. Hereinafter, an electronic control unit that executes the coordinated control application and the independent control application is referred to as a master ECU, whereas an electronic control unit that controls an in-vehicle device in the same domain according to a control target value determined by the master ECU is referred to as a slave ECU.

[0050] Fig. Figure 2 mainly shows the software structures of the master ECU 40 and the slave ECUs 50a, 50b and the connection between the master ECU 40 and the slave ECUs 50a, 50b. The other elements, such as in-vehicle devices, to be controlled are shown in the Fig. 2 not shown. The master ECU 40 and the slave ECUs 50a, 50b each have a memory (also referred to as a storage device) that stores software having a Fig. 2 shown structure.

[0051] The master ECU 40 and the slave ECUs 50a, 50b each have a software structure according to a so-called AUTOSAR (AUTomotive Open System ARchitecture) (see Fig. 2). The software structure of the master ECU 40 is described below as an example. The master ECU 40 has substantially the same software structure as the slave ECUs 50a, 50b, but differs from the slave ECUs 50a, 50b in that a domain abstraction layer 44, described later, is provided only for the master ECU 40. The slave ECUs 50a, 50b do not have the domain abstraction layer 44 because they do not execute a coordinated inter-domain control application 41a or a coordinated intra-domain control application 41b and thus do not need to perform arbitration for the processes of such applications 41a, 41b.

[0052] The master ECU 40 is, as in Fig. 2, is configured such that software is integrated into the hardware microcontroller 48. The software can be roughly divided into basic software 43-47, a runtime environment (RTE) 42, and application software 41a-41c contained in an application layer 41. The microcontroller 48 includes at least one set of a microprocessing unit and a cache memory.

[0053] The basic software 43-47 is hierarchically divided into a microcontroller abstraction layer 43, a domain abstraction layer 44, an ECU abstraction layer 45, and a service layer 46. The higher the hierarchy level, the greater the degree of abstraction and the greater the independence from various hardware. Furthermore, the basic software 43-47 includes a complex driver 47.

[0054] The microcontroller abstraction layer 43, located in the lowest layer of the base software 43-47, includes a microcontroller driver, a memory driver, a communications driver, and an I / O driver. The microcontroller abstraction layer 43 depends on the hardware configuration of the microcontroller 48. However, the microcontroller 48 and its peripherals or devices are abstracted by the microcontroller abstraction layer 43. Hierarchy levels above the microcontroller abstraction layer 43 are independent of the microcontroller 48 and its peripherals.

[0055] The domain abstraction layer 44 is located above the microcontroller abstraction layer 43. The domain abstraction layer 44 accepts a process included in the coordinated control application (the coordinated inter-domain control application 41a or the coordinated intra-domain control application 41b) and a process included in the independent control application 41c. When such processes need to be executed concurrently, the domain abstraction layer 44 determines, based on the contents of the processes, which of the processes should be executed preferentially. Furthermore, the domain abstraction layer 44 allocates resources required for process execution from high-priority processes to low-priority processes in sequence based on certain priorities. The domain abstraction layer 44 will be described in more detail below.

[0056] The ECU abstraction layer 45, located above the domain abstraction layer 44, makes higher-level software layers independent of the hardware of the master ECU 40 by abstracting a base component of the master ECU 40. The ECU abstraction layer 45 includes a fixed resource abstraction, a memory hardware abstraction, a communication hardware abstraction, and an I / O hardware abstraction.

[0057] The service layer 46, which is partially located above the ECU abstraction layer 45, provides basic services for applications. More specifically, the service layer 46 provides services such as an OS (operating system), vehicle network communication and management, a storage service, diagnostic services, and ECU state management. The service layer 46 is largely hardware-independent but partially dependent on the microcontroller 48, such as the OS.

[0058] Complex driver 47 is used when a special function is needed to handle complex sensors and actuators, a function to fulfill a timing request, or a complex function not found in the other layers. For example, complex driver 47 is used when a fuel injector needs to be controlled.

[0059] The RTE 42 is located above the basic software 43-47, which includes the aforementioned layers, and is used to make various applications 41a-41c in the application layer 41 independent of the master ECU 40. The RTE 42 thus establishes communication between the applications 41a-41c and communication between the applications 41a-41c and the basic software 43-47.

[0060] Furthermore, the slave ECUs 50a and 50b, as shown in Fig. 2, corresponding to application layers 51a and 51b, RTEs 52a and 52b, basic software 53a and 53b and microcontrollers 54a and 55b.

[0061] As described above, the use of the AUTOSAR software structure prevents the applications 41a-41 from being dependent on the microcontroller 48 or the hardware of the master ECU 40. The reusability of the applications 41a-41c can be improved.

[0062] The domain abstraction layer 44 is described in more detail below. As described in the Fig. 2 and Fig. As shown in Figure 3, the domain abstraction layer 44 includes an inter-domain abstraction layer 44a and an intra-domain abstraction layer 44b. The inter-domain abstraction layer 44a accepts a process request from the coordinated inter-domain control application 41a. The intra-domain abstraction layer 44b accepts a process request from the coordinated intra-domain control application 41b. Meanwhile, a process request from the independent control application 41c is passed to the domain abstraction layer 44 via the service layer 46 and the ECU abstraction layer 45 in the conventional manner.

[0063] Upon receiving a process request from applications 41a-41c, domain abstraction layer 44 instructs microcontroller abstraction layer 43, as described above, to allocate resources, such as the microprocessing unit and cache memory, of microcontroller 48 to individual processes. More specifically, if a process request is received from only one application 41a-41c, domain abstraction layer 44 determines the portion of resources required to execute a process specified by the process request, and domain abstraction layer 44 instructs microcontroller abstraction layer 43 to allocate the specific portion of resources to the process.On the other hand, when process requests from a plurality of different applications 41a-41c are received simultaneously, the domain abstraction layer 44 first determines the priorities of the corresponding processes based on their contents, the domain abstraction layer 44 then sequentially determines the portion or share of resources required for execution from the high-priority processes to the low-priority processes based on the determined priorities, and the domain abstraction layer 44 instructs the microcontroller abstraction layer 43 to allocate the determined portion of resources to the corresponding processes.

[0064] If the domain abstraction layer 44 determines the portion of resources required for the execution of a relatively low-priority process and finds that the required resources are not available for the execution of such a low-priority process, the domain abstraction layer 44 does not instruct the microcontroller abstraction layer 43 to allocate the resources until the resources are available. Consequently, if such a large amount of resources is required for a relatively high-priority process that insufficient resources are available for a relatively low-priority process, the execution of the relatively low-priority process is placed in a standby state. Furthermore, if the execution of the relatively low-priority process has already started, it is temporarily suspended.

[0065] If the resources available to a relatively low priority process are determined to be insufficient, the domain abstraction layer 44 may split the relatively low priority process into subprocesses that can be executed with a smaller amount of resources, and acquire resources and allocate them to the split subprocesses.

[0066] The following describes resource allocation to various processes performed by the domain abstraction layer 44. The domain abstraction layer 44 may determine the portion of resources required for executing a process based on a microprocessing unit usage rate, which indicates a period of time the microprocessing unit is used per unit time. That is, the usage capacity of the cache memory tends to correlate with the microprocessing unit usage rate. Regarding the resources including the microprocessing unit and the cache memory, the portion of resources required for executing the process may be determined from the microprocessing unit usage rate. Alternatively, the domain abstraction layer 44 may determine the portion of required resources separately for the microprocessing unit and the cache memory.In this case, the proportion of resources required to execute the process can be determined based on a predicted utilization proportion of the microprocessing unit and on a predicted utilization capacity of the cache memory.

[0067] Whether the resources, at least the microprocessing unit resources, required for the execution of a relatively low priority process are available can be determined based on the unused portion of the microprocessing unit per unit time and on the predicted portion of microprocessing unit utilization by the relatively low priority process.

[0068] Furthermore, if the microcontroller 48 has multiple microprocessing units, it may be determined whether the resources required to execute a relatively low priority process are available by allowing the domain abstraction layer 44 to search for a microprocessing unit that does not have a process assigned to it.

[0069] The following describes processes executed in the domain abstraction layer 44 with reference to the Fig. 4 and Fig. 5 are described in more detail in the flowcharts shown.

[0070] In S100 of the Fig. 4, one or more process requests are received from applications 41a-41c. Herein, S can be synonymous with a section or a step. In S110, it is determined whether process requests are received from multiple different applications 41a-41c. If it is determined in S110 that process requests are received from multiple different applications 41a-41c, processing proceeds to S120. If it is determined that a process request is received from only one application 41a-41c or no process request is received, processing proceeds to S140.

[0071] In S120, the priorities of processes determined by the process requests are determined based on the contents of the processes. The method for determining the priorities is described below with reference to the method described in the Fig. 5. In S130, resources required to execute a process are allocated from high to low priority processes based on the determined priorities. After S130 is completed, processing returns to S100. Microcontroller 48 then executes the processes using the allocated resources.

[0072] In S140, it is determined whether a process request is received from only one application 41a-41c or no process request is received. If it is determined in S140 that a process request is received from only one application 41a-41c, processing proceeds to S150. In S150, the proportion of resources required to execute a process determined by the process request is determined, and the determined proportion of resources is allocated to the process. Subsequently, the microcontroller 48 executes the process using the allocated resources. If it is determined in S140 that no process request is received, processing returns to S100.

[0073] The following describes the method for determining the priorities of processes when process requests from several different applications 41a-41c are received simultaneously, with reference to the method described in the Fig. The flowchart shown in Figure 5 is described.

[0074] In S200, it is determined whether a process request from the independent control application 41c is included in the process requests received from the applications 41a-41c. If it is determined in S200 that a process request from the independent control application 41c is included, processing proceeds to S240. If it is determined that no such process request is included, processing proceeds to S210.

[0075] When processing proceeds to S210, the process requests include a process request from the coordinated inter-domain control application 41a and a process request from the coordinated intra-domain control application 41b. In S210, it is determined whether a process requested by the coordinated intra-domain control application 41b is to be executed immediately. For example, when the electronic control unit of the present embodiment responds to the request in the Fig. 1, the PTC 22 may execute an intra-domain coordination process for determining a control target value for the engine control part 24 each time the rotation angle of the engine 31 changes a predetermined value. The PTC 22 must output a control target value without delay in response to a change in the rotation angle of the engine. Therefore, the PTC 22 must execute the intra-domain coordination process with the highest priority. Furthermore, when the MG 33 is about to perform a torque correction for suppressing a torque change based on the rotation angle of the engine 31, the PTC 22 must execute an intra-domain coordination process for determining a torque correction amount for the MGC 23 without delay based on the engine rotation angle.In S210, it is determined whether the process of the coordinated intra-domain control application 41b, as described above, is to be executed immediately. If it is determined in S210 that the process is to be executed immediately, processing proceeds to S220. If it is determined that the process is not to be executed immediately, processing proceeds to S230.

[0076] In S220, the highest priority is given to the process of the coordinated intra-domain control application 41b. Furthermore, the process of the coordinated inter-domain control application 41a is given a priority lower than the priority given to the coordinated intra-domain control application 41b. Meanwhile, in S230, the highest priority is given to the process of the coordinated inter-domain control application 41a. Furthermore, the coordinated intra-domain control application 41b is given a priority lower than the priority given to the coordinated inter-domain control application 41a.

[0077] As described above, the coordinated inter-domain control application 41a and the coordinated intra-domain control application 41b are prioritized such that the coordinated inter-domain control application process 41a is typically given a relatively high priority. The control target values ​​for the in-vehicle devices 31-35 assigned to the individual domains 10, 20 are determined as a result of the coordinated inter-domain control application process 41a. In order to exercise appropriate control based on the constantly changing conditions of the vehicle, the coordinated inter-domain control application process 41a should be executed preferentially before the coordinated intra-domain control application process 41b.

[0078] However, as described above, the process of the coordinated intra-domain control application 41b may include a process that must be executed immediately. The process to be executed immediately should preferably be executed preferentially before the process of the coordinated inter-domain control application 41a. Therefore, the present embodiment determines whether the process of the coordinated intra-domain control application 41b is to be executed immediately. Only when it is determined that the process of the coordinated intra-domain control application 41b is to be executed immediately is the process of the coordinated intra-domain control application 41b given higher priority than the process of the coordinated inter-domain control application 41a.

[0079] In S240, which occurs when it is determined that a process request from the independent control application 41c is included in the process requests received from the applications 41a-41c, it is determined whether a process requested by the independent control application 41c is an interrupt process to be executed by an interrupt or a synchronized process to be executed synchronously with a specific event. Fig. 1, the PTC 22 controls the pump and channel selector valve of the cooling mechanism 30, as described above, based on the cooling water temperature, the engine temperature, and the inverter temperature. When it is detected that a predetermined upper limit temperature is exceeded by the engine temperature or the inverter temperature, the PTC 22 prevents a further temperature increase by immediately controlling the pump and channel selector valve so that the cooling water circulates at the highest flow rate through a device with a temperature higher than the upper limit temperature.Furthermore, when an abnormality is detected in the temperature sensor, pump, or channel selector valve, the PTC 22 immediately notifies the vehicle driver of the occurrence of the abnormality. Furthermore, the PTC 22 instructs other control parts, for example, to perform an evacuation drive or to restrict output to suppress a temperature rise. These processes are performed as an interrupt process or a synchronized process because they should be executed with the highest priority. If it is determined in S240 that the process of the independent control application 41c is either an interrupt process or a synchronized process, processing proceeds to S250. If it is determined that the process of the independent control application 41c is neither an interrupt process nor a synchronized process, processing proceeds to S270.

[0080] In S250, it is determined whether process requests are received from both the coordinated inter-domain control application 41a and the coordinated intra-domain control application 41b, in addition to a process request from the independent control application 41c. If it is determined in S250 that process requests are received from both the coordinated inter-domain control application 41a and the coordinated intra-domain control application 41b, processing proceeds to S290. If it is determined that a process request is received from only one of the applications 41a, 41b, processing proceeds to S260.

[0081] In S260, the highest priority is given to the process of the independent control application 41c. Furthermore, a lower priority is given to the process of the coordinated inter-domain control application 41a or the process of the coordinated intra-domain control application 41b, depending on which is determined by the received process request. The reason for this, as described above, is that the process of the independent control application 41c should preferably be executed with the highest priority as a process in the event of an abnormality.

[0082] In S290, it is determined whether the process of the coordinated intra-domain control application 41b is to be executed immediately, as in the case of S210. If it is determined in S290 that the process of the coordinated intra-domain control application 41b is to be executed immediately, processing proceeds to S300. If it is determined that the process is not to be executed immediately, processing proceeds to S310.

[0083] In S300, the highest priority is given to the independent control application process 41c, the second highest priority is given to the coordinated intra-domain control application process 41b, and the lowest priority is given to the coordinated inter-domain control application process 41a. Meanwhile, in S310, the highest priority is given to the independent control application process 41c, the second highest priority is given to the coordinated inter-domain control application process 41a, and the lowest priority is given to the coordinated intra-domain control application process 41b.

[0084] In S300 and S310, the priorities are assigned for the following reasons. First, the highest priority is assigned to the process of the independent control application 41c because it is preferentially executed with the highest priority in the event of an abnormality. Furthermore, if the process of the coordinated intra-domain control application 41b is to be executed immediately, it should preferably be executed before the process of the coordinated inter-domain control application 41a. Therefore, in S300, the process of the coordinated intra-domain control application 41b is given a higher priority than the process of the coordinated inter-domain control application 41a. Meanwhile, if the process of the coordinated intra-domain control application 41b is not a process to be executed immediately, the process of the coordinated inter-domain control application 41a should preferably be given a high priority.In S310, the process of the coordinated inter-domain control application 41a is given a higher priority than the process of the coordinated intra-domain control application 41b.

[0085] At S270, which occurs when the process of the independent control application 41c is determined to be neither an interrupt process nor a synchronized process, it is determined whether process requests are received from both the coordinated inter-domain control application 41a and the coordinated intra-domain control application 41b, in addition to the process request from the independent control application 41c, as in the case of S250. If it is determined at S270 that process requests are received from both the coordinated inter-domain control application 41a and the coordinated intra-domain control application 41b, processing proceeds to S320. If it is determined that a process request is received from only one of the applications 41a, 41b, processing proceeds to S280.

[0086] In S280, the highest priority is given to the process of the coordinated inter-domain control application 41a or the coordinated intra-domain control application 41b, whichever is determined by the received process request, and a lower priority is given to the process of the independent control application 41c.

[0087] In S320, it is determined whether the process of the coordinated intra-domain control application 41b is to be executed immediately, ie, must be executed immediately, as in the case of S210 and S290. If it is determined in S320 that the process of the coordinated intra-domain control application 41b is to be executed immediately, processing proceeds to S330. If it is determined that such immediate execution is not required, processing proceeds to S340.

[0088] In S330, the highest priority is given to the process of the coordinated intra-domain control application 41b, the second highest priority is given to the process of the coordinated inter-domain control application 41a, and the lowest priority is given to the process of the independent control application 41c. Meanwhile, in S340, the highest priority is given to the process of the coordinated inter-domain control application 41a, the second highest priority is given to the process of the coordinated intra-domain control application 41b, and the lowest priority is given to the process of the independent control application 41c.

[0089] In S330 and S340, the priorities are assigned for the following reasons. First, if the process of the independent control application 41c is a process that occurs in the event of an abnormality and is not an interrupt process or a synchronized process that is to be executed with the highest priority, the process of the independent control application 41c is usually not required to have high responsiveness. Therefore, in S330 and S340, the process of the independent control application 41c is assigned the lowest priority. If the process of the coordinated intra-domain control application 41b is to be executed immediately, it should preferably be performed before the process of the coordinated inter-domain control application 41a. In S330, the process of the coordinated intra-domain control application 41b is assigned the highest priority.Meanwhile, if the process of the coordinated intra-domain control application 41b is not a process that needs to be executed immediately, the process of the coordinated inter-domain control application 41a is preferably given high priority. In S340, the process of the coordinated inter-domain control application 41a is therefore given the highest priority.

[0090] It should be appreciated that those skilled in the art will recognize various modifications that are feasible.

[0091] In the above embodiment, when the domain abstraction layer 44 included in the master ECU 40 simultaneously receives process requests from multiple different applications 41a-41c, the domain abstraction layer 44 determines the priorities of processes and allocates the resources of the microcontroller 48. However, the operating system of the service layer 46 may alternatively be used, instead of the domain abstraction layer 44, to determine the priorities of the processes and allocate the resources of the microcontroller 48.

[0092] The following is an example in which the operating system of the service layer 46 determines the priorities and allocates the resources, with reference to the Fig. 6. As described in Fig. As shown in Figure 6, the operating system contained in the service layer 46 can be divided into discrete operating systems 46c, 46e and an integrated operating system 46. The discrete operating systems 46c, 46e are intended for individual microprocessing units and are used to schedule processes in the respective microprocessing units. The integrated operating system 46a provides overall control of the processes of the discrete operating systems 46c, 46e.

[0093] In the above configuration, the integrated operating system 46a determines the priorities of the processes and then, based on the determined process priorities, informs the discrete operating systems of the processes to be executed. This can produce the same operational advantage as in the above embodiment.

[0094] As in Fig. 6, an integrated state manager 46b controls the starting and stopping of the integrated operating system 46a, and discrete state managers 46d, 46f control the starting and stopping of the discrete operating systems 46c, 46e.

[0095] Furthermore, the operating system in the service layer 46 and the domain abstraction layer 44 can coordinate with each other to determine the priorities of the processes and to allocate the resources. In this case, the functions in the flowcharts of the Fig. 4 and Fig.5, as applicable, to the operating system and the domain abstraction layer 44. For example, the domain abstraction layer 44 may calculate the unused portion of a microprocessing unit when the resources are allocated to a high-priority process. Then, based on the calculated unused portion and the predicted utilization portion of the next lower-priority process, the operating system may determine whether the resources required to execute such a low-priority process are available.

[0096] In a detailed example, where a high-priority process is to be executed distributed among multiple microprocessing units, the result of processing performed in one microprocessing unit may be used in a process executing in another microprocessing unit. In such a case, the processing result must be passed from one microprocessing unit to another. This may cause the other microprocessing unit to wait for a certain period of time. Such a wait time (unused portion) of a microprocessing unit is detected by the domain abstraction layer 44. The domain abstraction layer 44 can easily detect the wait time (unused portion) of a microprocessing unit. An operating system then determines whether a low-priority process is executable during the wait time (unused portion) of the microprocessing unit.An operating system can easily perform such a determination process. This allows process priorities to be determined and resources allocated while exploiting the properties of the domain abstraction layer 44 and the operating system.

[0097] Furthermore, the description of the above embodiment is based on the assumption that the control system 1 is divided into domains 10, 20. However, the control system 1 does not necessarily need to be divided into domains 10, 20. When the control system 1 has only one domain, the coordinated inter-domain control application 41a is not included. Consequently, the master ECU 40 determines the priorities of the processes of the coordinated intra-domain control application 41b and the independent control application 41c, and the master ECU 40 allocates resources.

[0098] Although the present invention has been described above in connection with its preferred embodiments, it should be understood that it is not limited to the preferred embodiments and constructions. The present invention is to be understood as encompassing various modifications and equivalent arrangements. Furthermore, while the various combinations and configurations that are preferred are shown, other combinations and configurations including more, fewer, or only a single element are also to be understood as being within the scope of the present invention.

Claims

[1] Electronic control unit with: - a storage device storing application software (41), the application software including a coordinated control application (41a, 41b) and an independent control application (41c), the coordinated control application exercising control in coordination with another electronic control unit and the independent control application exercising independent control independently of the other electronic control unit; and - a microcontroller (48) executing a process included in the coordinated control application and a process included in the independent control application, the microcontroller having at least one microprocessing unit as a resource, wherein - the microcontroller (48) further comprises as software structural elements: - a determination section (S120) which, when a process included in the coordinated control application and a process included in the independent control application need to be executed simultaneously, determines priorities of the processes indicating which of the processes is to be executed preferentially, based on the contents of the processes; and - a resource allocation section (S130) which - resources required for the execution of processes are collected in sequence from high-priority processes to low-priority processes based on the priorities determined by the determination section, and - allocates the recorded resources to the processes, and - the resource allocation section determines whether a low priority process is executable by the microprocessing unit during a waiting time of the microprocessing unit, and assigns the microprocessing unit to the low priority process if the low priority process is suitable. [2] Electronic control unit according to claim 1, characterized by that, based on (i) an unused portion of the microprocessing unit per unit time and (ii) a predicted usage portion of a low priority process, the resource allocation section determines whether the resources required for the execution of the low priority process are allocable. [3] Electronic control unit according to claim 1, characterized by , that - the microcontroller comprises several of the microprocessing units; and - the resource allocation section determines whether the resources required to execute a low-priority process are allocable based on whether any microprocessing unit remains to which no process is already assigned. [4] Electronic control unit according to claim 2 or 3, characterized by that if the resource allocation section is unable to allocate the resources to a process, the execution of the process is put into a standby state until the resources are available. [5] Electronic control unit according to claim 2, characterized by that when resources are not assignable to a process, the resource allocation section divides the process into sub-processes that can be processed by a small amount of resources, and collects and assigns the resources to the sub-processes. [6] Electronic control unit according to one of claims 1 to 5, characterized bythat it also has, as software structural elements: - basic software (43-47) that implements basic operations of the electronic control unit; and - a runtime environment (42) that establishes communication between the base software and the application software, the base software comprising: (i) a microcontroller abstraction layer (43) which abstracts the microcontroller, (ii) an ECU abstraction layer (45) located above the microcontroller abstraction layer to abstract basic components of the electronic control unit, (iii) a service layer (46) comprising an operating system, and (iv) a domain abstraction layer (44) provided between the microcontroller abstraction layer (43) and the ECU abstraction layer (45) to serve as the determination section and the resource allocation section. [7] Electronic control unit according to claim 6, characterized by that the domain abstraction layer (44): - coordinates with the operating system to serve as the destination and resource allocation section, - calculates the unused portion of the microprocessing unit when the domain abstraction layer allocates the resources to a high-priority process, and - determines whether the operating system can allocate the resources required to execute the low-priority process based on (i) the calculated unused share and (ii) a predicted usage share. [8] Electronic control unit according to one of claims 1 to 5, characterized by that it also has, as software structural elements: - basic software (43-47) that implements basic operations of the electronic control unit; and - a runtime environment (42) that establishes communication between the base software and the application software, the base software comprising: (i) a microcontroller abstraction layer (43) which abstracts the microcontroller, (ii) an ECU abstraction layer (45) which abstracts basic components of the electronic control unit, and (iii) a service layer (46) comprising an operating system (46a, 46c, 46e); and - the operating system in the service layer has a function of the determination section and a function of the resource allocation section. [9] Electronic control unit according to claim 8, characterized by , that - the operating system is provided for each microprocessing unit; - the operating system comprises a discrete operating system (46c, 46e) and an integrated operating system (46a), wherein the discrete operating system schedules a process in each microprocessing unit and the integrated operating system provides overall control over the process of the discrete operating system; and - the integrated operating system informs the discrete operating system about a process to be executed based on the priorities of the processes. [10] Electronic control unit according to one of claims 1 to 9, characterized by , that - the electronic control unit is applied to a control system (1) that controls a plurality of in-vehicle devices (30-35) mounted in a vehicle; - the control system is divided into a plurality of domains (10, 20) based on functions of the in-vehicle devices, the domains being divided into a slave ECU (15, 16, 24-26) and a master ECU (13, 14, 22, 23), the slave ECU controlling one of the in-vehicle devices and the master ECU providing overall control of the slave ECU; and - the electronic control unit is used as the master ECU of one of the domains. [11] Electronic control unit according to claim 10, characterized by , that - the coordinated control application comprises a coordinated intra-domain control application (41b) and a coordinated inter-domain control application (41a), wherein the coordinated intra-domain control application is configured to generate and output a control command value to the slave ECU in an identical domain to which the master ECU belongs, and the coordinated inter-domain control application is configured to provide coordinated control over another master ECU in another domain different from the identical domain; and - when a process contained in the coordinated intra-domain control application and a process contained in the coordinated inter-domain control application need to be executed concurrently, the determination section usually determines that the process contained in the coordinated inter-domain control application is prioritized. [12] Electronic control unit according to claim 11, characterized by that when a process contained in the coordinated intra-domain control application needs to be executed immediately, the determination section determines that the process contained in the coordinated intra-domain control application is prioritized. [13] Electronic control unit according to one of claims 1 to 12, characterized by , that - the independent control application has at least one of an interrupt process and a synchronized process; and - when a process included in the independent control application and a process included in the coordinated control application need to be executed simultaneously, the determining section determines, if the process included in the independent control application is the interrupting process or the synchronized process, that the process included in the independent control application is prioritized, and the determining section determines, if the process included in the independent control application is neither the interrupting process nor the synchronized process, that the process included in the coordinated control application is prioritized.

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