Processing methods for a wafer

The method addresses low productivity in wafer alignment by using visible light scanning, sealant application, and infrared-assisted laser division to efficiently produce 5S-shaped packages.

DE102018215245B4Active Publication Date: 2026-05-13DISCO CORP
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Patent Information

Authority / Receiving Office
DE · DE
Patent Type
Patents
Current Assignee / Owner
DISCO CORP
Filing Date
2018-09-07
Publication Date
2026-05-13

AI Technical Summary

Technical Problem

Conventional methods for producing 5S-shaped packages require labor-intensive removal of sealing material from the perimeter of wafers using a wide cutting blade, leading to low productivity in the alignment process.

Method used

A method involving visible light scanning to detect alignment marks, sealing with a carbon black-containing sealant, grinding to expose the sealant in grooves, and using infrared light to align and divide the wafer with a laser beam absorbed by the sealant, eliminating the need for manual removal of the sealant.

Benefits of technology

Enables efficient alignment and division of wafers into individual chips without manual removal of the sealant, enhancing productivity and precision.

✦ Generated by Eureka AI based on patent content.

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Abstract

A processing method for a wafer (11) for processing a wafer (11), wherein a component (15) having several elevations (17) is formed in each of areas of a front surface of the wafer (11) which is divided by several intersecting division lines (13) formed in an intersecting manner, wherein the processing method for a wafer (11) comprises: a training step for a cut groove to form cut grooves (23) each having a depth corresponding to a finished thickness of each of the component chips (27) by a cutting blade (14) along the parting lines (13) from a front surface side (11a) of the wafer (11); a scanning step of the front surface of the wafer (11) with visible light using a scanning unit (18) in which an alignment mark is detected and the parting line (13) to be cut is detected based on the alignment mark, prior to the training step for a first cut groove (23); a sealing step to seal the front surface of the wafer (11) including the cut grooves (23) with a sealing material (20) after the training step for a cut groove (23) has been carried out; a grinding step to grind the wafer (11) from a rear surface side (11b) of the wafer (11) to the finished thickness of each of the component chips (27) to expose the sealing material (20) in the cut grooves (23) after the sealing step has been performed; an alignment step for picking up the front surface (11a) of the wafer (11) by the sealing material (20) by the pickup medium (18) using infrared light from the front surface (11a) of the wafer (11), detecting an alignment mark and detecting the parting line to be laser-processed based on the alignment mark after the grinding step has been performed; and a division step for emitting a laser beam (LB) of such a wavelength that it is absorbed by the sealing material (20), along the division lines (13) from the front surface (11a) of the wafer (11) and parts of the wafer (11) by an ablation process into individual device chips (27), each of which has its front surface and four side surfaces surrounded by the sealing material (20) after the alignment step has been performed, wherein in the sealing step the front surface of the wafer (11) is sealed with a sealing material (20) which has such a transmission property that infrared rays which are to be absorbed by the infrared light receiving means (18) pass through the sealing material (20).
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Description

Technical field

[0001] The present invention relates to a processing method for a wafer for processing a wafer to form a 5S-shaped pack. Description of the state of the art

[0002] As a way to achieve miniaturization and higher density of various components such as large-scale integrated circuits (LSIs) and NAND flash memory, chip-size packages (CSPs) have been widely used and implemented in mobile phones, smartphones, and similar devices. Furthermore, in recent years, CSPs have evolved into CSPs where not only the front surface but all side surfaces of a chip are sealed with a sealing material; this is known as a 5S-shaped package.

[0003] The conventional 5S-shaped package is produced by the following steps. (1) Forming components (circuit) and external interconnect terminals, called protrusions, on a front surface of a semiconductor wafer (hereinafter sometimes referred to simply as the wafer). (2) Cutting the wafer along parting lines from a front surface of the wafer to form cut grooves, each having a depth corresponding to the finished thicknesses of each of the component chips. (3) Sealing the front surface of the wafer with a sealing material containing carbon black. (4) Grinding a rear surface of the wafer to a finished thickness of each of the component chips to expose the sealing material in the cut grooves. (5) Performing an alignment in which, since the front surface of the wafer is sealed with the sealing material containing carbon black, the sealing material is removed from a large section of the front surface of the wafer to expose the alignment markings such as target patterns, and the parting lines to be cut are detected based on the alignment markings. (6) Cutting the wafer along the division lines from the front surface of the wafer based on the orientation and dividing the wafer into 5S-shaped packs, each of which has its front surface and one side surface sealed with the sealing material.

[0004] Since the front surface of the wafer is sealed with the sealing material containing carbon black, as described above, the components and the like formed in the front surface of the wafer cannot be seen with the naked eye. To enable alignment by solving this problem, the present inventor has developed a technique in which, as described in paragraph 5 above, the sealing material is removed from the circumferential portion of the front surface of the wafer to expose the alignment markers, such as target patterns, and based on these target patterns, the parting line to be cut is detected so that alignment is performed (see JP 2013-74021A and JP 2016-15438A).

[0005] US 2017 / 0186645A1 discloses a wafer processing method for processing a wafer, in which an imaging device and a control device are provided that perform image processing such as pattern matching to align the wafer.

[0006] JP 2015-23078A discloses an alignment unit equipped with a first and a second imaging unit, wherein the first imaging unit comprises a standard camera and the second imaging unit comprises an infrared camera, and the two imaging units are arranged side by side.

[0007] US 6 649 445 B1 discloses a processing method for a wafer for processing a wafer in which a groove is cut into the wafer and a division step is performed using a laser beam. PRESENTATION OF THE INVENTION

[0008] However, according to the alignment process described in the aforementioned patent documents, a step is required to remove the sealing material from the perimeter section of the wafer using a wide cutting blade attached to a spindle for edge cutting, instead of a cutting blade for parting. Replacing the cutting blade and removing the sealing material from the perimeter section by edge cutting is labor-intensive, resulting in low productivity.

[0009] Therefore, an objective of the present invention is to provide a processing method for a wafer in which an alignment step can be carried out by the sealing material containing carbon black, which is applied to coat a front surface of the wafer.

[0010] In accordance with one aspect of the present invention, a wafer machining method is provided for machining a wafer in which a component having multiple raised areas is formed in each of regions of a front surface divided by multiple intersecting parting lines formed in an intersecting manner. The wafer machining method includes: a cut groove forming cut grooves, each having a depth corresponding to the thickness of each of the component chips, by a cutting blade along the parting lines from a front surface face of the wafer;a visible light scanning step of the wafer's front surface using a scanning unit, in which an alignment mark is detected and the parting line to be cut is detected based on the alignment mark, prior to the initial cut groove training step; a sealing step to seal the wafer's front surface, including the cut grooves, with a sealant after the cut groove training step has been performed; a grinding step to grind the wafer from a rear surface face to a finished thickness for each of the device chips to expose the sealant in the cut grooves after the sealing step has been performed;an alignment step for picking up the front surface of the wafer through the sealing material by the picking agent using infrared light from the front of the wafer, detecting an alignment mark and detecting the parting line to be laser-processed based on the alignment mark after the grinding step has been performed; and a division step for emitting a laser beam of such a wavelength that it is absorbed in the sealing material, along the parting lines from the front surface of the wafer, and dividing the wafer into individual device chips by an ablation process, each having the front surface and four side surfaces surrounded by the sealing material after the alignment step has been performed. In the sealing step, the front surface of the wafer is sealed with the sealing material, which has such a transmission property that infrared rays, which are to be absorbed by the infrared light absorption medium, pass through the sealing material.

[0011] Preferably, the infrared light receiving device used in the alignment step includes an InGaAs receiving element.

[0012] According to the processing method for a wafer of the present invention, the front surface of the wafer is sealed with the sealing material through which the infrared rays, which are to be received by the infrared light receiving means, pass. The alignment mark formed in the wafer is detected by the infrared light receiving means through the sealing material, and the alignment can be carried out based on the alignment mark. Therefore, the alignment step can be carried out easily without removing the sealing material from the circumferential section of the front surface of the wafer, as is the case in the prior art.

[0013] Accordingly, the wafer can be divided into individual component chips by ablation processing by emitting a laser beam of such a wavelength that it can be absorbed in the sealing material, along the division lines from the front surface of the wafer.

[0014] The above and other features, objectives and advantages of the present invention and the manner of its realization will become clearer and the invention itself will be understood by studying the following description and attached claims with reference to the attached figures, which show a preferred embodiment of the invention. BRIEF DESCRIPTION OF THE FIGURES Fig. Figure 1 is a perspective view of a semiconductor wafer; Fig. 2 is a perspective view showing a training step for a cut groove; Fig. Figure 3 is a perspective view showing a sealing step; Fig. Figure 4 is a partial, side sectional view showing a grinding step; Fig. Figure 5 is a section view showing an alignment step; Fig. 6A is a sectional view showing a division step; and Fig. 6B is an enlarged sectional view showing the division step. DETAILED DESCRIPTION OF THE PREFERRED VERSION

[0015] One embodiment of the present invention is described in detail below with reference to the figures. Fig. Figure 1 shows a perspective view of a front surface of a semiconductor wafer (hereinafter referred to simply as wafer) 11, which is suitable for machining by a machining method of the present invention. In a front surface 11a of the semiconductor wafer 11, several division lines (streets) 13 are formed in a grid pattern, and a device 15 such as an integrated circuit (IC) or an LSI is formed in each of the areas divided by the division lines 13, which intersect orthogonally.

[0016] Each component 15 has several electrode protrusions (hereinafter referred to simply as protrusions) 17 on its front surface, and the wafer 11 includes on its front surface a component area 19 in which several components 15, each having several protrusions 17, are formed, and a circumferential edge area 21 surrounding the component area 19.

[0017] In a processing method for a wafer according to an embodiment of the present invention, a first step involves forming a cut groove by a cutting blade along the parting line 13 from the front surface of the wafer 11. This cut groove formation step is described with reference to Fig. 2 described.

[0018] A cutting unit 10 comprises a cutting blade 14, which is removably attached to a tip section of a spindle 12, and an alignment unit 16, which includes a receiving element (receiving unit) 18. The receiving unit 18 includes not only a microscope and a camera that receives visible light, but also a receiving element for infrared light that receives an infrared image. In the present embodiment, an InGaAs receiving element is adapted as the infrared receiving element.

[0019] Prior to performing the training step for a cut groove, an alignment is carried out in which the front surface of the wafer 11 is first recorded with visible light through the receiving unit 18, alignment marks such as target patterns formed in each component 15 are detected, and the parting line 13 to be cut is detected based on the alignment marks.

[0020] After the alignment has been carried out, a groove forming step is performed in which the cutting blade 15, which is rotated at high speed in a direction of arrow R1, is caused to cut into the wafer 11 to a depth corresponding to the finished thickness of each of the component chips along the parting line 13 from the front surface 11a of the wafer 11, and a clamping table (not shown) on which the wafer 11 is held by suction is fed for processing in a direction of arrow X1, thereby forming a cut groove 23 along the parting line 13.

[0021] The machining step for a cut groove is performed sequentially along the parting lines 13, which extend in a first direction, while the cutting unit 10 is moved into an index feed in a direction orthogonal to the direction X1 of the feed for machining by the distance of the parting line 13. Next, the clamping table (not shown) is rotated by 90° and then the same machining step for a groove as above is performed sequentially along the parting lines 13, which extend in a second direction orthogonal to the first direction.

[0022] After the training step for a groove has been carried out, a sealing step is performed, in which, as in Fig. Figure 3 shows that a sealing material 20 is applied to the front surface 11a of the wafer 11 to seal the front surface 11a of the wafer 11, which contains the cut grooves 23. Since the sealing material 20 is liquid when the sealing step is performed, the cut grooves 23 are filled with the sealing material 20.

[0023] Sealing material 20 is a composition containing 10.3% epoxy resin or epoxy resin plus phenolic resin, 85.3% silica filler, 0.1% to 0.2% carbon black, and 4.2% to 4.3% other ingredients by mass percent. Examples of the other ingredients include metal hydroxides, antimony trioxide, silicon dioxide, and the like.

[0024] When the front surface 11a of the wafer 11 is covered and sealed with the sealing material 20, and the sealing material has such a composition, the carbon black, which is contained in an extremely small amount in the sealing material 20, causes the sealing material 20 to be black, and accordingly it is normally difficult to see the front side 11a of the wafer 11 through the sealing material 20.

[0025] Here, the carbon black is mixed into the sealing material 20 primarily to prevent electrostatic damage to the components 15, and no sealing material without carbon black is commercially used in this case. The method for applying the sealing material 20 is not particularly restricted; however, it is desirable to apply the sealing material 20 up to the height of each of the protrusions 17, and thereafter the sealing material 20 is subjected to etching to expose the end sections of the protrusions 17.

[0026] After the sealing step has been performed, a grinding step is carried out in which the wafer 11 is ground from a rear surface face 11b of the wafer 11 to a finished thickness of each of the device chips in order to expose the sealing material 20 in the cut grooves. This grinding step is referred to Fig. 4 described. A surface protection band 22 is attached to the front surface 11a of the wafer 11 and the wafer 11 is drawn in and held by a clamping table 24 of a grinding device through the surface protection band 22.

[0027] A grinding unit 26 comprises a spindle 30, rotatably mounted in a spindle housing 28 and driven by a motor (not shown), a grinding wheel attachment 32 fixed to a tip of the spindle 30, and a grinding wheel 34 removably attached to the grinding wheel attachment 32. The grinding wheel 34 has an annular base 36 and several grinding stones 38 secured to an outer circumference of a lower end of the base 36.

[0028] In the grinding step, while the clamping table 24 is rotated in a direction of arrow a at, for example, 300 revolutions per minute, the grinding wheel 34 is rotated in a direction of arrow b at, for example, 6000 revolutions per minute, and a feed mechanism for a grinding unit (not shown) is driven to bring the grinding stones 38 of the grinding wheel 34 into contact with the rear surface 11b of the wafer 11.

[0029] The rear surface 11b of the wafer 11 is then ground while the grinding wheel 34 is lowered a predetermined amount in a grinding feed at a predetermined grinding feed rate. While the thickness of the wafer 11 is measured by a thickness gauge for a contact type or a non-contact type, the wafer 11 is ground to a predetermined thickness, for example 100 µm, thereby exposing the sealing material 20 filled into the cut grooves.

[0030] After the grinding step has been carried out, an alignment step is performed in which the front surface 11a of the wafer 11 is detected by the infrared light emitted from the front surface 11a of the wafer 11 through the sealing material 20, at least two alignment marks such as target patterns formed in the front surface 11a of the wafer 11 are detected and the parting line 13 to be laser processed is detected based on these alignment marks.

[0031] The alignment step is described in detail with reference to Fig. 5 described. Before performing the alignment step, the rear surface face 11b of the wafer 11 is attached to a dividing strip T, the outer circumferential section of which is attached to an annular frame F. In the alignment step, as described in Fig. As shown in Figure 5, the wafer 11 is drawn into and held by the clamping table 40 of a laser processing device by the dividing belt T, and the sealing material 20, which seals the front surface 11a of the wafer 11, is exposed at the top. The ring-shaped frame F is then fixed by clamps with clamps 42.

[0032] In the alignment step, the front surface 11a of the wafer 11 is detected by an infrared detection element of a detection unit 18A of the laser processing device, similar to the visible light detection unit 18 of the cutting device, which is located in Fig. Figure 2 is shown. Since the sealing material 20 is formed from a sealing material 20 through which infrared rays, which are to be received by the infrared receiving element of the receiving unit 18A, can pass, at least two alignment marks, such as target patterns, formed in the front surface 11a of the wafer 11, can be detected by the infrared receiving element. Preferably, an InGaAs receiving element with high sensitivity is adapted as the receiving element for infrared light. Preferably, the receiving unit 18 and 18A include an exposure control by which the exposure time or the like can be adjusted.

[0033] Next, the clamping table 40 is rotated by θ so that a straight line connecting these alignment marks is parallel to the direction X1 of a feed for machining, and furthermore, the clamping table 40 is moved in the direction orthogonal to the direction X1 for a feed for machining by a distance between the alignment mark and the center of the division lines 13 (see Fig. 6A), thereby detecting the division line 13, which is to be laser processed.

[0034] After the alignment step has been performed, a division step for a laser-machined groove is carried out by applying a laser beam LB of such a wavelength (for example, 355 nm) that it is absorbed by the sealing material 20 from a laser head (light collector) 46 of the laser processing device along the division lines 13 from the front surface 11a of the wafer 11 to laser-machined grooves 25 which are in Fig. 6B are shown, to be formed by an ablation process, whereby the wafer 11 is divided into individual component chips 27, each having its front surface 11a and four side surfaces surrounded by the sealing material 20.

[0035] This division step is performed sequentially along the division lines 13 extending in a first direction, whereupon the clamping table 40 is rotated by 90°, and the division step is then performed sequentially along the division lines 13 extending orthogonally to the first direction in the second direction, thereby dividing the wafer 11 into individual component chips 27, each of which has its front surface 11a and four side surfaces sealed with the sealing material 20, as shown in Fig. 6B is shown.

[0036] Since the beam diameter of the laser beam LB used in the division step is smaller than the width of the cutting blade 14 used in the forming step for a cut groove, the side surfaces of each of the component chips 27 are sealed with the sealing material 20 during the formation of the laser-machined grooves 25, which are in Fig.6B is shown, sealed.

[0037] The component chip 27, manufactured in this manner, can be attached to a mainboard by flip-chip connection, by turning the component chip over from top to bottom and connecting the raised sections to conductive pads of the mainboard.

Claims

A processing method for a wafer (11) for processing a wafer (11), wherein a component (15) having multiple elevations (17) is formed in each of regions of a front surface of the wafer (11) divided by multiple intersecting parting lines (13) formed in an intersecting manner, the processing method for a wafer (11) comprising: a forming step for a cut groove to form cut grooves (23) having a depth corresponding to a finished thickness of each of the component chips (27), by a cutting blade (14) along the parting lines (13) of a front surface face (11a) of the wafer (11);a scanning step of the front surface of the wafer (11) with visible light using a scanning unit (18), in which an alignment mark is detected and the parting line (13) to be cut is detected based on the alignment mark, prior to the training step for a first cut groove (23); a sealing step to seal the front surface of the wafer (11) including the cut grooves (23) with a sealing material (20) after the training step for a cut groove (23) has been performed; a grinding step to grind the wafer (11) from a rear surface side (11b) of the wafer (11) to the finished thickness of each of the device chips (27) to expose the sealing material (20) in the cut grooves (23) after the sealing step has been performed;an alignment step for picking up the front surface side (11a) of the wafer (11) by the sealing material (20) by the pickup medium (18) using infrared light from the front surface side (11a) of the wafer (11), detecting an alignment mark and detecting the parting line to be laser-processed based on the alignment mark after the grinding step has been performed;and a division step for emitting a laser beam (LB) of such a wavelength that it is absorbed by the sealing material (20) along the division lines (13) from the front surface (11a) of the wafer (11) and parts of the wafer (11) by an ablation process into individual component chips (27), each of which has its front surface and four side surfaces surrounded by the sealing material (20) after the alignment step has been carried out, wherein in the sealing step the front surface of the wafer (11) is sealed with a sealing material (20) which has such a transmission property that infrared rays, which are to be absorbed by the infrared light receiving means (18), pass through the sealing material (20). Processing method for a wafer (11) according to claim 1, wherein the infrared light receiving means (18) used in the alignment step includes an InGaAs receiving element. Processing method for a wafer (11) according to claim 1 or 2, wherein the sealing material (20) is a composition comprising 10.3% epoxy plastic or epoxy plastic plus phenolic plastic, 85.3% silica filler, 0.1% to 0.2% carbon black and 4.2% to 4.3% other ingredients by mass percent. Processing method for a wafer (11) according to one of the preceding claims, wherein the infrared light receiving means (18) used in the alignment step has an exposure control by which the exposure time can be adjusted.