MICROPHONE GROUP

Abstract

Digital microphone arrangement (100) configured to be integrated into a host device, the assembly comprising: a housing (110) which has a host interface (113); a transducer (102) for microelectromechanical systems (MEMS) which is arranged in the housing; an integrated circuit (103, 200) arranged in the housing, the integrated circuit comprising: a signal processing circuit (201) coupled to an output of the converter; an interface protocol circuit (202) coupled to an output of the signal processing circuit; a first output driver circuit (203) coupled to the interface protocol circuit and comprising a corresponding plurality of parallel driver stages (230), wherein each driver stage has a driver (231) and a configurable resistor (232, 300) which couples an output (233) of the driver to a first contact (290) of the host interface, wherein the configurable resistors of the first output driver circuit form a first series termination resistor (Z O ) form; and a controller (204, 501) coupled to and configured with the first output driver circuit to set a resistance of at least one configurable resistance to compensate for process error deviations, such that the configurable resistance of at least one driver stage is different from the configurable resistance of at least one other driver stage of the first output driver circuit.

Description

AREA OF REVELATION

[0001] The present disclosure relates generally to microphone assemblies, including those with transducers for microelectromechanical systems (MEMS), and specifically to microphone assemblies, including circuits. BACKGROUND

[0002] Microphones with a transducer that converts sound into an electrical signal, which is then processed or amplified by an integrated circuit, are commonly integrated into mobile phones, personal computers, IoT devices, and other host equipment. The electrical signal is transmitted with minimal attenuation when the microphone's output impedance matches the trace impedances of the connection to the host device. However, any output impedance supplied by an integrated circuit can be subject to process and temperature variations. For example, the resistance of the on-chip series termination resistors can vary by up to 20% from device to device. Depending on the application, it may also be desirable to integrate the microphone into systems that extract different characteristic impedances.

[0003] US patent 2016 / 0344358 A1 discloses a MEMS microphone. US patent 2012 / 0309456 A1 discloses a variable impedance circuit. US patent 2010 / 0232079 A1 discloses a small-area I / O circuit. BRIEF DESCRIPTION OF THE FIGURES

[0004] The invention is defined by the independent claims. Preferred embodiments are part of the dependent claims.

[0005] The tasks, features, and advantages of the present disclosure will become more fully apparent from the following description and the accompanying claims, which were included in conjunction with the accompanying figures. The figures represent only exemplary embodiments and therefore do not constitute a limitation of the scope of the disclosure, the description of which includes additional specificity and details. Fig. Figure 1 is a cross-sectional view of a microphone assembly. Fig. Figure 2 is a schematic representation of a driver circuit for a microphone assembly with impedance matching circuitry. Fig. Figure 3 is a schematic diagram of a configurable resistor connected in series. Fig. Figure 4 is a diagram showing the stepwise increase of a configurable resistor connected in series. Fig. Figure 5 is a block diagram of a state machine for implementing impedance matching. DETAILED DESCRIPTION

[0006] This disclosure describes microphone assemblies and other devices comprising an output driver circuit with an adjustable series termination resistor (which, for example, contributes to the output impedance) at a communication interface of the microphone or other device, and methods for doing so. The adjustable series termination resistor makes it possible to tune or trim the output driver circuit to meet a specific application requirement. The devices and methods disclosed herein can be used to reduce or eliminate variations in the manufacturing process and / or to match the microphone's output impedance to the input impedance of a host device.

[0007] Fig. Figure 1 is a cross-sectional view of a microphone assembly 100 in which an adjustable output impedance is implemented. The microphone assembly generally comprises an electroacoustic transducer 102 coupled to an electrical circuit 103 arranged in a housing 110. The transducer can be capacitive, piezoelectric, or other, realized by means of microelectromechanical systems (MEMS) or other known or future technology. The electrical circuit can be embodied by one or more integrated circuits, for example, an application-specific integrated circuit (ASIC) with analog and digital circuitry and a discrete digital signal processor (DSP) that performs audio processing (e.g., keyword / command recognition, noise reduction, authentication, etc.).The housing 110 can include a sound connector 180 and an interface 113 for external devices with contacts (for example, for power, data, ground, control, external signals, etc.) to which the electrical circuit is coupled. The interface 113 for external devices is configured for surface mounting or other mounting on a host device (for example, by backflow soldering).

[0008] In Fig. The electrical circuit 103 receives an electrical signal generated by the electroacoustic transducer via terminal 141. The signal from the transducer 102 can be processed into an output signal that is representative of the acoustic activity detected by the electrical circuit 103. The electrical circuit 103 can comprise a signal processing circuit, an interface protocol circuit, a first output driver circuit, and a control circuit, examples of which are described below.

[0009] Fig. Figure 2 is a schematic diagram of a driver circuit 200 with an adjustable output impedance, implemented in an integrated circuit of a MEMS microphone or other device with a communication interface. The driver circuit generally consists of a first output driver circuit 203 and a controller 204. In some embodiments, the driver circuit 200 also includes a second output driver circuit 208. In some embodiments, the driver circuit 200 is equipped with a signal processing circuit 201 and may also include an interface protocol circuit 202 (for example, SoundWire, PDM, PCM, and other known and future protocols). These and other circuits may be implemented on one or more discrete integrated circuits.

[0010] In general, the first output driver circuit 203 is arranged to send a signal to an external (e.g., host) device, for example, via the host device interface of the microphone assembly described here. The controller 204 dictates the signal sent via the first output driver circuit 203. The interface protocol circuit 202 dictates the signal format. The controller 204 is configured to adjust an output impedance (e.g., the first-series termination resistor) of the first output driver circuit 203 to meet or satisfy a specification requirement, as proposed above.

[0011] The signal processing circuit 201 can be connected to an output of an electrical converter or device configured to output a signal. In some embodiments, the signal processing circuit 201 can receive the signal and convert it from analog to digital using an analog-to-digital converter (ADC). In other embodiments, the signal processing circuit 201 can include a buffer circuit, a filter circuit, or an amplifier circuit for filtering, refining, or amplifying the signal.

[0012] The interface protocol circuit 202 is connected to an output of the signal processing circuit 201. In some embodiments, the interface protocol circuit 202 and the signal processing circuit 201 can be combined into a single circuit comprising a processor and corresponding circuitry for processing incoming signals and generating a corresponding output signal that adheres to a specific data exchange protocol. The interface protocol circuit 202 receives the processed signal from the signal processing circuit 201 and generates a protocol output signal for transmission. The specific protocol or format of the output signal generally depends on the application or use case and is not restrictive.

[0013] The driver circuit 200 generally comprises a first output driver circuit coupled to the interface protocol circuit and having a corresponding plurality of parallel driver stages, each driver stage comprising a driver and a configurable resistor that couples an output of the driver to a first contact of the host interface, the configurable resistors of the first output driver circuit forming a first series-connected resistor. The circuit further generally comprises a controller coupled to the first output driver circuit and configured to set the first series-connected termination resistor by adjusting the configurable resistor of at least one driver stage of the first output driver circuit. Fig. 2 The first output driver circuit 203 comprises a plurality of driver stages 230. Each plurality of driver stages 230 comprises a driver 231 and a configurable resistor 232, which couple an output 233 of the driver 231 to a first contact 290 of the system 200. Each driver 231 may comprise a first transistor 235 and a second transistor 236. In this embodiment, a first terminal of the first transistor 235 is connected to a voltage (V DD) connected, a second terminal of the first transistor 235 is connected to a first terminal of the second transistor 236, and a second terminal of the second transistor 236 is connected to a second voltage (for example, ground). The gates of the first and second transistors 235 and 236 are connected to the controller 204. In this way, the controller 204 controls an output of the drivers 231 by controlling the gate voltages of transistors 235 and 236. As a result, each of the drivers 231 outputs either the first voltage (V) DD) or the second voltage via the configurable resistor 232. In some embodiments, the first contact 290 is a host device interface of a microphone that can be connected to a host device. In some embodiments, the first contact 290 is an interface of an external device of another device that can be connected to another device. In alternative embodiments, the driver circuit 231 can implement a different configuration.

[0014] The controller 204 is coupled to the first output driver circuit 203 and configured to set the first series termination resistor by adjusting the configurable resistor 232 of at least one of the parallel driver stages 230. The controller 204 is connected to the configurable resistors 232, the driver circuits 231, and the interface protocol circuit 202. The controller 204 controls the driver circuit 231 to output a signal via the first contact 290 based on a signal received from the interface protocol circuit 202. The controller 204 controls the configurable resistors 232 to match an output impedance (for example, a series termination resistor) of the output driver circuit 203 to a specification. The resistor can be configured in a post-processing procedure, or it can be configured before or after integration into an OEM device.

[0015] The configurable resistors 232 of the first output driver circuit together form a first series termination resistor (e.g., output impedance) (Z O The configurable resistors 232 have adjustable resistances. Fig. Figure 3 shows, for example, an example of a configurable series termination resistor 200, which corresponds to the resistance 232 of each output stage 230. The configurable series resistor 200 comprises a variety of series-connected resistors (R). Step The multitude of resistors R Step They can all have essentially the same resistance or different resistances. "Essentially" means within a process variation of + / - 20%. In one example, the multitude of resistances R Step Each has a resistance of 50 ohms. In one example, at least one section of the multitude of resistors R Stepwith a suitable transistor (for example, C) res0 , C res1 , C res2 , c res3 ) connected in parallel. In one embodiment, for example, c res0 parallel to an R Step -Resistance switched, C res1 parallel to two series-connected resistors Step -resistors (or any number of resistors with an equivalent resistance of two R) Step -resistors), c res2 is in parallel to four R connected in series Step -resistors (or any number of resistors with an equivalent resistance of four R) Step -resistors) switched, and c res3 is in parallel to eight R connected in series Step- resistors (or any number of resistors with an equivalent resistance of eight R) Step -resistors). In alternative embodiments, each transistor can be connected with an R Step-resistors are connected in parallel. In some embodiments, two or more of the transistors (for example, C) are also used. res0 , C res1 , c res2 , c res3 ) with appropriate transistors (for example, S res01 , S res23 ) connected in parallel. The gates of the corresponding transistors (for example, C) res0 , C res1 , c res2 , C res3 and S res01 , S res23 The resistors are connected to the controller 204. Therefore, the resistance of each driver stage can be configured by controlling the gate voltage of one or more transistors. That is, when a voltage is applied to the gate of a corresponding transistor, the transistor closes the corresponding resistor. Step (or several R Step ) effectively shortens and reduces the total resistance of the series-connected configurable resistor 200.

[0016] An example of the output of one of the configurable resistors 232 is in Fig. 4 shown. Fig. Figure 4 is a diagram 400 showing the stepwise increase of a series-connected configurable resistor. That is, diagram 400 shows the series-connected output resistance 401 of one of the configurable resistors 232 when the corresponding transistor is deactivated. In this example, the configurable resistor 232 comprises 16 resistors R. Step In other embodiments, the configurable resistor 232 comprises 16 resistors R Step , but in other embodiments more or less than 16 resistors R can be used. Step It may be included. The process variation in the implementation of the resistors R StepThe tolerance is approximately + / -20%, so the resistance of each configurable resistor 232 can vary depending on manufacturing variance. However, the controller 204 can correct these process variations by controlling the relevant transistors and either increasing or decreasing the overall resistance based on a measurement of an actual resistance taken during a calibration phase, corresponding to each configuration of the configurable resistor 232. That is, the controller 204 is configured to adjust the resistance of each configurable resistor 232 over a stepwise linear range as shown.

[0017] In some embodiments, the interface protocol circuit 202 is a low-voltage differential signal interface with a first output coupled to the first contact 290 and a second output coupled to a second contact 291. In such an embodiment, the microphone assembly 200 also includes a second output driver circuit 208 with a corresponding second plurality of parallel driver stages 281, each of the second driver stages 281 comprising a driver 282 and a configurable resistor 283 that couples an output of the respective second driver 282 to the second contact 287. The configurable resistors 283 of the second output driver circuit form a second series termination resistor (Z). O2The controller 204 is connected to a second output driver circuit and is designed to adjust the second series termination resistor by setting the configurable resistance of at least one driver stage of the second output driver circuit in the manner described here. The controller 204 adjusts the termination resistor of the second series so that it is matched to the impedance of a device connected to the second contact 287.

[0018] Fig. Figure 5 is a block diagram 500 of a state machine for a system implementing impedance matching. The block diagram 500 includes a state machine, a controller 501, and an output driver circuit 502. The output driver circuit 502 comprises a plurality of parallel output driver stages 520. Each of the plurality of parallel output driver stages 520 comprises a driver 521 and a configurable resistor 522.

[0019] In some implementations, the controller 501 includes a processor and memory. The controller 501 receives or accesses a process error indicator 504. The process error indicator 504 can be stored in the memory of the controller 501. In some embodiments, the process error indicator 504 is determined by a wafer testing machine during a calibration phase after the fabrication of the configurable resistors 522. In some embodiments, the process error indicator 504 was determined by the controller 501 during a calibration phase. The calibration phase may have determined the resistance value that each configurable resistor 232 should have in different states, compared to the actual resistance value that each configurable resistor 232 had in these different states.The control device 501 also receives the input impedance reading 505 from a corresponding device connected to a first contact 590, indicating the impedance to which the series termination resistor should be set. The control device 501 then adjusts the resistance of each of the configurable resistors 522 to ensure that the output impedance of the output driver circuit 502 substantially matches the received input impedance. The control device uses the process error reading 504 to further adjust the configurable resistors 522 to compensate for the process error of the resistors and to ensure that the series termination resistance is closely matched to the input impedance reading 505.

[0020] The foregoing description of the illustrative embodiments has been provided for illustrative and descriptive purposes. It is not intended to be exhaustive or limiting with respect to the exact form disclosed, and modifications and variations are possible in light of the above teachings or may be derived from the practice of the disclosed embodiments. It is intended that the scope of the invention is defined by the appended claims and their equivalents.

Claims

[1] Digital microphone assembly (100) configured to be integrated into a host device, the assembly comprising: a housing (110) which has a host interface (113); a transducer (102) for microelectromechanical systems (MEMS) which is arranged in the housing; an integrated circuit (103, 200) arranged in the housing, the integrated circuit comprising: a signal processing circuit (201) coupled to an output of the converter; an interface protocol circuit (202) coupled to an output of the signal processing circuit; a first output driver circuit (203) coupled to the interface protocol circuit and comprising a corresponding plurality of parallel driver stages (230), wherein each driver stage has a driver (231) and a configurable resistor (232, 300) which couples an output (233) of the driver to a first contact (290) of the host interface, wherein the configurable resistors of the first output driver circuit form a first series termination resistor (Z O ) form; and a controller (204, 501) coupled to and configured with the first output driver circuit to set a resistance of at least one configurable resistance to compensate for process error deviations, such that the configurable resistance of at least one driver stage is different from the configurable resistance of at least one other driver stage of the first output driver circuit. [2] Assembly according to claim 1, wherein the configurable resistance of each driver stage is a plurality of resistors connected in series (R Step) comprising, wherein one or more of the plurality of resistors are connected in parallel to a corresponding transistor (c res0 , c res1 , c res2 , c res3 , s res01 , s res23 ) are switched on, where the controller is coupled to each transistor and configured to control each transistor, wherein the configurable resistance of each driver stage can be adjusted by controlling at least one transistor of the corresponding driver stage. [3] Assembly according to claim 2, wherein the control is configured such that the configurable resistance of each driver stage can be set differently. [4] Assembly according to claim 2, wherein the control is configured to control each transistor independently in order to effectively short-circuit the corresponding resistor. [5] Assembly according to claim 1, wherein the interface protocol circuit is a low-voltage differential signal interface having a first output coupled to the first contact and a second output coupled to a second contact (287) of the host interface; a second output driver circuit (208) with a corresponding second plurality of parallel driver stages, each of the second driver stages having a driver (282) and a configurable resistor (283) that couples an output of the respective second driver and the second contact, where the configurable resistors of the second output driver circuit form a second series termination resistor, wherein the controller is coupled to the second output driver circuit and is configured to set the second series termination resistor by adjusting the configurable resistance of at least one driver stage of the second output driver circuit. [6] Assembly according to claim 5, wherein the configurable resistance of each driver stage comprises a plurality of resistors connected in series, wherein one or more of the plurality of resistors are connected in parallel to a corresponding transistor of a plurality of transistors, the controller is coupled to each of the multitude of transistors and configured to control each transistor, wherein the configurable resistance of each of the second plurality of driver stages can be adjusted by controlling at least one transistor of the plurality of transistors of the corresponding driver stage. [7] Integrated circuit (103, 200) for a microphone arrangement (100) for microelectromechanical systems (MEMS), wherein the integrated circuit comprises: a first signal output connector (113, 290) that can be connected to an external device interface of a MEMS microphone arrangement; a first output driver circuit (203) comprising a corresponding plurality of parallel driver stages (230), each driver stage comprising a driver (231) and a configurable resistor (232, 300) coupling an output of the driver to the first signal output terminal, wherein the configurable resistors of the first output driver circuit form a first series termination resistor (Z O ) form; and a controller (204, 501) coupled to and configured with the first output driver circuit to set a resistance of at least one configurable resistance based on a process error indicator (504) to compensate for process error deviations, such that the configurable resistance of at least one driver stage is different from the configurable resistance of at least one other driver stage of the first output driver circuit. [8] Integrated circuit according to claim 7, wherein the configurable resistance of each driver stage comprises a plurality of resistors connected in series, wherein one or more of the plurality of resistors are connected in parallel to a corresponding transistor of a plurality of transistors (235, 236), the control is coupled to each of the multitude of transistors and configured to control each transistor independently, wherein the configurable resistance of each driver stage can be adjusted by controlling at least one transistor of the corresponding driver stage. [9] Integrated circuit according to claim 7, wherein the control is configured such that the configurable resistance of each driver stage can be set differently. [10] Integrated circuit according to claim 7, wherein the control is configured to control each transistor by applying a gate voltage to the corresponding transistor, wherein the gate voltage switches on the transistor and effectively short-circuits a corresponding resistor. [11] Integrated circuit according to claim 7, wherein the configurable resistance of each driver stage comprises a plurality of resistors connected in series, and wherein the resistance of each of the plurality of resistors is substantially the same. [12] Integrated circuit according to claim 7, wherein the control is configured to adjust the configurable resistance of each driver stage over a stepwise linear range. [13] Integrated circuit according to claim 7 further comprising: a low-voltage differential signal interface with a first signal output terminal and a second signal output terminal; a second output driver circuit (208) with a corresponding second plurality of parallel driver stages, each driver stage comprising a driver and a configurable resistor coupling an output of the driver and the second signal output terminal, where the configurable resistors of the second output driver circuit form a second series termination resistor, wherein the controller is coupled to the second output driver circuit and is configured to set the second series termination resistor by adjusting the configurable resistance of at least one driver stage of the second output driver circuit. [14] Integrated circuit according to claim 13, wherein the configurable resistance of each of the second plurality of driver stages comprises a plurality of series-connected resistors, wherein one or more of the plurality of resistors are connected in parallel to a corresponding transistor of a plurality of transistors, wherein the control is coupled to each of the multitude of transistors and configured to control each transistor of the multitude of transistors independently, where the configurable resistance of each driver stage can be adjusted by controlling the corresponding transistor. [15] Integrated circuit (103, 200), comprising: an interface protocol circuit (202); a first signal output terminal (113, 290) configured to be connected to a microelectromechanical systems (MEMS) microphone arrangement (100); a first output driver circuit (203) which has an input that is coupled to the interface protocol circuit, wherein the first output driver circuit has a corresponding plurality of parallel driver stages (230), each driver stage having a driver (231) and a configurable resistor (232, 300) between an output of the driver and the first signal output terminal, where the configurable resistors of the first output driver circuit form a series termination resistor (Z O ) form; and a controller (204, 501) coupled to and configured with the first output driver circuit to adjust a resistance value of each of the configurable resistors based on a process error indicator (504) which includes manufacturing variations of the configurable resistors, in order to compensate for these variations, such that the configurable resistance of at least one driver stage is different from the configurable resistance of at least one other driver stage of the first output driver circuit, where the impedance at the first signal output terminal can be configured by adjusting the series termination resistor. [16] Integrated circuit according to claim 15, wherein the configurable resistance of each driver stage comprises a plurality of resistors connected in series, wherein one or more of the plurality of resistors are connected in parallel to a corresponding transistor, wherein the controller, which is coupled to each transistor, is configured to control each transistor independently, wherein the configurable resistance of each driver stage can be adjusted by controlling at least one transistor of the corresponding driver stage. [17] Integrated circuit according to claim 16, wherein the control is configured such that the configurable resistance of each driver stage can be set differently. [18] Integrated circuit according to claim 16, wherein the control is configured to control each transistor by applying a gate voltage to the corresponding transistor, the gate voltage switching on the transistor and effectively short-circuiting the resistor. [19] Integrated circuit according to claim 16, wherein the control is configured to adjust the configurable resistance of each driver stage over a stepwise linear range. [20] Integrated circuit according to claim 15 further comprising: a low-voltage differential signal interface comprising a first signal output terminal and a second signal output terminal; a second output driver circuit comprising a corresponding plurality of parallel driver stages, each driver stage comprising a driver and a configurable resistor connecting an output of the driver to the second signal output terminal, where the configurable resistors of the second output driver circuit form a second series termination resistor, wherein the controller is coupled to the second output driver circuit and is configured to set the second series termination resistor by adjusting the configurable resistance of at least one driver stage of the second output driver circuit. [21] Integrated circuit according to claim 20, wherein the configurable resistance of each driver stage comprises a plurality of resistors connected in series, wherein one or more of the plurality of resistors are connected in parallel to a corresponding transistor of a plurality of transistors, wherein the control is coupled to each of the multitude of transistors and configured to control each transistor of the multitude of transistors independently, wherein the configurable resistance of each driver stage can be adjusted by controlling at least one transistor of the corresponding driver stage.

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