SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD OF A SEMICONDUCTOR DEVICE

Abstract

semiconductor device, comprising: - an insulating substrate (1) having a circuit structure (4); - a semiconductor device (8) mounted on the insulating substrate (1) and electrically connected to the circuit structure (4); - a housing (11) accommodating the insulating substrate (1) and the semiconductor device (8); and - an electrode (12) attached to the housing (11), where: - a tip surface of the electrode (12) is connected to the circuit structure (4) with solder (14), - electrode (12) is brought into contact with the circuit structure (4) through the housing (11) and pressed against it, - a projection (12d) is arranged on the tip surface, - the electrode (12) has a fixed portion (12a) which is fixed to the housing (11) and a projecting portion (12b) which projects onto the circuit structure (4), and - a height of an upper end of the upstanding portion (12b) of the electrode (12) is higher than a height of the fixed portion (12a).

Description

Background of the inventionArea

[0001] The present disclosure relates to a semiconductor device and a manufacturing method of the semiconductor device. background

[0002] A semiconductor device in which electrodes attached to a package are connected to a circuit pattern of an insulating substrate by means of solder is disclosed (see, for example, JP 2006-295158 A).

[0003] US 6,365,965 B1 relates to a power semiconductor module in which a metal terminal improves the bonding strength between the metal terminal and a substrate of the module by increasing the surface area of ​​the metal terminal that comes into contact with an adhesive. A hole and a protrusion formed in a mounting plate of the terminal provide a larger surface area that comes into contact with the adhesive, thereby increasing the bonding strength between the metal terminal and a metal substrate.

[0004] DE 10 2006 058 695 A1 discloses a power semiconductor module comprising a housing, a substrate with at least one power semiconductor component, at least one metallic conductor track, and, extending from this conductor track, at least one connecting element butt-soldered onto this conductor track. The metallic conductor track has a recess with a base area whose lateral extent in both orthogonal directions parallel to its main surface is greater than the lateral extent in both orthogonal directions of the base area of ​​the connecting element facing the substrate. Alternatively or additionally, the connecting element has recesses on at least two edges facing the conductor track and / or on at least two corners facing the conductor track.

[0005] DE 10 2005 016 650 A1 describes a power semiconductor module with a housing, outwardly leading connection elements, an electrically insulating substrate arranged within the housing, which in turn consists of an insulating body, and a plurality of mutually electrically insulated metallic connecting tracks located on the first main surface thereof facing away from the base plate. These tracks house power semiconductor components and connecting elements between two connecting tracks and / or between connecting tracks and power semiconductor components. The connecting and connecting elements are designed as metal molded parts arranged butt-jointed on connecting tracks, with contact surfaces to these connecting tracks or to power semiconductor components, wherein the individual contact surfaces are designed as a plurality of partial contact surfaces. Each partial contact surface has a maximum surface area of ​​20 mm 2Two partial contact surfaces each have a maximum distance of 5 mm from each other and the connection of the partial contact surfaces to the connecting tracks or the power semiconductor components is designed to be flush with the material

[0006] US 2018 / 0 012 833 A1 discloses a semiconductor module comprising a wiring substrate and two semiconductor devices mounted on the wiring substrate. The semiconductor module comprises a housing having a rectangular frame body with four sidewalls. The housing has a beam bridging the first sidewalls. A bus bar has two end portions, upright portions each extending from one of the end portions in the thickness direction of an insulating substrate, bent portions each continuous with one of the upright portions, and an extension continuous with the bent portions. A portion of the extension is embedded in the housing. Summary

[0007] During a temperature cycle, warpage of a semiconductor device occurs due to a difference in the linear expansion coefficients of components. This warpage changes the positions of electrodes in a vertical direction with respect to a package and an insulating substrate, and thus, tensile or compressive stress acts in a vertical direction at portions of the solder joint of the electrodes. Due to the presence of the insulating substrate, the electrodes are less likely to be displaced in the compressive direction. However, the electrodes are likely to be displaced in the tensile direction, leading to deterioration of the solder and causing peeling, and posing a problem of reliability deterioration.

[0008] The present invention has been made to solve the problem as described above, and is directed to providing a semiconductor device and a manufacturing method of the semiconductor device that can improve reliability.

[0009] The object underlying the invention is achieved in a semiconductor device according to the invention with the features of claim 1 and in a method for producing a semiconductor device according to the invention with the features of claim 15. Advantageous further developments are the subject of the respective dependent claims.

[0010] A semiconductor device according to the present invention includes an insulating substrate having a circuit pattern, a semiconductor device mounted on the insulating substrate and electrically connected to the circuit pattern, a package accommodating the insulating substrate and the semiconductor device, and an electrode attached to the package, a tip surface of the electrode being connected to the circuit pattern with solder, the electrode being brought into contact with and pressed against the circuit pattern by the package, and a protrusion being disposed on the tip surface. The electrode is formed with a fixed portion fixed to the package and having a protruding portion protruding on the circuit pattern. A height of an upper end of the protruding portion of the electrode is higher than a height of the fixed portion.

[0011] In the present invention, the electrode is brought into contact with and pressed against the circuit pattern through the housing. This can reduce tensile stress caused by distortion during temperature cycling at the connection portion of the electrode and the circuit pattern. Furthermore, while a thickness of the solder decreases when the electrode is brought into contact with and pressed against the circuit pattern, the thickness of the solder can be maintained by the protrusion provided on the tip surface. Therefore, it is possible to prevent solder peeling during temperature cycling and improve reliability.

[0012] Other and further objects, features and advantages of the invention will become more fully apparent from the following description. Short description of the drawings Fig. 1 is a cross-sectional view illustrating a semiconductor device according to a first embodiment. Fig. 2 is an enlarged cross-sectional view along I-II in Fig. 1. Fig. 3 is a view illustrating a manufacturing process of the semiconductor device according to the first embodiment. Fig. 4 is a view illustrating a manufacturing process of the semiconductor device according to the first embodiment. Fig. 5 is an enlarged cross-sectional view of a part of the semiconductor device according to the first embodiment. Fig. 6 is a cross-sectional view illustrating a semiconductor device according to a second embodiment. Fig. 7 is a cross-sectional view of a modified example of the semiconductor device according to the second embodiment. Fig. 8 is a plan view illustrating the modified example of the semiconductor device according to the second embodiment. Fig. 9 is a cross-sectional view illustrating a semiconductor device according to a third embodiment. Fig. 10 is a cross-sectional view illustrating a semiconductor device according to a fourth embodiment. Fig. 11 is an enlarged cross-sectional view along I-II in Fig. 10. Fig. 12 is a cross-sectional view illustrating a semiconductor device according to a fifth embodiment. Fig. 13 is a side view illustrating a rising portion of an electrode according to a sixth embodiment. Fig. 14 is a side view illustrating a modified example 1 of the upstanding portion of the electrode according to the sixth embodiment. Fig. 15 is a side view illustrating a modified example 2 of the upstanding portion of the electrode according to the sixth embodiment. Description of embodiments

[0013] A semiconductor device and a manufacturing method of the semiconductor device according to embodiments of the present disclosure will be described with reference to the drawings. The same components are denoted by the same symbols, and repeated descriptions thereof may be omitted. First embodiment

[0014] Fig. 1 is a cross-sectional view illustrating a semiconductor device according to a first embodiment. An insulating substrate 1 includes an insulating plate 2, a metal pattern 3 on a lower surface of the insulating plate 2, and circuit patterns 4 and 5 on an upper surface of the insulating plate 2. The insulating plate 2 is a ceramic such as AlN and SiN, and may be a resin insulation.

[0015] The metal pattern 3 of the insulating substrate 1 is bonded to an upper surface of a base plate 6 with a solder 7. A semiconductor device 8 is mounted on the insulating substrate 1. A lower electrode of the semiconductor device 8 is electrically connected to the circuit pattern 4 with a solder 9. Note that bonding is not limited to solder bonding and may be Ag bonding or laser welding. An upper electrode of the semiconductor device 8 is electrically connected to the circuit pattern 5 by a wiring 10 such as a wire. A case 11 accommodates the insulating substrate 1 and the semiconductor device 8. The case 11 is bonded to the upper surface of the base plate 6.

[0016] Electrodes 12 and 13 are attached to the housing 11. A tip surface of electrode 12 is connected to the circuit pattern 4 with a solder 14. Electrodes 12 and 13 have a plate-like shape and include opposing main surfaces, opposing side surfaces, and tip surfaces. The tip surface has a rectangular shape, and a short side of the tip surface corresponds to a plate thickness of electrode 12, and a long side of the tip surface corresponds to a width of electrode 12.

[0017] A sealing material 15 seals the insulating substrate 1, the semiconductor device 8, and the electrode 12 to electrically insulate the semiconductor device 8 or the like from the external environment. The sealing material 15 is, for example, a gel and is preferably a resin such as a direct-potting resin. The resin inhibits displacement of the electrode 12 during temperature cycling, thus improving the reliability of the solder connection.

[0018] The electrode 12 includes a fixed portion 12a inserted and fixed into the housing 11, a protruding portion 12b protruding from the circuit pattern 4, and a connecting portion 12c connecting the fixed portion 12a and an upper end of the protruding portion 12b. A height of the upper end of the protruding portion 12b of the electrode 12 is higher than a height of the fixed portion 12a. The fixed portion 12a is parallel to the upper surface of the base plate 6 and the circuit patterns 4 and 5 of the insulating substrate 1. Meanwhile, the connecting portion 12c projected into the interior of the housing 11 rises from the fixed portion 12a toward the upper end of the rising portion 12b and inclines with respect to the upper surface of the base plate 6 and the circuit patterns 4 and 5 of the insulating substrate 1.With such a configuration, the electrode 12 is brought into contact with the circuit pattern 4 through the housing 11 and pressed against it. In a manner similar to the electrode 12, a tip surface of the electrode 13 is connected to the circuit pattern 5 by solder, and the electrode 13 is brought into contact with the circuit pattern 5 through the housing 11 and pressed against it.

[0019] Fig. 2 is an enlarged cross-sectional view along I-II in Fig. 1. A protrusion 12d is disposed on the tip surface. As a result of the protrusion 12d of the electrode 12 being brought into contact with and pressed against the circuit pattern 4, a slight depression is formed on a surface of the circuit pattern 4. In a manner similar to the electrode 12, a protrusion (not shown) is also disposed on the tip surface of the electrode 13.

[0020] Next, a manufacturing method of the semiconductor device according to the present embodiment will be described. Fig. 3 and Fig. 4 are views illustrating a manufacturing process of the semiconductor device according to the first embodiment. First, the semiconductor device 8 is mounted on the insulating substrate 1 and electrically connected to the circuit pattern 4 of the insulating substrate 1. Then, the case 11 is mounted on the upper surface of the base plate 6 so as to accommodate the insulating substrate 1 and the semiconductor device 8. In this process, the electrode 12 is brought into contact with and pressed against the circuit pattern 4 through the case 11. The tip surface of the electrode 12 is then connected to the circuit pattern 4 by solder.

[0021] Before the housing 11 is attached, as shown in Fig. 3, the fixed portion 12a and the connecting portion 12c of the electrode 12 have a linear shape, and the height of the upper end of the upstanding portion 12b of the electrode 12 is the same as the height of the fixed portion 12a. After the housing 11 is attached, as shown in Fig. 4, the height of the upper end of the upstanding portion 12b of the electrode 12 is higher than the height of the fixed portion 12a. Such deformation of the electrode 12 brings the electrode 12 into contact with the circuit structure 4 and presses it against it.

[0022] In the present embodiment, the electrode 12 is brought into contact with and pressed against the circuit pattern 4 through the housing 11. This can reduce tensile stress caused by warpage during temperature cycling at the connection portion of the electrode 12 and the circuit pattern 4. While a thickness of the solder 14 decreases when the electrode is brought into contact with and pressed against the circuit pattern, the thickness of the solder 14 can be maintained by the protrusion 12d provided on the tip surface. Therefore, it is possible to prevent solder peeling during temperature cycling and improve reliability.

[0023] Furthermore, if the solder 14 is disposed at a peripheral portion of the tip surface where the stress is greater, the stress can be alleviated. Therefore, the protrusion 12d is preferably not provided at the peripheral portion of the tip surface. Two or more protrusions 12d are further preferably disposed so as to maintain a uniform thickness of the solder 14. This improves the reliability of a solder joint.

[0024] Furthermore, not a plane of the plate-like electrode 12, but the tip surface of the upstanding portion 12b of the electrode 12 is connected to the circuit pattern 4. This reduces a connection area of ​​the electrode 12. Consequently, the space for connecting the semiconductor device 8 or the wiring 10 to the circuit pattern 4 to which the electrode 12 is connected increases. Furthermore, it is possible to increase the current capacity.

[0025] Fig. 5 is an enlarged cross-sectional view of a part of the semiconductor device according to the first embodiment. A distance R from the connection portion of the electrode 12 and the circuit pattern 4 to an end portion of the circuit pattern 4, the semiconductor device 8, or the external wiring 10 is equal to or longer than a height L of the solder 14 (R≥L). Consequently, a fillet of the solder 14 has a shape with a gentle slope with an angle of less than 45°, which reduces stress on the solder 14, thus improving the reliability of a solder connection. Second embodiment

[0026] Fig. 6 is a cross-sectional view illustrating a semiconductor device according to a second embodiment. The case 11 includes an outer wall 11a, which is a rectangular frame enclosing the insulating substrate 1 and the semiconductor device 8, and a protruding portion 11b protruding from the outer wall 11a toward the inner side of the outer wall 11a. The connecting portion 12c of the electrode 12, which is drawn out toward the inner side of the outer wall 11a, is displaced in an upper direction but pressed downward by making contact with a lower surface of the protruding portion 11b. As a result, the electrode 12 receives a force to be brought into contact with and pressed against the circuit pattern 4.In this way, in a manner similar to the first embodiment, it is possible to reduce a tensile stress that occurs at the connecting portion of the electrode 12 and the circuit pattern 4 due to distortion during the temperature cycle.

[0027] Fig. 7 is a cross-sectional view of a modified example of the semiconductor device according to the second embodiment. Fig. Fig. 8 is a plan view illustrating the modified example of the semiconductor device according to the second embodiment. The protruding portion 11b becomes a support extending across the outer wall 11a of the case 11, which are opposite to each other. In this case, the above-described effects are also provided. Third embodiment

[0028] Fig. 9 is a cross-sectional view illustrating a semiconductor device according to a third embodiment. The package 11 is directly bonded and fixed to the insulating substrate 1. The other configurations are similar to those of the first embodiment. In this case, too, the electrodes 12 and 13 are brought into contact with and pressed against the circuit patterns 4 and 5 through the package 11, so it is possible to obtain effects similar to those of the first embodiment. Fourth embodiment

[0029] Fig. 10 is a cross-sectional view illustrating a semiconductor device according to a fourth embodiment. Fig. 11 is an enlarged cross-sectional view along I-II in Fig. 10. A recess 16 is provided on the circuit pattern 4. The recess 16 does not need to penetrate the circuit pattern 4 and reach the insulating plate 2. The protrusion 12d is fitted into the recess 16. This increases a connection area of ​​the circuit pattern 4 and the solder 14, thus improving the reliability of a connection. Fifth embodiment

[0030] Fig. 12 is a cross-sectional view illustrating a semiconductor device according to a fifth embodiment. Another electrode 17 is placed parallel to the electrode 12. Placing the two electrodes 12 and 17, whose current directions are opposite to each other, close to each other in parallel cancels the magnetic fields, making it possible to reduce inductance. Furthermore, if the two electrodes 12 and 17 have the same potential, the electrode density can be increased, thus improving excitation capability. Sixth embodiment

[0031] Fig. 13 is a side view illustrating a protruding portion of an electrode according to a sixth embodiment. Slits 12e are arranged on a side surface of the protruding portion 12b of the electrode 12. The rigidity of the electrode 12 is reduced at the slits 12e. As a result, stress on the solder 14 due to deformation of the electrode 12 is reduced, thus improving the reliability of a solder joint.

[0032] Fig. Fig. 14 is a side view illustrating a modified example 1 of the upstanding portion of the electrode according to the sixth embodiment. While in Fig. 13 the slots 12e are arranged on both sides of the upstanding portion 12b, is in Fig. 14, the slot 12e is arranged on only one side. Similar effects can be achieved in this case as well.

[0033] Fig.15 is a side view illustrating a modified example 2 of the upstanding portion of the electrode according to the sixth embodiment. The slit 12e is arranged in a thickness direction, so that a thickness of the upstanding portion 12b of the electrode 12 becomes partially thin. The rigidity of the electrode 12 is reduced at this thin portion. As a result, stress on the solder 14 due to deformation of the electrode 12 is reduced, so that the reliability of a solder connection is improved.

[0034] The semiconductor device 8 is not limited to a semiconductor device formed of silicon, but may instead be formed of a wide-bandgap semiconductor having a wider bandgap than that of silicon. The wide-bandgap semiconductor is, for example, silicon carbide, a gallium nitride-based material, or diamond. A semiconductor device formed of such a wide-bandgap semiconductor has high withstand voltage and high allowable current density and can thus be miniaturized. The use of such a miniaturized semiconductor device enables miniaturization and high integration of the semiconductor device in which the semiconductor device is integrated.Furthermore, since the semiconductor device has high heat resistance, a radiating fin of a heat sink can be miniaturized, and a water-cooled part can be air-cooled, leading to further miniaturization of the semiconductor device. Furthermore, since the semiconductor device has low power loss and high efficiency, a highly efficient semiconductor device can be achieved.

[0035] Furthermore, the semiconductor device 8 formed of a wide band-gap semiconductor can operate at high temperatures. On the other hand, by using the above embodiments, the stress on the solder 14 can be reduced, thus improving reliability at high temperatures.

Claims

[1] Semiconductor device, comprising: - an insulating substrate (1) having a circuit structure (4); - a semiconductor device (8) mounted on the insulating substrate (1) and electrically connected to the circuit structure (4); - a housing (11) accommodating the insulating substrate (1) and the semiconductor device (8); and - an electrode (12) attached to the housing (11), where: - a tip surface of the electrode (12) is connected to the circuit structure (4) with solder (14), - electrode (12) is brought into contact with the circuit structure (4) through the housing (11) and pressed against it, - a projection (12d) is arranged on the tip surface, - the electrode (12) has a fixed portion (12a) which is fixed to the housing (11) and a projecting portion (12b) which projects onto the circuit structure (4), and - a height of an upper end of the upstanding portion (12b) of the electrode (12) is higher than a height of the fixed portion (12a). [2] A semiconductor device according to claim 1, wherein: - the housing (11) has: - an outer wall (11a) enclosing the insulating substrate (1) and the semiconductor device (8), and - a projecting portion (11b) projecting from the outer wall (11a) toward the inside of the outer wall (11a), and - the electrode (12) is pressed downwards by making contact with a lower surface of the protruding portion (11b) and receives a force with which it is brought into contact with and pressed against the circuit structure (4). [3] Semiconductor device according to one of the preceding claims, further comprising a base plate (6), where: - the insulating substrate (1) is connected to an upper surface of the base plate (6) and - the housing (11) is bonded to the upper surface of the base plate (6). [4] A semiconductor device according to claim 1 or 2, wherein the package (11) is directly bonded to the insulating substrate (1). [5] A semiconductor device according to any one of the preceding claims, wherein: - a recess (16) is arranged on the circuit structure (4) and - the projection (12d) is fitted into the recess (16). [6] A semiconductor device according to any one of the preceding claims, further comprising a further electrode (17) placed parallel to the electrode (12). [7] A semiconductor device according to any one of the preceding claims, wherein the projection (12d) is not arranged at a peripheral portion of the tip surface. [8] A semiconductor device according to any one of the preceding claims, wherein two or more projections (12d) are arranged. [9] A semiconductor device according to any one of the preceding claims, wherein a slit (12e) is arranged on a lateral surface of the upstanding portion (12b) of the electrode (12). [10] A semiconductor device according to any one of claims 1 to 8, wherein a thickness of the upstanding portion (12b) of the electrode (12) is partially thin. [11] A semiconductor device according to any one of the preceding claims, wherein the semiconductor device (8) or a wiring (10) is connected to the circuit structure (4) to which the electrode (12) is connected. [12] The semiconductor device according to claim 11, wherein a distance from a connecting portion of the electrode (12) and the circuit pattern (4) to an end portion of the circuit pattern (4), the semiconductor device (8) or an external wiring (10) is equal to a height of the solder (14) or longer. [13] A semiconductor device according to any one of the preceding claims, further comprising a resin (15) sealing the insulating substrate (1), the semiconductor device (8) and the electrode (12). [14] A semiconductor device according to any one of the preceding claims, wherein the semiconductor device (8) is formed of a wide band gap semiconductor. [15] A method of manufacturing a semiconductor device, wherein: - the semiconductor device is designed according to one of the preceding claims, - the procedure has: - placing a semiconductor device (8) on an insulating substrate (1) and electrically connecting the semiconductor device (8) to a circuit structure (4) of the insulating substrate (1); and - attaching a housing (11) to accommodate the insulating substrate (1) and the semiconductor device (8), and connecting, by means of solder, a tip surface of an electrode (12) attached to the housing (11) to the circuit structure (4), - when the housing (11) is attached, the electrode (12) is brought into contact with the circuit structure (4) through the housing (11) and pressed against it, and - a projection (12d) is arranged on the tip surface.

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