METHODS FOR THE APPLICATION OF MICROLENS ON SMALL APERTURE PHOTODETECTORS AND VCSEL FOR HIGH DATA RATE APPLICATIONS

By attaching a microlens to photodetectors and VCSELs through wafer-to-wafer bonding, the aperture size limitations are overcome, enhancing data rates and reducing costs and noise, thus improving photodetector performance.

DE102021127971B4Active Publication Date: 2026-06-03AVAGO TECHNOLOGIES INTERNATIONAL SALES PTE LTD
View PDF 5 Cites 0 Cited by

Patent Information

Authority / Receiving Office
DE · DE
Patent Type
Patents
Current Assignee / Owner
AVAGO TECHNOLOGIES INTERNATIONAL SALES PTE LTD
Filing Date
2021-10-27
Publication Date
2026-06-03

AI Technical Summary

Technical Problem

The data rate supported by photodetectors is limited by the aperture size, which is constrained by the optics' ability to focus the beam to a smaller point and mechanical tolerances during assembly.

Method used

A method involving wafer-to-wafer bonding is used to attach a microlens to a small-aperture photodetector or VCSEL, employing high refractive index lens wafers for PIN detectors and lower refractive index lens wafers for VCSELs, with electrical connections made through the epistructure, and using thermal compression or epoxy bonding processes.

Benefits of technology

This approach reduces the optical spot size, improves mechanical tolerances, and enhances data rates while lowering production costs, reducing capacitance, and improving signal integrity and sensitivity.

✦ Generated by Eureka AI based on patent content.

Smart Images

  • Figure 00000000_0000_ABST
    Figure 00000000_0000_ABST
Patent Text Reader

Abstract

Method for attaching a lens (125, 205, 305, 450) to an optical device (115, 210, 315), wherein the method comprises: Aligning first metal pads (321) of a lens substrate (305, 450, 650) with second metal pads (310, 425) of a substrate (105, 205, 314, 440, 640) having a first surface of the optical device (115, 210, 315), wherein the first surface has at least a part of one or more optical devices; Coupling the first metal pads (321) of the lens substrate with the second metal pads (310, 425) on the first surface of the substrate (105, 205, 314, 440, 640) of the optical device (115, 210, 315); and Removing part of the substrate (105, 205, 314, 440, 640) of the optical device (115, 210, 315) to expose a conductive layer (510), wherein after removal of the part the conductive layer (510) is located on a second surface opposite the first surface, wherein metal pads (310, 425, 321) are arranged on the conductive layer (510).
Need to check novelty before this filing date? Find Prior Art

Description

Territory of Revelation

[0001] This disclosure generally relates to systems and methods for attaching a lens (e.g., a microlens) to a photodetector (e.g., a PIN photodiode, etc.) and a light emitter (e.g., a VCSEL, an LED, etc.). Some embodiments in this disclosure relate to systems and methods for connecting or bonding a wafer with light-receiving or light-emitting devices to a lens wafer. Background of the Revelation

[0002] The data rate that can be supported by a photodetector is limited by the aperture size. Minimizing the aperture size of a photodetector can be challenging because the optics have a limited ability to focus the beam to a smaller point, and mechanical tolerances occur during assembly.

[0003] US 4 867 371 A discloses a manufacture of optical devices, wherein on an opposite surface of a substrate, remote from the planar lenses but in predetermined positional relations to the lenses in a planar direction of the substrate, a field of metallic bonding pads or registration means is formed, which are co-operable with corresponding pads or other means provided on a plurality of optical devices.

[0004] JP 2011-175 008 A discloses an optical device component comprising: a lens to which a metal layer is attached such that it covers the outer surface of the lens; and a lens body whose inner surface consists at least partially of a metal material, to the surface of which a solder layer is attached such that it covers the outer surface of the metal material, the metal layer being connected to the metal material of the lens body via the solder layer. US 2012 001 166 A1 discloses a silicon-on-insulator wafer comprising a silicon substrate with optical vias formed therein. Additionally, an optically transparent oxide layer is arranged on the silicon substrate, which is in contact with the optical vias.

[0005] US 2011 044 369 A1 discloses an optoelectronic (OE) package or system and a manufacturing process described, comprising a silicon layer with wiring. The silicon layer has an optical via that allows light transmission. An optical coupling layer is bonded to the silicon layer and comprises a plurality of microlenses for focusing and / or collimating the light through the optical via. Summary

[0006] It is an object of the invention to provide an optical device in an efficient manner. This object is achieved by the independent claims. Further embodiments are specified in the dependent claims. Brief description of the drawings

[0007] Various objects, aspects, features, and benefits of the disclosure become clearer and better understood when referring to the detailed description in conjunction with the accompanying drawings, in which identical reference numbers consistently denote corresponding elements. In the drawings, identical reference numbers generally denote identical, functionally similar, and / or structurally similar elements. Fig. 1A and Fig. 1B are schematic perspective drawings of systems comprising a discrete lens and a photodetector mounted on a support, complete with wire connection from the photodetector to a transimpedance amplifier (TIA), according to one or more implementations; Fig. 2A and Fig. Figure 2B shows schematic perspective drawings of a non-hermetic Mesa-VCSEL or a hermetic Mesa-VCSEL according to one or more implementations; Fig. 3A, Fig. 3B, Fig. 3C and Fig. 3D figures are schematic perspective drawings that show an exemplary process flow for coupling a photodetector with a microlens according to one or more embodiments; Fig. 4A and Fig. 4B are schematic perspective drawings of a VCSEL substrate or a microlens substrate according to one or more embodiments; Fig. 5A, Fig. 5B, Fig. 5C, Fig. 5D and Fig. Figure 5E are schematic perspective drawings showing an exemplary process flow for coupling a hermetic VCSEL with a microlens according to one or more embodiments; Fig. 6A, Fig. 6B, Fig. 6C, Fig. 6D, Fig. 6E, Fig. 6F and Fig. Figure 6G are schematic perspective drawings showing an exemplary process flow for coupling a non-hermetic VCSEL with a microlens according to one or more embodiments; Fig. 7A, Fig. 7B and Fig. Figures 7C are schematic perspective drawings of VCSEL devices showing comparisons of the VCSEL temperature for different microlens materials, according to one or more embodiments; Fig. 8A and Fig. Figure 8B are schematic perspective drawings of an exemplary pickup and placement tool for the devices described herein according to one or more embodiments; and Fig. 9A, Fig. 9B, Fig. 9C, Fig. 9D, Fig. 9E and Fig. Figure 9F are schematic perspective drawings of an exemplary die fastening sequence according to one or more embodiments. Fig. Figure 10 is a schematic perspective drawing of optical devices according to some embodiments.

[0008] The details of various embodiments of the methods and systems are set out in the accompanying drawings and in the description below. Detailed description

[0009] The following section details various concepts and embodiments of techniques, approaches, methods, devices, and systems for photodetectors and lasers, including, but not limited to, systems and methods for attaching a microlens to a small-aperture photodetector (e.g., a positive-intrinsic-negative photodetector (PIN photodetector), etc.) and a light source (e.g., a vertical-resonator surface-emitting laser (VCSEL)). Some systems and methods involve bonding a PIN or VCSEL wafer to a lens wafer. The lens may be a high-magnification lens.The devices can be a backlit surface-mounted PIN integrated with a lens and capable of operating at a wavelength of 850 nanometers, or a backlit surface-mounted VCSEL integrated with a lens and capable of operating at a wavelength of 850 nanometers. The various concepts presented above and discussed in detail below can be implemented in numerous ways, as the described concepts are not limited to a specific implementation method. Examples of specific embodiments and applications are provided primarily for illustrative purposes.

[0010] The data rates that can be supported by a PIN detector can be limited by the aperture size of the PIN detector. In some embodiments, the minimum aperture diameter can be approximately 30 µm. This limitation is due, for example, to the ability of the optics to focus the beam to a smaller point, as well as to the mechanical tolerances of the assembly process. The techniques described in this disclosure can reduce the size of the optical spot and improve the achievable mechanical tolerances, thereby improving the performance of conventional PIN and VCSEL devices, as well as the manufacturing processes and systems. Using the techniques described here, a design with a higher data rate and lower production costs can be achieved.

[0011] The systems and methods described here provide a method for attaching a microlens to a small-aperture PIN detector device or a VCSEL device for high-data-rate applications. The techniques described here can employ a wafer-to-wafer bonding process to connect or bond a PIN or VCSEL wafer to a lens wafer. The substrate of the PIN or VCSEL wafer can then be removed. The remaining epistructure can be supported by the lens wafer. Electrical connections can be made through the epistructure from the back side of the device.

[0012] For a PIN application, a lens wafer with a high refractive index can be used to focus the beam to a smaller spot size. Tolerances in the optical distance between the lens and the aperture, which are due to the thickness of the lens wafer, can be reduced because of the high refractive index of the lens wafer. For a VCSEL application, the lens wafer could have a lower refractive index.

[0013] In some embodiments, a PIN chip (e.g., wafer, substrate, etc.) can be placed on a substrate. The front surface or aperture of the PIN chip can be referenced to the surface of a mechanical structure oriented in the same direction as the aperture. A lens facing the aperture of the PIN chip can be placed on the reference surface of the mechanical structure. This technique reduces the tolerance between the surface of the aperture and the lens. Further details of these and other techniques are described here.

[0014] These techniques can be modified, for example, to provide different variants of devices and configurations suitable for specific applications. Various lens materials can be used for the lens wafer, such as silicon carbide (SiC) or gallium phosphide (GaP), and others (e.g., some glass materials). In some embodiments, the lens material has high thermal conductivity (e.g., for VCSEL), a high refractive index (e.g., for PIN), a coefficient of thermal expansion compatible with the semiconductor, and is transparent at the desired wavelength. In some embodiments, various electrical connections, such as gold bumps and thermal compression bonds or solder bumps, can be implemented in conjunction with the techniques described here. In some embodiments, the lens wafer can be bonded to a PIN wafer or a VCSEL wafer, with, among other things,a thermal compression bonding process, an epoxy bonding process, a solder bonding process or a thermosonic bonding process is used.

[0015] Several techniques described here offer various improvements over conventional PIN and VCSEL devices and fabrication methods. For example, the techniques described here can be used in an 850 nm PIN implementation, which is impossible with conventional techniques. Furthermore, the techniques described here can reduce the capacitance of a PIN detector. Reducing the capacitance can significantly increase the bandwidth of the detector system. Aligning the lens at the wafer level with the aperture can reduce alignment costs. In addition, reduced capacitance can reduce noise for the TIA, thus improving sensitivity or the detection limit. The design can be surface-mountable, which can simplify the assembly process while also improving signal integrity.

[0016] In some embodiments, thermosonic bonding can be used to attach the device to the TIA and the lens to the device. In some embodiments, flip-chip techniques can be used to mount the TIA and devices on a printed circuit board. In some cases, the epoxy resin is applied at a specific location to attach the device to the lens, thus avoiding drift associated with the curing of the epoxy resin.

[0017] The lens-integrated device can be connected to the TIA or driver IC, similar to one in the Fig. 1A and Fig. The arrangement shown in Figure 1B is described below. In some embodiments, the lens material can have a much higher conductivity (e.g., the thermal conductivity of SiC can exceed 400 W / meter-Kelvin (mK), etc.). Higher conductivity can lower the overall temperature of VCSEL devices. When using discrete lenses, the techniques described here can minimize the tolerance of the distance between the lens and the aperture. Because the spot size is minimized, the numerical aperture (NA) of the beam approaching the aperture can be large. By maintaining a precise distance between the aperture and the lens, the small spot size can be preserved, representing an improvement over conventional techniques.

[0018] Some embodiments relate to a method for attaching a lens to an optical device. The method includes aligning first metal pads of a lens substrate with second metal pads of a substrate of the optical device having a first surface, wherein the first surface comprises at least a portion of one or more optical devices. The method also includes coupling the first metal pads of the lens substrate with the second metal pads on the first surface of the substrate of the optical device. The method includes removing a portion of the substrate of the optical device to expose a conductive layer, wherein, after the removal of the portion, the conductive layer is located on a second surface opposite the first surface.

[0019] Some embodiments relate to a device. The device includes a lens having a first lens surface and a second lens surface opposite the first lens surface. The second lens surface has a first metal pad. The device also includes a fixture layer with an optical device, a first fixture surface, and a second fixture surface opposite the first fixture surface. The first fixture surface has a second metal pad, and the second fixture surface has a third metal pad. The second metal pad is physically connected to the first metal pad, and the third metal pad is configured for mounting on a printed circuit board.

[0020] Some embodiments relate to a method for manufacturing an optical device. The method involves attaching a lens substrate to a substrate of the optical device having a first surface, wherein the first surface comprises at least a portion of one or more optical devices. The first surface is in contact with a second surface of the lens substrate. The method also involves removing a portion of the substrate of the optical device to expose a conductive layer. After the portion is removed, the conductive layer is located on a third surface of the substrate of the optical device, wherein the third surface of the optical device faces the first surface of the substrate of the optical device.

[0021] Some embodiments relate to an optical device assembly. The optical device assembly comprises a carrier, a discrete lens attached to the carrier between a plurality of raised sections extending from a first surface of the carrier, and a semiconductor material. The semiconductor has a top surface, which includes at least part of an optical device, and a bottom surface. The semiconductor material is attached to the first surface and to the bottom surface.

[0022] In some embodiments, the substrate of the optical device has an epitaxial layer over an etch stop layer over a bulk substrate, and wherein the removal of the part involves etching down to the etch stop layer, the etch stop layer being adjacent to the conductive layer.

[0023] Referring now to the Fig. Figure 1A shows a perspective view 100A of a system comprising a discrete microlens and a photodetector mounted on a support, complete with a wire connection from the photodetector to a transimpedance amplifier (TIA), according to one or more embodiments. The system shown in view 100A can include a support 105, a TIA 110, a photodetector 115, wire connections 120, and a lens 125 (e.g., a microlens).

[0024] The support 105 can be any type of support that can be connected to the TIA 110 and the photodetector 115. For example, the support can be made of a metal substrate, an epoxy substrate, a silicon substrate, a plastic substrate, or any other type of substrate that can be coupled to the TIA 110 and the photodetector 115. In some embodiments, the support 105 can be manufactured by a machining process, an injection molding process, a photolithographic manufacturing process, an additive manufacturing process (e.g., three-dimensional (3D) printing, etc.), and other methods. The support 105 can be coupled to at least one detector 115, at least one lens 125, and at least one TIA 110.

[0025] The photodetector 115 can include a PIN diode that can be used to detect specific wavelengths of light passing through the lens 125. The photodetector 115 can have a wide, undoped intrinsic semiconductor region between a p-type semiconductor and an n-type semiconductor region. In some embodiments, some p-type and n-type regions can be heavily doped, as they are used for ohmic contacts. In some embodiments, the detector 115 can be reverse-biased. When reverse-biased, the diode is normally non-conducting. When a photon with sufficient energy (e.g., with a certain frequency or wavelength, etc.) enters the depletion region of the diode, it can generate an electron-hole pair. The field with reverse bias sweeps the charge carriers out of the region, generating current. In some embodiments, the photodetector 115 can employ avalanche multiplication.The 115 photodetector can be used in high-speed fiber optic communication systems. The 115 photodetector can be a PIN or avalanche detector.

[0026] The photodetector 115 can include one or more PIN diodes. In some embodiments, the photodetector 115 can be electrically coupled to a TIA 110 via one or more bond wires 120. The bond wires 120 can be small, low-resistance wires, such as gold, platinum, or silver wire. The bond wires 120 can be connected to the photodetector 115 and the TIA by, among other methods, thermal compression bonding, epoxy bonding, solder bonding, or thermosonic bonding.

[0027] The TIA 110 can be electrically coupled to the photodetector 115 and can amplify the signals received by the photodetector 115. In some embodiments, the current supplied by the photodetector 115 in response to light signals can be small. The TIA 110 can detect and amplify the signals from the photodetectors 115 so that the signals can be detected by other, less sensitive communication components. In some embodiments, the TIA 110 can be a current-to-voltage converter and include one or more operational amplifiers. The TIA 110 can be fabricated, for example, using one or more photolithographic processes. In some embodiments, the TIA 110 can be a separate module coupled to the carrier 105 and electrically connected to the photodetectors 115 using the bond wires 120.The output of the TIA 110 can be electrically coupled to one or more other electrical components, e.g., signal processing components (not shown).

[0028] The lens 125 can be coupled to the carrier 105 above the photodetector 115 or more photodetectors 115 and can focus light onto the photodetector 115 or more photodetectors 115 to aid light detection. The lens 125 can be made of one or more materials, such as silicon carbide (SiC) or gallium phosphide (GaP), to name a few. The lens 125 can be manufactured as part of a lens wafer (e.g., with many other lenses 125, etc.) and subsequently cut, etched, or otherwise subdivided to meet the size requirements of a particular application. In some embodiments, the lens 125 can be bonded to the photodetector 115, for example, using a thermal compression bonding process, an epoxy bonding process, a solder bonding process, or a thermosonic bonding process.In some embodiments, there is a separation gap between the lens 125 and the photodetector 115, and the lens 125 can be bonded to the substrate using, among other methods, a thermal compression bonding process, an epoxy bonding process, a solder bonding process or a thermosonic bonding process.

[0029] Referring to the Fig. Figure 1B shows an example view 100B, which depicts a similar device to the one in Fig. The system shown in 1A, however, is mounted on a printed circuit board (PCB). The system in view 100B can include a carrier 105, a TIA 110, a photodetector 115, wire connections 120, a lens 125 (e.g., a microlens), and a printed circuit board 130. As shown, the system in view 100B is similar to that in view 100A. Fig. The system shown in Figure 1A, but with additional bond wires 120 that electrically connect the TIA 110 to the circuit board 130. In some embodiments, the photodetector 115 can be directly coupled to a lens to form a photodetector assembly, and the photodetector assembly can be directly coupled to the TIA 110. Similar to an assembly in Fig. 1B In some embodiments, the TIA 110 can be directly connected to the surface of the printed circuit board 130.

[0030] The printed circuit board 130 can contain one or more conductive pads or traces that electrically connect electronic components. In some embodiments, the bond wires 120 can be connected to the TIA 110 and the printed circuit board 130 by, among other methods, thermal compression bonding, epoxy bonding, solder bonding, or thermosonic bonding. In some embodiments, the carrier 105 of the system in view 100B can be bonded to one or more conductive pads on the printed circuit board 130, e.g., a ground plane or any other type of pad (e.g., a pad connected to another electrical signal or voltage rail, or a floating pad, etc.). Similar to an arrangement in Fig. 1B In some embodiments, the TIA 110 can be directly connected to the surface of the printed circuit board 130. For example, in some embodiments, the conductive pads of the TIA 110 can be directly coupled to conductive pads exposed on the photodetector assembly 115 (or a VCSEL assembly, as described herein, etc.) to form a TIA assembly 110. The TIA assembly 110 can then be bonded to the printed circuit board 130 using one or more bonding methods described herein, which in some embodiments may include one or more of the adhesive wires 120.

[0031] In some embodiments, the lens 125 sits directly on the support 105. The epoxy 121 is located between the lens 125 and the support 105. This arrangement, with the epoxy 121 between the lens 125 and the support 105, has a thickness tolerance that results in an unknown distance between the lens 125 and the photodetector 115. In this arrangement, the lens 125 is pressed downwards onto the support 105. As the epoxy 121 cures, it shrinks to hold the lens surface in place on the support 105 after curing. Thus, the position of the lens 125 relative to the support 105 is controlled. The placement of the photodetector 115 is achieved in some embodiments using the method described in Fig. The tooling techniques described in section 8 use the upper surface of the support 105 as a reference for the upper surface of the photodetector 115 in some embodiments. Gold bumps are arranged on the underside of the support 105. When the tooling technique presses the photodetector 115 downwards, the gold bumps deform. As the epoxy resin cures, the gold bumps retain the position of the underside of the photodetector 115, thus maintaining the upper position of the photodetector 115.

[0032] Referring now to the Fig. 2A and Fig. Figure 2B shows perspective views of a non-hermetic and a hermetic light source, such as a VCSEL and a hermetic VCSEL respectively, according to one or more embodiments.

[0033] With specific reference to the Fig. Figures 2A and 200B show perspective views of a non-hermetic VCSEL, from above and below, respectively. The non-hermetic VCSEL can include a lens 205 and a VCSEL wafer 210. The lens 205 can be shown above in conjunction with the Fig. 1A and Fig. The lens described in 1B should be similar to lens 125.

[0034] The Lens 205 can be manufactured from one or more substrate materials such as SiC, GaP, or glass. The substrate can be cut, etched, or cubed to adapt it to the application size. It should be understood that, although in the Fig. 2B shows only a single VCSEL on the wafer 210, but many VCSELs can be connected to the substrate of the lens 125, for example.

[0035] The VCSEL on the in Fig. Wafer 210 shown in Figure 2A can be a non-hermetic light source such as a VCSEL. A non-hermetic VCSEL is one in which the MESA region is not hermetically or airtightly sealed. The VCSEL on wafer 210 can be a semiconductor laser diode whose laser beam exits perpendicularly from the top surface. The VCSEL on wafer 210 can be used in various laser products, including high-speed fiber optic communication. The VCSEL on wafer 210 can have various electrical connections that supply power to the laser diode. When current flows through the VCSEL on wafer 210 via the electrical connections, the VCSEL can emit light of a specific wavelength through lens 205. Lens 205 can collimate the light emitted by the VCSEL on wafer 210 for use in high-speed fiber optic communication.

[0036] With specific reference to the Fig. Figures 2B show perspective top and bottom views 200C and 200C, respectively, of a hermetic VCSEL. The hermetic VCSEL can include a lens 205 and a VCSEL wafer 210, which can be hermetically or airtightly sealed in the MESA region. The lens 205 can be used in conjunction with the above. Fig. 1A, Fig. 1B and Fig. The lens 125 described in 2A should be similar.

[0037] The laser diode (e.g., the VCSEL) in the VCSEL wafer 210 shown in View 200D can be sealed in a substrate material used to fabricate the VCSEL on the VCSEL wafer 210. Instead of etching away most of the substrate used to fabricate the VCSEL device on the VCSEL wafer 210, a via (e.g., a through-hole, etc.) is created to provide the electrical connections required to supply the VCSEL with electrical current. The Fig. 2A and Fig. The VCSEL devices shown in Figure 2B on the VCSEL wafer 210 can be fabricated using a photolithographic process and contain one or more layers of semiconductor material forming the VCSEL device. In some embodiments, the VCSEL wafer 210 has an epitaxial layer over a bulk substrate or an epitaxial layer over an etch stop layer over a bulk substrate (e.g., a semiconductor, a semiconductor on glass, etc.). Wafer 210 is shown after slicing into a chip for the VCSEL device with lens 205.

[0038] Referring now to the Fig. 3A, Fig. 3B, Fig. 3C and Fig. The 3D figures show perspective views of an exemplary process flow for coupling a photodetector to a microlens according to one or more embodiments. With specific reference to Fig. Figure 3A shows a perspective view 300A of an exemplary lens 305 and a perspective view 300B of an exemplary photodetector 315 on a substrate 314. The exemplary lens 305 may be similar to lenses 125 and 205, which are shown here in conjunction with Fig. 1A, Fig. 1B, Fig. 2A and Fig. 2B. In some embodiments, the lens 305 may include one or more metal conductive traces or pads that may be configured to couple with the pads 310 of the photodetector 315. In some embodiments, the lens 305 may include metal patterns or other electrically conductive patterns that mate with metal or conductive pads on the photodetector 315.

[0039] The 315 photodetector can be used in conjunction with the one above, similar to the one above. Fig. 1A and Fig. The photodetector 315 is described in Section 1B. The photodetector 315 can be arranged (e.g., coupled, formed, etc.) on a substrate 314, e.g., a silicon compound or a gallium compound. In some embodiments, the photodetector 315 can be formed on the substrate 314 using one or more photolithographic processes. The photodetector 315 can have an aperture that can be used to detect light. The aperture can have a dimension of about 30 micrometers. In some embodiments, the aperture can be smaller than 30 micrometers, for example, when the lens 305 is configured to focus the incident light onto a smaller spot on the photodetector 315. The photodetector 315 and the lens 305 can each be formed as part of a wafer containing the photodetectors 315 and the lens 305, respectively. Although in Fig. Figure 3A shows only four lenses and four photodetectors 315; of course, more or fewer lenses 305 and photodetectors 315 are also possible. In some embodiments, each of the lenses 305 can correspond to a respective photodetector 315.

[0040] Referring now to the Fig. 3B is a perspective view 300C of the in Fig. 3A shows lens 305 from above and a perspective view 300D of lens 305, which is above the one in Fig. Figure 3A shows the wafer of the photodetector 315 positioned from below. At this stage of the process, the lens 305 can be positioned above the photodetector 315 such that the metal pads of the lens 305 are aligned with corresponding metal pads 310 or contact points on the detector 315 to couple each lens 305 to its respective photodetector 315 (e.g., so that the lens 305 can focus the light onto the aperture of the photodetector 315, etc.). Alignment using the pads enables precise bonding of the wafer of the lens 305 to the wafer of the photodetector 315. In some embodiments, a conductive epoxy resin can be used as an intermediate for bonding between the metal pads.

[0041] Referring now to the Fig. 3C is a perspective top view of the 300E of the in Fig. Figure 3B shows the alignment procedure, and Figure 300F shows a perspective top view of a bonding process used to bond the lens wafer 305 to the wafer of the photodetector 315. At this stage of the process, after alignment of the lens wafer 305 and the wafer of the photodetector 315, the wafers can be joined together using a bonding technique. Bonding techniques can include, for example, thermal pressure bonding, epoxy bonding, mechanical bonding, or other types of bonding techniques. Bonding the lens substrate to the photodetector substrate 314 seals the circumference of the device.

[0042] Referring now to the Fig. Figure 3D shows a perspective view 300G of a machined substrate 317 from below after bonding the lens 305 to the substrate 314 of the photodetector 315, a perspective view 300H from below after an etching process on the epitaxial layer 317 of the photodetector 315, and a perspective view 300I of the component from below after adding gold studs 319 to the conductive pads 321 shown in view 300H.

[0043] View 300G shows substrate 314 ( Fig. 3C) according to the above in conjunction with Fig. The bonding process described in Section 3C and subsequent processing steps are described below. After the photodetectors 315 have been bonded to the lens, the substrate 314, which carries the epistructure of the photodetectors 315, is no longer required. The epistructure of the photodetectors 315 can instead be carried by the wafer of the lens 305, which is now directly coupled to the photodetectors 315 via one or more metal pads or other connections. The processing steps may include grinding away most of the substrate 314 beneath the detectors 315 using one or more substrate grinding processes. The processing steps may also include chemical etching of the layer on which the photodetectors 315 were formed, down to an etch-stop layer, following the grinding process. The etch-stop layers are selected depending on the substrate material to be etched.For example, in a photodetector with an indium phosphide substrate, the etch stop layer can be an InGaAs layer. The etching solution is a mixture of hydrochloric acid and phosphoric acid. The etch stop layer does not react with the etchant, which removes most of the substrate on which the photodetectors 315 were formed, and thus stops the etching process.

[0044] View 300H shows the result of a subsequent etching process following the substrate removal process shown in View 300G. The substrate etching process may include the etching of contact holes to a gold bonding layer. The gold bonding layer may have one or more conductive pads 321 that are electrically coupled to the photodetectors 315 and can be used to establish electrical connections between the photodetectors 315 and other components (e.g., the one shown in Fig. 1A and Fig. to produce the TIA 110 shown in 1B, etc.

[0045] View 300I shows a perspective view from below of the pads shown in View 300H, which are now connected with Goldstuds 319. The Goldstuds 319 can be used for electrical coupling of the contact surfaces to one or more electrical components. For example, the Goldstuds 319 can be formed onto the contact pads using a wire bonder that places a gold ball onto the pads. After the gold ball is placed, the wire is cut. In this way, the Goldstuds 319 can be removed. Fig. The process flow shown in 3A-3D is used to fabricate a photodetector device 315 with an integrated lens that can focus light onto a small aperture of the photodetector 315. This can improve the overall throughput of high-speed data communication systems based on the photodetector 315, such as fiber optic communication systems. Furthermore, the device can be designed to reduce the overall system capacitance, thereby decreasing the noise experienced by a TIA (e.g., the TIA 110, etc.) and thus improving the signal-to-noise ratio.

[0046] Referring now to the Fig. 4A and Fig. Figure 4B shows perspective views of a VCSEL substrate or a microlens substrate in accordance with one or more embodiments. Specifically in Fig. Figure 4A shows a view 400 of a VCSEL device (e.g., a VCSEL diode) formed on a VCSEL substrate 440. The VCSEL diode is located in the center of the surface 401 of the VCSEL substrate 440 and has a metal ring 416 around its circumference, which is separated from a floating metal pad 425 (which minimizes the capacitance of the system) by an oxide trench etch 415. The substrate 440 may also have a bonding pad 420 for a P-contact of the VCSEL device, which can be separated from the floating metal pad 425 by the trench etch to the last active layer 410. The metal pads, such as the bonding pad 420, the floating metal pad 425, and the metal electrode or ring 416, which are positioned on the circumference of the VCSEL diode, can have corresponding metal bond pads positioned on a lens substrate 451, as shown in Fig. 4B is shown.

[0047] Referring now to the Fig. Figure 4B shows a view 405 of a lens 450 with embedded metal pads 425 and 435. In some embodiments, the metal pads 425 are floating metal pads. The pad 430 is an electrical connection pad and can connect the P-contact to the ring 416 surrounding the VCSEL diode as soon as a substrate 51 of the lens 450 is connected to the Fig. The VCSEL substrate 440 shown in Figure 4A is coupled to the lens substrate 451. The VCSEL substrate 440 can be coupled to the lens substrate 451 using a bonding method similar to the one described above in conjunction with the Fig. The 3A-3D described above is applied. This is described in Fig. 4A and Fig. Pad 425, shown in Figure 4B, can be used in some embodiments to fabricate a hermetic VCSEL device. Non-hermetic VCSEL devices can be fabricated using various configurations of metal pads, as described here.

[0048] Referring now to the Fig. 5A, Fig. 5B, Fig. 5C, Fig. 5D and Fig. Figure 5E shows perspective views of an exemplary process flow for coupling a hermetic VCSEL with a microlens according to one or more embodiments. The illustrated process flow shows the steps of attaching the lens substrate 451 to the VSCEL substrate 440 so that the lens substrate 451 can collimate the light emitted by the VSCEL diode and the VCSEL diode can be supplied with electrical current via the metal pads exposed on the VCSEL substrate. The lens substrate 650 can be similar to the lens substrates described herein (e.g., lens 125, lens 305, lens 450, etc.). The VCSEL substrate 440 can have a VCSEL diode at its center or at any other desired location on the VCSEL substrate 440. The process flow shown in Figure 5E is described in Figure 5E. Fig. 5A, Fig. 5B, Fig. 5C, Fig. 5D and Fig. The device produced in the process sequence shown in 5E can be a hermetic or airtight VCSEL device.

[0049] Referring specifically to the Fig. 5A is a perspective view 500A of a step in the process flow, which corresponds to the one shown in view 300G of Fig. The 3D representation is similar. In this phase of the process, the VCSEL substrate 440 was aligned and connected or bonded to the lens substrate 451. Aligning the VCSEL substrate 440 with the lens substrate 451 can involve aligning the corresponding metal pads on the VCSEL substrate 440 with those on the lens substrate 451, as shown in the Fig. 4A and Fig. Figure 4B shows the process. After alignment, the VCSEL substrate 440 can be bonded to the lens substrate 451 using a bonding technique. Bonding techniques can include, for example, thermal pressure bonding, epoxy bonding, mechanical bonding, or other types of bonding.

[0050] After bonding the VCSEL substrate 440 to the lens substrate 451, the majority of the VCSEL substrate (e.g., parts lacking diode-specific layers and some buffer layers, etc.) can be ground off. This grinding can be performed using an abrasive surface or another type of grinding technique. Subsequently, the remaining portions of the underside can be etched down to an etch stop layer, and the etch stop layer itself can be removed by a further etching process.

[0051] Referring specifically to the Fig. Figure 5B shows a perspective view 500B of the next stage of the process flow, in which a metal layer can be deposited on the underside of the VCSEL substrate 440 using a metal deposition process. Using metal deposition techniques, a metal layer 510 can be applied, which may contain a material with high conductivity, such as gold, platinum, or silver. In some embodiments, the metal can be deposited using a metal evaporation (e.g., electron beam evaporation, etc.) and peeling process. Such a process allows controlled layers of precious or conductive metals to be deposited in precise patterns on the surface of a substrate. The pattern of the metal in the metal layer 510 may include a hole section 512, which can be etched away to provide a passage to the Fig. to form the metal layer 430 shown in Figure 4B, which is electrically connected to the metal section surrounding the VCSEL diode.

[0052] Referring specifically to the Fig. 5C is a perspective view 500C of the results of a further etching process at the in Fig. Figure 4B shows the metal layer 430, which is electrically coupled to the metal layer surrounding the perimeter of the VCSEL diode. The etching process can etch through the epistructure of the VCSEL substrate 440 and expose a surface 515 of the Fig. Expose the metal layer 430 shown in Figure 4B. In some embodiments, an additional coating step can be carried out to increase the thickness of the surface 515 of the metal layer 430 when it is exposed through the epi structure of the VCSEL substrate 440.

[0053] Referring specifically to the Fig. Figure 5D shows a perspective view 500D of the final stage of the process flow, in which gold contact bumps 520 are fused to the metal layer 510 and the surface 515 of the metal layer 430, which can be electrically coupled (or connected) to other electronic components so that these other electronic components can supply current to the VCSEL diode formed in the VCSEL substrate. Since most of the second metal layer, which is linked to the pad 425, is floating and not connected to a voltage or current source, the overall capacitance of the VCSEL device is reduced, which is an improvement over some other embodiments. The metal layer 510 and the metal layer 430 can form the electrodes which, when supplied with an appropriate electrical current, cause the VCSEL diode to emit light of a predetermined wavelength.The light emitted by the VCSEL diode is then collimated by the lens 450, which is now integrated into the VCSEL device via the lens substrate 450.

[0054] Referring specifically to the Fig. Figure 5E shows a cross-sectional view 500E of the finished hermetic VCSEL device formed in the process described above. As shown in the cross-sectional view, the metal layer 430 and the metal layer 510 form the anode and cathode electrodes of the VCSEL diode, respectively, centered in a surface 452 of the epitaxial layer of the VCSEL substrate 440. Each of these electrodes is coupled to gold contact prongs 520, which can be electrically coupled to other components in a system (e.g., an amplifier, a voltage source, a current source, etc.) via one or more bonding techniques (e.g., solder bonding, thermal compression bonding, epoxy bonding, thermosonic bonding, etc.).

[0055] The second metal layer, linked to the pad 425, connects the lens substrate 450 to the VCSEL substrate 440 (e.g., including an epitaxial layer) and can be separated from any charge-carrying circuitry (e.g., floating). As described above, the light emitted by the VCSEL diode can be received and collimated by the lens 450, making the light suitable for high-data-rate applications.

[0056] Referring now to the Fig. 6A, Fig. 6B, Fig. 6C, Fig. 6D, Fig. 6E, Fig. 6F and Fig. Figure 6G shows perspective views of an exemplary process flow for coupling a non-hermetic VCSEL with a microlens according to one or more embodiments. The [unclear text] Fig. 6A, Fig. 6B, Fig. 6C, Fig. 6D, Fig. 6E, Fig. 6F and Fig. The process flow shown in 6G can be compared to the one above in conjunction with the Fig. 5A, Fig. 5B, Fig. 5C, Fig. 5D and Fig. The process flow described in Section 5E is similar, but is used instead for the fabrication of non-hermetic VCSEL devices rather than hermetic VCSEL devices. The illustrated process flow shows the steps of attaching the lens of the lens substrate 650 to the VSCEL substrate 640 so that the lens 450 can collimate the light emitted by the VSCEL diode and the VCSEL diode can be supplied with electrical current via the metal pads exposed on the VCSEL substrate. The lens substrate 650 can be similar to the lens substrates described here (e.g., lens 125, lens 305, lens 450, etc.), and the VCSEL substrate can be similar to the VCSEL substrates described here. The steps in the Fig. 5A, Fig. 5B, Fig. 5C, Fig. 5D and Fig. The device produced in the process sequence shown in 5E can be a hermetic or airtight VCSEL device.

[0057] Referring specifically to the Fig. Figure 6A shows a view 600A of a lens substrate 650 with structured metal pads 605 and 610. The metal pads may include floating metal pads 610, similar to the one shown in Fig. The floating metal pad 425 shown in Figure 4B. The electrical connection pad 605 can connect the P-contact to the pad surrounding the VCSEL diode as soon as the lens of the lens substrate 650 is connected to the one shown in Figure 4B. Fig. The VCSEL substrate 640 shown in Figure 6B is coupled to the lens substrate 650. The VCSEL substrate 640 can be coupled to the lens substrate 650 using a bonding method similar to the one described above in conjunction with the Fig. The 3A-3D method described above, in conjunction with the Fig. 4A-4B and Fig. The bonding process described in 5A-5E is similar. Fig. The floating metal pad 610 shown in Figure 6A can be used to manufacture a non-hermetic VCSEL device.

[0058] Referring specifically to the Fig. Figure 6B shows a view 600B of a VCSEL diode device formed on a VCSEL substrate 640. The VCSEL diode can be positioned in the center of the surface of the VCSEL substrate and can have a metal ring around its circumference, separated from the floating metal pads 615 by a space created by a structured etching process. The substrate 640 can also have a bonding pad 620 for a P-contact of the VCSEL device, which is likewise separated from the floating metal surface 615 by a space created by an etching process. The metal pads, such as the bonding pad 620 (which, for example, also serves as an electrode for the VCSEL diode) and the floating metal pads 615, can have corresponding metal bonding pads positioned on a lens substrate, as shown in Figure 6B. Fig. 6A is shown.

[0059] Referring specifically to the Fig. 6C is a perspective view 600C of a step in the process flow, corresponding to the one shown in view 300G of Fig. 3D and the one in view 500A from Fig. 5A is similar. In this phase of the process, the VCSEL substrate 640 was aligned and bonded to the lens substrate 650. The alignment of the VCSEL substrate 640 with the lens substrate 650 can involve aligning the corresponding metal pads on the VCSEL substrate 640 with those on the lens substrate 650, as shown in the Fig. 6A and Fig. Figure 6B shows the process. After alignment, the VCSEL substrate 640 can be bonded to the lens substrate 650 using a bonding technique. Bonding techniques can include, for example, thermal pressure bonding, epoxy bonding, mechanical bonding, or other types of bonding.

[0060] After bonding the VCSEL substrate 640 to the lens substrate 650, the majority of the VCSEL substrate (e.g., parts lacking diode-specific layers and some buffer layers, etc.) can be ground off. This grinding can be performed using an abrasive surface or another type of grinding technique. Subsequently, the remaining portions of the underside can be etched down to an etch stop layer, and the etch stop layer itself can be removed by a further etching process.

[0061] Referring specifically to the Fig. Figure 6D shows a perspective view (600D) of the next stage of the process flow, in which a metal layer 625 can be deposited as a pattern on the underside of the VCSEL substrate 640 using a metal deposition technique. Metal deposition techniques allow the application of a metal layer 625 that may contain a highly conductive material, such as gold, platinum, or silver. In some embodiments, the metal can be deposited using a metal evaporation (e.g., electron beam evaporation, etc.) and deposition process. Such a process allows controlled layers of precious or conductive metals to be deposited in precise patterns on the surface of a substrate. The pattern of the metal layer 625 can include sections corresponding to the pads 605, 615, and 620 described herein, which can be positioned to form the corresponding anode and cathode electrodes for the VCSEL diode.

[0062] Referring now to the Fig. 6E and Fig. Figure 6F shows a perspective view 600E of an upper part of the VCSEL device after an etching process, or a perspective view 600F of a lower part of the VCSEL device after the etching process. The etching process can etch through the epistructure of the VCSEL substrate 640 and create a surface of the in Fig. Expose the metal layer of pad 605 shown in Figure 6A. The metal layer of pad 605 and the metal layer 625 can form the electrodes of the VCSEL diode formed in the remaining VCSEL substrate. The metal layer of pad 605 and the metal layer 625 can be positioned to minimize the overlap of the two electrodes, thereby reducing the overall capacitance of the device.

[0063] Referring now to the Fig. Figure 6G shows a perspective view of the last part of the process for manufacturing the non-hermetic VCSEL device, in which gold contact bumps are attached to the pads or electrodes connected to the metal layer 625 and the pad 605, similar to the one shown here in conjunction with Fig. The process described in Figure 5D involves fusing or bonding the gold contact bumps to the metal layer associated with pad 605 and metal layer 625, which can be electrically coupled to the VCSEL diode. Following the bonding process, the gold contact bumps can then be electrically coupled (or bonded) to other electronic components, allowing these components to supply current to the VCSEL diode formed within the VCSEL substrate. The metal layer associated with pad 605 and metal layer 625 can form electrodes which, when supplied with an appropriate electrical current, cause the VCSEL diode to emit light at a predetermined wavelength. The light emitted by the VCSEL diode is then collimated by lens 450 through the lens substrate 650, which is now integrated into the VCSEL device.

[0064] Referring now to the Fig. 7A, Fig. 7B and Fig. Figure 7C presents exemplary comparisons of the VCSEL temperature for various microlens materials according to one or more embodiments. Specifically, with reference to the Fig. Figure 7A shows the thermal properties of a VCSEL device in a P-Up configuration and fabricated using a gallium arsenic (GaAs) process. As shown, the maximum temperature rise of the VCSEL diode is approximately 43.5 degrees Celsius. The thermal conductivity of GaAs can be approximately 46 watts per meter-kelvin. Specifically, with regard to the Fig. Figure 7B shows a representation of the thermal properties of a VCSEL device integrated with a GaP lens using the techniques described here. The maximum temperature rise of the VCSEL diode in this configuration can be approximately 36.75 degrees Celsius. The thermal conductivity of the GaP can be approximately 110 watts per meter-kelvin. Specifically with regard to the Fig. Figure 7C shows a representation of the thermal properties of a VCSEL device integrated with a glass lens using the techniques described here. The maximum temperature rise of the VCSEL diode in this configuration can be approximately 44.61 degrees Celsius. The thermal conductivity of the glass can be approximately 1,114 watts per meter-kelvin.

[0065] Referring now to the Fig. 8A and Fig. Figure 8B shows perspective views 800A and 800B of an exemplary placement tool and pick-and-place tool 805, respectively, for the devices described herein according to one or more embodiments. The pick-and-place tool 805 can be configured to couple with one or more of the components described herein, such as a photodetector or a VCSEL that is not integrated with a lens. For example, the pick-and-place tool 805 can be temporarily coupled to a photodetector, such as the photodetector 115 ( Fig. 1A-B). The pick-and-place tool 805 can be used to precisely position the photodetector 115 (or a VCSEL device, etc., described herein) at a desired location, e.g., on a printed circuit board or other type of support (e.g., the support 105, etc.).

[0066] Referring specifically to the Fig. Figure 8A shows the main body of the pick-and-place tool 805. The pick-and-place tool 805 can be connected to one or more ports of a pick-and-place robot assembly. A pick-and-place robot can be used to precisely position devices picked up by the pick-and-place tool 805 to a desired target, which can be programmed or specified using computer-readable instructions. The pick-and-place tool 805 can be made of a material that does not react with or alter the materials of the devices it positions (e.g., the photodetectors described herein, the VCSEL devices described herein, etc.).

[0067] Referring specifically to the Fig. Figure 8B shows an enlarged perspective view 800B of the end 810 of the pick-and-place tool 805, which is responsible for transporting one or more of the optical devices described herein (e.g., the photodetectors, the VCSEL devices, etc.). The surfaces 811 and 812 of the pick-and-place tool 805 may have a precision step at the end 810, which can be polished to be offset from the base of the pick-and-place tool 805 by a predetermined step height with a tolerance of less than about 1 micron. When the pick-and-place tool 805 is used to place photodetectors or VCSEL devices on a carrier (e.g., the carrier 105, etc.), the step height can define the distance between the aperture of the optical device and the bottom of the lens. This height can be chosen to optimize the spot size, e.g., to achieve a higher focal length. For example, in the creation of detector devices.In some embodiments, the surface 812 of the pick-and-place tool 805 can be coupled to the upper part (e.g., the surface with the aperture, etc.) of the optical devices described here during the performance of placement operations.

[0068] Referring specifically to the Fig. 9A, Fig. 9B, Fig. 9C, Fig. 9D, Fig. 9E and Fig. Figure 9F are perspective views of an exemplary die-application process for the production of the components shown in the Fig. 1A and Fig. The device shown in Figure 1B is shown according to one or more embodiments. While the process flow is shown here for a device with a photodetector, it is understood that similar techniques can be used to manufacture devices with one or more VCSEL emitter devices or other types of optical devices.

[0069] Referring specifically to the Fig. Figure 9A shows a perspective view 900A of a support 905, which is shown here in conjunction with Fig. 1A and Fig. The support 905 can be similar to the support 105 described in Figure 1B. The support 905 can be any type of support capable of coupling to an optical device, such as a photodetector or a VCSEL emitter. As shown, the support 905 includes guide posts that can be used to attach a lens in further processing steps and can have a conductive gold surface (e.g., to serve as a ground plane for an amplifier and other components mounted on the support 905, etc.). Gold bumps 901 can be applied to the surface of the support according to the procedure described above. A layer of epoxy 902 or other types of adhesives or glues can be used to attach an optical device to the body of the support 905.The support 905 can be formed from a metal, an epoxy substrate, a silicon substrate, a plastic substrate, or another type of substrate that can be coupled with electronic components. In some embodiments, the support 905 can be manufactured by machining, injection molding, photolithography, additive manufacturing (e.g., 3D printing, etc.), and other methods.

[0070] Referring specifically to the Fig. Figure 9B shows a perspective view 900B of the next stage of the manufacturing process, in which the pick-and-place tool 805 can be used to position a photodetector 920 on the epoxy or adhesive area defined on the carrier 905. The photodetector 920 can be similar to the photodetectors described herein. When the photodetector 920 is placed, the end face 811 of the pick-and-place tool 805 can be flush with the surface 903 of the guide posts for the lens defined on the carrier 905. The step height of the end 810 of the pick-and-place tool 805 can therefore define the distance between the surface (e.g., the aperture, etc.) of the photodetector 920 and the underside of the lens, which will be mounted on the guide posts of the carrier 905 in subsequent machining steps. The surface of the photodetector can be referenced from the surface of the spacer 810 of the pick-and-place tool 805.The gold bolt bumps 901 are compressed. The gold bolt bumps 901 support the photodetector while the epoxy 902 cures.

[0071] Referring specifically to the Fig. Figure 9C shows a perspective view of the next stage of the manufacturing process, in which the photodetector 920 is attached to the epoxy layer arranged on the surface of the support 905 and the pick-and-place tool 805 has been removed. In some embodiments, the pick-and-place tool 805 can hold the photodetector 920 in place for a predetermined curing time to attach the detector 920 to the support 905. In some embodiments, the pick-and-place tool 805 can hold the detector 920 until a light-based curing process causes the epoxy layer to cure, thereby attaching the detector 920 to the surface of the support 905.

[0072] Referring specifically to the Fig. 9D is a perspective view of the in Fig. The device shown in Figure 9C features an attached TIA 910 module. The TIA 910 may be similar to the TIA 110, which is shown above in conjunction with the Fig. 1A and Fig. The TIA 910 can be used to capture and amplify the signals from the photodetectors 920, so that the signals can be detected by other, less sensitive communication components. In some embodiments, the TIA 910 can be a current-to-voltage converter and include one or more operational amplifiers. The TIA 910 can be fabricated, for example, using one or more photolithographic processes. In some embodiments, the TIA 910 can be a separate module that is coupled to the carrier 905 using a pick-and-place process. The TIA 910 can have one or more conductive pads that are electrically coupled to the electronic components of the TIA 910. In some embodiments, the number of conductive pads can correspond to the number of photodetectors positioned on the carrier 905.After positioning, the TIA can be bonded to the substrate using one or more bonding techniques, such as thermal bonding, soldering, thermosonic bonding or epoxy-based bonding.

[0073] Referring specifically to the Fig. 9E is a perspective view 900E of the in Fig. The device shown in 9A-9D is depicted after the next stage of the manufacturing process. As shown, the conductive pads of the TIA 910 can be electrically coupled to the detector 920 using bond wires 915, which are shown here in conjunction with the Fig. 1A and Fig. The bond wires 120 described in 1B may be similar. The bond wires 915 can be attached such that the wedges are positioned on the side of the photodetector, thereby minimizing the height of the wire loop and improving overall performance. Also at this stage of the manufacturing process, an epoxy layer 906 was applied to the surface 904 in the guide posts of the carrier, which will be used in the next manufacturing step to attach the lens substrate. The surface 904 is recessed relative to the surface 903. However, the surface of the epoxy layer 906 is above the surface 903.

[0074] Referring specifically to the Fig. 9F is a perspective view of the [image / structure] in the Fig. The apparatus shown in Figures 9A-9E is depicted after the next stage of the manufacturing process. As shown, the lens substrate 925 was attached to the guide pins on the carrier 905. As the epoxy layer 906 cures, it pulls the underside of the lens against the guide pins. Since the photodetector was positioned relative to the top of the guide pins using the pick-and-place tool 805, the end 810 of which has a predetermined step height, the aperture face of the photodetector 920 can be positioned at a desired distance from the underside of the lens substrate 925, thereby improving focus and performance. This allows for tight z-tolerance between the lens and each aperture of the photodetector 920.The lens substrate 925 can be similar to the lens substrates described herein and can be cut, split, etched, or otherwise manufactured to fit the guide posts and be aligned with each of the photodetectors 920 positioned on the carrier 905. The lens substrate 925 can contain one lens for each aperture of the photodetector 920 positioned on the substrate. The lens substrate 925 can be positioned on the carrier using, for example, one or more pick-and-place techniques.

[0075] Referring to the Fig.In Figure 10, an optical device 1004 (e.g., a photodetector and lens assembly or a light emitter and lens assembly) is arranged directly on an integrated circuit 1002, and an optical device 1008 (e.g., a photodetector and lens assembly) is provided on an integrated TIA circuit 1006. In some embodiments, the optical device 1004 is directly connected to the integrated circuit 1002 by a thermosonic connection. In some embodiments, the optical device 1008 is directly connected to the integrated circuit 1006 by a thermosonic connection. The contacts on the underside of the optical devices 1008 and 1004 serve for the electrical coupling of the devices 1008 and 1004 to the integrated circuits 1006 and 1002, respectively. Flip-chip techniques can be used to create the connections. In some embodiments, the optical devices can be connected to a printed circuit board (e.g.,(a package substrate printed circuit board). Wafer-to-wafer bonding can be achieved in some embodiments through thermal compression. Chip-to-chip connections with bumps are made in some embodiments through thermosonic bonding. Thermosonic bonding uses pressure, temperature, and ultrasonic energy to provide a strong bond in a short time in some embodiments.

[0076] It should be noted that at certain points in this disclosure, terms such as "first" and "second" are used in connection with devices, modes of operation, transmission chains, antennas, etc., to identify or distinguish one from another or from others. These terms are not intended to relate units (e.g., a first device and a second device) merely in terms of time or sequence, although in some cases these units may have such a relationship. Nor do these terms limit the number of possible units (e.g., devices) that may operate in a system or environment.

[0077] While the foregoing written description of the methods and systems enables a person skilled in the art to manufacture and use what is currently regarded as the best kind thereof, the person skilled in the art will understand and appreciate the existence of variations, combinations, and equivalents of the specific embodiment, method, and examples contained herein. The methods and systems presented here should therefore not be limited by the embodiments, methods, and examples described above, but by all embodiments and methods within the scope and spirit of the disclosure.

[0078] After describing some illustrative embodiments, it is evident that the foregoing is illustrative and not limiting, as it has only been presented by way of example. In particular, although many of the examples presented here involve specific combinations of procedural actions or system elements, these actions and elements can be combined in other ways to achieve the same objectives. Actions, elements, and features discussed only in the context of one implementation are not intended to preclude a similar role in other embodiments or types of implementation.

[0079] The phraseology and terminology used herein are descriptive and should not be considered restrictive. The use of "including," "having," "with," "containing," "comprising," "characterized by," "characterized by," and variations thereof is intended to encompass the elements listed below, their equivalents and additional elements, as well as alternative embodiments consisting exclusively of the elements listed below. In any embodiment, the systems and methods described herein consist of one, any combination of more than one, or all of the described elements, actions, or components.

[0080] All singular references to embodiments, elements, or actions of the systems and methods described herein may also include embodiments comprising multiple elements, and all plural references to an implementation, element, or action herein may also include embodiments comprising only a single element. Singular or plural references are not intended to limit the systems or methods, their components, actions, or elements disclosed herein to single or multiple configurations. References to an action or element being based on any information, action, or element may include embodiments in which the action or element is based, at least in part, on any information, action, or element.

[0081] Each implementation disclosed herein may be combined with any other implementation, and references to “an implementation,” “some embodiments,” “an alternative implementation,” “various implementations,” “an implementation,” or the like are not necessarily mutually exclusive and are intended to indicate that a particular feature, structure, or property described in connection with the implementation may be present in at least one implementation. The terms used herein do not necessarily all refer to the same implementation. Each implementation may be combined with any other implementation, including or exclusively, in any manner consistent with the aspects and embodiments disclosed herein.

[0082] References to "or" can be interpreted to mean that all terms described by "or" can refer to a single term, more than one term, or all of the terms described.

[0083] If technical features in the drawings, the detailed description, or a claim are provided with reference numerals, these serve solely to enhance the clarity of the drawings, the detailed description, and the claims. Accordingly, neither the reference numerals nor their absence have a limiting effect on the scope of the claim elements.

[0084] The systems and methods described herein can be implemented in other specific forms without altering their properties. Although the examples provided for mounting a microlens on a small-aperture photodetector device or on a VCSEL device for high-data-rate applications may be useful, the systems and methods described herein can also be applied to other environments and applications. The foregoing serves for illustration and not to limit the described systems and methods. The scope of the systems and methods described herein may therefore be more accurately defined by the appended claims than by the foregoing description, and modifications that fall within the scope and equivalence of the claims are included therein.

Claims

[1] Method for attaching a lens (125, 205, 305, 450) to an optical device (115, 210, 315), the method comprising: Aligning first metal pads (321) of a lens substrate (305, 450, 650) with second metal pads (310, 425) of a substrate (105, 205, 314, 440, 640) having a first surface of the optical device (115, 210, 315), wherein the first surface has at least a part of one or more optical devices; Coupling the first metal pads (321) of the lens substrate with the second metal pads (310, 425) on the first surface of the substrate (105, 205, 314, 440, 640) of the optical device (115, 210, 315); and Removing part of the substrate (105, 205, 314, 440, 640) of the optical device (115, 210, 315) to expose a conductive layer (510), wherein after removal of the part the conductive layer (510) is located on a second surface opposite the first surface, wherein metal pads (310, 425, 321) are arranged on the conductive layer (510). [2] The method according to claim 1, wherein the optical device is a surface-emitting laser (210) with a vertical resonator or a photodetector (315). [3] The procedure according to one of claims 1 or 2, further comprising: Providing contact material to the metal pads (310, 425, 321). [4] The method according to claim 3, wherein the contact material comprises gold bumps (520). [5] The method according to claim 4, further comprising: Attaching the gold bumps (520) to a printed circuit board or an integrated circuit die (1002) using a flip-chip technique. [6] The method according to any one of claims 1 to 5, wherein the removal of the part comprises etching to an etch stop layer adjacent to an epitaxial layer (317) linked to the substrate (105, 205, 314, 440, 640) of the optical device. [7] The method according to claim 6, wherein the epitaxial layer (317) comprises the optical device. [8] Method for manufacturing an optical device (115, 210, 315) comprising the method: Attaching a lens substrate (305, 450, 650) to a substrate (105, 205, 314, 440, 640) of the optical device (115, 210, 315) having a first surface, wherein the first surface has at least a part of one or more optical devices, and wherein the first surface is in contact with a second surface of the lens substrate (305, 450, 650); and Removing a portion of the substrate (105, 205, 314, 440, 640) of the optical device (115, 210, 315) to expose a conductive layer (510), wherein after removal of the portion the conductive layer (510) is located on a third surface of the substrate (105, 205, 314, 440, 640) of the optical device (115, 210, 315), wherein the third surface of the substrate (105, 205, 314, 440, 640) of the optical device (115, 210, 315) is opposite the first surface of the substrate (105, 205, 314, 440, 640) of the optical device (115, 210, 315), wherein metal pads (310, 425, 321) are arranged on the conductive layer (510). [9] The method according to claim 8, wherein the optical device (115, 210, 315) is a surface-emitting laser (210) with a vertical resonator or a photodetector (315). [10] The method according to claim 8 or 9, wherein exposed metal pads (310, 425, 321) are arranged on the conductive layer (510). [11] The method according to any one of claims 8 to 10, wherein the substrate (105, 205, 314, 440, 640) of the optical device (115, 210, 315) has an epitaxial layer (317) over a bulk substrate. [12] The method according to claim 11, wherein the bulk substrate is completely removed. [13] The method according to any one of claims 8 to 12, wherein the substrate (105, 205, 314, 440, 640) of the optical device (115, 210, 315) has an epitaxial layer (317) over an etch stop layer over a bulk substrate, and wherein the removal of the part comprises etching to the etch stop layer, wherein the etch stop layer is adjacent to the conductive layer (510).