SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME

Abstract

Semiconductor device comprising: a substrate (20); a semiconductor element (10) configured to face the substrate in a direction normal to the substrate, the direction being a normal direction of the substrate and corresponding to a normal line of the substrate; and a tin-based solder layer (30) designed to connect the semiconductor element to the substrate, wherein the tin-based solder layer includes a central portion (32) and a peripheral portion (33) surrounding the central portion as viewed in the normal direction, wherein the tin-based solder layer comprises a tin crystal having a C-axis (31), and the C-axis is present at each of the central portion and the peripheral portion, wherein the C-axis (31) at the central portion crosses the normal line at an angle with respect to the normal line that is greater than 45 degrees, and wherein the C-axis at the peripheral portion either crosses the normal line at an angle with respect to the normal line that is equal to or less than 45 degrees, or is parallel to the normal line.

Description

[0001] The present invention relates to a semiconductor device and a method for manufacturing the semiconductor device.

[0002] JP 2015-65301 A discloses a semiconductor device including a semiconductor element bonded to a substrate via a tin (Sn)-based solder layer. Tin crystals exhibit anisotropy. The tin-based solder layer induces inelastic strain due to temperature change, and this inelastic strain exhibits anisotropy. This inelastic strain is greatest in a c-axis direction of a tin crystal structure. If a repeated force is applied in the direction of a large inelastic strain, deterioration of the tin-based solder layer may increase. Therefore, in the technique described in JP 2015-65301 A, the tin-based solder layer is formed such that the c-axis of the tin crystal in the tin-based solder layer is orthogonal to the direction of maximum strain of the tin-based solder layer.The maximum stress acting on the solder layer between the substrate and the semiconductor element points in a direction parallel to the substrate. In other words, in the technique described in JP 2015-65301 A, the tin-based solder layer is formed such that the C-axis of the tin crystal contained in the tin-based solder layer points in a normal direction of the substrate.

[0003] On the other hand, when a current flows through the solder layer, a so-called electromigration phenomenon occurs, as described in JP 2016-51844 A. Electromigration is a phenomenon in which metal is deformed due to the flow of electrons. In tin (Sn), atomic transition tends to occur due to the flow of electrons compared to other metals such as copper (Cu). This means that electromigration is likely to progress in the tin-based solder layer. As electromigration progresses in the tin-based solder layer, the metal distribution in the tin-based solder layer becomes non-uniform. This means that the tin-based solder layer may deteriorate. If the orientation of the C-axis in the tin crystal coincides with the direction of electron flow, electromigration is likely to progress.In a case where the substrate and the semiconductor element are connected by the solder layer in the semiconductor device, electrons, in other words, current, flow mainly in a direction normal to the substrate. In other words, if the tin-based solder layer is formed such that the C-axis of the tin crystal contained in the tin-based solder layer points in a direction normal to the substrate, electromigration is likely to progress. JP 2016-51844 A describes that a tin-based solder layer is formed such that the C-axis of a tin crystal is parallel to a substrate.

[0004] To reduce the inelastic stress on the tin-based solder layer, the C-axis of the tin crystal can be oriented perpendicular to the substrate, but in this case, the influence of electromigration becomes greater. To reduce the influence of electromigration on the tin-based solder layer, the C-axis of the tin crystal can be orthogonal to the normal line of the substrate, but in this case, the inelastic stress may increase.

[0005] US 2013 / 0 221 521 A1 discloses a semiconductor device in which a semiconductor element is connected to a substrate via a tin-based solder layer, wherein the solder layer has crystals with an orientation.

[0006] It is an object of the present invention to provide a semiconductor device with increased resistance to inelastic stress and electromigration, and a method for manufacturing the semiconductor device. This object is achieved by a semiconductor device having the features of claim 1 and a method having the features of claim 3. The dependent claim is directed to an advantageous development of the invention.

[0007] According to a first aspect of the present invention, a semiconductor device includes a substrate, a semiconductor element, and a tin-based solder layer. The semiconductor element faces the substrate in a direction normal to the substrate. The direction normal to the substrate is a normal direction of the substrate. The normal direction of the substrate corresponds to a normal line of the substrate. The tin-based solder layer connects the semiconductor element to the substrate. The tin-based solder layer includes a central portion and a peripheral portion. The peripheral portion surrounds the central portion from the normal direction. The tin-based solder layer has a tin crystal having a C-axis, and the C-axis is at each of the central portion and the peripheral portion.The C-axis at the central portion crosses the normal line at an angle greater than 45 degrees relative to the normal line. The C-axis at the peripheral portion either crosses the normal line at an angle equal to or less than 45 degrees relative to the normal line, or is parallel to the normal line.

[0008] In the semiconductor device described above, the C-axis at the central portion of the tin-based solder layer intersects the normal line of the substrate at an angle greater than 45 degrees with respect to the normal line of the substrate. When the C-axis intersects the normal line of the substrate at an angle greater than 45 degrees with respect to the normal line of the substrate, the tin-based solder layer can suppress the influence of electromigration even if the inelastic stress strain is not reduced. Since the C-axis at the peripheral portion intersects the normal line of the substrate at an angle equal to or less than 45 degrees with respect to the normal line, or the C-axis is parallel to the normal line, the inelastic stress strain of the tin-based solder layer becomes smaller, even if the effect of suppressing the influence of electromigration is relatively small.However, the peripheral portion has a smaller current than the central portion. Due to the smaller current, the influence of electromigration at the peripheral portion is relatively small considering the entire semiconductor device. On the other hand, by suppressing or reducing the inelastic stress at the peripheral portion, the stress at the central portion surrounded by the peripheral portion is also suppressed or reduced. The semiconductor device described here has higher resistance to both inelastic stress and electromigration.

[0009] At the central portion, the C-axis is orthogonal to the substrate's normal line. In the tin-based layer, the central portion exhibits a larger current than the peripheral portion. Therefore, when the C-axis at the central portion is orthogonal to the substrate's normal line, it is possible to achieve higher electromigration resistance. In contrast, since a large amount of current does not flow in the peripheral portion, the influence of electromigration is relatively small.

[0010] According to a second aspect of the present invention, a method manufactures a semiconductor device including a substrate, a semiconductor element, and a tin-based solder layer. The semiconductor element faces the substrate in a direction normal to the substrate. The direction normal to the substrate is a normal direction of the substrate. The tin-based solder layer bonds the semiconductor element to the substrate. The method includes: a first process that heats and melts a tin-based solder material disposed between the semiconductor element and the substrate; a second process that cools the molten tin-based solder material and solidifies the tin-based solder material. In the second process, a heat transfer plate is disposed between the substrate and a cooling device.The heat transfer plate includes: a first region facing a central portion of the tin-based solder layer from the normal direction; and a second region facing a peripheral portion of the tin-based solder layer from the normal direction. The peripheral portion surrounds the central portion from the normal direction. The first region has a higher heat flow rate than the second region.

[0011] When the heat transfer plate is used, heat flows at the central portion in the normal direction of the substrate of the tin-based solder layer. At the peripheral portion, heat flows in a direction inclined with respect to the normal direction. The molten tin-based solder layer is crystallized such that the C-axis is perpendicular to the direction of heat flow. Therefore, by using the heat transfer plate as described above, it is possible to form the tin-based solder layer such that the C-axis at the central portion is orthogonal to the normal line of the substrate, and such that the C-axis at the peripheral portion is inclined with respect to the normal line of the substrate.

[0012] Further objects, features, and advantages of the present invention will become apparent from the following detailed description with reference to the accompanying drawings. Fig. 1 is a plan view of a semiconductor device according to a first embodiment; Fig. 2 is a cross-sectional view of the semiconductor device along the line II-II of Fig. 1; Fig. 3 is a cross-sectional view of a semiconductor device according to a second embodiment; Fig. 4 is a cross-sectional view of a semiconductor device according to a third embodiment; Fig. 5 is a diagram showing a manufacturing process of a semiconductor device according to a fourth embodiment; and Fig. 6 is a diagram showing another manufacturing process of a semiconductor device according to the fourth embodiment. First embodiment

[0013] In the following, a semiconductor device 2 according to a first embodiment will be described with reference to the Fig. 1 and Fig. 2 described. Fig. 1 shows a plan view of the semiconductor device 2. Fig. 2 shows a plan view of the semiconductor device 2. Fig. Figure 2 shows a cross section of the semiconductor device 2 along the line II-II of Fig. 1. The semiconductor device 2 is a device in which a semiconductor element 10 is connected to a substrate 20 above the substrate.

[0014] In a coordinate system in the respective Fig. 1 and Fig. 2, a Z-axis corresponds to a direction normal to the substrate 20. The direction normal to the substrate 20 can also be referred to as the normal direction of the substrate 20. The normal direction of the substrate 20 corresponds to a normal line or normal 22 of the substrate 20, as described below. The semiconductor element 10 faces or points toward the substrate 20 in the normal direction of the substrate 20.

[0015] The solder layer 30 connects the semiconductor element 10 to the substrate 20. Hereinafter, a central portion of the solder layer 30 as viewed in the normal direction, in other words a Z-direction of the substrate 20, may also be referred to as a central portion 32, and a region surrounding the central portion 32 as viewed in the normal direction may also be referred to as a peripheral portion 33.

[0016] The semiconductor element 10 is a power transistor and has one surface where a collector electrode 11 is arranged and another surface where an emitter electrode 12 is arranged. Fig. In FIG. 2, the illustration of the structure of the remaining parts of the semiconductor element, apart from the collector electrode 11 and the emitter electrode 12, is omitted. A wiring pattern 21 is formed on the substrate 20. The wiring pattern 21 refers to a conductive path formed on a surface of the substrate 20.

[0017] The wiring pattern 21 of the substrate 20 and the collector electrode 11, one of the electrodes of the semiconductor element 10, face each other. The solder layer 30 contacts the wiring pattern 21 and the collector electrode 11. A circuit (not shown) is mounted on the substrate 20, and the solder layer 30 and the wiring pattern 21 electrically connect the collector electrode 11 of the semiconductor element 10 to the circuit. The element that connects the emitter electrode 12 to the circuit is not shown.

[0018] Solder layer 30 contains tin (Sn). The solder layer containing tin can also be referred to as a tin-based solder layer. The solder layer 30 is the tin-based solder layer. As an example of the tin-based solder material, an Sn-3Ag-0.5Cu alloy can be used. Tin is crystallized in the solder layer 30. The orientation of the C-axis 31 of the tin crystal differs between the central portion 32 of the solder layer 30 and the peripheral portion 33 of the solder layer 30. The C-axis 31a at the central portion 32 and the C-axis 31b at the peripheral portion 33 can also be described or specified as C-axis 31 if no distinction needs to be made between the C-axis 31a and the C-axis 31b.

[0019] The C-axis 31a intersects the normal line 22 of the substrate 20 at the central portion 32 at an angle relative to the normal line 22 that is greater than 45 degrees. The C-axis 31b intersects the normal line 22 at the peripheral portion 33 at an angle relative to the normal line 22 that is equal to or less than 45 degrees. Alternatively, the C-axis 31b is parallel to the normal line 22 at the peripheral portion 33.

[0020] In Figures 2, 3, and 4, the angle Ang-a represents an angle formed at the central portion 32 by the C-axis 31a and the normal line 22, and the angle Ang-b represents an angle formed at the peripheral portion 33 by the C-axis 31b and the normal line 22. The angle formed by the C-axis 31 and the normal line 22 refers to an acute angle formed by two lines. Hereinafter, the angle can also be expressed on the side of an obtuse angle. The angle Ang-a formed at the central portion 32 by the C-axis 31a and the normal line 22 may be, for example, greater than 45 degrees and less than 135 degrees, and the angle Ang-b formed at the peripheral portion 33 by the C-axis 31b and the normal line 22 may be, for example, equal to or less than 45 degrees or equal to or greater than 135 degrees.

[0021] The following describes the advantages of different orientations of the C-axis 31 at the central portion 32 and the peripheral portion 33. In the tin-based solder layer, electromigration progresses, in other words, the solder deteriorates, when the orientation of the C-axis of the tin crystal within the solder coincides with the direction of current flow. When the orientation of the C-axis is orthogonal to the direction of current flow, the progression of electromigration is slowest. In the tin-based solder, an inelastic stress in the C-axis direction is larger than in the other directions. Therefore, when the orientation of the C-axis coincides with the orientation of the maximum stress acting on the solder, the inelastic stress generated in the solder becomes larger.In other words, the deterioration caused by the stress load progresses. In contrast, when the C-axis orientation is orthogonal to the orientation of the maximum stress load, the inelastic stress strain becomes the smallest. In other words, the progression of deterioration caused by the stress load becomes the slowest.

[0022] In the solder layer 30 disposed between the substrate 20 and the semiconductor element 10, the current flow is oriented in the direction of the normal line 22 of the substrate 20, and the direction of the maximum stress is orthogonal to the normal line 22. When the C-axis 31 crosses the normal line 22 at an angle greater than 45 degrees with respect to the normal line 22, the effect of suppressing electromigration is greater than the effect of suppressing inelastic stress. When the C-axis crosses the normal line 22 at an angle equal to or less than 45 degrees with respect to the normal line 22, the effect of suppressing inelastic stress is greater than the effect of suppressing electromigration.

[0023] Therefore, the solder layer 30 is arranged in the central portion 32, where a larger current flows than in the peripheral portion 33, such that the C-axis 31a crosses the normal line 22 at an angle greater than 45 degrees with respect to the normal line 22. The remarkable effect of suppressing or reducing electromigration is achieved in the central portion 32, where a large current flows. In the peripheral portion 33 surrounding the central portion 32, the solder layer 30 is arranged such that the C-axis 31b crosses the normal line 22 at an angle equal to or less than 45 degrees with respect to the normal line 22. In the peripheral portion 33, a remarkable effect of suppressing or reducing the inelastic stress is achieved.If the inelastic stress can be suppressed in the peripheral portion 33, it is also possible to suppress the inelastic stress in the central portion 32 surrounded by the peripheral portion 33. In the central portion 32, the effect of suppressing the inelastic stress exerted by the peripheral portion 33 can be achieved, even if the effect of suppressing the inelastic stress caused by the C-axis orientation is smaller. The solder layer 30 of the semiconductor device 2 has higher resistance to both the inelastic stress and electromigration. Second embodiment

[0024] Fig. 3 illustrates a cross-sectional view of a semiconductor device 2a according to a second embodiment. In the semiconductor device 2a, the C-axis 31a at the central portion 32 of the solder layer 30 is orthogonal to the normal line 22 (Ang-a = 90 degrees). The C-axis 31b at the peripheral portion 33 surrounding the central portion 32 is parallel to the normal line 22 (Ang-b = 0 degrees). When the orientation of the C-axis 31 is set as described above, a maximum effect of suppressing electromigration is achieved in the central portion 32, and a maximum effect of suppressing deterioration caused by inelastic stress is achieved in the peripheral portion 33. Third embodiment

[0025] Fig. 4 illustrates a cross-sectional view of a semiconductor device 2b according to a third embodiment. In the semiconductor device 2b, the C-axis 31a at the central portion 32 of the solder layer 30 is orthogonal to the normal line 22 (Ang-a = 90 degrees). The C-axis 31b at the peripheral portion 33 surrounding the central portion 32 is inclined at an angle of 45 degrees (Ang-b = 45 degrees) with respect to the normal line 22. When the orientation of the C-axis 31 is set as described above, a maximum effect of suppressing electromigration in the central portion 32 can be achieved, and both a maximum effect of suppressing deterioration caused by inelastic stress and a maximum effect of suppressing electromigration in the peripheral portion 33 are achieved. Fourth embodiment

[0026] A method for manufacturing the semiconductor device 2 of the first embodiment will be described below. The manufacturing method includes a first process and a second process. In the first process, the tin-based solder material disposed between the substrate and the semiconductor element is heated and melted. As shown in Fig. For example, as shown in Figure 5, the substrate 20, the semiconductor element 10, and the tin-based material 35 are placed in a high-temperature furnace 60 and heated. The tin-based material 35 is disposed between the substrate 20 and the semiconductor element 10. In the second process, the molten solder material is cooled and solidified. A joining method in which a solid or paste-like solder material is placed at a desired location and then the solder material is melted is also referred to as a reflow soldering process.

[0027] Fig. 6 represents the second process. In Fig. 6, the illustration of the wiring pattern 21 and the electrodes 11, 12 is omitted. A cooler 40 is attached to the substrate 20 to solidify the molten tin-based solder material 35. A heat transfer plate 50 is arranged between the substrate 20 and the cooler 40. The heat transfer plate 50 has a first region 51 and a second region 52. The first region 51 faces the central portion 32 of the semiconductor element 10 as viewed in the normal direction, in other words, the Z direction of the substrate 20. The second region 52 faces the peripheral region 33 surrounding the central portion 32. The thermal conductivity in the first region 51 is higher than the thermal conductivity in the second region 52. The thermal conductivity may also be referred to as heat flow rate.

[0028] The heat of the molten tin-based material 35 is transferred to the cooling device 40 via the heat transfer plate 50. Since the central portion 32 faces the first region 51, which has a higher thermal conductivity, the heat of the central portion 32 is transferred in a direction parallel to the normal line 22 of the substrate 20, in other words, in the Z-axis direction in the coordinate system in the drawing. A dashed arrow 53 represents a direction of heat transfer at the central portion 32 of the solder layer 30.

[0029] The peripheral portion 33 faces the second region 52, which has a lower thermal conductivity. The heat of the peripheral portion 33 does not flow in a direction parallel to the normal line, but flows in an inclined direction, so that it approaches the first region 51, which has a higher thermal conductivity. A dashed arrow 54 represents a direction of heat transfer from the peripheral portion 33. In a case where tin is solidified, the tin crystallizes such that the C-axis is orthogonal to the heat flow. Therefore, the C-axis 31a at the central portion 32 is perpendicular to the normal line 22, in other words, the Z-axis, and the C-axis 31b at the peripheral portion 33 is inclined with respect to the normal line 22, in other words, the Z-axis.By appropriately determining the position of a boundary between the first region 51 and the second region 52 of the heat transfer plate 50, it is possible to set an angle equal to or less than 45 degrees between the C-axis 31b at the peripheral portion 33 and the normal line 22, in other words, the Z-axis. Thus, the semiconductor device 2 described in the first embodiment is obtained.

[0030] Since the thermal conductivity of the second region 52 is lower than the thermal conductivity of the first region 51, the second region 52 may be a gap or void.

[0031] The technical points to be noted in the above embodiments are described below. The semiconductor element 10 is not limited to a transistor.

[0032] The boundary between the central portion 32 and the peripheral portion 33 of the solder layer 30 does not need to be clearly defined. In other words, in a boundary region between the central portion 32 and the peripheral portion 33, the orientation of the C-axis 31 may change gradually. The C-axis 31a may cross the normal line 22 at an angle greater than 45 degrees in most of the region of the central portion 32, and the C-axis 31b may cross the normal line 22 at an angle equal to or less than 45 degrees. Alternatively, the C-axis 31b may be parallel to the normal line in most of the region of the peripheral portion 33.

Claims

[1] Semiconductor device comprising: a substrate (20); a semiconductor element (10) configured to face the substrate in a direction normal to the substrate, the direction being a normal direction of the substrate and corresponding to a normal line of the substrate; and a tin-based solder layer (30) designed to connect the semiconductor element to the substrate, wherein the tin-based solder layer includes a central portion (32) and a peripheral portion (33) surrounding the central portion as viewed in the normal direction, wherein the tin-based solder layer comprises a tin crystal having a C-axis (31), and the C-axis is present at each of the central portion and the peripheral portion, wherein the C-axis (31) at the central portion crosses the normal line at an angle with respect to the normal line that is greater than 45 degrees, and wherein the C-axis at the peripheral portion either crosses the normal line at an angle with respect to the normal line that is equal to or less than 45 degrees, or is parallel to the normal line. [2] The semiconductor device according to claim 1, wherein the C-axis at the central portion is orthogonal to the normal line. [3] A method of manufacturing a semiconductor device including a substrate (20), a semiconductor element (10) and a tin-based solder layer (30), wherein the semiconductor element faces the substrate in a direction normal to the substrate, the direction being a normal direction of the substrate, the tin-based solder layer connecting the semiconductor element to the substrate, the method comprising: a first process for heating and melting a tin-based solder material (35) disposed between the semiconductor element and the substrate; and a second process for cooling the tin-based solder material that has been melted and for solidifying the tin-based solder material, wherein in the second process a heat transfer plate (50) is arranged between the substrate and a cooling device, where the heat transfer plate contains: a first region (51) facing a central portion of the tin-based solder layer as viewed in the normal direction, and a second region (52) facing a peripheral portion of the tin-based solder layer as viewed in the normal direction, wherein the peripheral portion surrounds the central portion as viewed in the normal direction, and wherein the first region has a higher heat flow rate than the second region.

Images