Semiconductor device and method for manufacturing a semiconductor device

Abstract

Semiconductor device comprising: a semiconductor substrate (1) having a first principal surface and a second principal surface which is a surface opposite the first principal surface and wherein an effective region (2) through which a current flows and a termination region (7) which is configured to surround an outer peripheral side of the effective region (2) are defined; an oxide film (4) which is arranged in contact with the first main surface of the termination area (7) such that it covers the first main surface; a surface protective film (6) containing an insulating material and arranged to cover a portion of the oxide film (4) except for the peripheral portion; and at least one of a concave sub-area that is concave downwards and a convex sub-area that projects upwards in the sub-area of ​​the oxide film (4) that is covered with the surface protective film (6), wherein the concave section has a section in which its width decreases towards the top, and the convex sub-area has a sub-area in which its width increases towards the top.

Description

BACKGROUND OF THE INVENTION Area of ​​the invention

[0001] The present disclosure relates to a semiconductor device and a method for manufacturing the semiconductor device. Description of the background technology

[0002] In a semiconductor device, an oxide film is applied to the upper surface of a semiconductor substrate, and polyimide is applied to this. However, the adhesion between the oxide film and the polyimide film is weak; therefore, if the device is constantly exposed to high humidity, moisture spreads over time from the interface between the polyimide and the oxide film into the termination area. This caused a problem with the concentration of the electric field between the outermost guard ring and the channel stop device or channel stopper.

[0003] In response, a semiconductor device was proposed in which a depression is arranged on the upper surface of the semiconductor substrate in the termination region to improve moisture resistance without increasing the length of the termination region (see, for example, the international publication WO 2020 / 105097 A1).

[0004] However, the technique described in the international publication WO 2020 / 105 097 A1 had a problem in that the recess arranged in the termination area has a rectangular shape, which weakens the adhesion with respect to detachment in the vertical direction; therefore, when thermal stress is applied to the chip, such as during a power cycle, detachment occurs in the vertical direction.

[0005] DE 10 2018 208 486 A1 discloses a semiconductor device having a connector insert housing.

[0006] CN 1 13 130 413 A discloses a semiconductor element packaging structure and a manufacturing process for it. SUMMARY

[0007] One objective of the present disclosure is to provide a technique that improves power cycle tolerance while improving moisture resistance in a semiconductor device.

[0008] A semiconductor device according to the present disclosure comprises a semiconductor substrate, an oxide film, a surface protection film, and at least one concave sub-region and one convex sub-region. The semiconductor substrate has a first main surface and a second main surface, a surface opposite the first main surface, wherein an effective region through which a current flows and a termination region, configured to surround the outer peripheral side of the effective region, are defined. The oxide film is arranged in contact with the first main surface of the termination region, covering the first main surface. The surface protection film contains an insulating material and is arranged to cover a sub-region of the oxide film, excluding the peripheral sub-region. The concave sub-region is concave downwards at the sub-region covered by the surface protection film.The convex section protrudes upwards from a portion covered by the surface protective film. The concave section has a portion where its width decreases towards the top. The convex section has a portion where its width increases towards the top.

[0009] The adhesion between the surface protection film and the semiconductor substrate is improved, and the creepage distance from the outer peripheral end of the surface protection film to the inner peripheral side, for example a protective ring, is increased, thus improving the moisture resistance of the semiconductor device. Furthermore, the anchoring effect generated by the concave or convex portion improves adhesion in the vertical direction of the semiconductor device, which enhances the power cycle tolerance of the semiconductor device.

[0010] These and other objectives, features, aspects and advantages of the present disclosure will become more apparent from the following detailed description of the present disclosure when it is considered in conjunction with the accompanying drawings. BRIEF DESCRIPTION OF THE DRAWINGS Fig. 1 is a top view of a semiconductor device according to a first embodiment; Fig. 2 is one along line AA of Fig. 1. Cross-sectional view taken; Fig. 3 is a partial top view, which is an example of a Fig. 2 corresponding area illustrated; Fig. 4 is a partial top view, which is another example of a Fig. 2 corresponding area illustrated; Fig. 5 is a Fig. 2 corresponding cross-sectional view of the second embodiment; Fig. 6 is a Fig. 2 corresponding cross-sectional view of the third embodiment; Fig. Figures 7A to 7C are cross-sectional views illustrating a method for forming ridges or ribs in the third embodiment; and Fig. 8 is a Fig. 2. Corresponding cross-sectional view of a fourth embodiment. DESCRIPTION OF PREFERRED EXECUTION FORMS<Erste Ausführungsform><Konfiguration einer Halbleitervorrichtung>

[0011] With reference to the drawings, a first embodiment is described below. Fig. Figure 1 is a top view of a semiconductor device according to the first embodiment. Fig. 2 is one along line AA of Fig. 1. Cross-sectional view taken.

[0012] As in Fig. 1 and Fig. As illustrated in Figure 2, the semiconductor device has a semiconductor substrate 1 defining an effective area and a termination area 7, an oxide film 4, an insulating protective film 5, an organic insulating film 6 as a surface protective film and grooves or depressions 8 as a concave sub-area that is concave downwards.

[0013] As in Fig. As illustrated in Figure 1, the effective region 2, through which a current flows, is defined in the central subregion of the semiconductor substrate 1. The effective region 2 is equipped with a transistor or a diode (not illustrated). The semiconductor substrate 1 has an upper surface as the first main surface and a lower surface as the second main surface, opposite the first main surface. A plurality of (for example, three) guard rings 3 are arranged on the upper surface of the semiconductor substrate 1 such that they surround the effective region 2.

[0014] As in Fig. As illustrated in Figure 2, the oxide film 4 is arranged on the upper surface of the semiconductor substrate 1. Specifically, the oxide film 4 is arranged such that it contacts and covers the upper surface of the semiconductor substrate 1 in the termination region 7. The semiconductor substrate 1 is a silicon substrate, and the oxide film 4 is a silicon oxide film. The plurality of guarding rings 3 are selectively arranged on portions of the upper surface of the oxide film 4. The insulating protective film 5 is selectively arranged on a portion of the upper surface of the oxide film 4 such that it covers the guarding rings 3.

[0015] A semiconductor substrate 1 in a wafer state is cut into a chip, and the cut portion corresponds to the outer peripheral end of the semiconductor substrate 1, i.e., the termination end of the chip. The organic insulating film 6 is selectively arranged on a portion of the upper surface of the oxide film 4 such that it covers the insulating protective film 5. Specifically, the organic insulating film 6 contains an insulating material and is arranged such that it covers the portion of the oxide film 4 except for the peripheral portion. The organic insulating film 6 is, for example, polyimide. In the termination region 7, between the outermost protective ring and the outer peripheral edge of the semiconductor substrate 1, the organic insulating film 6 is in direct contact with the oxide film 4. The organic insulating film 6 does not extend to the peripheral portion of the semiconductor substrate 1.

[0016] In the present embodiment, at least one recess 8 is arranged on the upper surface of the semiconductor substrate 1 in the termination region 7. The present embodiment describes a case in which a plurality of recesses 8 are arranged. The organic insulating film 6 is embedded in the recess 8, and the recess 8 has a sub-region in which its width decreases towards the top. The width of the recess 8 indicates the width in the horizontal direction. Fig. 2. The depression 8 has a first concave sub-region 1a, which is located on the upper surface of the semiconductor substrate 1 and has an interior with a trapezoidal cross-sectional shape, and a second concave sub-region 4a, which is located on the front surface of the first concave sub-region 1a and has an interior formed by the oxide film 4 and having a trapezoidal cross-sectional shape.

[0017] Next, the shape of recess 8 will be described in top view. Fig. 3 is a partial top view, which is an example of a Fig. 2 corresponding area illustrated. Fig. 4 is a partial top view, which is another example of a Fig. 2 corresponding area illustrated.

[0018] As in Fig. As illustrated in Figure 3, the plurality of depressions 8 extends in plan view parallel to the entire circumference of the contour of the organic insulating film 6. That is, the plurality of depressions 8 is arranged such that it is parallel to the terminal end of the chip in plan view and is formed in a striped pattern.

[0019] Alternatively, as in Fig. As illustrated in Figure 4, the multitude of depressions 8 in top view are not formed in a striped pattern, but in a grid pattern over the entire circumference of the organic insulating film 6. <Verfahren zum Ausbilden einer Vertiefung>

[0020] Next, a method for forming the depression 8 is described. First, the oxide film 4 is formed on the upper surface of the semiconductor substrate 1. Next, trench etching is performed from the upper surface of the oxide film 4 to form the first concave subregion 1a. By adjusting the etching conditions, the first concave subregion 1a is formed with a portion in which its width decreases towards the top. Alternatively, instead of trench etching, adjusting the amount of nitrogen doping in the drift layer also enables the formation of the first concave subregion 1a with a portion in which its width decreases towards the top.

[0021] Thermal oxidation is then used to form the oxide film 4 on the front surface of the first concave sub-region 1a, thereby forming the second concave sub-region 4a. The second concave sub-region 4a is formed following the shape of the first concave sub-region 1a; therefore, the second concave sub-region 4a also has a section where its width decreases towards the top. <effekt>

[0022] As described above, the semiconductor device according to the first embodiment comprises the semiconductor substrate 1 with the upper surface and the lower surface, a surface opposite the upper surface, wherein the effective area 2, through which a current flows, and the termination area 7, which is configured to surround the outer peripheral side of the effective area 2, are defined; the oxide film 4, which is arranged in contact with the upper surface of the termination area 7 such that it covers the upper surface; the organic insulating film 6, which contains an insulating material and is arranged such that it covers a portion of the oxide film 4, excluding the peripheral portion; and depressions 8 as the concave portions, which are concave downwards, in the portion of the oxide film 4 covered by the organic insulating film 6, and the depressions 8 have a portionin which its width decreases towards the top. Furthermore, the organic insulating film contains 6 polyimide.

[0023] Moisture penetrates from the outer peripheral edge of the organic insulating film 6 and spreads along the recesses 8; therefore, the creepage distance over which the moisture reaches the outermost protective ring 3 is long. Furthermore, the recesses 8 are filled with the organic insulating film 6, which improves the adhesion between the organic insulating film 6 and the oxide film 4, thus improving the adhesion between the organic insulating film 6 and the semiconductor substrate 1. The spread of moisture from the outer peripheral edge of the organic insulating film 6 can be suppressed, which improves the moisture resistance of the semiconductor device.

[0024] Furthermore, the recesses 8 have a sub-area in which their width decreases towards the top; therefore, the anchoring effect generated by the recesses 8 improves the adhesion in the vertical direction of the semiconductor device, which improves the power cycle tolerance of the semiconductor device.

[0025] Furthermore, termination area 7 is shortened, which allows for a reduction in chip size, thus reducing the manufacturing costs of the semiconductor device.

[0026] Furthermore, the recess 8 has the first concave sub-area 1a, which is located on the upper surface of the semiconductor substrate 1 and has an interior with a trapezoidal cross-sectional shape, and the second concave sub-area 4a, which is located on the front surface of the first concave sub-area 1a and has an interior formed by the oxide film 4 and having a trapezoidal cross-sectional shape.In the method for manufacturing the semiconductor device according to the first embodiment, the recesses 8 also have the first concave sub-region 1a and the second concave sub-region 4a, and the method for manufacturing the semiconductor device comprises a step (a) for forming the first concave sub-region 1a with an interior having a trapezoidal cross-sectional shape, which is arranged on the upper surface of the semiconductor substrate 1, and a step (b) for forming the second concave sub-region 4a, which is arranged on the front surface of the first concave sub-region 1a and has an interior formed from the oxide film 4 and having a trapezoidal cross-sectional shape.

[0027] Therefore, the first concave sub-region 1a can be formed in the trench etching step, which is an existing step; thus, the formation of the depression 8 is ensured by simply adding step (b) to the existing step to form the second concave sub-region 4a on the front surface of the first concave sub-region 1a. This reliably achieves the improvement in the moisture resistance and power cycle tolerance of the semiconductor device.

[0028] Furthermore, the concave section is a depression 8 that extends parallel to the contour of the organic insulating film 6 when viewed from above. Therefore, moisture that has penetrated from the outer peripheral edge of the organic insulating film 6 spreads towards the center of the semiconductor substrate 1; by providing the depressions 8 that extend in a direction perpendicular to the direction of moisture propagation, i.e., in a direction parallel to the contour of the organic insulating film 6 when viewed from above, the creepage distance from the outer peripheral edge of the organic insulating film 6 to the effective area 2 is thus lengthened.

[0029] Furthermore, the recesses 8 are formed in a grid pattern in top view, and the adhesion area between the organic insulating film 6 and the semiconductor substrate 1 is increased in the termination area 2, thereby further improving the adhesion between the organic insulating film 6 and the semiconductor substrate 1. <Zweite Ausführungsform>

[0030] Next, a semiconductor device according to a second embodiment will be described. Fig. 5 is a Fig. 2. Corresponding illustration of the second embodiment. In the second embodiment, the same components as those described in the first embodiment are designated with the same reference numerals, and their description is omitted. <Konfiguration einer Halbleitervorrichtung>

[0031] As in Fig. As illustrated in Figure 5, in the second embodiment, the oxide film 4 within and around the recesses 8 is covered by an adhesion film 9 as the first adhesion film. The adhesion film 9 is a deposited oxide film. The recesses 8 have a first concave sub-region 1a, a second concave sub-region 4a, and a third concave sub-region 9a. The first concave sub-region 1a is located on the upper surface of the semiconductor substrate 1, and its interior has a rectangular cross-sectional shape. The second concave sub-region 4b is located on the front surface of the first concave sub-region 1a, and the interior formed by the oxide film 4 has a rectangular cross-sectional shape. The third concave sub-region 9a is located on the front surface of the second concave sub-region 4a, and the interior formed by the adhesion film 9 has a trapezoidal cross-sectional shape.Specifically, the third concave sub-section 9a has a section where its width decreases towards the top. The width of the third concave sub-section 9a gives the width in the horizontal direction in . Fig. 5 on. <Verfahren zum Ausbilden einer Vertiefung>

[0032] Next, a method for forming the depression 8 is described. First, the oxide film 4 is formed on the upper surface of the semiconductor substrate 1. Next, trench etching is performed from the upper surface of the oxide film 4 to form the first concave subregion 1a with an interior having a rectangular cross-sectional shape. Alternatively, instead of trench etching, adjusting the amount of nitrogen doping in the drift layer also enables the formation of the first concave subregion 1a.

[0033] Thermal oxidation is then used to form the oxide film 4 on the front surface of the first concave sub-region 1a, thereby forming the second concave sub-region 4a with an interior having a rectangular cross-sectional shape. Next, a deposited oxide film is deposited on the front surface of the oxide film 4 using a CVD process to form the adhesion film 9, thereby forming the third concave sub-region 9a with an interior having a trapezoidal cross-sectional shape on the surface of the second concave sub-region 4a. <effekt>

[0034] As described above, as in the case of the first embodiment, in the semiconductor device according to the second embodiment the recess 8 has a partial area in which its width decreases towards the top, which improves the power cycle tolerance while improving the moisture resistance.

[0035] Furthermore, the recess 8 comprises the first concave sub-region 1a, which is arranged on the upper surface of the semiconductor substrate 1 and has an interior with a rectangular cross-sectional shape; the second concave sub-region 4a, which is arranged on the front surface of the first concave sub-region 1a and has an interior formed by the oxide film 4 and having a rectangular cross-sectional shape; and the third concave sub-region 9a, which is arranged on the front surface of the second concave sub-region 4a and has an interior formed by the adhesion film 9 with a trapezoidal cross-sectional shape. The adhesion film 9 comprises a deposited oxide film. In a method for manufacturing the semiconductor device according to the second embodiment, the recesses 8 also comprise the first concave sub-region 1a, the second concave sub-region 4a, and the third concave sub-region 9a.and the method for manufacturing the semiconductor device comprises a step (c) for forming the first concave sub-region 1a, arranged on the upper surface of the semiconductor substrate 1, having an interior with a rectangular cross-sectional shape; a step (d) for forming the second concave sub-region 4a, which is arranged on the front surface of the first concave sub-region 1a and has an interior formed from the oxide film 4 and having a rectangular cross-sectional shape; and a step (e) for forming the third concave sub-region 9a, which is arranged on the front surface of the second concave sub-region 4a and has an interior formed from the adhesion film 9 with a trapezoidal cross-sectional shape.

[0036] The deposited oxide film is typically used as an interlayer film in a semiconductor device, and a process for forming a deposited oxide film is typically adopted or applied in a semiconductor device manufacturing process. In the second embodiment, the formation of the depressions 8 is ensured by forming a deposited oxide film after trench etching, which can easily obtain or achieve an anchoring effect using existing processes. <Dritte Ausführungsform>

[0037] Next, a semiconductor device according to a third embodiment will be explained. Fig. 6 is a Fig. 2. Corresponding representation of the third embodiment. Fig. Figures 7A to 7C are cross-sectional views illustrating a method for forming ribs 10 in the third embodiment. It should be particularly noted that in the third embodiment, the same components as those described in the first and second embodiments are designated with the same reference numerals, and their descriptions are omitted. <Konfiguration einer Halbleitervorrichtung>

[0038] As in Fig. As illustrated in Figure 6, in the third embodiment, at least one rib 10 is arranged between the oxide film 4 and the organic insulating film 6 in the termination region 7 of the semiconductor substrate 1. The present embodiment describes a case in which a plurality of ribs 10 (for example, two) are arranged. Here, the ribs 10 correspond to upwardly projecting convex sub-regions. The ribs 10 are arranged between the oxide film 4 and the organic insulating film 6 and are formed from a second adhesion film comprising a deposited oxide film or a polysilicon film. The adhesion between the second adhesion film, which forms the ribs 10, and the organic insulating film 6 is higher than the adhesion between the organic insulating film 6 and the oxide film 4. The ribs 10 have a sub-region in which their width increases upwards. The width of the rib 10 indicates the width in the horizontal direction. Fig. 6 on.

[0039] Although not illustrated, the plurality of ribs 10 extends in plan view parallel to the entire circumference of the contour of the organic insulating film 6. That is, the plurality of ribs 10 is arranged in plan view parallel to the end face of the chip and is formed in a striped pattern. Alternatively, the plurality of ribs 10 can be formed in plan view not in a striped pattern, but in a grid pattern over the entire circumference of the organic insulating film 6. <Verfahren zum Ausbilden einer Rippe>

[0040] Next, with reference to Fig. In sections 7A to 7C, a method for forming the rib 10 is described. A primary structure 10a of the second adhesion film, which is intended to form the shape of the rib 10, is formed on the oxide film 4 arranged on the upper surface of the semiconductor substrate 1. The primary structure 10a is created from a deposited oxide film. Next, the deposited oxide film 10b (see Fig. 7A) or a polysilicon film 10c (see Fig. 7B) as a secondary structure on a sub-region of the primary structure 10a, excluding its lower surface. At this point, by adjusting the film formation conditions, the deposited film 10b or polysilicon film 10c formed on the lateral surfaces of the primary structure is shaped such that the upper sub-region is thicker than the lower sub-region. As a result, as shown in Fig. Figure 7B illustrates a rib 10 with a cross-sectional shape whose width increases towards the top.

[0041] When the polysilicon film 10c is formed, as in Fig. 7C is illustrated, furthermore the polysilicon film 10c, which is formed on the upper surface of rib 10 and the upper surface of oxide film 4, is removed by reactive ion etching after the resist has been applied. <effekt>

[0042] As described above, instead of the recesses 8 in the first embodiment, the semiconductor device according to the third embodiment has ribs 10 in the portion of the oxide film 4 covered with the organic insulating film 6. These ribs serve as upwardly projecting convex sections, and the ribs 10 have a section in which their width increases upwards. This improves the power cycle tolerance while also improving moisture resistance.

[0043] The ribs 10 are arranged between the oxide film 4 and the organic insulating film 6 and consist of a second adhesive film. This second adhesive film also comprises a deposited oxide film or a polysilicon film. The adhesion between the second adhesive film, which forms the ribs 10, and the organic insulating film 6 is higher than the adhesion between the organic insulating film 6 and the oxide film 4; therefore, a further improvement in moisture resistance and performance cycle tolerance is ensured compared to the first embodiment.

[0044] The convex section is further a rib 10 which extends parallel to the contour of the organic insulating film 6 in plan view. Therefore, moisture that has penetrated from the outer peripheral edge of the organic insulating film 6 spreads towards the center of the semiconductor substrate 1; by providing the ribs 10 which extend in a direction perpendicular to the direction of propagation of the moisture, that is, in a direction parallel to the contour of the organic insulating film 6 in plan view, the creepage distance from the outer peripheral edge of the organic insulating film 6 to the effective area 2 is thus lengthened.

[0045] Furthermore, the ribs 10 are formed in a grid pattern in top view, and the adhesion area between the organic insulating film 6 and the semiconductor substrate 1 is increased in termination area 7, thereby further improving the adhesion between the organic insulating film 6 and the semiconductor substrate 1. <Vierte Ausführungsform>

[0046] Next, a semiconductor device according to a fourth embodiment will be described. Fig. 8 is a Fig. 2. Corresponding illustration of the fourth embodiment. It should be particularly noted that in the fourth embodiment, the description of the same components as those described in the first to third embodiments is omitted here. <Konfiguration einer Halbleitervorrichtung>

[0047] As in Fig. As illustrated in Figure 8, the fourth embodiment has a configuration in which the first and third embodiments are combined. At least one recess 8 is arranged on the upper surface of the semiconductor substrate 1 in the termination region 7. At least one rib 10 is also arranged between the oxide film 4 and the organic insulating film 6 in the termination region 7 of the semiconductor substrate 1. <Verfahren zum Ausbilden einer Vertiefung und einer Rippe>

[0048] The recesses 8 are formed using the same method as in the first embodiment, and the ribs 10 are formed using the same method as in the third embodiment, so that the description for them is omitted here. <effekt>

[0049] As described above, the semiconductor device according to the fourth embodiment has the depressions 8 as concave sub-regions which are concave downwards, and the ribs 10 as upwardly projecting convex sub-regions in the sub-region of the oxide film 4 which is covered with the organic insulating film 6, wherein the depressions 8 have a sub-region in which their width decreases upwards, and the ribs 10 have a sub-region in which their width increases upwards.

[0050] This makes the interface across which moisture spreads uneven or uneven, and the creepage distance over which moisture reaches the outermost protective ring 3 is increased more than in the first embodiment, without increasing the length of the sealing area 7. Furthermore, the adhesion area between the organic insulating film 6 and the oxide film 4 is increased, ensuring a further improvement in moisture resistance compared to the first embodiment. <Modifikationsbeispiel der ersten bis vierten Ausführungsformen>

[0051] Although the description of the silicon-based semiconductor substrate 1 was given in the first to fourth embodiments, the semiconductor substrate 1 is not limited to silicon and can be a wide-bandgap semiconductor with a bandgap larger than that of silicon. A wide-bandgap semiconductor includes, for example, silicon carbide, gallium nitride-based materials, or diamond. Wide-bandgap semiconductors are designed to exhibit a high electric field strength at the interface; therefore, by adopting the configurations of the first to fourth embodiments for the semiconductor device containing the wide-bandgap semiconductor substrate 1, the effect obtained from them becomes more pronounced and particularly effective.

[0052] The following sections describe various aspects of the present revelation together as appendices. (Annex 1)

[0053] A semiconductor device comprising: a semiconductor substrate having a first principal surface and a second principal surface which is a surface opposite the first principal surface and wherein an effective region through which a current flows and a termination region which is configured to surround an outer peripheral side of the effective region are defined; an oxide film which is arranged in contact with the first main surface of the termination area, covering the first main surface; a surface protective film containing an insulating material and arranged to cover a portion of the oxide film, excluding the peripheral portion; and at least one of a concave sub-area that is concave downwards and a convex sub-area that projects upwards in the sub-area of ​​the oxide film that is covered with the surface protective film, wherein the concave section has a section in which its width decreases towards the top, and the convex sub-area has a sub-area in which its width increases towards the top. (Annex 2)

[0054] The semiconductor device according to Annex 1, wherein the concave sub-region has a first concave sub-region with an interior having a trapezoidal cross-sectional shape, which is located on the first main surface of the semiconductor substrate, and a second concave sub-region which is located on a front surface of the first concave sub-region and has an interior formed by the oxide film with a trapezoidal cross-sectional shape. (Annex 3)

[0055] The semiconductor device according to Annex 1, wherein the concave sub-region comprises a first concave sub-region with an interior having a rectangular cross-sectional shape, located on the first main surface of the semiconductor substrate, a second concave sub-region located on a front surface of the first concave sub-region and having an interior formed by the oxide film with a rectangular cross-sectional shape, and a third concave sub-region located on a front surface of the second concave sub-region and having an interior formed by a first adhesion film with a trapezoidal cross-sectional shape. (Annex 4)

[0056] The semiconductor device according to Annex 3, wherein The first adhesion film comprises a deposited oxide film. (Annex 5)

[0057] The semiconductor device according to Annex 1, wherein the convex part is located between the oxide film and the surface protection film and consists of a second adhesion film. (Annex 6)

[0058] The semiconductor device according to Annex 5, wherein the second adhesion film comprises a deposited oxide film or a polysilicon film. (Annex 7)

[0059] The semiconductor device according to one of Annexes 1 to 6, wherein the concave section is a depression that extends parallel to a contour of the surface protective film in plan view, and The convex section is a rib that extends parallel to the contour of the surface protective film when viewed from above. (Annex 8)

[0060] The semiconductor device according to one of Annexes 1 to 6, wherein The concave and convex sections are formed in a grid pattern in the top view. (Annex 9)

[0061] The semiconductor device according to one of Annexes 1 to 8, wherein The surface protective film contains polyimide. (Annex 10)

[0062] The semiconductor device according to one of Annexes 1 to 9, wherein the semiconductor substrate consists of a wide bandgap semiconductor comprising silicon carbide, gallium nitride, or diamond. (Annex 11)

[0063] A method for manufacturing the semiconductor device according to Annex 1, wherein the concave sub-area has a first concave sub-area and a second concave sub-area, wherein the method for manufacturing the semiconductor device comprises the following steps: (a) Forming a first concave sub-region with an interior having a trapezoidal cross-sectional shape, which is arranged on the first main surface of the semiconductor substrate; and (b) Forming a second concave sub-area which is located on a front surface of the first concave sub-area and has an interior formed by the oxide film with a trapezoidal cross-sectional shape. (Annex 12)

[0064] A method for manufacturing the semiconductor device according to Annex 1, wherein the concave sub-area has a first concave sub-area, a second concave sub-area and a third concave sub-area, wherein the method for manufacturing the semiconductor device comprises the steps (c) Forming a first concave sub-region with an interior having a rectangular cross-sectional shape, which is arranged on the first main surface of the semiconductor substrate; (d) Forming a second concave sub-area located on a front surface of the first concave sub-area, comprising an interior formed by the oxide film with a rectangular cross-sectional shape; and (e) Forming a third concave sub-area which is arranged on a front surface of the second concave sub-area and which has an interior formed by a first adhesion film with a trapezoidal cross-sectional shape. (Annex 13)

[0065] A method for manufacturing the semiconductor device according to Annex 5, comprising the steps: (f) Formation of a primary structure of the second adhesion film on the side of the first main surface of the semiconductor substrate; and (g) Forming the convex sub-region on the side of the first main surface of the semiconductor substrate by forming a secondary structure of the second adhesion film on the primary structure.< / effekt> < / effekt> < / effekt> < / effekt>

Claims

[1] Semiconductor device comprising: a semiconductor substrate (1) having a first principal surface and a second principal surface which is a surface opposite the first principal surface and wherein an effective region (2) through which a current flows and a termination region (7) which is configured to surround an outer peripheral side of the effective region (2) are defined; an oxide film (4) which is arranged in contact with the first main surface of the termination area (7) such that it covers the first main surface; a surface protective film (6) containing an insulating material and arranged to cover a portion of the oxide film (4) except for the peripheral portion; and at least one of a concave sub-area that is concave downwards and a convex sub-area that projects upwards in the sub-area of ​​the oxide film (4) that is covered with the surface protective film (6), wherein the concave section has a section in which its width decreases towards the top, and the convex sub-area has a sub-area in which its width increases towards the top. [2] Semiconductor device according to claim 1, wherein the concave sub-region comprises a first concave sub-region (1a) with an interior having a trapezoidal cross-sectional shape, which is arranged on the first main surface of the semiconductor substrate (1), and a second concave sub-region (4a) which is arranged on a front surface of the first concave sub-region (1a) and has an interior formed by the oxide film (4) having a trapezoidal cross-sectional shape. [3] Semiconductor device according to claim 1, wherein the concave sub-area comprises a first concave sub-area (1a) having an interior with a rectangular cross-sectional shape, which is arranged on the first main surface of the semiconductor substrate (1), a second concave sub-area (4a) which is arranged on a front surface of the first concave sub-area (1a) and has an interior formed by the oxide film (4) having a rectangular cross-sectional shape, and a third concave sub-area (9a) which is arranged on a front surface of the second concave sub-area (4a) and has an interior formed by a first adhesion film (9) having a trapezoidal cross-sectional shape. [4] Semiconductor device according to claim 3, wherein the first adhesion film (9) comprises a deposited oxide film. [5] Semiconductor device according to claim 1, wherein the convex part is arranged between the oxide film (4) and the surface protection film (6) and consists of a second adhesion film. [6] Semiconductor device according to claim 5, wherein the second adhesion film comprises a deposited oxide film or a polysilicon film. [7] Semiconductor device according to claim 1, wherein the concave part is a depression (8) which extends parallel to a contour of the surface protective film (6) in plan view, and the convex part is a rib (10) which extends parallel to the contour of the surface protective film (6) in plan view. [8] Semiconductor device according to claim 1, wherein the concave sub-region and the convex sub-region are formed in a grid pattern in top view. [9] Semiconductor device according to claim 1, wherein the surface protective film (6) contains polyimide. [10] Semiconductor device according to claim 1, wherein the semiconductor substrate (1) consists of a wide bandgap semiconductor comprising silicon carbide, gallium nitride or diamond. [11] Method for manufacturing the semiconductor device according to claim 1, wherein the concave sub-area has a first concave sub-area (1a) and a second concave sub-area (4a), wherein the method for manufacturing the semiconductor device comprises the following steps: (a) Forming a first concave sub-region (1a) with an interior having a trapezoidal cross-sectional shape, which is arranged on the first main surface of the semiconductor substrate (1); and (b) Forming a second concave sub-area (4a) which is arranged on a front surface of the first concave sub-area (1a) and has an interior formed by the oxide film (4) with a trapezoidal cross-sectional shape. [12] Method for manufacturing the semiconductor device according to claim 1, wherein the concave sub-area has a first concave sub-area (1a), a second concave sub-area (4a) and a third concave sub-area (9a), wherein the method for manufacturing the semiconductor device comprises the steps (c) Forming a first concave sub-region (1a) with an interior having a rectangular cross-sectional shape, which is arranged on the first main surface of the semiconductor substrate (1); (d) Forming a second concave sub-area (4a) arranged on a front surface of the first concave sub-area (1a) and having an interior formed by the oxide film (4) with a rectangular cross-sectional shape; and (e) Forming a third concave sub-area (9a) which is arranged on a front surface of the second concave sub-area (4a) and has an interior formed by a first adhesion film (9) with a trapezoidal cross-sectional shape. [13] Method for manufacturing the semiconductor device according to claim 5, comprising the steps: (f) Formation of a primary structure of the second adhesion film on the side of the first main surface of the semiconductor substrate (1); and (g) Forming the convex sub-region on the side of the first main surface of the semiconductor substrate (1) by forming a secondary structure of the second adhesion film on the primary structure.

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