Method for manufacturing a semiconductor device

Abstract

A method for manufacturing a semiconductor device, wherein the semiconductor device comprises: an insulating substrate (4a, 4b) with a circuit structure (3b) formed on its upper surface; a semiconductor element (5a, 5b) mounted on the upper surface of the circuit structure (3b); a plurality of electrode terminals (6, 7, 8), each having an end portion bonded to the upper surface of the circuit structure (3b); a base plate (1) bonded to a lower surface of the insulating substrate (4a, 4b); a housing (9) attached to a peripheral portion of the base plate (1); and a sealing material (10) sealing the interior of the housing (9), wherein the electrode terminals (6, 7) are connected to mutually adjacent portions of the plurality of electrode terminals (6, 7, 8) at least in those portions by an insulating film (11) having a thickness of less than 100 µm. are coatedthe insulating film (11) consists of an insulating coating material that bonds the electrode terminals (6, 7) to the mutually adjacent regions of the plurality of electrode terminals (6, 7, 8) and the sealing material (10) via a non-covalent bond, and the insulating film (11) covers the semiconductor element (5a, 5b) and the end regions (6a, 7a) of the electrode terminals (6, 7) with the mutually adjacent regions of the plurality of electrode terminals (6, 7, 8), wherein the plurality of electrode terminals (6, 7, 8) comprises a first electrode terminal (6) with the mutually adjacent regions and a second electrode terminal (7), and the semiconductor element (5a, 5b) comprises a first semiconductor element (5a) and a second semiconductor element (5b), wherein the method comprises: (a) applying the insulating coating material to the first electrode terminal (6),wherein an end section (6a) is bonded to an upper surface of a first sub-section, on which the first semiconductor element (5a) is mounted, in the circuit structure (3b), and another end section (6b) is bonded to the housing (9), and the first sub-section of the circuit structure (3b), (b) bonding an end section (7a) of the second electrode terminal (7) to an upper surface of a second sub-section, on which the second semiconductor element (5b) is mounted, in the circuit structure (3b), and bonding another end section (7b) to the housing (9), so that the sub-section is in mutual proximity with the first electrode terminal (6), and (c) applying the insulating coating material to the second electrode terminal (7) and the second sub-section of the circuit structure (3b).

Description

BACKGROUND OF THE INVENTION Field of invention The present disclosure relates to a method for manufacturing a semiconductor device. Description of the background technology A structure described in the disclosed Japanese patent application JP 2015 - 213 408 A was proposed as a structure that reduces the inductance within a semiconductor device. In the semiconductor power module disclosed in the published Japanese patent application JP 2015-213408A, which corresponds to a semiconductor device, a positive terminal and a negative terminal are arranged in parallel, and the same current flows through them in opposite directions. As a result, the magnetic fields generated by the current cancel each other out in a space between the two terminals, thus reducing the inductance of the current path. This space is ensured by placing an insulating resin, insulating paper, or laminate coating between the terminals. JP 2015 - 133 368 A discloses a detachable power connector used in a DC power path and a power semiconductor device. JP 2020 - 47 677 A and JP 2019 - 169 493 A disclose semiconductor devices with a plurality of power semiconductor chips mounted on a metal substrate, with an insulating substrate in between. SUMMARY In the semiconductor power module disclosed in the published Japanese patent application JP 2015-213408A, the insulating resin, insulating paper, or laminate coating is arranged between individual terminals for insulation purposes, which necessitates a certain thickness as an insulating component. For this reason, the problem arose that the self-inductance of the semiconductor power module increases. One objective of the present disclosure is to provide a technique that reduces the self-inductance of a semiconductor device and further improves the reliability of the semiconductor device. This problem is solved by the features of independent claim 1. Dependent claim 2 contains advantageous embodiments of the invention. A semiconductor device comprises an insulating substrate, a semiconductor element, and a plurality of electrode terminals. The insulating substrate has a circuit structure formed on its upper surface. The semiconductor elements are mounted on the upper surface of the circuit structure. Each plurality of electrode terminals has an end region bonded to the upper surface of the circuit structure. A base plate is bonded to a lower surface of the insulating substrate. A housing is attached to a peripheral region of the base plate. A sealing material seals the interior of the housing. The electrode terminals 6, 7, with adjacent regions of the plurality of electrode terminals 6, 7, 8, are coated, at least in these regions, with an insulating film less than 100 µm thick.The insulating film consists of an insulating coating material that bonds the electrode terminals to the adjacent regions of the plurality of electrode terminals and the sealing material via a non-covalent bond. The insulating film covers the semiconductor element and the adjacent regions of the electrode terminals. The plurality of electrode terminals comprises a first electrode terminal with its adjacent regions and a second electrode terminal. The semiconductor element comprises a first semiconductor element and a second semiconductor element. According to the present disclosure, a method for manufacturing this semiconductor device comprises: (a) applying the insulating coating material to the first electrode terminal, wherein one end portion is bonded to an upper surface of a first sub-area, on which the first semiconductor element is mounted, in the circuit structure, and another end portion is bonded to the housing, and the first sub-area of ​​the circuit structure; (b) bonding one end portion of the second electrode terminal to an upper surface of a second sub-area, on which the second semiconductor element is mounted, in the circuit structure, and bonding another end portion to the housing, such that the sub-area is in mutual proximity to the first electrode terminal; and (c) applying the insulating coating material to the second electrode terminal and the second sub-area of ​​the circuit structure. The insulating film, which is thinner than insulating resin, insulating paper, and laminate coating, is positioned between the adjacent electrode terminals, thereby reducing the self-inductance of the semiconductor device. These and other objectives, features, aspects and advantages of the present invention will become more apparent from the following detailed description of the present invention when it is taken in conjunction with the accompanying drawings. BRIEF DESCRIPTION OF THE DRAWINGS Fig. 1 is a cross-sectional view of a semiconductor device according to embodiment 1; Fig. 2 is a graphical representation illustrating the relationship between the interelectrode spacing and the self-inductance; Fig. 3 is a cross-sectional view of a semiconductor device according to embodiment 2; Fig. 4 is a cross-sectional view illustrating a method for fabricating a semiconductor device according to embodiment 3; Fig. 5 is a cross-sectional view illustrating the method for fabricating the semiconductor device according to embodiment 3; Fig. 6 is a cross-sectional view illustrating the method for fabricating the semiconductor device according to embodiment 3; Fig. 7 is a cross-sectional view of a semiconductor device according to a modification of embodiment 1; and Fig.Figure 8 is a block diagram illustrating a configuration of a power conversion system for which a power conversion device according to embodiment 4 is used. DESCRIPTION OF PREFERRED EXECUTION FORMS <Ausführungsform 1> <gesamtkonfiguration> With reference to the drawings, embodiment 1 is described below. Fig. 1 is a cross-sectional view of a semiconductor device according to embodiment 1. As illustrated in Fig. 1, the semiconductor device comprises a base plate 1, insulating substrates 4a, 4b, semiconductor elements 5a, 5b, electrode terminals 6, 7, 8, a housing 9 and a sealing material 10. The base plate 1 consists primarily of copper as its main material. The base plate 1 also has a rectangular shape when viewed from above. The insulating substrates 4a, 4b are bonded to the upper surface of the base plate 1 by a solder metal 2 on the inner peripheral side of the peripheral sub-area. In Fig. 1, the insulating substrate 4a, which is the high-potential side, is located on the right, and the insulating substrate 4b, which is the low-potential side, is located on the left. Each of the insulating substrates 4a, 4b comprises an insulating layer 3a, a circuit structure 3b, and a circuit structure 3c. The insulating layer 3a consists mainly of, for example, a ceramic material. The insulating layer 3a is provided with a plurality of conductive circuit structures 3b on its upper surface. The insulating layer 3a is also provided with a conductive circuit structure 3c on its lower surface. The circuit structures 3b, 3c consist mainly of, for example, copper material. Semiconductor element 5a is mounted to the upper surface of circuit structure 3b on insulating substrate 4a by solder 2. Semiconductor element 5b is also mounted to the upper surface of circuit structure 3b on insulating substrate 4b by solder 2. The silicon semiconductor elements 5a and 5b are, for example, an insulated-gate bipolar transistor (IGBT). Here, semiconductor element 5a corresponds to the first semiconductor element, and semiconductor element 5b corresponds to the second semiconductor element. Although two semiconductor elements 5a, 5b are mounted in Fig. 1, the number of semiconductor elements 5a, 5b is not limited to two. The same applies to the number of semiconductor elements 5a, 5b in the following embodiments. The housing 9, which is said to have four sides, is designed in top view as a rectangular frame. The housing 9 is attached to the peripheral part of the base plate 1 by, for example, an adhesive (not illustrated) and surrounds the insulating substrates 4a, 4b and the semiconductor elements 5a, 5b. An electrode terminal 6 is configured with an end section 6a bonded to the upper surface of the circuit structure 3b of the insulating substrate 4a, another end section 6b attached to a first side of the housing 9, and a middle section between the first end section 6a and the second end section 6b. An electrode terminal 7 is configured with an end section 7a bonded to the upper surface of the circuit structure 3b of the insulating substrate 4b, another end section 7b attached to the first side of the housing 9, and a middle section 7c between the first end section 7a and the second end section 7b.An electrode connection 8 is configured with an end part area 8a bonded to the upper surface of the circuit structure 3b of the insulating substrate 4b, another end part area 8b attached to a second side of the housing 9 and a middle part area 8c between the one end part area 8a and the other end part area 8b. Here, electrode connection 6 corresponds to a first electrode connection and electrode connection 7 corresponds to a second electrode connection. The second side of the housing 9 is also a side opposite the first side. One end section 6a of the electrode terminal 6 is bonded to the upper surface of the circuit structure 3b of the insulating substrate 4a by the solder 2, and the other end section 6b of the electrode terminal 6 is attached to the first side of the housing 9 with an adhesive (not illustrated). One end section 7a of the electrode terminal 7 is bonded to the upper surface of the circuit structure 3b of the insulating substrate 4b by the solder 2, and the other end section 7b of the electrode terminal 7 is attached to the first side of the housing 9 by an insulating film 11. One end part region of the electrode connection 8 is bonded to the upper surface of the circuit structure 3b of the insulating substrate 4b by the solder metal 2, and the other end part region 8b of the electrode connection 8 is attached to the second side of the housing 9. The sealing material 10 is filled into the interior of the housing 9 and covers the insulating substrates 4a, 4b and the semiconductor elements 5a, 5b. The sealing material 10 consists, for example, of a silicone gel. Next, features of the semiconductor device according to embodiment 1 are described with reference to Fig. 1 and Fig. 2. Fig. 2 is a graphical representation illustrating the relationship between the interelectrode pitch and the self-inductance. As illustrated in Fig. 1, the electrode terminals 6, 7 are arranged in parallel to reduce self-inductance and have portions of mutual adjacency. The electrode terminals 6, 7 are coated, at least in the portions of mutual adjacency, with the insulating film 11 having a thickness of less than 100 µm. As illustrated in Fig. 2, the thickness of the insulating component, which is the inter-electrode spacing, and the magnitude of the self-inductance are typically proportional. In embodiment 1, the spacing between the electrode terminals 6, 7 is set to less than 100 µm, thereby realizing a low-inductance structure for the semiconductor device while maintaining the insulation distance between the electrode terminals 6, 7. The sub-areas of mutual proximity of the electrode terminals 6, 7 represent here in the electrode terminals 6, 7 sub-areas of the sub-areas of the other end part-areas 6b, 7b located on the inner peripheral side of the housing 9 up to the sub-areas of the middle sub-areas 6c, 7c. <effekt> As described above, the semiconductor device according to embodiment 1 comprises insulating substrates 4a, 4b with circuit structures 3b formed on their upper surfaces, semiconductor elements 5a, 5b mounted on the upper surface of the circuit structures 3b, and a plurality of electrode terminals 6, 7, 8, each having an end section bonded to the upper surface of the circuit structure 3b. The electrode terminals 6, 7, with adjacent partial regions of the plurality of electrode terminals 6, 7, 8, are coated, at least in these partial regions, with the insulating film 11 having a thickness of less than 100 µm. Accordingly, the insulating film 11, which is thinner than the insulating resin, the insulating paper and the laminate coating, is arranged between the adjacent electrode terminals 6, 7, thereby reducing the self-inductance of the semiconductor device. <Ausführungsform 2> Next, a semiconductor device according to embodiment 2 is described. Fig. 3 is a cross-sectional view of the semiconductor device according to embodiment 2. In embodiment 2, the same components as those described in embodiment 1 are designated with the same reference numerals, and their descriptions are omitted. As illustrated in Fig. 3, in this embodiment the other end sections 6b, 7b, 8b of the electrode terminals 6, 7, 8 are cast or overmolded into the housing 9. Specifically, the other end section 6b of the electrode terminal 6 is integrally formed with the first side of the housing 9. Similarly, the other end section 7b of the electrode terminal 7 is integrally formed with the first side of the housing 9. Furthermore, the other end section 8b of the electrode terminal 8 is integrally formed with the second side of the housing 9. The insulating film 11 is coated or applied to the adjacent areas of the electrode terminals 6, 7. If these areas have already been coated, only one of the electrode terminals 6, 7 can be coated at that point. The areas of the electrode terminals 6, 7 that are integrally formed with the housing 9 do not necessarily need to be coated, as long as the insulation distance is ensured. As described above, the semiconductor device according to embodiment 2 further comprises the base plate 1 bonded to the lower surfaces of the insulating substrates 4a, 4b and the housing 9 attached to the circumferential part area of ​​the base plate 1, in which the other end part areas of the plurality of electrode connections 6, 7, 8 are integrally formed with the housing 9. Accordingly, the electrode terminals 6, 7 are securely held in the housing 9, which allows for a closer distance between the electrode terminals 6, 7 and shorter connection lengths for the electrode terminals 6, 7, 8. This contributes to a miniaturization of the semiconductor device. <Ausführungsform 3> Next, a semiconductor device according to embodiment 3 is described. Figures 4, 5 to 6 are cross-sectional views illustrating a method for manufacturing the semiconductor device according to embodiment 3. It should be particularly noted that in embodiment 3, the same components as those described in embodiments 1 and 2 are designated with the same reference numerals, and their descriptions are omitted. In embodiment 3, the material of the insulating film 11 is modified compared to that of embodiment 1. The insulating film 11 consists of an insulating coating material with excellent heat resistance and bonds the electrode terminals 6, 7, which have adjacent partial regions, and the sealing material 10 via a non-covalent bond. This improves the adhesion between the electrode terminals 6, 7 and the sealing material 10. The insulating coating material is, for example, a highly heat-resistant coating material “HIMAL” manufactured by Showa Denko Materials Co., Ltd. The semiconductor elements 5a, 5b are switching elements, and when a large current flows through the electrode terminals 6, 7, the electrode terminals 6, 7 also heat up. Furthermore, each component forming a semiconductor device typically has the property of expanding and contracting with temperature changes, and the degree of expansion and contraction varies depending on the material of each component. Due to the heat generated by the electrode terminals 6, 7 and the semiconductor elements 5a, 5b, each component undergoes repeated cycles of expansion and contraction, raising concerns about potential delamination between the electrode terminals 6, 7 and the sealing material 10. Meanwhile, the semiconductor device according to embodiment 3 has the base plate 1 bonded to the lower surfaces of the insulating substrates 4a, 4b and the housing 9 attached to the peripheral part of the base plate 1 and the sealing material 10 for sealing the interior of the housing 9, wherein the insulating film 11 consists of an insulating coating material which bonds the electrode terminals 6, 7, which have the part areas of mutual proximity, the plurality of electrode terminals 6, 7, 8 and the sealing material 10 via a non-covalent bond. This improves the adhesion between the electrode terminals 6, 7 and the sealing material 10, thus suppressing the occurrence of delamination between the electrode terminals 6, 7 and the sealing material 10. This contributes to the high reliability of the semiconductor device. The insulating film 11 not only coats the adjacent areas of the electrode terminals 6, 7, but also covers the semiconductor elements 5a, 5b and the end regions 6a, 7a of the electrode terminals 6, 7. A manufacturing process for this case is described below. First, although not illustrated, the insulating substrates 4a, 4b are bonded to the upper surface of the base plate 1, except for the peripheral areas, by the solder metal 2, and the housing 9 is attached to the peripheral area of ​​the upper surface of the base plate 1 by an adhesive (not illustrated). Next, an end portion 8a of the electrode terminal 8, which is integrally formed with the housing 9, is bonded to the upper surface of the circuit structure 3b of the insulating substrate 4b by the solder metal 2. As illustrated in Fig. 4, next, an end section 6a of the electrode terminal 6 is bonded by the solder metal 2 to the upper surface of a first section below the circuit structures 3b, on which the semiconductor element 5a is mounted, and the other end section 6b is bonded to the housing 9 by an adhesive (not shown). Here, the first section refers to the circuit structure 3b of the insulating substrate 4a. Next, an insulating coating material, which is to form the insulating film 11, is applied to the electrode terminal 6 by means of a spray device 20. At this point, the insulating coating material is also applied to the circuit structure 3b of the insulating substrate 4a and the semiconductor element 5a. As illustrated in Fig. 5, next, an end section 7a of the electrode terminal 7 is bonded by the solder metal 2 to the upper surface of a second section below the circuit structures 3b, on which the semiconductor element 5b is mounted, so that the adjacent section is connected to the electrode terminal 6, and the other end section 7b is bonded to the housing 9. The other end section 7b is bonded to the housing 9 by the insulating coating material applied to the electrode terminal 6. The second section refers here to the circuit structure 3b of the insulating substrate 4a. Next, the insulating coating material, which is to form the insulating film 11, is applied to the inner part of the housing 9 by means of a spray device 20. Specifically, the insulating coating material is also applied to the electrode terminal 7, the circuit structure 3b of the insulating substrate 4b, and the semiconductor element 5b. Through the steps described above, the upper surfaces of the circuit structures 3b of the insulating substrates 4a, 4b, the semiconductor elements 5a, 5b, and the electrode terminals 6, 7 are coated with the insulating film 11. Next, the interior of the housing 9 is filled with the sealing material 10 (see Fig. 1) to complete the semiconductor device. As described above, in the semiconductor device according to embodiment 3, the insulating film 11 covers the semiconductor elements 5a, 5b and the end part regions 6a, 7a of the electrode terminals 6, 7 with the part regions of mutual proximity of the plurality of electrode terminals 6, 7, 8. The method for manufacturing the semiconductor device according to embodiment 3 also comprises a step (a) in which the insulating coating material is applied to the electrode terminal 6, wherein one end part region 6a is bonded to the upper surface of the first part region on which the semiconductor element 5a is mounted, under the circuit structures 3b, and the first part region is applied under the circuit structures 3b, a step (b) in which one end part region 7a of the electrode terminal 7 is bonded to the upper surface of the second part region on which the semiconductor element 5b is mounted, under the circuit structures 3b, and the other end part region 7b is bonded to the housing 9, and a step (c) in which the insulating coating material is applied to the electrode terminal 7 and the second part region of the circuit structures 3b. Therefore, the adhesion between the semiconductor elements 5a, 5b and the sealing material 10 and between the end part regions 6a, 7a of the electrode terminals 6, 7 and the sealing material 10 is improved, which further contributes to an improvement in the reliability of the semiconductor device. <Modifikation der Ausführungsformen 1 bis 3> The semiconductor elements 5a, 5b can consist of a wide-bandgap semiconductor containing silicon carbide or gallium nitride. Wide-bandgap semiconductors are used at high temperatures, which tend to generate oscillations more readily than silicon. In embodiments 1 to 3, the self-inductance of the semiconductor device can be reduced, which has the effect of suppressing oscillations. In embodiments 1 to 3, an insulating substrate can also be used instead of the insulating substrates 4a, 4b, in which a base plate and a circuit structure are integrally formed by a resin insulating layer. Such a configuration is described next by taking a modification of embodiment 1 as an example. Fig. 7 is a cross-sectional view of a semiconductor device according to the modification of embodiment 1. As illustrated in Fig. 7, the semiconductor device includes an insulating substrate 15, the semiconductor elements 5a, 5b, the electrode terminals 6, 7, 8, the housing 9 and the sealing material 10. Here, only the configuration of the insulating substrate 15 is described. The insulating substrate 15 comprises a base plate 12, a resin insulating layer 13 formed on the upper surface of the base plate 12, and a circuit structure 14 formed on the upper surface of the resin insulating layer 13, and is integrally designed or shaped. The base plate 12 consists mainly of metallic materials such as copper, iron, and aluminum. The resin insulating layer 13 consists mainly of, for example, an epoxy resin. The circuit structures 14 consist mainly of, for example, copper. <Ausführungsform 4> In embodiment 4, a semiconductor device according to embodiments 1 to 3 described above is used for a power conversion device. Although the application of the semiconductor device according to embodiments 1 to 3 is not limited to a specific power conversion device, embodiment 4 is described below as a case in which the semiconductor device according to embodiments 1 to 3 is used for a three-phase inverter. Fig. 8 is a block diagram illustrating a configuration of a power conversion system for which a power conversion device of embodiment 4 is used. The power conversion system illustrated in Fig. 8 comprises a power supply 100, a power conversion device 200, and a load 300. The power supply 100 is a DC power supply and provides DC power to the power conversion device 200. The power supply 100 can be configured with various components, such as a DC system, a solar cell, and a storage battery, or a rectifier circuit connected to an AC system, or an AC / DC converter. Furthermore, the power supply 100 can be configured with a DC / DC converter that converts the DC power supplied by the DC system into a predetermined power output. The power conversion device 200 is a three-phase inverter connected between the power supply 100 and the load 300. It converts the DC power supplied by the power supply 100 into AC power and supplies the AC power to the load 300. As illustrated in Fig. 8, the power conversion device 200 includes a main conversion circuit 201, which converts DC power into AC power and supplies it, and a control circuit 203, which supplies a control signal to the main conversion circuit 201 for controlling the main conversion circuit 201. The Last 300 is a three-phase electric motor driven by AC power supplied by the Power Conversion Unit 200. The Last 300 is not limited to a specific application and is an electric motor that can be mounted on various electrical devices. For example, the Last 300 is used as an electric motor for a hybrid vehicle, an electric vehicle, a rail vehicle, an elevator, or an air conditioning system. The power conversion device 200 is described in detail below. The main conversion circuit 201 includes a switching element (not illustrated) and a freewheeling diode (not illustrated), and switching the switching element converts the DC power supplied by the power supply 100 into AC power and supplies it to the load 300. There are several specific circuit configurations of the main conversion circuit 201, and the main conversion circuit 201 according to embodiment 4 is a three-phase, two-level full-bridge circuit comprising six switching elements and six freewheeling diodes, each of which is antiparallel to the respective switching elements. At least one of each switching element and each freewheeling diode of the main conversion circuit 201 is formed by a semiconductor module 202 according to one of embodiments 1 to 3 described above.Each of the two series-connected switching elements of the six switching elements forms an upper and a lower arm, and each set of upper and lower arms forms each phase (U-phase, V-phase, W-phase) of the full bridge circuit. The output terminal of each set of upper and lower arms, that is, the three output terminals of the main conversion circuit 201, are then connected to the load 300. Furthermore, the main conversion circuit 201 includes a (not illustrated) control circuit for controlling each switching element, and the control circuit can be integrated into the semiconductor module 202 or be configured separately from the semiconductor module 202. The control circuit generates control signals for controlling the switching element of the main conversion circuit 201 and provides these control signals to the control electrode of the switching elements of the main conversion circuit 201. Specifically, in response to a control signal from the control circuit 203, which is described later, a control signal to turn on the switching element and a control signal to turn off the switching element are delivered to the control electrode of each switching element.When the switching element is held in the ON state, the control signal is a voltage signal (ON signal) that is equal to or higher than a threshold voltage of the switching element, and when the switching element is held in the OFF state, the control signal is a voltage signal (OFF signal) that is equal to or lower than the threshold voltage of the switching element. The control circuit 203 controls the switching elements of the main conversion circuit 201 so that the desired power is supplied to the load 300. Specifically, based on the power to be supplied to the load 300, the time (ON time) for each switching element of the main conversion circuit 201 that is to be in the ON state is calculated. For example, the main conversion circuit 201 is controlled by a PWM controller, which modulates the ON time of the switching elements in response to the voltage to be supplied. A control command (control signal) is then sent to the control circuit arranged in the main conversion circuit 201, so that at any given time an ON signal is sent to the switching element that is to be switched on and an OFF signal is sent to the switching element that is to be switched off.In response to the control signal, the control circuit outputs an ON signal or an OFF signal as a control signal to the control electrode of each switching element. In the power conversion device according to embodiment 4, the semiconductor modules according to embodiments 1 to 3 are used as the switching elements and the freewheeling diodes of the main conversion circuit 201, which improves the reliability. Although embodiment 4 describes the example of the semiconductor devices according to embodiments 1 to 3, which are used for the three-phase, two-level inverter, the semiconductor devices according to embodiments 1 to 3 are not limited to this and can be used for various power conversion devices. While embodiment 4 adopts a two-level power conversion device, a power conversion device with three or more levels can also be adopted, and, if power is supplied to a single-phase load, the semiconductor devices according to embodiments 1 to 3 can also be adopted for a single-phase inverter. Furthermore, if power is supplied to a DC load or the like, the semiconductor devices according to embodiments 1 to 3 can be adopted for the DC / DC converter or the AC / DC converter. Furthermore, the power conversion device, for which one of the semiconductor devices according to embodiments 1 to 3 is used, is not limited to the case in which the aforementioned load is an electric motor, and the power conversion device can be used in the case in which a load is a power supply device for an electrical discharge machine, a laser machine, a cooking device with induction heating or a system for non-contact power supply, and even further in the case in which a load is, for example, a power conditioner for a system for generating solar energy and a power storage system. The embodiments can be combined, modified as appropriate, or omitted as desired. The following appendices describe various aspects of the present revelation. (Annex 1) A semiconductor device comprising an insulating substrate with a circuit structure formed on its upper surface, a semiconductor element mounted on the upper surface of the circuit structure, and a plurality of electrode terminals, each having an end part region bonded to the upper surface of the circuit structure, wherein the electrode terminals are coated with the insulating film having a thickness of less than 100 µm at least in the partial regions of mutual proximity of the plurality of electrode terminals. (Annex 2) The semiconductor device according to Annex 1 further comprising a base plate bonded to a lower surface of the insulating substrate and a housing attached to a peripheral part of the base plate, wherein other end part areas of the plurality of electrode terminals are integrally formed with the housing. (Annex 3) The semiconductor device according to Annex 1 further comprising a base plate bonded to a lower surface of the insulating substrate, a housing attached to a peripheral sub-area of ​​the base plate, and a sealing material sealing the interior of the housing, wherein the insulating film consists of an insulating coating material bonding the electrode terminals to the mutually adjacent sub-areas of the plurality of electrode terminals and the sealing material via a non-covalent bond. (Annex 4) The semiconductor device according to Annex 3, wherein the insulating film covers the semiconductor element and the end part regions of the electrode terminals with the part regions of mutual proximity of the plurality of electrode terminals. (Annex 5) The semiconductor device according to Annex 1, wherein the insulating substrate comprises a base plate, a resin insulating layer formed on an upper surface of the base plate and the circuit structure formed on an upper surface of the resin insulating layer, and is integrally designed. (Annex 6) The semiconductor device according to any one of Annexes 1 to 5, wherein the semiconductor element consists of a wide bandgap semiconductor containing silicon carbide or gallium nitride. (Annex 7) A method for manufacturing the semiconductor device according to Annex 4, wherein the plurality of electrode terminals comprises a first electrode terminal with mutually adjacent sub-regions and a second electrode terminal, and the semiconductor element comprises a first semiconductor element and a second semiconductor element, the method comprising (a) applying the insulating coating material to the first electrode terminal, wherein one end-part region is bonded to an upper surface of a first sub-region on which the first semiconductor element is mounted in the circuit structure, and another end-part region is bonded to the housing, and the first sub-region of the circuit structure, (b) bonding one end-part region of the second electrode terminal to an upper surface of a second sub-region on which the second semiconductor element is mounted in the circuit structure, and bonding another end-part region to the housing.so that the mutually adjacent sub-area with the first electrode terminal is present, and (c) application of the insulating coating material to the second electrode terminal and the second sub-area of ​​the circuit structure. (Annex 8) A power conversion device comprising: a main conversion circuit containing the semiconductor device according to any one of Annexes 1 to 6 and configured to convert and deliver input power; and a control circuit configured to output a control signal to the main conversion circuit for controlling the main conversion circuit.< / effekt> < / gesamtkonfiguration>

Claims

A method for manufacturing a semiconductor device, wherein the semiconductor device comprises: an insulating substrate (4a, 4b) with a circuit structure (3b) formed on its upper surface; a semiconductor element (5a, 5b) mounted on the upper surface of the circuit structure (3b); a plurality of electrode terminals (6, 7, 8), each having an end portion bonded to the upper surface of the circuit structure (3b); a base plate (1) bonded to a lower surface of the insulating substrate (4a, 4b); a housing (9) attached to a peripheral portion of the base plate (1); and a sealing material (10) sealing the interior of the housing (9), wherein the electrode terminals (6, 7) are connected to mutually adjacent portions of the plurality of electrode terminals (6, 7, 8) at least in those portions by an insulating film (11) having a thickness of less than 100 µm. are coatedthe insulating film (11) consists of an insulating coating material that bonds the electrode terminals (6, 7) to the mutually adjacent regions of the plurality of electrode terminals (6, 7, 8) and the sealing material (10) via a non-covalent bond, and the insulating film (11) covers the semiconductor element (5a, 5b) and the end portions (6a, 7a) of the electrode terminals (6, 7) with the mutually adjacent regions of the plurality of electrode terminals (6, 7, 8), wherein the plurality of electrode terminals (6, 7, 8) comprises a first electrode terminal (6) with the mutually adjacent regions and a second electrode terminal (7), and the semiconductor element (5a, 5b) comprises a first semiconductor element (5a) and a second semiconductor element (5b), wherein the method comprises: (a) applying the insulating coating material to the first electrode terminal (6),wherein an end section (6a) is bonded to an upper surface of a first sub-section, on which the first semiconductor element (5a) is mounted, in the circuit structure (3b), and another end section (6b) is bonded to the housing (9), and the first sub-section of the circuit structure (3b), (b) bonding an end section (7a) of the second electrode terminal (7) to an upper surface of a second sub-section, on which the second semiconductor element (5b) is mounted, in the circuit structure (3b), and bonding another end section (7b) to the housing (9), so that the sub-section is in mutual proximity with the first electrode terminal (6), and (c) applying the insulating coating material to the second electrode terminal (7) and the second sub-section of the circuit structure (3b). Method according to claim 1, wherein the semiconductor element (5a, 5b) consists of a wide bandgap semiconductor containing silicon carbide or gallium nitride.

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