Device and method for limiting an output current using an output voltage control technique
Patent Information
- Application Number
- DE102023123209
- Authority / Receiving Office
- DE · DE
- Patent Type
- Patents
- Current Assignee / Owner
- Priority Date
- 2023-06-12
- Filing Date
- 2023-08-29
- Publication Date
- 2025-03-27
- Estimated Expiration
- 2043-08-29
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Abstract
Description
FIELD OF EXPERTISE
[0001] The present disclosure relates to an apparatus and method for limiting an output current using an output voltage regulation technique, and more particularly to an apparatus and method for limiting an output current using a voltage regulation technique based on a virtual resistance component implemented as software in a power supply system, such as a V2L system. BACKGROUND
[0002] A vehicle-to-load (V2L) system is a system that uses the batteries of electric vehicles to supply power to other devices or loads. For example, it is possible to use electric vehicle batteries to power household appliances or, at an outdoor event, sound systems. Furthermore, electric vehicle batteries can be used as a temporary power source in an emergency situation.
[0003] However, when electronic products that use AC power are connected to a power system, they charge internal capacitors during initial operation or draw more power than the product's rated power. On the power system side, such as V2L, an excessive output current may occur for a brief period of a few seconds and damage the power system. Output current limiting logic must be implemented to prevent potential damage to the power system due to overcurrent.
[0004] Generally, when a problem occurs in the power system, the system is protected by fail-safe logic shutting down the corresponding output. However, since the primary purpose of the power system is to provide stable power similar to the user's given current, it may not be appropriate to shut down the output due to a temporary overload. Therefore, current-limiting logic is required to prevent overcurrent-induced shutdown by fail-safe logic.
[0005] The prior art uses a method of adding a hardware driver logic circuit to control overcurrent occurring in a power system, such as a V2L system. However, using hardware driver logic for overcurrent protection in a power system, such as a V2L system, is fraught with the following problems: 1. Fixed component values: Hardware-based solutions generally use passive components such as resistors, capacitors, or inductors to set current limits and other parameters. Because these components have fixed values, it is difficult to precisely adjust or change the limits without replacing or modifying the components themselves. 2. Sensitivity to component tolerances: The performance of hardware driver logic circuits can be affected by the tolerances of the components used. Variations in component values due to manufacturing tolerances can cause irregularities in system performance, making it difficult to achieve precise control and consistent operation in many devices. 3. Limited adaptability: Hardware-based solutions generally have limited adaptability to changes in system requirements or operating conditions. For example, changing a current limit requires changes to the circuit itself, which can be time-consuming and costly. 4. Forced shutdown of a PWM output: To protect the power system from overcurrent, a PWM output is sometimes forced shutdown, which can result in distortion of the output voltage waveform. Rapid changes in a PWM signal can cause harmonic distortion and degrade the quality of the output voltage, potentially affecting the performance of connected devices. 5. Increased design complexity: Integrating hardware driver logic into the power system may require more complex circuit design and layout, as well as additional components. This can increase the overall size, weight, and cost of the system, while also making it more difficult to achieve optimal performance.
[0006] DE 10 2021 210 896 A1 discloses a device for supplying power from a vehicle battery to the outside. The device includes an inverter circuit with a bridge circuit having multiple switching elements, which converts the received DC power into AC power by switching the switching elements and outputs the AC power. A controller controls the on / off state of each switching element through pulse width modulation. When an AC output current supplied to the load has a value greater than a preset reference value, or when an DC input current fed into the inverter has a value greater than a preset reference value, the controller changes the duty cycle of each switching element to reduce the AC output voltage of the inverter.
[0007] US 2009 / 0 219 049 A1 discloses a method and system for testing and protecting the functionality of an output module. An output channel includes a transistor with a gate, a source, and a drain. The output channel drives a load with a load voltage and a load current depending on a gate drive signal applied to the gate. The system determines a voltage threshold and a current threshold and monotonically varies the gate drive signal from a starting value for a predetermined time interval while monitoring the load current and voltage. To overcome the above problems, a new approach, such as a software-based control algorithm, is required. SUMMARY
[0008] Based on the above, the present disclosure provides an apparatus and method for limiting an output current of a power supply system using an output voltage regulation technique that utilizes a virtual resistance component implemented in software.
[0009] Another object of the present disclosure is to provide an apparatus and method for realizing the prior art driver logic implemented in hardware as software.
[0010] However, the technical problem to be addressed by the present embodiment is not limited to the technical problem described above, and there may be other technical problems.
[0011] The present disclosure provides a method for limiting an output current in a power system, comprising: calculating, by a virtual resistance calculating calculator, a virtual resistance value when an output current measurement exceeds a predetermined current limit; calculating a signal input to a regulator based on the calculated virtual resistance value; and generating, by the regulator, a signal for regulating an output voltage based on the signal input to the regulator.
[0012] The specified current limit may be a maximum current value provided in a power system.
[0013] Calculating the virtual resistance value may include: calculating a predicted load resistance value from an output voltage measurement value and the output current measurement value; comparing the calculated predicted load resistance value with a load resistance value at a maximum load; and calculating the virtual resistance value from the load resistance value at the maximum load and the calculated predicted load resistance value if the load resistance value at the maximum load is greater than the calculated predicted load resistance value, wherein if the load resistance value at the maximum load is less than the calculated predicted load resistance value, the virtual resistance value cannot be calculated or is the same value as the calculated predicted load resistance value.
[0014] Calculating the signal input to the controller may include: calculating a voltage drop in a virtual resistor from the measured output current value, the current limit value, and the virtual resistor value; calculating a second output voltage setpoint from the calculated voltage drop in the virtual resistor and an output voltage setpoint; and calculating an error value from the second output voltage setpoint and the measured output voltage and inputting the error value to the controller.
[0015] The controller can be a proportional resonant (PR) controller, which is defined by equation 1 below: PR=KP+KiωcSS2+2ωcS+ωZ2 where K p is a proportional gain, K i is a resonance gain, ω c one
[0016] Cut-off frequency is and ω z is a resonance frequency.
[0017] When generating the signal to regulate the output voltage, the signal can be generated by adjusting a pulse width modulation (PWM) duty cycle output by the controller.
[0018] The maximum load can be a maximum load for a maximum available power of a power system.
[0019] The present disclosure provides an output voltage regulator comprising: a virtual resistance calculator configured to calculate a virtual resistance from an output voltage measurement and the output current measurement when an output current measurement exceeds a predetermined current limit; a signal subtractor configured to generate a subtraction signal based on the calculated virtual resistance value and an output voltage setpoint; and a regulator configured to generate a signal for regulating an output voltage based on the subtraction signal generated by the signal subtractor.
[0020] The specified current limit may be a maximum current value provided in a power system.
[0021] The virtual resistance calculator can calculate a predicted load resistance value from the output voltage measurement value and the output current measurement value and compare the calculated predicted load resistance value with a load resistance value at a maximum load. If the load resistance value at the maximum load is greater than the calculated predicted load resistance value, the virtual resistance calculator can calculate the virtual resistance value from the load resistance value at the maximum load and the predicted load resistance value. If the load resistance value at the maximum load is less than the calculated predicted load resistance value, the virtual resistance value may not be calculated or may be the same value as the calculated predicted load resistance value.
[0022] The output voltage regulator may calculate a voltage drop in a virtual resistor from the output current measurement, the current limit, and the virtual resistance value, and the signal subtractor may comprise: a first signal subtractor configured to generate a second output voltage setpoint from the calculated voltage drop in the virtual resistor and the output voltage setpoint; and a second signal subtractor configured to generate an error value from the second output voltage setpoint and the output voltage measurement.
[0023] The controller can be a proportional resonant (PR) controller, which is defined by equation 1 below: PR=KP+KiωcSS2+2ωcS+ωZ2 where K p is a proportional gain, K i is a resonance gain, ω c is a cut-off frequency and ω zis a resonance frequency.
[0024] The controller can control the output voltage by setting a pulse width modulation (PWM) duty cycle.
[0025] The maximum load can be a maximum load for a maximum available power of a power system.
[0026] The present disclosure provides a method for limiting an output current in a power system, comprising: calculating, by a virtual resistance calculator, a virtual resistance value when an output current measurement exceeds a predetermined current limit; calculating a signal input to a regulator based on the calculated virtual resistance value; disabling pulse width modulation (PWM) trigger logic when the output current measurement exceeds the current limit and enabling the PWM trigger logic when the output current measurement does not exceed the current limit; controlling a signal output from a gate driver based on a signal generated by the regulator and a signal generated by the PWM trigger logic;and regulating a current transmitted to a load by controlling a switching unit based on the signal output from the gate driver.;
[0027] The specified current limit may be a maximum current value provided in a power system.
[0028] Calculating the virtual resistance value may include: calculating a predicted load resistance value from an output voltage measurement value and the output current measurement value; comparing the calculated predicted load resistance value with a load resistance value at a maximum load; and calculating the virtual resistance value from the load resistance value at the maximum load and the calculated predicted load resistance value if the load resistance value at the maximum load is greater than the calculated predicted load resistance value, wherein if the load resistance value at the maximum load is less than the calculated predicted load resistance value, the virtual resistance value is the same value as the calculated predicted load resistance value.
[0029] Calculating the signal input to the controller may include: calculating a voltage drop in a virtual resistor from the measured output current value, the current limit value, and the virtual resistor value; calculating a second output voltage setpoint from the calculated voltage drop in the virtual resistor and an output voltage setpoint; and calculating an error value from the second output voltage setpoint and the measured output voltage and inputting the error value to the controller.
[0030] The maximum load can be a maximum load for a maximum available power of a power system.
[0031] The signal output from the gate driver may include a pulse width modulation (PWM) signal for controlling a U-phase output and a PWM signal for controlling a V-phase output.
[0032] The present disclosure provides an apparatus for limiting an output current in a power system, comprising: an output voltage regulator having a virtual resistance calculating calculator configured to calculate a virtual resistance based on an output voltage measurement and an output current measurement, a signal subtractor configured to generate a subtraction signal based on the virtual resistance value and an output voltage setpoint, and a regulator configured to generate a signal for regulating an output voltage based on the subtraction signal generated by the signal subtractor;and pulse width modulation (PWM) trigger logic configured to control a gate driver in conjunction with a signal from the output voltage regulator, wherein the PWM trigger logic is deactivated when the output current measurement exceeds the current limit and activated when the output current measurement does not exceed the current limit, a signal output from a gate driver is controlled based on a signal generated by the regulator and a signal generated by the PWM trigger logic, and a current transmitted to a load is regulated by controlling a switching unit based on the signal output from the gate driver.;
[0033] The specified current limit may be the maximum current that can be provided by the power system.
[0034] The virtual resistance calculator can calculate a predicted load resistance value from an output voltage measurement and the output current measurement, compare the calculated predicted load resistance value with a load resistance value at a maximum load, and calculate the virtual resistance value from the load resistance value at the maximum load and the calculated predicted load resistance value when the load resistance value at the maximum load is greater than the calculated predicted load resistance value, wherein if the load resistance value at the maximum load is less than the calculated predicted load resistance value, the virtual resistance value cannot be calculated or may be the same value as the calculated predicted load resistance value.
[0035] The output voltage regulator may calculate a voltage drop in a virtual resistor from the output current measurement, the current limit, and the virtual resistance value, and the signal subtractor may comprise: a first signal subtractor configured to generate a second output voltage setpoint from the calculated voltage drop in the virtual resistor and the output voltage setpoint; and a second signal subtractor configured to generate an error value from the second output voltage setpoint and the output voltage measurement.
[0036] The maximum load can be a maximum load for a maximum available power of a power system.
[0037] The signal output from the gate driver may include a pulse width modulation (PWM) signal for controlling a U-phase output and a PWM signal for controlling a V-phase output.
[0038] A computer-readable storage medium according to another embodiment of the present disclosure stores instructions for performing the methods associated with the above-described embodiment when executed by a computing system having at least one processor and a memory.
[0039] According to the present disclosure, since no complicated hardware logic circuit is required to limit an output current, the manufacturing cost can be reduced by reducing the number of components.
[0040] According to the present disclosure, it is also possible to actively limit a voltage according to a magnitude of an output current.
[0041] Furthermore, according to the present disclosure, it is possible to reduce logic errors occurring in hardware logic by implementing hardware gate driver logic in software.
[0042] Furthermore, according to the present disclosure, a current limiting amount can be set by software without changing values of components. BRIEF DESCRIPTION OF THE DRAWINGS Fig. 1 is a diagram illustrating a configuration of a power supply system having an output voltage regulator according to an embodiment of the present disclosure. Fig. 2 is a flowchart illustrating a method for calculating a virtual resistance component according to an embodiment of the present disclosure. Fig. 3 is a graph illustrating a simulation of output voltage regulation considering a virtual resistance component according to an embodiment of the present disclosure. Fig. 4 is a graph illustrating a decrease in output voltage according to starting a chain saw according to an embodiment of the present disclosure. Fig. 5 is a flowchart illustrating an operating process of software PWM triggering logic according to another embodiment of the present disclosure. Fig. 6 is a graph illustrating (a) an AC output voltage and (b) an AC output current according to an embodiment of the present disclosure. Fig. 7 is a flowchart illustrating a method for regulating an output voltage in an output voltage regulator according to an embodiment of the present disclosure. Fig. 8 is a flowchart illustrating a method for limiting an output current in a power system according to an embodiment of the present disclosure. DETAILED DESCRIPTION
[0043] Embodiments will be described in detail below with reference to the accompanying tables and drawings so that they can be easily practiced by those skilled in the art to which the present disclosure belongs. Since the inventive concept is susceptible to various modifications and numerous embodiments, specific embodiments are illustrated in the drawings and described in detail in the written description. However, this is not intended to limit the inventive concept to specific modes of practical implementation, and it is to be understood that all changes, equivalents, and substitutions that do not depart from the scope of the inventive concept are included within the inventive concept.
[0044] In the drawings, parts irrelevant to the description are omitted to clearly describe the present disclosure, and like reference numerals denote like elements throughout the description. In the description of the drawings, elements with the same name may have different reference numerals depending on the drawings. The reference numerals are provided for convenience of description only, and no concept, feature, function, or effect of each element will be construed as limiting based on its reference numeral.
[0045] When describing each drawing, like reference numerals are used for like elements. Terms such as "first," "second," and the like may be used to describe different components, and the components should not be limited by the terms. The terms are used only to distinguish one component from another. For example, a first component may be referred to as a second component, and similarly, the second component may be referred to as the first component, without departing from the scope of the present disclosure. A term "and / or" encompasses a combination of a plurality of related disclosed elements or any element of the plurality of related disclosed elements.
[0046] Unless otherwise defined, all terms used herein, including technological or scientific terms, have the same meanings as commonly understood by one of ordinary skill in the art.
[0047] Terms defined in a common dictionary shall be construed to have meanings consistent with those in the context of a related art and shall not be construed to have ideal or overly formal meanings unless clearly defined in the present application.
[0048] Throughout this specification, when a part is described as being "connected" to another part, it may not only be "directly connected" to the other part, but may also be "electrically connected" to the other part through an intervening element. When a particular part is described as "comprising" a particular component, this does not exclude other components unless otherwise described, and other components may be included. It is understood that "comprising" does not preclude the presence or addition of one or more other features, steps, numbers, acts, components, parts, and combinations thereof.
[0049] As used herein, the term "unit" or "module" includes a unit implemented by hardware or software, and a unit implemented by both hardware and software. A unit may be implemented using two or more hardware elements, and two or more units may be implemented by a single hardware element.
[0050] Hereinafter, an apparatus and method for estimating the output current of a low-voltage DC-DC converter according to the present disclosure will be described in detail with reference to the accompanying drawings.
[0051] Fig. 1 is a diagram illustrating a configuration of a power supply system 100 with an output voltage regulator according to an embodiment of the present disclosure.
[0052] Referring to Fig. 1, the power supply system 100 for regulating an output voltage may comprise: a battery 110, an inductor-inductor-capacitor (LLC) converter 120, a switching unit 130, a sensor 140, a gate driver 150, an output voltage regulator 160, basic software (BSW) 170, pulse width modulation (PWM) trigger logic 180, a load 190, an inductor 101, a capacitor 102, a resistor 103, a regulator 161, a virtual resistor calculation calculator 162, a first signal subtractor 163, a second signal subtractor 164, and a limiter 165. In addition, general-purpose components other than those described in Fig. 1, may be included in the system 100.
[0053] The battery 110 may, for example, be a fuel cell stack, which is a group of interconnected individual fuel cells. Each individual fuel cell generates a small amount of electricity, but because the individual fuel cells are connected together in a stack to power an electric vehicle, sufficient electricity can be generated. The battery 110 of Fig. 1 may, for example, be a high-voltage battery for an electric vehicle and may have a form of a fuel cell stack, but examples of the battery are not limited thereto.
[0054] The LLC converter 120 is a type of switching power supply that uses a resonant circuit to reduce switching losses and increase efficiency. "LLC" represents a resonant circuit configuration with two inductors L and one capacitor C. The LLC converter 120 operates by changing a frequency to control the transfer of power from the input to the output. At a resonant frequency of the LLC converter 120, the reactive elements (the inductors and the capacitor) can essentially cancel each other out, allowing power to be transferred from a primary side to a secondary side with virtually no loss.Frequency modulation, combined with ZVS (zero voltage switching) or ZCS (zero current switching) characteristics of the LLC converter 120, significantly reduces switching losses and electromagnetic interference (EMI), making it very efficient, especially at higher power levels.
[0055] The switching unit 130 can, for example, comprise a full-bridge switch with four MOSFET switches. An output of the switching unit 130 is connected to the load 190, the inductor 101 is connected in series between the output of the switching unit and the load, and the capacitor 102 and the resistor 103 are connected in parallel. An output voltage Vo_sen at the load 190 can be measured at both ends where the capacitor 102 and the resistor 103 are connected.
[0056] The four MOSFET switches included in the switching unit 130 can be controlled by a PWM signal PWM_U_out for regulating a U-phase output and a PWM signal PWM_V_out regulating a V-phase output, and these signals are transmitted by the gate driver 150.
[0057] The sensor 140 can measure an input voltage Vin_sen fed into both ends of the switching unit 130 and an output voltage Vo_sen at both ends of the load, and measure an output current Io_sen fed into the load. The output voltage Vo_sen and the output current Io_sen measured by the sensor 140 can be input signals of the virtual resistance calculation computer 162. The Fig. The sensor shown in Fig. 1 illustrates an embodiment for measuring voltage or current, and the number of sensors and a measurement object can be changed by those skilled in the art as needed.
[0058] The gate driver 150 serves as an interface between a control signal and the switching unit 130 (e.g., a full-bridge switch).
[0059] The following describes the operation of the output voltage regulator 160 of Fig. 1. The output voltage regulator 160 may include the regulator 161, the virtual resistance calculator 162, the first signal subtractor 163, the second signal subtractor 164, and the limiter 165, and may also include additional components.
[0060] Referring to the operation of the output voltage regulator 160 of Fig. 1, the output voltage Vo_sen and the output current Io_sen measured by the sensor 140 are input to the virtual resistance calculation calculator 162. The virtual resistance calculation calculator 162 calculates virtual resistance components and outputs a virtual resistance. A method for calculating the virtual resistance by the virtual resistance calculation calculator will be described with reference to Fig. 2, which is described below, is described in detail.
[0061] Based on the output current Io_sen and the current limit Io_limit measured by sensor 140, a voltage drop VR for the virtual resistance component can be calculated using Equation 1 below. The voltage drop can indicate the amount by which the output voltage must be regulated so that the system continues to operate within safe limits. The current limit is a maximum current value that can be provided by the power system. (Equation 1) vR=(io_sen−io_limit)EstVirtual_R where Io_sen is the output current value measured by the sensor, Io_limit is the current limit value and EstVirtual_R is the calculated virtual resistance value.
[0062] A voltage target Vo_cmp, which includes the voltage drop component calculated from equation 1 and the virtual resistance component from the target V o_Refof the voltage regulator is calculated using equation 2 below. Vo_cmp=Vo_ref−vR=Vo_ref−(io−io_limit)EstVirtual_R Vo_cmp, calculated using Equation 2, is calculated using a measured value of the output voltage to generate an error value, and the generated error value is input to controller 161. Controller 161 can then regulate the output voltage Vo_sen by controlling a PWM duty cycle. Using this method, the virtual resistance component can be used to regulate the output voltage and ultimately, due to the decrease in the output voltage, the output current can also be regulated down.
[0063] The controller 161, which is located in the Fig. The output voltage regulator 160 shown in Figure 1 may be a proportional resonant (PR) regulator. The proportional resonant regulator is a control algorithm used in a variety of applications, including electric vehicles (EVs). In this description, a proportional resonant (PR) regulator defined by Equation 3 below may be used. PR=Kp+KiωcSs2+2ωcS+ωz2 where K p is a proportional gain, K i is a resonance gain, ω c is a cut-off frequency and ω z is a resonance frequency.
[0064] The proportional resonance controller defined by Equation 3 and presented as an example in this specification exhibits excellent control performance for a specific frequency component and has characteristics suitable for the purpose of voltage control for the same frequency component as that of the mains current.
[0065] The output voltage regulator 160, the basic software (BSW) 170, and the PWM trigger logic 180 are organically coupled for their operation. That is, the PWM trigger logic 180 disables the PWM trigger logic when the output current measurement value Io_sen exceeds the current limit Io_limit and enables the PWM trigger logic when the output current measurement value does not exceed the current limit Io_limit. A current from the gate driver 150 can be regulated based on a signal generated by the output voltage regulator 160 and a signal generated by the PWM trigger logic 180.
[0066] Fig. 2 is a flowchart illustrating a method for calculating a virtual resistance component according to an embodiment of the present disclosure.
[0067] Referring to Fig. 2, first, in operation S210, a prospective load resistance value is calculated from an output voltage measurement value measured by a sensor and a current measurement value measured by the sensor.
[0068] Next, in operation S220, an estimated load resistance and a maximum load resistance are compared to determine whether the estimated resistance is greater than the maximum load resistance. The maximum load resistance may be a load resistance value for the maximum power that can be delivered by the power system, but it may also be changed to an acceptable value by the person skilled in the art, depending on the design.
[0069] If the resistance value of the maximum load resistance is greater than the expected load resistance, a virtual resistance component is calculated. This means that a virtual resistance value, which is a virtual resistance component, is calculated by obtaining the difference between the expected load resistance value and the maximum load resistance value. If the resistance value of the maximum load resistance is not greater than the expected load resistance, the system operates within a stable range, and thus the virtual resistance component is not calculated.
[0070] Using the virtual resistance value calculated in this way, a voltage target Vo_cmp that takes the virtual resistance component into account is obtained using Equations 1 and 2 described above. The voltage target is generally a guideline in the system for a desired output voltage level. The calculated voltage target Vo_cmp is calculated with the measured output voltage to generate an error value. This error value usually represents a deviation between the desired output voltage and the actual output voltage. Finally, the generated error value is input to the regulator 161 so that the regulator 161 can regulate the output voltage. The use of virtual resistance allows for more precise and sensitive control of the output voltage, thus improving the overall performance and reliability of the power system.
[0071] Fig. 3 is a graph illustrating a simulation of output voltage regulation considering a virtual resistance component according to an embodiment of the present disclosure.
[0072] In Fig. Figure 3 shows that an AC output current exceeds an output current limit within 0.1 seconds, which is the time when a 10 kW load is applied. Since an AC output voltage and a target are changed at this time, an output voltage is limited. That is, section A (approximately 0.1 seconds to 0.12 seconds), indicated first by the dashed line starting from 0.1 seconds, is a section where a virtual resistance value is estimated because the AC output current exceeds the output current limit. In this section, it can be seen that the output voltage is reduced due to a voltage drop caused by a virtual resistance.
[0073] Section B (approximately 0.12 seconds to 0.3 seconds) represents the final estimation of the virtual resistance component. This means that since the voltage drop across the virtual resistance is constant, the output voltage can also be controlled to a specific value.
[0074] Section C (after approximately 0.3 seconds) represents a section in which the load is removed and the output voltage is restored. In this section, the virtual resistance component is removed to return the output voltage to its original state. This means that the system stabilizes and the AC voltage / current output returns to its original state. This means that the output voltage and current return to their previous levels before the 10 kW load was applied.
[0075] Fig. 4 is a graph illustrating a decrease in output voltage according to starting a chain saw according to an embodiment of the present disclosure.
[0076] In Fig. In Figure 4, the radius of -1 s is enlarged and shown. After a load is connected, the current exceeds a lower limit (-53.1 A) of the current limit at -1.000037 s, and the voltage decreases at this time.
[0077] Fig. 5 is a flowchart illustrating operation of software PWM triggering logic of the present disclosure.
[0078] Referring to Fig. 5, in operation S510, it is determined whether an output current measured by the sensor is greater than a trigger current level. If it is determined that the output current is greater than the trigger current level, the PWM is disabled in operation S520. Then, a "PWM Low" output of the inverter is maintained. Furthermore, a switch of the inverter is kept in an OFF state. This means that a duty cycle of the PWM signal has decreased. As a result, an output voltage is reduced, and therefore, the current is also reduced.
[0079] Subsequently, if it is determined in operation S530 that the output current is not greater than the trigger current level, the PWM trigger logic is re-enabled in operation S540. Then, the inverter's PWM maintains normal output. That is, the duty cycle of the PWM signal returns to a normal value. As a result, the output voltage and current return to normal levels.
[0080] Fig. 6 is a graph illustrating (a) an AC output voltage and (b) an AC output current according to an embodiment of the present disclosure.
[0081] Referring to Fig. 6, it can be seen that an AC output voltage of a constant value is provided, and then the magnitude of the output voltage decreases from a time within 80 ms of the output voltage exceeding a current limit. That is, when the output current is greater than the current limit, the PWM trigger logic is activated, the inverter switch is held in an OFF state, and the inverter PWM maintains a "low" output.
[0082] Specifically, if the output AC current does not exceed the output limit, the AC voltage is output as a constant value. This is generally a desirable behavior for inverters because a constant voltage should be provided regardless of the load being powered.
[0083] However, at approximately 80 ms—the moment the load is connected—the current begins to exceed a preset limit. When the current limit is exceeded, the PWM trigger logic is activated to reduce the output voltage. At this point, the inverter switch is in the OFF state, and the inverter PWM maintains a "low" output. This means that the duty cycle of the PWM signal is reduced, so the output voltage and current decrease. This is a protective measure to prevent overcurrent from being applied to the system.
[0084] Fig. 7 is a flowchart illustrating a method of regulating an output voltage by an output voltage regulator according to an embodiment of the present disclosure.
[0085] First, if a measured output current exceeds a preset current limit, a virtual resistance value is calculated by a virtual resistance calculation calculator in operation S710. The preset current limit is the maximum current that can be supplied by the power system.
[0086] As an example, the virtual resistance calculation operation S710 may include calculating a predicted load resistance value from an output voltage measurement and an output current measurement, comparing the calculated predicted load resistance value with a load resistance value at the maximum load, and calculating a virtual resistance value from the load resistance value at the maximum load and the calculated predicted load resistance value if the load resistance value at the maximum load is greater than the calculated predicted load resistance value. If the load resistance value at the maximum load is less than the calculated predicted load resistance value, the virtual resistance value may not be calculated or may have the same value as the calculated predicted load resistance value.
[0087] Next, a signal input to the controller is calculated based on the virtual resistance value calculated in operation S720.
[0088] As an example, the process of calculating a signal input to the controller (S720) may include calculating a voltage drop in a virtual resistor from the output current measurement, the current limit, and the virtual resistance value, calculating a second output voltage setpoint from the calculated voltage drop of the virtual resistor and the output voltage setpoint, and calculating an error value from the second output voltage setpoint and the output voltage measurement and inputting the error value to the controller.
[0089] Next, in operation S730, the controller generates a signal to regulate the output voltage based on the signal input to the controller. As an example, generating the signal to regulate the output voltage can be performed by adjusting a PWM duty cycle output by the controller.
[0090] It should be noted that the sequence of operations in Fig. 7 can be changed and a chronological sequence can be changed according to the requirements of the execution by the specialist.
[0091] Fig. 8 is a flowchart illustrating a method for limiting an output current in a power system according to an embodiment of the present disclosure.
[0092] First, in operation S820, when an output current measurement exceeds a preset current limit, the virtual resistance calculator calculates a virtual resistance value. The preset current limit is a maximum current value that can be supplied in the power system.
[0093] As an example, the process of calculating the virtual resistance value (S810) may include calculating a predicted load resistance value from the output voltage value and the output current measurement value, comparing the calculated predicted load resistance value with a load resistance value at a maximum load, and calculating a virtual resistance value from the load resistance value at the maximum load and the calculated predicted load resistance value if the load resistance value at the maximum load (e.g., a maximum load for the maximum available power in the power system) is greater than the calculated predicted load resistance value. If the output current measurement value does not exceed the current limit, the virtual resistance calculation calculator may not calculate the virtual resistance value or may use the same value as the calculated predicted load resistance value.
[0094] Next, in operation S830, a signal input to the controller is calculated based on the virtual resistance value.
[0095] As an example, operation S830 of calculating the signal input to the controller may include: calculating a virtual resistance voltage drop from the output current measurement, the current limit, and the virtual resistance value, calculating an updated output voltage command value considering a virtual resistance component from the calculated virtual resistance voltage drop and an output voltage command value, calculating an error value from the updated output voltage command value and an output voltage, and inputting the calculated error value to the controller.
[0096] Next, in operation S840, if the output current measurement value exceeds the preset current limit, the PWM trigger logic is disabled, and if the output current measurement value does not exceed the current limit, the PWM trigger logic is enabled.
[0097] Next, in operation S850, a signal output from the gate driver is controlled based on the signal generated by the regulator and the signal generated by the PWM trigger logic. The signal output from the gate driver may include a PWM signal for controlling a U-phase output and a PWM signal for controlling a V-phase output.
[0098] Next, in operation S860, a current transmitted to the load is regulated by controlling the switching unit based on the signal output from the gate driver.
[0099] It should be noted that it is possible to change the chronological sequence of each process from Fig. 8 according to the requirements of the design by the person skilled in the art.
[0100] The Fig.The embodiments described in Figures 1 to 8 may be stored in a computer-readable storage medium and executed by a computing system that includes at least a processor and a memory. Examples of a computer-readable medium include a magnetic medium, such as hard disks, floppy disks, and magnetic tape; an optical medium, such as CD-ROMs and DVDs; a magneto-optical medium, such as optical disks; and hardware devices specifically configured to store and execute program instructions, such as read-only memory (ROM), random access memory (RAM), flash memory, and the like. Examples of program instructions include both machine language, such as that generated by a compiler, and high-level language that can be executed by the computer using an interpreter or the like. [Detailed description of the main elements] 100 power supply system 101 Inductance 102 Capacitor 103 Resistance 110 Battery 120 LLC converters 130 switching unit 140 sensors 150 gate drivers 160 output voltage regulators 161 controllers 162 virtual resistor calculating computers 163 first signal subtractor 164 second signal subtractor 165 limiters 170 BSW 180 PWM trigger logic 190 load
Claims
[1] Output voltage regulator (160), comprising: a virtual resistance calculating computer (162) configured to calculate a virtual resistance from an output voltage measured value and the output current measured value when an output current measured value exceeds a predetermined current limit; a signal subtractor (163, 164) configured to generate a subtraction signal based on the calculated virtual resistance value and an output voltage setpoint; and a regulator (161) configured to generate a signal for regulating an output voltage based on the subtraction signal generated by the signal subtractor (163, 164). [2] Output voltage regulator (160) according to claim 1, wherein the virtual resistance calculating computer (162) calculates a prospective load resistance value from the output voltage measurement value and the output current measurement value and compares the calculated prospective load resistance value with a load resistance value at a maximum load and if the load resistance value at the maximum load is greater than the calculated expected load resistance value, the virtual resistance calculating computer (162) calculates the virtual resistance value from the load resistance value at the maximum load and the expected load resistance value, and if the load resistance value at the maximum load is less than the calculated expected load resistance value, the virtual resistance value is the same value as the calculated expected load resistance value. [3] Output voltage regulator (160) according to one of the preceding claims, wherein the output voltage regulator (160) calculates a voltage drop in a virtual resistor from the output current measured value, the current limit value and the virtual resistance value and the signal subtractor (163, 164) comprises: a first signal subtractor (163) configured to generate a second output voltage setpoint from the calculated voltage drop in the virtual resistor and the output voltage setpoint; and a second signal subtractor (164) configured to generate an error value from the second output voltage setpoint and the output voltage measured value. [4] Output voltage regulator (160) according to one of the preceding claims, wherein the controller (160) is a proportional resonant (PR) controller defined by equation 1 below: PR=KP+KiωcSS2+2ωcS+ωZ2 where K p is a proportional gain, Ki is a resonance gain, ω c is a cut-off frequency and ω z is a resonance frequency. [5] Output voltage regulator (160) according to one of the preceding claims, wherein the controller (160) controls the output voltage by setting a pulse width modulation (PWM) duty cycle. [6] A method for limiting an output current in a power system (100), the method comprising: Calculating, by a virtual resistance calculator, a virtual resistance value when an output current measurement exceeds a specified current limit; Calculating a signal input to a controller (161) based on the calculated virtual resistance value; Disabling a pulse width modulation (PWM) trigger logic 180 when the output current measurement exceeds the current limit and enabling the PWM trigger logic (180) when the output current measurement does not exceed the current limit; Controlling a signal output from a gate driver (150) based on a signal generated by the controller (161) and a signal generated by the PWM trigger logic (180); and Regulating a current transmitted to a load by controlling a switching unit (130) based on the signal output from the gate driver (150). [7] Method according to claim 6, wherein Calculating the virtual resistance value includes: Calculating a prospective load resistance value from an output voltage measurement and the output current measurement; Comparing the calculated expected load resistance value with a load resistance value at a maximum load; and Calculating the virtual resistance value from the load resistance value at the maximum load and the calculated expected load resistance value if the load resistance value at the maximum load is greater than the calculated expected load resistance value, where, if the load resistance value at the maximum load is less than the calculated expected load resistance value, the virtual resistance value is the same value as the calculated expected load resistance value. [8] Method according to claim 6 or 7, wherein calculating the signal input to the controller (161) comprises: Calculating a voltage drop in a virtual resistor from the measured output current value, the current limit value and the virtual resistor value; Calculating a second output voltage setpoint from the calculated voltage drop in the virtual resistor and an output voltage setpoint; and Calculating an error value from the second output voltage setpoint and the measured output voltage and entering the error value into the controller (161). [9] The method of any one of claims 6 to 8, wherein the signal output from the gate driver (150) comprises a pulse width modulation (PWM) signal for controlling a U-phase output and a PWM signal for controlling a V-phase output. [10] A device for limiting an output current in a power supply system (100), the device comprising: an output voltage regulator (160) comprising: a virtual resistance calculator (162) configured to calculate a virtual resistance based on an output voltage measurement and an output current measurement; a signal subtractor (163, 164) configured to generate a subtraction signal based on the virtual resistance value and an output voltage setpoint; and a regulator (161) configured to generate a signal for regulating an output voltage based on the subtraction signal generated by the signal subtractor (163, 164); and a pulse width modulation (PWM) trigger logic configured to control a gate driver (150) in conjunction with a signal from the output voltage regulator (160), wherein the PWM trigger logic (180) is deactivated when the output current measurement value exceeds the current limit and is activated when the output current measurement value does not exceed the current limit, a signal output from a gate driver (150) is controlled based on a signal generated by the controller (161) and a signal generated by the PWM trigger logic (180), and a current transmitted to a load is regulated by controlling a switching unit (130) based on the signal output from the gate driver (150). [11] Device according to claim 10, wherein the virtual resistance calculating computer (162) calculates a prospective load resistance value from an output voltage measurement value and the output current measurement value, compares the calculated prospective load resistance value with a load resistance value at a maximum load, and calculates the virtual resistance value from the load resistance value at the maximum load and the calculated prospective load resistance value if the load resistance value at the maximum load is greater than the calculated prospective load resistance value, where, if the load resistance value at the maximum load is less than the calculated expected load resistance value, the virtual resistance value is the same value as the calculated expected load resistance value. [12] Device according to claim 10 or 11, wherein the output voltage regulator (160) calculates a voltage drop in a virtual resistor from the output current measured value, the current limit value and the virtual resistance value and the signal subtractor (163, 164) comprises: a first signal subtractor (163) configured to generate a second output voltage setpoint from the calculated voltage drop in the virtual resistor and the output voltage setpoint; and a second signal subtractor (164) configured to generate an error value from the second output voltage setpoint and the output voltage measured value. [13] The apparatus of any one of claims 10 to 12, wherein the maximum load is a maximum load for a maximum available power of a power supply system (100). [14] The device according to any one of claims 10 to 13, wherein the signal output from the gate driver comprises a pulse width modulation (PWM) signal for controlling a U-phase output and a PWM signal for controlling a V-phase output. [15] A computer-readable storage medium storing instructions for performing the method of any one of claims 6 to 9 when executed by a computing system comprising at least one of a processor and a memory.
Citation Information
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