Diagnosis for the detection of defective semiconductor switches for the excitation current position in a separately excited synchronous machine

DE102023133974B4Active Publication Date: 2025-09-11AUDI AG +1
View PDF 2 Cites 0 Cited by

Patent Information

Application Number
DE102023133974
Authority / Receiving Office
DE · DE
Patent Type
Patents
Current Assignee / Owner
Filing Date
2023-12-05
Publication Date
2025-09-11
Estimated Expiration
2043-12-05

Smart Images

  • Figure 00000000_0000_ABST
    Figure 00000000_0000_ABST
Patent Text Reader

Abstract

The invention relates to a method for detecting a single permanently conductive defective semiconductor switch (210, 340) of a semi-controlled H-bridge circuit (100) for setting an excitation current of a separately excited synchronous machine, wherein a total current measuring device (180) is connected to the H-bridge circuit (100), which total current measuring device (180) measures the total current I flowing through the H-bridge circuit (100). DC measures; wherein the half-controlled H-bridge circuit (100) is coupled to a control device (1200) which generates two equal-frequency, half-period phase-shifted pulse-width-modulated control signals (611, 621) for controlling the semiconductor switches (210, 340), the method comprising the steps of: a) changing the control signal pattern so that for at least a limited test period, a test switching state is created in which one of the semiconductor switches T1 (210) and another of the semiconductor switches T4 (340) are open at the same time, b) measuring a test current flowing through the half-controlled H-bridge circuit (100) during the test period, c) Evaluate whether the test current measured during at least one test period is negative, d) generating and outputting an error signal if the evaluation has shown that the test current measured during at least one test period is not negative. The invention further relates to a control device and a computer program product which implement the described method.
Need to check novelty before this filing date? Find Prior Art

Description

[0001] The invention relates to a method for detecting a single permanently conductive, defective semiconductor switch in a semi-controlled H-bridge circuit for setting an excitation current of a separately excited synchronous machine. Furthermore, the invention relates to a control device with a detection device for detecting a single permanently conductive, defective semiconductor switch in such a semi-controlled H-bridge circuit for setting an excitation current.

[0002] A semi-controlled H-bridge circuit, also called a semi-controlled H-bridge, is often used as a control circuit for generating an excitation current of a separately excited synchronous machine. Fig. 1 schematically illustrates such a circuit. The circuit 100 comprises a bridge branch 200 and another bridge branch 300. One bridge branch 200 comprises a semiconductor switch 210, also referred to by the abbreviation T1. Connected in series with the semiconductor switch 210 is a reverse-biased diode 230, also referred to as D3. The further bridge branch 300 comprises a further diode 320 arranged in the reverse direction, also referred to as D2. Arranged in series with the further diode in the further bridge branch 300 is another semiconductor switch 340, also referred to as T4.

[0003] A load branch 400 is formed between a connection point 250 of one bridge branch 200 between one semiconductor switch 210 and one diode 230 and a further connection point 350 of the further bridge branch 300 between the further diode 320 and the further semiconductor switch 340. The load branch 400 comprises an excitation winding 460, for which an ohmic winding resistance 465 and a winding inductance 467 are shown as an equivalent circuit. Furthermore, a current measuring device 480 is formed in series with the excitation winding 460 in the load branch 400. The current measuring device 480 is designed to measure the excitation current I exc to measure. Across the excitation winding 460, an excitation voltage U exc The bridge branch 200 and the further bridge branch 300 are connected to one end 201, 301 with a positive pole 51 of a supply voltage U DCand connected to the opposite end 202, 302 with a negative terminal 52 of the supply voltage. A DC link capacitor 500 is arranged in parallel with the bridge arm 200. The supply voltage U is applied to this capacitor. DC In addition, a total current measuring device 180 is formed, which measures the total current I flowing through the half-controlled bridge circuit 100 DC A voltage measuring device 190 can be arranged in parallel with the intermediate circuit capacitor 500, which measures the supply voltage U DC measures.

[0004] To obtain an excitation current I excIn accordance with a request, for example, from a driver in a vehicle powered by a separately excited synchronous machine, the semiconductor switches T1, T4; 210, 340 are each controlled with a pulse-width modulated control signal. When reference is made below to the semiconductor switches, this refers to one semiconductor switch 210, T1 and another semiconductor switch 340, T4. When reference is made to one of the semiconductor switches, this can be either one semiconductor switch 210, T1 or another semiconductor switch 340, T4.

[0005] The control signals 611, 621 are square waves with the same frequency, but shifted by half a period T PWM are offset from each other (see Fig. 2). A current flows through the semi-controlled semiconductor bridge when both one of the semiconductor switches 210, T1 and, at the same time, the other of the semiconductor switches 340, T4, are conductive.

[0006] The control signals 611, 621 each have the same duty cycle, which is 50% or greater. The duty cycle is the time ratio of the control signal at a level 612, 622, which switches the corresponding semiconductor switch 210, 340 controlled thereby into a conducting state, to the total duration of the period T PWM of the signal. The larger the pulse width 615, 625 of the control signals, the longer the periods during which current can be fed into the excitation winding 460.

[0007] In Fig. 2, five graphs 610-650 are shown schematically one below the other, each plotted against time 601 in units of period T PWMof the pulse-width-modulated signal. The upper two graphs 610, 620 indicate the pulse-width-modulated control signals 611 and 621 for controlling one of the semiconductors 210, T1 and another of the semiconductors 340, T4, respectively. A level 612, 622 is plotted against time 601. Since the semiconductor switch 210, T1 is closed and conductive when the control signal 611 is at level 1, and open and blocking when the level is 0, the graph 610 and, analogously, the graph 620 can also be understood as state graphs, and the control signals 611, 621 as state curves of the corresponding semiconductor switches T1, 210 and T4, 340.

[0008] The excitation voltage 631 is plotted in graph 630. In time ranges 635 in which the two control signals have level 1, a positive voltage, approximately U DCThe corresponding voltage is applied. Graph 640 shows the changing excitation current 641. This rises steeply in regions 646, 648 when both semiconductor switches 210, 340, T1, T4 are conductive, and falls somewhat more slowly in regions 647, 649, where only one of the semiconductor switches 210, 340 is closed. In an intact half-controlled H-bridge circuit, there are alternating current changes in the excitation current 641.

[0009] Finally, in the last graph 650, the total current I DC 651 flowing through the half-controlled half-bridge is plotted against time 601.

[0010] In the variant shown according to the state of the art, the two control signals 611, 621 are offset by half the period T PWM / 2. This offers the advantage of keeping the current fed into and out of the intermediate circuit capacitor 500 low. Furthermore, the frequency of the current ripple of the excitation current 641 is twice the switching frequency of the individual semiconductor switches when the semiconductor switches are functioning, which is advantageous for the ripple of the excitation current. Furthermore, the power loss is distributed evenly between the semiconductor switches and diodes. In addition to the center-centered pulse width modulation shown here, edge-dependent pulse width modulation can also be used, in which the control signals 611, 621 are also offset by half a pulse width modulation period.

[0011] The previous description assumes that both semiconductor switches 210, T1; 340, T4 switch correctly according to the control signals 611, 621. Since the excitation winding 460 is usually designed as the rotor of a synchronous machine and often has a large inductance 467, in the event of a fault, it is necessary to short-circuit the excitation winding 460 via one of the two semiconductor switches, either one of the semiconductor switches 210, T1 or the other of the semiconductor switches 340, T4. Depending on the current direction, the respective diode 230 or 320 of the other bridge branch 200, 300 conducts. If the short circuit does not occur, the energy from the large inductance of the rotor's excitation winding would flow into the inverter's intermediate circuit.If, in this regenerative power case, the battery contactors are opened at a relatively simultaneous time, including shortly before or after the short circuit, and the converter is thus no longer connected to the traction network battery, the capacity of conventional 500V DC link capacitors is generally insufficient to prevent an overvoltage that could destroy a main inverter and / or the H-bridge circuit described here, as well as possibly other HV components. Therefore, it is advisable to determine in advance if one of the semiconductor switches is defective.

[0012] In the event of a fault that one of the two semiconductor switches remains permanently open despite being triggered, the excitation current I exc within a short period of time, usually a few 100 ms, to 0. If both switches are permanently switched on, the supply voltage U DC as voltage of the excitation winding U excpermanently on, causing the current through the excitation winding to rise sharply. Overcurrent detection can reliably detect this error and shut off the supply voltage. A more difficult and critical situation is when one of the two semiconductor switches 210, 340 no longer switches and remains in a permanently conductive state, thus being defective, while the other semiconductor switch is still switching normally. The cause of such a defect can lie in the control circuit or even be a defect in one of the semiconductor switches 210, 340 itself.

[0013] DE 102014214156 A1 describes a method for checking the functionality of a first semiconductor switch of a switch-off path of an electrical load current circuit for supplying at least one valve coil of a brake system, wherein the first semiconductor switch is operated in a conductive state during operation and a current control of the load current circuit is carried out by means of at least one second semiconductor switch controlled in a pulse-width modulated manner, wherein the first semiconductor switch is controlled during the ongoing operation of the motor vehicle brake system in such a way that, when the latter is functional, it switches to a blocking state and, after a predetermined period of time in the blocking state, the first semiconductor switch is controlled in such a way that it switches back to a conductive state.Furthermore, a circuit arrangement for checking the functionality of a first semiconductor switch is described.

[0014] DE 10 2012 219 243 A1 discloses a method for determining fault states in a half-bridge circuit with two series-connected semiconductor switches. The actual and desired states of the semiconductor switches are determined and compared.

[0015] The invention is based on the object of specifying a method and a device as well as a computer program product with which it is possible in a simpler manner to detect a single defective semiconductor switch which is permanently conductively defective in a semi-controlled H-bridge circuit for setting the excitation current for a separately excited synchronous machine.

[0016] The object is achieved according to the invention by a method having the features of patent claim 1 and by a control device having the features of patent claim 11, as well as by a computer program product having the features of patent claim 13. Advantageous embodiments emerge from the subclaims.

[0017] The invention is based on the idea that when a freewheeling phase occurs, in which both semiconductor switches T1, T4 of the half-controlled half-bridge are in an open, non-conductive state while the excitation winding is energized, current flows via the diodes into the intermediate circuit. A current measuring device that measures the total current flowing through the entire half-controlled half-bridge then detects a negative current during the freewheeling phase. If one of the two semiconductor switches T1, T4 of the half-controlled half-bridge is permanently conductively defective, this negative current does not occur during the freewheeling phase. To exploit this knowledge, the control signal pattern generated by the pulses of the control signals is changed during the current regulation of the excitation current, so that for at least a limited test period, a test switching state is created in which one of the semiconductor switches T1 and another of the semiconductor switches T4 are open simultaneously.During this test period, a current flowing through the entire half-controlled H-bridge circuit is measured. This current is referred to as the test current to indicate that it is detected during a nominal freewheeling phase of the half-controlled H-bridge circuit. The test current is then evaluated to determine whether it is negative. If this is not the case, i.e., if no negative test current occurs, it can be assumed that one of the two semiconductor switches is permanently conductive or can no longer be controllably switched to the non-conductive state because the control circuit is generating an incorrect switching signal. In this case, an error signal is generated and output, indicating that one of the two semiconductor switches is in a permanently conductive state.

[0018] In particular, a method is provided for detecting a single permanently conductive defective semiconductor switch of the semiconductor switches of a semi-controlled H-bridge circuit for setting an excitation current of a separately excited synchronous machine, wherein the semi-controlled H-bridge has a bridge arm with one of the semiconductor switches T1 and a diode D3 connected in series in the reverse direction and a further bridge arm comprising a further diode D2 in the reverse direction in series with another of the semiconductor switches T4 and a load arm comprising an excitation winding of the separately excited synchronous machine, wherein the load arm connects a connection point of one of the semiconductor switches T1 and the diode D3 in one bridge arm and with a further connection point between the further diode D2 and the further of the semiconductor switches T4 in the further bridge arm,and wherein a current measuring device for measuring the current excitation current is arranged in the load branch;, and wherein the half-controlled H-bridge circuit comprises a total current measuring device for measuring the total current I flowing through the H-bridge circuit DC is connected; wherein the semi-controlled H-bridge circuit is coupled to a control device comprising an excitation current controller which generates two pulse-width-modulated control signals of equal frequency and phase-shifted by half a period for controlling one of the semiconductor switches T1 and the other of the semiconductor switches T4, so that the excitation current flowing through the load branch can be controlled via the pulse-width modulation of the control signals according to a requirement, wherein a duty cycle in normal operation, in which the semiconductor switches (210, 340) of the semi-controlled H-bridge circuit (100) switch according to requirement, is limited to a range of 50% to 100%, wherein the duty cycle indicates a ratio of the temporal pulse width of a signal level which places the correspondingly controlled semiconductor switch into a conducting state to the period of the control signal, and wherein the excitation current is used by the excitation current controller as a feedback signal, the method comprising the steps of: a) Changing the control signal pattern so that for at least a limited test period, a test switching state is created in which one of the semiconductor switches T1 and another of the semiconductor switches T4 are open at the same time, b) Measuring the total current I flowing through the half-controlled H-bridge circuit DC as test current during the test period, c) Evaluate whether the test current measured during at least one test period is negative, d) generating and outputting an error signal if the evaluation has shown that the test current measured during at least one test period is not negative.

[0019] A defect in one of the two semiconductor switches can be reliably detected in a simple manner, whereby this defective semiconductor switch remains in a permanently conductive state.

[0020] The test time span is the period in which a freewheeling phase occurs, nominally according to the nominal control signals, when the control circuit generates correct control signals and both semiconductor switches T1, T4 switch correctly.

[0021] Furthermore, a control device with a detection device for detecting a single permanently conductive defective semiconductor switch of a semi-controlled H-bridge circuit for setting an excitation current of a separately excited synchronous machine is proposed, wherein the semi-controlled H-bridge has a bridge branch with one of the semiconductor switches T1 and a diode D3 connected in series in the reverse direction and a further bridge branch comprising a further diode D2 in the reverse direction in series with another of the semiconductor switches T4 and a load branch comprising an excitation winding of the separately excited synchronous machine, wherein the load branch connects a connection point of one of the semiconductor switches T1 and the diode D3 in one bridge branch and with a further connection point between the further diode D2 and the further of the semiconductor switches T4 in the further bridge branch,and wherein a current measuring device for measuring the current excitation current is arranged in the load branch; and wherein a total current measuring device for measuring the total current I flowing through the H-bridge circuit is arranged with the half-controlled H-bridge circuit. DCis connected; wherein the control device comprises an excitation current controller configured to generate two equal-frequency, pulse-width-modulated control signals, phase-shifted by half a period, for controlling one of the semiconductor switches T1 and the other of the semiconductor switches T4, so that the excitation current flowing through the load branch can be controlled via the pulse-width modulation of the control signals according to a requirement, wherein a duty cycle in normal operation is limited to a range of 50% to 100%, wherein the duty cycle indicates a ratio of a temporal pulse width of the signal level that places the correspondingly controlled semiconductor switch into a conducting state to the period of the control signal, and wherein the excitation current is used by the excitation current controller as a feedback signal, wherein the detection device is configured to change a control signal pattern generated by the control signals,so that for at least a limited test period, a test switching state is created in which one of the semiconductor switches T1 and another of the semiconductor switches T4 are simultaneously open; a total current I flowing through the half-controlled H-bridge circuit measured during the test period, DC to record as test current; to evaluate whether the recorded test current measured during at least one test period is negative; and to generate and output an error signal if the evaluation has shown that at least the test current measured during at least one test period is not negative.

[0022] In one embodiment, the test current is only considered negative if the absolute current has reached or exceeded a threshold value. This can increase the robustness and reliability of the method.

[0023] The detection device preferably comprises a processor on which a program code can be executed which, in cooperation with the device described above, carries out the detection method.

[0024] The invention can be implemented in a program code which is executed on a processor of a control device for setting an excitation current of a separately excited synchronous machine and which executes the above-mentioned method in cooperation with the control device with a half-controlled H-bridge circuit, as stated above, and a total current measuring device connected thereto.

[0025] In a preferred embodiment, steps a) to c) are performed iteratively. This allows a failure to be reliably detected at any time.

[0026] An iteration interval for the iteration is preferably selected so that it is shorter than a period of time for which a capacitance in the intermediate circuit can absorb the current flowing back from the excitation winding in the event of a defect without causing damage.

[0027] Other embodiments can choose a larger iteration interval. The goal then remains to detect undetected multiple errors early on.

[0028] Changing the control signal pattern so that a test switching state is created for at least a limited test period in which one of the semiconductor switches T1 and another of the semiconductor switches T4 are simultaneously (nominally) open is also synonymously referred to here as inducing a limited test period. This means that one of the two control signals is or are changed for a limited period of time, or both of the control signals are changed for a limited period of time, which is usually on the order of one period of the control signals. Switching off the two control signals or terminating the controlled generation of the excitation current are not considered inducing a test switching state or a limited test period.

[0029] Typically, only one of the two control signals is changed to establish a time-limited test interval, i.e., the test switching state. Preferably, only one of the control pulses of one of the control signals is changed.

[0030] However, embodiments are also possible in which both control signals are changed for a limited period of time, the duration of which is also preferably in the order of one or two periods of the control signals in order to bring about a test period with the test switching state.

[0031] One embodiment thus provides that, to bring about the test switching state, individual control pulses in both control signals that overlap in time with a control pulse of the other control signal are modified, for example, suppressed, preferably in their corresponding pulse sequence. Thus, a nominal pulse of one control signal S1 and a nominal pulse of the other control signal S4, which overlap in time, are modified, for example, suppressed.

[0032] In a preferred embodiment, to bring about the test switching state, one of the control pulses that place one of the semiconductor switches T1, T4 (210, 340) into the conducting state is suppressed in one of the control signals. This procedure leads to a reliable induction of the test switching state even with large duty cycles. The other control signal is not changed from the nominal setting.

[0033] In one embodiment, to achieve the test switching state, one of the control pulses in one of the control signals is delayed. The delay occurs relative to the nominal position of the corresponding pulse. This procedure can be carried out up to a duty cycle of 75%. At higher duty cycles, the pulses otherwise always overlap. The advantage of this procedure is that the voltage-time area remains constant overall, and thus the detection has no influence on the set current in the excitation winding.

[0034] In one embodiment, it can be provided that the nominal duty cycle is limited to below 75% for at least three immediately consecutive control signal periods, and that one of the control signals is changed during this limitation of the duty cycle in order to bring about the test switching state. It will be understood by those skilled in the art that the change is not made for the entire duration of the limitation, but only within the period specified by the limitation. This allows for reliable detection of a permanently conductive defective semiconductor switch in any case. This creates the possibility of bringing about the test switching state by shifting one of the control pulses in one of the control signals.

[0035] In one embodiment, a temporal portion of the nominal pulse is blanked to achieve the test switching state, preferably in the middle of the time for center-centered pulses. This approach always leads to a reliable measurement, even at high duty cycles. The impact on the set current is less than when suppressing entire control pulses.

[0036] In one embodiment, it is provided that for at least one control pulse in one of the control signals the duty cycle is increased, ie this control pulse is extended in order to reduce the influence of bringing about the test switching state on the current flowing in the load circuit i excto compensate. When a control pulse is partially blanked, the duty cycle of this partially blanked control pulse can be extended (ignoring the partial blanking) so that, taking partial blanking into account, the overlap with the control pulse of the other control signal is equal to the overlap that occurs with unchanged control signals.

[0037] The error signal can be output via an output unit, for example a control lamp, or as an electrical or electronic signal that is processed, for example, by other control units of the motor vehicle in which the separately excited synchronous machine is used.

[0038] In order to exclude individual incorrect measurements, one embodiment provides that the error signal is only output if a number of predetermined, consecutive evaluations for test time periods have shown that the test current is not negative.

[0039] In order to nevertheless ensure high reliability and rapid detection, one embodiment provides that the iteration interval between the induction of successive test switching states is reduced as soon as the evaluation, for which at least one test time period has shown that the test current is not negative.

[0040] Knowledge of a faulty, permanently closed semiconductor switch is particularly advantageous in the event that the excitation winding must be short-circuited in the event of a fault. In such a case, it is absolutely essential to avoid closing the intact semiconductor switch to create this short circuit.

[0041] The invention is explained in more detail below with reference to a drawing. Herein: Fig. 1 is a schematic diagram of a half-controlled H-bridge circuit for generating an excitation current; Fig. 2 different graphs, plotted against time in units of time per pulse width period, where the control signals for the semiconductor switches, a voltage drop across the excitation coil, a variation of the excitation current and the total current I flowing through the entire circuit DC are each shown graphically; Fig. 3 comparable graphs to those of the Fig. 2 in the event that one of the semiconductor switches is permanently conductively defective; Fig. 4 comparable graphs to those of the Fig. 2 and Fig. 3 in the case that both semiconductor switches are intact and one of the control pulses for one of the semiconductor switches is suppressed; Fig. 5 comparable graphs to those of the Fig. 2 and Fig. 3 in the case that both semiconductor switches are intact and one of the control pulses for one of the semiconductor switches is partially blanked; Fig. 6 comparable graphs to those of the Fig. 2 and Fig. 3 in the case that both semiconductor switches are intact and one of the control pulses for one of the semiconductor switches is shifted in time from its nominal position; Fig. 7 is a schematic view of a motor vehicle with a separately excited synchronous machine, which is controlled by means of a semi-controlled H-bridge circuit via a control device, which has a detection device for detecting a permanently conductive defective semiconductor switch; and Fig. 8 a schematic representation of a flow chart of a method for detecting a permanently conductive defective semiconductor switch.

[0042] In Fig. 3 are analogous to the one described above Fig. 2 shows the signal curves and the measured values ​​determined or resulting for the operating case of a half-controlled H-bridge circuit, in which one of the semiconductor switches, without limiting the generality of another semiconductor switch 210, T1 according to Fig. 1, is permanently conductive and defective. In graph 820, the level 822 of the control signal 821 for the other semiconductor switch 340, T4 is plotted against time 801 in period lengths of the pulse-width modulated control signal. In the case of an intact semiconductor switch 100, the graph can also be understood as a state graph for the other semiconductor switch 340, T4. At level 0, the semiconductor switch 340, T4 is open, i.e. non-conductive, and correspondingly at level 1, conductive and closed. The graph 810 accordingly shows the control signal 811 for one of the semiconductor switches 210, T1, which is shown in dashed lines. The level 812 is plotted against time 801. The switching state 813 of one of the semiconductor switches 210, T1 is shown as a solid line. This is permanently conductive, which corresponds to level 1. The third graph 830 shows the voltage U dropping across the excitation coil 460 exc831. Since one of the semiconductor switches 210, T1 is permanently conductive and a minimum duty cycle of 50% is specified for the control signal 811 of the semiconductor 340, T4, the supply voltage U DC for at least half the time on the excitation winding 460.

[0043] This causes a minimum excitation current I exc_min The fourth graph 840 shows the amplitude fluctuation of the excitation current I exc 841. The frequency of this current change is halved compared to the intact operating state. The fifth graph 850 represents the total current flow I DC 851.

[0044] Since the switching state of one of the semiconductor switches T1 210 is independent of the dashed corresponding control signal StS T1811, no change in the pulse pattern of the first control signal to induce a freewheeling phase will result in such a freewheeling phase in which both semiconductor switches T1, T4 210, 340 are non-conductive. A test current detected during the change in the pulse pattern corresponds to a corresponding value of the total current flow I DC 851. The total current flow is therefore greater than or equal to zero at all times.

[0045] In Fig. 4. Is the situation similar to Fig. 2. Both semiconductor switches T1, T4 210, 340 are intact and switch correctly. The situation is shown that arises when one of the control signals, here without loss of generality the first control signal StS T1611', is changed by suppressing a control pulse in order to carry out a detection for identifying a permanently conductive defective semiconductor switch. The reference numerals are marked with a trailing apostrophe for better differentiation. The first control signal 611' and the corresponding switching level 612' of the first semiconductor switch T1 210 are changed accordingly by suppressing the nominal control pulse 614', which is shown in dashed lines, in the third cycle shown. This causes changes in the voltage across the excitation winding 460 in the load branch 400 (cf. Fig. 1) falling voltage U exc 631' in the third graph 630', the excitation current 641' in the fourth graph 640' and the total current flow I DC 651' in the fifth graph 650'.

[0046] Due to the change of the first control signal STS T1611', during a time-limited test period 710', a test switching state is created in which both semiconductor switches, one semiconductor switch T1 210 and another semiconductor switch T4 340, are open and non-conductive. A freewheeling phase occurs. During this period, the negative supply voltage is applied to the excitation winding 460, as can be seen in the third graph 630' and the excitation voltage 631'.

[0047] The excitation current 641' decreases more rapidly during the test period 710' compared to the times when only one of the semiconductor switches T1, T4, 210, 340 is open and non-conductive during normal operation, and the other semiconductor switch is closed and conductive. This is accompanied by the fact that, during the freewheeling phase, current can flow back into the intermediate circuit via the diodes D2, D3, 230, 320. This is reflected in the negative total current flow 651' in the fifth graph 650'. A value of the total current I measured by the total current measuring device 180 during the test period DC 651' is therefore negative and indicates that neither one of the semiconductor switches T1 210 nor the other of the semiconductor switches T4 340 are permanently conductively defective.

[0048] If one of the semiconductor switches T1 210 were permanently conductive and the other semiconductor switch T4 340 were intact, the excitation voltage U exc 831, the excitation current Iexc 841 and the total current flow I DC 851 by the third to fifth graphs 830, 840 and 850 of the Fig. 3. The total current flow during the test period 710 would be zero.

[0049] An integral of a voltage-time window 637' of the excitation voltage U exc (shown hatched) is reduced compared to the integral over the voltage-time windows 637 in normal operation, which correspond to the partially suppressed control pulse or the nominal control pulse 614.

[0050] This can be compensated by extending one or more pulses that have not been changed, ie by increasing their duty cycle.

[0051] In Fig. 5 shows the corresponding situation in which the first control signal STS T1611" is changed by only partially suppressing the nominal control pulse 614" in the third cycle shown, which is also referred to as partial blanking or pulse suppression. The reference numerals are followed by two apostrophes accordingly. The test period 710" is shorter than with the pulse suppression shown in Fig. 4. Accordingly, an influence on the excitation current I exc 641" smaller. An integral of a voltage-time window 637" of the excitation voltage (shown hatched) is only slightly reduced compared to the integral over the voltage-time windows 637 in normal operation, which correspond to the partially blanked control pulse or the nominal control pulse 614".

[0052] To compensate, as mentioned above, the duty cycle(s) for one or more control pulses in one or both control signals can be increased. With partial blanking, which preferably occurs in the middle of center-centered pulses, the nominal duty cycle of the pulse can be increased so that the partial blanking in the center is compensated by the changed pulse itself.

[0053] In Fig. 6 shows the situation in which the one control signal, without loss of generality the one control signal STS T1 of one of the semiconductor switches T1 210, is shifted in time. Reference symbols are marked with three apostrophes for differentiation. This change to bring about the test switching state is possible up to a duty cycle of 75%. The advantage is that the voltage-time area 637" remains virtually unchanged.

[0054] In Fig. 7 schematically shows a motor vehicle 1. This has a separately excited synchronous machine 10 as its prime mover. Two key influencing variables that determine the desired excitation current are the current engine speed, which correlates proportionally with the driving speed, and a torque requested by the driver, referred to here as request 21. An excitation current for the excitation winding, which is generally arranged in the rotor, is provided via a semi-controlled H-bridge circuit 100, which is controlled via a control device 1200. The electrical energy originates from a traction battery 50, which is connected, among other things, to the H-bridge circuit 100. The traction battery 50 has a positive terminal 51 and a negative terminal 52. The control device 1200 detects a request 21 from a driver, for example via an accelerator pedal 20.The control device 1200 comprises a detection device 1240, which is configured to detect a single defective semiconductor switch in the semi-controlled H-bridge circuit 100 and output an error signal 31. This can be output, for example, via a control lamp in an instrument cluster or any other display device 30 in the vehicle. The error signal 31 can also be output as an electrical signal or radio signal for further processing in the control device 1200 or in other control units of the motor vehicle 1. This control device 1200 is typically implemented as a component of a pulse-controlled inverter that controls the separately excited synchronous machine.

[0055] Identical technical features are provided with the same reference numerals as in the other figures and are not explained in detail here again. In particular, the H-bridge circuit 100 is similar to the one shown in Fig. H-bridge circuit 100 shown in Figure 1.

[0056] The control device 1200 comprises an excitation current control 1220. This has a control unit 1221, which determines a target current I dependent on the detected request signal exc_soll A signal generating device 1222 of the excitation current control 1220 generates the control signals StS T1 and StS T4 These are the pulse-width-modulated control signals, which are phase-shifted by half a pulse-width period. These control the semiconductor switches T1, 210 and T4, 340. The two semiconductor switches are designed, for example, as IGBTs. The measured excitation current I exc , which is detected as a controlled variable by the control device 1200 and its excitation current control 1220, the excitation current I exc be regulated according to the request signal 21 or the request accordingly.

[0057] The detection unit 1240 is described below together with the Fig. 8, a method for detecting a permanently conductive defective semiconductor switch in the semi-controlled H-bridge circuit 100 is described in more detail. The detection device 1240 changes one of the control signals StS T1 and StS T4 to induce a freewheeling phase of the H-bridge circuit 100 2100. This can be done as in the Fig. 7 indicated by the detection device 1240 itself. Alternatively, the detection device 1240 can control the signal generation device 1222 accordingly in order to detect the change compared to the nominal pulse pattern of the control signals StS T1 and StS T4 to bring about.

[0058] The change can be effected in different ways. According to one embodiment, one of the control pulses is one of the control signals, here without limiting the generality of the control signal StS T1 , suppressed 2110, as in connection with Fig. 4 is explained.

[0059] Alternatively, the change can be effected by one of the control pulses of the one control signal StS T1 partially blanked out 2120, as in connection with Fig. 5 is explained.

[0060] The change can also be caused by one of the control pulses of the one control signal StS T1shifted in time relative to its nominal control pulse position, preferably delayed, 2130. In one embodiment, it can be provided that both control signals are limited to a duty cycle of a maximum of 75% for at least three cycles 2131 and one of these at least three pulses, preferably the middle control pulse of the one control signal StS T1 , is delayed in time 2132 to bring about the test switching state for the test period.

[0061] During the test period, which is determined by the change of one control signal StS T1 induced test switching state, the total current I DC , which flows through the entire half-controlled H-bridge circuit 100, is recorded as test current 2200.

[0062] Subsequently, it is evaluated whether the test current measured during the test period is negative. A negative test current or negative total current is a current whose direction is opposite to the technical current direction, which runs from the positive pole to the negative pole.

[0063] If the test current is not negative, an error signal 2600 is output. This can be done, for example, via a control display 30. The error signal can also be further processed by the control device 1200 or by other control devices, for example, in the event that a short-circuit of the excitation winding 460 becomes necessary.

[0064] If the evaluation of the test current 2300 has shown that it is negative, an iteration interval 2700 is waited for until the change of a control pulse 2100 is continued in order to carry out a new detection to determine a permanently conductive defective semiconductor switch.

[0065] In one embodiment, it is additionally optionally provided that when changing the control signals StS T1 and StS T4 at least one of the control pulses is adjusted to reduce the influence of the test switching state on the excitation current I exc to compensate 2150.

[0066] Alternatively, if it is determined that the test current is not negative, a counter is first incremented, indicating the number of consecutive evaluations for consecutive test periods in which the test current is / was not negative. Thus, the number of consecutively detected non-negative test currents is determined: 2400.

[0067] A check is then carried out to determine whether the number of evaluations in which the test current was not negative has reached or exceeded a predetermined threshold number (2500). If this is the case, the error signal (2600) is output. The threshold number is preferably a value greater than or equal to 2 and less than or equal to 10. If, however, this threshold number is not reached, no error signal is output; instead, a new iteration of the detection is carried out to identify a permanently conductive semiconductor switch. For this purpose, the iteration interval (2700) is waited for in one embodiment. In an alternative embodiment, however, a shortened iteration interval (2800) is waited for in order to achieve fast, reliable detection of a permanently conductive defective semiconductor switch.

[0068] It will be apparent to those skilled in the art that only exemplary embodiments are described here. The features can be combined for the different variants. For example, different changes to the pulse sequence can be made in different iteration cycles. List of reference symbols 1 motor vehicle 10 separately excited synchronous machines 20 Accelerator pedal 21 Driving request signal 30 Display device 31 Error signal 50 traction battery 51 positive pole 52 Negative pole 100 H-bridge circuit 180 additional current measuring devices 190 Voltage measuring device 200 bridge branch 201 one end of the bridge branch 200 202 opposite end of bridge branch 200 210, T1 semiconductor switch 230, D3 diode 250 connection point 300 additional bridge branches 301 one end of the further bridge branch 300 302 opposite end of the further bridge branch 300 320, D2 additional diode 340, T4 additional semiconductor switch 350 connection point 400 load branch 460 Excitation winding 465 ohmic winding resistance 467 Winding inductance 480 current measuring device 490 temperature sensor 491 Temperature signal 500 DC link capacitor 601, 601', 601'', 601''' time 610, 610', 610'', 610''' Graph 611, 611', 611'', 611''' Control signal (T1 - StS T1 ) 612, 612', 612'', 612''' levels 614, 614', 614'', 614''' nominal control pulse 620, 620', 620'', 620''' Graph 621, 621', 621'', 621''' Control signal (T4- StS T4 )) 622, 622', 622'', 622''' levels 630, 630', 630'', 630''' Graph 631, 631', 631'', 631''' Excitation voltage 637, 637', 637'', 637''' Voltage-time area 640, 640', 640'', 640''' Graph 641, 641', ​​641'', 641''' Excitation current 650, 650', 650'', 650''' Graph 651, 651', 651'', 651''' Total current 710, 710', 710'', 710''' Test period 801 time 810 Graph 811 Control signal (StS T1 ) 812 levels 813 Switching state (of the defective semiconductor switch) 820 Graph 821 Control signal (StS T4 ) 822 levels 830 Graph 831 Excitation voltage 840 Graph 841 Excitation current 850 Graph 851 total current 1200 control device 1220 Excitation current control 1221 Control device 1222 Signal generating device 1240 detection device 1250 memory 1260 microprocessor 1270 program code 2000 Flowchart of a method for detecting a defective semiconductor 2100 Changing a control signal 2110 Suppression of a control pulse 2120 partial blanking of a control pulse 2130 Shifting a control pulse 2131 Limiting the duty cycle 2132 Delaying a control panel 2150 Increasing the duty cycle to compensate for the excitation current 2200 Recording the total current as test current 2300 Evaluation of the test current 2400 Determining the number of non-negative test currents 2500 is the threshold number for the number of non-negative test currents reached / exceeded 2600 Output an error signal Wait for 2700 iteration interval 2800 wait for shortened iteration interval

Claims

[1] Method for detecting a single permanently conductive defective semiconductor switch of the semiconductor switches (210, 340) of a semi-controlled H-bridge circuit (100) for setting an excitation current of a separately excited synchronous machine, wherein the semi-controlled H-bridge circuit (100) a bridge branch (200) with one of the semiconductor switches T1 (210) and a diode D3 (230) connected in series in the reverse direction and a further bridge branch (300) comprising a further diode D2 (320) in the reverse direction in series with a further one of the semiconductor switches T4 (340) and a load branch (400) comprising an excitation winding (460) of the separately excited synchronous machine, wherein the load branch (400) connects a connection point (250) of the one of the semiconductor switches T1 (210) and the diode D3 (230) in the one bridge branch (200) and with a further connection point (350) between the further diode D2 (320) and the further one of the semiconductor switches T4 (340) in the further bridge branch (300), and wherein a current measuring device (480) for measuring the current excitation current is arranged in the load branch (400); and wherein a total current measuring device (180) is connected to the half-controlled H-bridge circuit (100), which measures the total current I flowing through the H-bridge circuit (100). DC measures; wherein the half-controlled H-bridge circuit (100) is coupled to a control device (1200) comprising an excitation current control (1220) which generates two pulse-width modulated control signals (611, 621) of equal frequency and phase-shifted by half a period for controlling one of the semiconductor switches T1 (210) and the other of the semiconductor switches T4 (340), so that the excitation current flowing through the load branch (400) can be regulated via the pulse-width modulation of the control signals (611, 621) according to a requirement, wherein a duty cycle in normal operation, in which the semiconductor switches (210, 340) of the half-controlled H-bridge circuit (100) switch according to requirement, is limited to a range of 50% to 100%, wherein the duty cycle is a ratio of the temporal pulse width of a signal level (612, 622), which puts the correspondingly controlled semiconductor switch (210, 340) into a conductive state, to the period of the control signal (611, 621),and wherein the excitation current is used by the excitation current control (1220) as a feedback signal, the method comprising the steps of: a) changing the control signal pattern so that for at least a limited test period, a test switching state is created in which one of the semiconductor switches T1 (210) and another of the semiconductor switches T4 (340) are open at the same time, b) Measuring the total current I flowing through the half-controlled H-bridge circuit (100) DC as test current during the test period, c) Evaluate whether the test current measured during at least one test period is negative, d) generating and outputting an error signal if the evaluation has shown that the test current measured during at least one test period is not negative. [2] Method according to claim 1, characterized by that steps a) to c) are carried out iteratively. [3] Method according to one of the preceding claims, characterized by that in order to bring about the test switching state, one of the control pulses which puts one of the semiconductor switches T1, T4 (210, 340) into the conductive state is suppressed in one of the control signals. [4] Method according to one of claims 1 or 2, characterized by that in order to bring about the test switching state, preferably in a pulse sequence, individual, temporally overlapping control pulses in both control signals (611, 621) are suppressed. [5] Method according to one of claims 1 or 2, characterized by in that, in order to bring about the test switching state, one of the control pulses in one of the control signals (611, 621) is delayed in time and, if necessary, combined with the subsequent control pulse. [6] Method according to one of claims 1 or 2, characterized bythat in order to bring about the test switching state, a temporal section of the nominal control pulse is blanked, preferably in the case of center-centered pulses in the temporal center of the nominal control pulse. [7] Method according to a combination of subclaims 3 to 6 referring back to claim 2, characterized by that the test state is brought about in the various iterations according to various measures specified in the subclaims of the combination of subclaims 3 to 6. [8] Method according to one of the preceding claims, characterized by that the error signal is only output if a number of predetermined consecutive evaluations for test time periods (710) have shown that the test current is not negative. [9] Method according to claim 8, characterized bythat an iteration interval between the bringing about of successive test switching states is reduced as soon as the evaluation for the at least one test time period (710) has shown that the test current is not negative. [10] Method according to one of the preceding claims, characterized by that at least the nominal duty cycle of at least one control pulse is increased in order to reduce the influence of bringing about the test switching state on the excitation current i flowing in the load circuit exc to compensate. [11] Control device (1200) with detection device (1240) for detecting a single permanently conductive defective semiconductor switch of the semiconductor switches (210, 340) of a half-controlled H-bridge circuit (100) for setting an excitation current of a separately excited synchronous machine, wherein the half-controlled H-bridge circuit (100) has a bridge branch (200) with one of the semiconductor switches T1 (210) and a diode D3 (230) connected in series in the reverse direction and a further bridge branch (300) comprising a further diode D2 (320) in the reverse direction in series with a further one of the semiconductor switches T4 (340) and a load branch (400) comprising an excitation winding (460) of the separately excited synchronous machine, wherein the load branch connects a connection point (250) of the one of the semiconductor switches T1 (210) and the diode D3 (230) in the one bridge branch (200) and with a further connection point (350) between the further diode D2 (320) and the further one of the semiconductor switches T4 (340) in the further bridge branch (300), and wherein a current measuring device (480) for measuring the current excitation current is arranged in the load branch (400); and wherein the half-controlled H-bridge circuit comprises a total current measuring device (180) for measuring the total current I flowing through the H-bridge circuit (100) DC is connected; wherein the control device (1200) comprises an excitation current control (1220) which is designed to generate two pulse-width modulated control signals (611, 621) of equal frequency and phase-shifted by half a period for controlling one of the semiconductor switches T1 (210) and the further semiconductor switch T4 (340), so that the excitation current flowing through the load branch (400) can be controlled via the pulse-width modulation of the control signals (611, 621) according to a requirement, wherein a duty cycle in normal operation, in which the semiconductor switches (210, 340) of the half-controlled H-bridge circuit (100) switch according to the requirement, is limited to a range of 50% to 100%, wherein the duty cycle is a ratio of a temporal pulse width of the signal level (612, 622) which corresponds to the correspondingly controlled one of the semiconductor switches (210, 340) is put into a conductive state, to the period of the control signal (611, 621),and wherein the load branch (400) comprises a current measuring device (480) for measuring the excitation current used by the excitation current control (1220) as a feedback signal, characterized by , that the detection device (1040) is designed to change a control signal pattern generated by the control signals, so that for at least one time-limited test period, a test switching state is created in which one of the semiconductor switches T1 (210) and another of the semiconductor switches T4 (340) are simultaneously open; a total current I measured during the test period and flowing through the half-controlled H-bridge circuit DC to be recorded as a test current; to evaluate whether the recorded test current measured during at least one test period is negative; and to generate and output an error signal if the evaluation has shown that at least the test current measured during at least one test period is not negative. [12] Control device (1200) according to claim 11, characterized by that the detection device (1240) comprises a program-controlled microprocessor and a program memory with program code, wherein when the program code is executed on the processor, the steps are carried out according to a method according to one of claims 1 to 10. [13] Computer program product, comprising program code which, when executed on a microprocessor in cooperation with the control device (1200) according to one of claims 11 or 12 and the semi-controlled H-bridge circuit (100) described therein and a total current measuring device (180) coupled thereto for measuring the total current I flowing through the described semi-controlled H-bridge circuit (100) DCcarries out the method according to one of claims 1 to 10.

Citation Information

Patent Citations

  • Method and circuit unit for determining fault conditions of a half-bridge circuit

    DE102012219243A1

  • Method and circuit arrangement for checking the functionality of a semiconductor switch of a switch-off path

    DE102014214156A1