Investigation method for a semiconductor sample using a secondary ion mass spectrometer with a focused ion beam and analysis device for it

Abstract

Investigation method for a semiconductor sample (30) using a secondary ion mass spectrometer (SIMS) with a focused ion beam (13), characterized by: - Using a semiconductor sample (30) that has at least one positioning mark (33, 34, 35) on the substrate, - Use of a sample stage movable in at least two dimensions relative to the ion beam (13); - Providing navigation data for the semiconductor sample (30) with the semiconductor structure and the positioning marker (33, 34, 35) ; - Pre-scan by data-based navigation to a position of a positioning marker (33, 34, 35) derived from the navigation data and irradiation of the area of ​​the semiconductor sample (30) with the ion beam (13) with a large scan area; - Readjusting an internal coordinate system for the rehearsal stage by comparing the position of the positioning mark (33, 34, 35) derived from the navigation data with its position determined by the pre-scan; - Positioning the ion beam (13) over the ROI (31) to be analyzed by data-based navigation of the sample stage and / or by lateral deflection of the ion beam (13), wherein the travel path is determined from the navigation data of the semiconductor sample (30); and - Performing the analysis scan to generate the electronic image (41) and / or other data set by irradiation using the ion beam (13) with a scan area reduced compared to the pre-scan.

Description

Technical area

[0001] The invention relates to an examination method for a semiconductor sample by means of a secondary ion mass spectrometer with a focused ion beam having the features of the preamble of claim 1 and to an analysis device therefor having the features of the preamble of claim 13. State of the art

[0002] Manufacturing multiple devices at wafer scale presents several significant challenges, many of which are related to the delicate and precise nature of quantum devices and targeted technologies, for example. These challenges include: - Uniformity and consistency: Components require precise control of materials and manufacturing processes. Achieving uniformity and consistency across all components on a wafer is critical to their reliable operation. Variations in materials, dimensions, or processing steps can lead to chip-to-chip variations. - Manufacturing tolerances: Components often require nanoscale manufacturing with extremely tight tolerances. Achieving these tolerances across a large wafer can be technically challenging and require specialized manufacturing techniques. - Cost: Scaling up production to the wafer level can be expensive due to the need for specialized equipment and cleanroom facilities. Cost-effective device manufacturing methods are a constant challenge.

[0003] The research and fabrication of quantum devices is a promising field in which both academic groups and industrial companies are already active. Some specific challenges for this new application include: - Error correction: Quantum error correction is a critical aspect of quantum computing. With multiple devices on a wafer, error correction becomes more complex, as errors in one device can affect neighboring devices. Developing error correction strategies that are both effective and scalable is an important task. - Integration of components: Quantum devices can consist of multiple components, such as qubits, control electronics, and readout systems. Seamlessly integrating these components on a single wafer while maintaining their functionality is challenging. - Testing and calibration: Each quantum device must be individually tested, calibrated, and characterized to ensure it meets performance specifications. This becomes increasingly time- and resource-intensive the larger the number of devices on a wafer. - Noise: Quantum devices are sensitive to noise, including temperature fluctuations and electromagnetic radiation. Controlling and shielding these sources of interference is challenging when multiple devices are densely packed on a wafer. - Qubit crosstalk: In quantum computing, qubits (quantum bits) should ideally not interact with each other unless they are intentionally coupled. On a wafer with multiple qubits, preventing unintentional interactions, or crosstalk, between neighboring qubits is a major challenge. - Scalability: As the number of quantum devices on a wafer increases, so does the complexity of the control and readout systems. Scaling quantum technologies to accommodate many devices on a single wafer without compromising performance represents a major technical challenge.

[0004] Addressing these challenges requires a combination of advanced materials science, manufacturing techniques, error correction strategies, and system integration approaches.

[0005] Secondary ion mass spectrometry (SIMS) is a powerful analytical technique for investigating semiconductor structures, especially for defect analysis during the manufacturing process. SIMS provides detailed information about the composition, structure, and distribution of elements and isotopes on the surface and, in this context, within semiconductor materials. The most important applications for SIMS in the semiconductor industry are: - Process control and quality assurance: SIMS is used for process control in semiconductor manufacturing. It helps ensure the consistency and quality of thin-film deposition, ion implantation, etching, and other processes by analyzing the elemental composition of materials at various process steps. This helps identify deviations or impurities that could affect the performance of the final product. - Defect analysis: SIMS is highly useful for identifying and characterizing defects in semiconductor materials and devices. It can detect tiny traces of impurities or foreign materials that can cause defects in integrated circuits (ICs). This is crucial for improving yield and reliability. - Depth profiling: SIMS is particularly well-suited for depth profiling, which allows semiconductor manufacturers to determine the distribution of dopants, impurities, and other materials in the various layers of semiconductor devices. This information is essential for optimizing chip performance and reliability. - Elemental mapping: SIMS can create elemental maps that show the spatial distribution of different elements on a semiconductor surface. This is valuable for identifying patterns, variations, and material interactions that are critical for process optimization and device performance. - Materials research and development: SIMS is used in research and development to develop new materials and processes for semiconductor manufacturing. Researchers can use SIMS to understand the behavior of materials at the atomic and molecular level, which is essential for the development and improvement of semiconductor technologies. - Thin-film characterization: SIMS is often used to characterize the composition of thin films and multilayer structures in semiconductor devices. This is important for optimizing the properties of these materials for specific applications. - Ion implantation monitoring: SIMS can be used to monitor the success and accuracy of ion implantation processes, which are essential for creating specific doping profiles in semiconductor materials. - Trace element analysis: SIMS can detect trace elements and impurities in semiconductor materials. Even small amounts of impurities can impair device performance, so accurate detection with high sensitivity is crucial.

[0006] Typically, the area to be analyzed on the semiconductor sample is first located during continuous use of the SIMS and the actual examination is then carried out by remaining in this area.

[0007] A disadvantage of using SIMS to examine thin-film semiconductor topographies is that each irradiation process reduces the semiconductor structure to an extent relevant to the original structure thickness. While conventional semiconductor structures with a typical layer thickness of >100 nm retain electrical functionality despite structural loss caused by one or more SIMS analysis processes, this is not the case with modern thin-film structures with a thickness of 25 nm and less. During each SIMS analysis process, structural loss and primary ion implantation occur in an irradiated area. These losses are so significant that - depending on the grid density - electrical functionality is no longer guaranteed after just a few passes, or troubleshooting can no longer be continued using the same wafer.

[0008] Further disadvantages of this approach may be that modern dense semiconductor structures cannot be analyzed with sufficient precision, that approaching the desired target region requires manual intervention and is therefore hardly reproducible by machine, and that reliable data correlation with other data sources, such as optical or electron microscopic images, is not possible. Task

[0009] The object of the invention is therefore in particular to improve an examination method for a semiconductor sample by means of a secondary ion mass spectrometer (SIMS) with a focused ion beam (FIB) in such a way that the structural loss or the primary ion implantation on the semiconductor sample is reduced, so that a larger number of examination runs for testing several ROIs on the same semiconductor sample is possible, wherein preferably the electrical functionality of the semiconductor structure is maintained, and largely automatic and well reproducible analyses are enabled. Solution

[0010] These objects are achieved by an examination method for a semiconductor sample having the features of claim 1.

[0011] The basic idea of ​​the invention is to first specifically approach the target region in the semiconductor structure that is of interest for the investigation (so-called region of interest, ROI) using navigation data obtained in advance that relate to the semiconductor structure, and to expose the semiconductor structure to the focused ion beam only in the approached ROI.

[0012] The testing method presented here is particularly suitable for samples from semiconductor production (e.g. CMOS, compound semiconductors, etc.).

[0013] For the purposes of the present invention, the term “semiconductor” also includes structures made of materials which are not semiconducting in the physical-electrical sense, but which are applied to similar substrates using similar manufacturing methods as in semiconductor production and with similar layer thicknesses and structure sizes.

[0014] However, the method also applies to other samples for which precise navigation data is available, such as rock samples that have been previously examined using an SEM or light microscope. In the following, the term "semiconductor sample" is used for generalization purposes.

[0015] "Semiconductor samples" within the meaning of the invention refer to complete wafers containing multiple dies, a sequence of multiple dies, or a single die on a substrate. The method thus relates to the examination of semiconductor structures regardless of their size and arrangement. Preferably, only one wafer or other substrate is introduced into the sample chamber.

[0016] If several semiconductor samples on several wafers or on other separate substrates are to be introduced into the sample chamber together and examined, the examination method of the invention can be applied several times, for each substrate individually.

[0017] Navigation data for the semiconductor sample can be obtained from: - CAD data, such as GDS II files, - Position lists, e.g. KLARF files to indicate previously detected defects of the semiconductor structure or - other image data previously acquired using non-destructive analysis methods, such as light microscopy, which are suitable for orientation and precise localization of the ROI on the sample.

[0018] In the context of the present invention, “data-based navigation” means that reproducible data relating to geometric features of the semiconductor structure on the semiconductor sample are obtained before the region of interest is approached and the ion beam directed at any location on the semiconductor structure is switched on.

[0019] Targeted approach to the target region is made possible, on the one hand, by placing the semiconductor sample with the semiconductor structure to be examined on a very precisely movable sample stage, such as a so-called laser interferometer stage. On the other hand, the invention provides for providing the semiconductor sample with one or more positioning marks formed separately on the substrate outside the semiconductor structure to be examined, or for selecting characteristic geometric points within the semiconductor structure at which multiple irradiation with the ion beam is possible.

[0020] “Positioning marks” in the sense of the present invention are therefore all reliably detectable points on the substrate of the semiconductor sample which are formed in addition to the semiconductor structure or which are selected within the semiconductor structure and for which multiple irradiation is possible without disadvantages.

[0021] If there are more than two positioning marks, they are arranged in such a way that they do not all lie on a straight line and are therefore suitable as reference points in a 2D coordinate system.

[0022] It is also possible that no dedicated marks outside the semiconductor structure are used as positioning marks, but that characteristic structures within the semiconductor structure, or for example the lower left corner of a chip that is repeated several times on a wafer, are selected for this purpose.

[0023] At the beginning of the analysis process, the area on the semiconductor sample containing at least one positioning mark is positioned under the ion beam based on a setpoint. The setpoint is calculated from the navigation data used to produce the semiconductor sample and a fixed, known position on the sample stage.

[0024] A first preliminary scan is then performed to analyze the area of ​​the semiconductor sample containing at least one positioning mark. This preliminary scan can be performed using known SIMS or SE detection methods. By determining the difference between the theoretical target position of the positioning mark and the actual position, the sample-internal coordinate system can be aligned with the coordinate system of the sample stage. By repeating this step for additional positioning marks, errors in the positioning of the semiconductor sample can be detected not only in the XY plane of the sample stage, but also rotation of the semiconductor sample relative to the sample stage and errors in the zoom factor, which can arise, for example, from a different distance between the sample surface and the radiation source.

[0025] After alignment, the sample stage is moved relative to the stationary ion beam source and, using the distances known from the navigation data, in the sample stage plane to precisely target the ROI to be examined in the semiconductor structure. Only then is a SIMS analysis of the ROI performed under ion irradiation.

[0026] The combination of CAD / blank sample navigation and SIMS offers several significant advantages, especially in terms of precision, efficiency, and accuracy of sample analysis. These include: - Increased precision: Data-driven navigation enables precise and accurate sample positioning. It ensures that the SIMS instrument precisely targets the location of interest on the sample surface or within a complex structure. This precision is crucial for analyzing specific features, layers, or structures in semiconductor devices or other materials. - Efficient data acquisition: Data-driven navigation streamlines the data acquisition process. By precisely specifying the areas of interest or features, e.g., in a CAD model, the SIMS device can automatically scan and analyze these specific regions, eliminating time-consuming manual adjustments. - Minimized sample damage: During SIMS analysis, the primary ion beam can cause sputtering and thus damage to the sample surface, as well as unwanted implantation of the primary ions. Data-driven navigation minimizes this damage by ensuring that the ion beam only scans the intended areas of the semiconductor sample, preserving the integrity of neighboring regions. In particular, it ensures that the ROI itself is not pre-damaged by orientation scans that would otherwise be necessary. - Handling complex geometries: CAD models can accurately represent complex 3D structures. This is particularly valuable in semiconductor manufacturing, where modern chips feature complicated architectures. Data-driven navigation enables SIMS to analyze specific layers, trenches, and vias within these complex structures. - Improved reproducibility: Data-driven navigation enables consistent and repeatable analyses. Researchers and developers can save and reuse data-driven navigation plans for future analyses or share them with colleagues to ensure consistent data collection and comparability. - Data correlation: Data-based navigation facilitates the correlation of SIMS data with other data sources, such as optical or electron microscopic images. By comparing SIMS data with the CAD model, researchers can accurately correlate SIMS results with the specific characteristics of other imaging modalities.

[0027] In summary, data-driven navigation for SIMS significantly enhances the capabilities and efficiency of the technology. It is particularly valuable in industries such as semiconductor manufacturing, where precise analysis of complex structures is essential for quality control and research and development. By integrating CAD models into SIMS instruments, researchers and developers can achieve higher levels of accuracy, reproducibility, and productivity in their analysis processes.

[0028] Once the start position for the analysis scan has been reached, the analysis scan can be performed: - at a stationary position (“spot mode”) and / or - as an X / Y scan (“raster scan mode”) and / or - along a route predefined from navigation data or a route, which may also be a polygonal line (“shape mode”).

[0029] The above analysis scan modes can also be performed multiple times consecutively to examine the depth of the sample (Z-direction) using the sputtering effect. Simply put, the examination method in this embodiment involves burrowing the ion beam into the depth of the semiconductor structure. To do this, uppermost layers must be partially removed. For this purpose, the ion beam's intensity and / or irradiation time per unit area are varied so that its impact on the sample is increased beyond that required for pure SIMS analysis.

[0030] Particularly interesting is the sample examination along a section of the semiconductor structure, referred to above as shape mode. With known CAD data as navigation data and the possibility of highly precise positioning of the ion beam, for example, a section of an etched trench with a curve or trenches with a specific design width can be irradiated. This can be done for repeating substructures of the semiconductor structure, thus obtaining a statistical distribution or distribution across the entire wafer or substrate of the semiconductor sample. This distribution then provides information about the size of a process window.

[0031] The probe size should be smaller than the structure to be examined, such as a trench width. The analytical scan also increases the signal-to-noise ratio for very thin layers, such as those formed by impurities, because much more material is available for analysis than with a pure point analysis.

[0032] Preferably, the positioning means and the diameter of the ion beam are matched to achieve a resolution of better than 20 nm for trench analysis scans.

[0033] Due to alignment using SIMS, each irradiation procedure causes a loss of structure in the area of ​​the positioning mark. Various measures are possible to compensate for or mitigate this.

[0034] For example, the positioning marks may preferably be formed with a thickness that is significantly greater than the layer thickness of the semiconductor structures to be clarified in later analysis scans, and in particular is four times the thickness of the semiconductor structure.

[0035] It is also possible to provide more than one set of positioning marks on the semiconductor sample and to perform the alignment with a second set after a first set has been compromised by previous pre-scans for alignment operations.

[0036] It is particularly advantageous if the raster speed for the preliminary scan performed for alignment purposes is increased compared to the subsequent analysis scan, for example, fourfold. This means that the pixel dwell time is shorter and the irradiation intensity is lower, leading to less destruction of the positioning marks. The increased image noise caused by a higher raster speed is not harmful because the positioning marks are large relative to the size of the ROI and are geometrically designed, e.g., as a cross, so that their center of gravity or their center, which serves as the coordinate system origin or reference point, can still be reliably identified.

[0037] In this context, a preferred embodiment of the examination method of the invention provides that certain size ratios are selected and the positioning marks are made large compared to the smallest structures to be resolved.

[0038] With an ion beam size (spot size) of 5 nm, the physical limit for lateral resolution for SIMS is approximately 10 nm due to the lateral extent of the "collision cascade," which describes the area from which secondary ions are emitted by the sample. Depending on the signal-to-noise ratio in the SIMS image, a lateral resolution of < 20 nm can thus be routinely expected.

[0039] This makes the positioning marks robust against unwanted sputtering during the pre-scans.

[0040] An analysis device suitable for carrying out the examination method is specified in claim 13.

[0041] This initially includes a secondary ion mass spectrometer, comprising - a primary ion column containing a primary ion source that accelerates the ions and delivers them to the semiconductor sample as a focused ion beam; - a high-vacuum sample chamber in which the semiconductor sample and an extraction unit for secondary ions are arranged, and; - a mass spectrometer unit with a detector;

[0042] The mass spectrometer unit contains a mass analyzer that separates the secondary ions according to their mass-to-charge ratio.

[0043] The analysis device also comprises a sample stage that is laterally movable in at least two spatial coordinates, with the sample stage plane aligned perpendicular to the ion beam. The sample stage, in particular, has a drive system for moving the sample stage relative to the stationary sample chamber. For this purpose, spindles driven by DC motors or stepper motors can be provided.

[0044] The sample stage also includes a feedback measuring system to determine the position of the sample stage within the sample chamber and, if necessary, its travel speed. The feedback measuring system can be an encoder connected to the spindle, or encoders mounted on glass measuring rods positioned away from the spindle.

[0045] A laser interferometer is particularly preferred to achieve the greatest possible accuracy in motion monitoring. With its spatial resolution in the sub-nanometer range, this allows for the successful targeting of structures on chips with repetitive motions in the range of a few nanometers, such as memory structures. Examining critical points in repetitive structures requires a spatial precision significantly better than half the pitch of the structure.

[0046] A particularly preferred embodiment provides for the use of a shift piezo actuator in the drive devices of both axes. Unlike the main drives, e.g., DC motors, the shift piezo actuators can move the sample stage continuously and smoothly. Due to the very small travel distances made possible by the use of the shift piezo actuators, the use of a laser interferometer as a feedback measurement system is required in this embodiment to fully utilize the possible precision in the nm range.

[0047] Finally, the analysis device also includes a stage control unit to control the drives of the sample stage.

[0048] The following describes the performance of an analysis using an analysis device that has a stage control unit for the sample stage and a control PC for the secondary ion mass spectrometer, as well as an ion column in which the ion beam is deflected via electrostatic or electromagnetic fields, for which a further control unit is provided.

[0049] If separate control units are provided for the sample stage, for the control of the ion beam by deflection and for the secondary ion mass spectrometer, the invention provides a data link between the control units in order to coordinate the emission of the ion beam with the movement of the stage.

[0050] All control units for the ion beam, sample stage, and SIMS are monitored and controlled by a global control unit. These control units can be physically separate or integrated modules within the global control unit.

[0051] In a first step, the ion source is started so that a stable ion beam is emitted. Next, the column is aligned so that the beam can strike the sample centrally through the beam aperture with the smallest possible diameter (depending on the diameter of the beam aperture) and a round shape. This procedure is performed on a "dummy" sample or at a corner of the actual sample to prevent damage to the ROIs from sputtering or ion implantation.

[0052] Once the previously described preparations are complete, the sample stage can perform its first target movement, e.g., to move to the area of ​​one of the positioning marks on the semiconductor sample. A movement command with an XY target coordinate is sent from the control PC to the stage control unit. This first calculates a movement profile, i.e., XY target values ​​from the start time to arrival. The profile typically includes acceleration and deceleration processes.

[0053] After the profile has been created, the journey is carried out, with the stage control unit continuously controlling or checking the following actions, for example at a frequency of 10 kHz: - It sends control variables to the actuators, e.g. voltages for the DC motors of the drive system. - It measures the current actual position using a laser interferometer. - It performs a target-actual comparison of the position and corrects the control variables of the actuators accordingly.

[0054] The stage control unit determines that the target position has been reached as soon as the actual position is within a preselected tolerance zone, the so-called error band. This is typically set to twice the spot size of the ion beam. For example, if the spot size is 5 nm, the error band size is set to 10 nm.

[0055] The stage control unit then switches off the actuators and sends a message to the control PC that the target position has been successfully reached.

[0056] In a preferred analysis device for carrying out the examination method according to the invention, the following typical dimensions are given: - Edge length of a semiconductor sample to be examined: 100 mm; - Distance of positioning marks: 1 to 100 mm; - Travel distance during a destination journey, e.g. from die to die: 5 mm; - Number of pre-calculated TARGET-XY values ​​for creating a driving profile along the route: approx. 50,000; - Travel speed: 2 mm / s (DC motors with spindles), up to 20 mm / s (piezo linear drives); - Error tube for target arrival: 10nm Description of an embodiment

[0057] The invention is explained in more detail below with reference to the exemplary embodiment of an analysis device shown in the drawings. The figures show in detail: Fig. 1 shows a schematic representation of an analysis device for examining a semiconductor sample; Fig. 2 the trajectory of a primary ion beam on a semiconductor sample in a schematic, perspective view and Fig. 3A, Fig. 3B shows a semiconductor sample on a sample stage from above.

[0058] In Fig. Figure 1 shows an analysis device 100 for examining a semiconductor sample. This largely corresponds to the known design of a secondary electron mass spectrometer, with only the selection of a sample stage 20 being specifically adapted for carrying out the examination method according to the invention.

[0059] A high-vacuum sample chamber 11 is formed in a pressure-resistant and hermetically sealable housing 10. The sample stage 20 is arranged therein. It comprises a base 21, which is firmly connected to the housing 10, and the actual sample stage 20, on which a semiconductor sample 30 can be mounted and which can be moved at least two-dimensionally relative to the base, generally in a Cartesian coordinate system. The high-vacuum sample chamber 11 can be evacuated so that a high vacuum can be created. A primary ion source 12 is arranged in a vertically aligned column on top of the housing 20. The ion beam 13 emitted from there is aligned perpendicular to the sample stage 20.

[0060] An extraction unit 14 is arranged between the primary ion source 12 and the sample stage 20. It serves to collect, focus, and laterally divert the secondary ions released from a semiconductor sample placed on the sample stage 20. The secondary ion beam 16 thus formed and laterally deflected is focused by transfer lenses 15 and directed to a mass spectrometer unit 17, where the secondary ions are separated according to their mass-to-charge ratio and guided to a detector.

[0061] The movable part of the sample stage 20 is moved relative to the base by a stage control unit 22. The stage control unit 22 is connected to a control PC 18, which also controls the primary ion source 12 and on which the signals generated in the detector of the mass spectrometer unit 17 are visualized.

[0062] Fig. Figure 2 shows a schematic, perspective view of a semiconductor sample 30 placed on the sample stage. It comprises several semiconductor structures to be examined, each forming a region of interest (ROI) 31, and a total of three positioning marks 33, 34, 35 in two edge strips. By moving the sample stage, the semiconductor sample 30 can be moved relative to the stationary and vertically aligned primary ion beam 13 along a movement path 32 specified by the sample stage control unit. This allows a line scan 42 to be performed or an image 31 of the semiconductor sample 30, or of individual ROIs 31 thereon, to be generated. Furthermore, the areas with the cross-shaped positioning marks 33, 34, 35 can be targeted.

[0063] In Fig. 3A shows the semiconductor sample 30 mounted on the sample stage 20 from above. As indicated by the block arrows, the sample stage 20 can be moved in the X and Y directions. At the beginning of the examination procedure, the sample stage 20 is positioned so that the ion beam is above a positioning mark 35. A target position 35' for the positioning mark 35 is derived from the manufacturing data of the semiconductor sample 30. The target position 35' is shown in Fig. 3A by the dashed crosses. Due to the manual placement of the semiconductor sample 30 on the sample stage 20, a deviation between the theoretical target position 35' determined from CAD data of the semiconductor sample 30 and the actual position is to be expected. Therefore, the primary ion beam 13 is switched on at the target position 35' to perform an imaging pre-scan, which is represented by the dashed circle. The positioning mark 35 is detected in the edge area of ​​the detection area around the target position 35'.

[0064] The pre-scan is repeated by moving to the target positions 33', 34' for the positioning marks 33, 34 in order to also detect possible rotation and zoom errors. Using the deviations determined in the pre-scans, the coordinate system derived from the CAD data of the semiconductor sample 30 and the coordinate system actually present on the sample stage are aligned, so that all target positions match the actual positions, as shown in Fig. 3B shown.

[0065] From the position mark 34 last approached for a preliminary scan, a movement path 32 can be generated by means of the control unit in order to place the primary ion beam 13 exactly on an ROI 31 in order to perform an analysis scan there. List of reference symbols 100 analysis device 10 housings 11 Sample chamber 12 Primary ion source 13 focused ion beam 14 Extraction unit 16 Secondary ion beam 15 transfer lenses 17 Mass spectrometer unit 18 control PCs 20 rehearsal stage 22 Stage control unit 30 semiconductor samples 31 Region of Interest (ROI) 32 Movement path 33, 34, 35 positioning marks 33', 34' 35' Target positions 36 Semiconductor structure 41 Image 42 line scan

Claims

[1] Method for examining a semiconductor sample (30) by means of a secondary ion mass spectrometer (SIMS) with a focused ion beam (13), comprising at least the following steps: - positioning the semiconductor sample (30) on a sample table (20); - performing an analysis scan by irradiating at least one region of interest (ROI) (31) in at least one semiconductor structure (36) on the semiconductor sample (30) with the ion beam (13) to release secondary ions from the semiconductor structure (36); - registration of the secondary ions in a mass spectrometer unit (17) to generate an electronic image (41) and / or another data set for characterizing the semiconductor structure (36) in the region of the irradiated ROI (31); characterized by at least the following steps: - using a semiconductor sample (30) having on the same substrate the semiconductor structure (36) to be analyzed and at least one positioning mark (33, 34, 35), - using a sample stage (20) which can be moved in at least two dimensions relative to the ion beam (13); - Providing navigation data for the semiconductor sample (30) with the semiconductor structure (36) and the positioning mark (33, 34, 35); - performing a preliminary scan by data-based navigation to a position of a positioning mark (33, 34, 35) derived from the navigation data and irradiating the region of the semiconductor sample (30) with the ion beam (13) with a large scan area; - readjusting (alignment) of an internal coordinate system for the sample stage (20) by comparing the position of the positioning mark (33, 34, 35) on the sample stage (20) derived from the navigation data with the position of the positioning mark (33, 34, 35) determined by the preliminary scan; - positioning the ion beam (13) over the ROI (31) to be analyzed by data-based navigation of the sample stage (20) and / or by lateral deflection of the ion beam (13), wherein the travel path is determined from the navigation data of the semiconductor sample (30); - Carrying out the analysis scan to generate the electronic image (41) and / or the other data set by irradiation using the ion beam (13) with a scan area reduced compared to the preliminary scan. [2] Examination method according to claim 1, characterized bythat a semiconductor sample (30) is used which has at least three positioning marks (33, 34, 35) arranged offset therefrom on the same substrate as the semiconductor structure (36) to be analyzed, which are not all arranged on the same straight line. [3] Examination method according to claim 2, characterized by that from the preliminary scan of at least three positioning marks (33, 34, 35) correction data for a position correction in the reference system of the sample stage (20) and / or for the height of the semiconductor sample (30) on the sample stage (20) relative to a primary ion column (12) emitting the FIB (13) and / or a rotation error of the semiconductor sample (30) relative to the stationary housing (10) with the primary ion column (12) are determined and the alignment is carried out using these correction data. [4] Examination method according to claim 2 or 3, characterized bythat more than one set of at least three positioning marks (33, 34, 35) is provided on the semiconductor sample (30). [5] Examination method according to one of claims 1 to 4, characterized by that the positioning marks (33, 34, 35) are arranged on the semiconductor sample (30) at a distance from the semiconductor structure (36). [6] Examination method according to one of the preceding claims, characterized by that the positioning marks (33, 34, 35) are formed with a thickness that is greater than the layer thickness of the ROI (31) in the semiconductor structure (36) to be clarified in later analysis scans. [7] Examination method according to one of the preceding claims, characterized by that a raster speed with which the ion beam (13) is guided over the surface for the purpose of alignment in a preliminary scan is increased compared to a raster speed in the subsequent analysis scan. [8] Examination method according to claim 7, characterized by that the raster speed during the pre-scan is increased to 2 to 4 times the raster speed during the analysis scan. [9] Examination method according to one of the preceding claims, characterized by that the areal extent of the positioning marks (33, 34, 35) in the plane of the sample stage (20) is large in relation to the size of the ROI (31). [10] Examination method according to claim 9, characterized by that the areal extent of the positioning marks (33, 34, 35) is 2 times to 4 times the areal extent of the ROI (31), wherein the areal extent of the ROI is at least twice the size of the FIB (13). [11] Examination method according to one of the preceding claims, characterized by that the focused ion beam (13) is guided over the semiconductor sample (30) in at least one path defined in advance by navigation data. [12] Examination method according to one of the preceding claims, characterized by that by repeatedly executing the analysis scan with the same navigation data, at least one upper semiconductor layer is partially removed and an examination of a further semiconductor layer located below the partially removed semiconductor layer is made possible. [13] Analysis device (100) for carrying out the examination method for a semiconductor sample (30) by means of a secondary ion mass spectrometer (SIMS) with a focused ion beam (13) according to one of the preceding claims, at least comprising - a secondary ion mass spectrometer comprising o a primary ion column (12) containing a primary ion source and accelerating the ions and delivering them to the semiconductor sample (30) as a focused ion beam (13); o a high-vacuum sample chamber (11) in which the semiconductor sample (30) and an extraction unit (14) for secondary ions are arranged, and; o a mass spectrometer unit (17) with a detector; - a sample stage (20) which is laterally movable at least in two surface coordinates via drive systems, wherein a support plane of the sample stage (20) is aligned normal to the ion beam (13); - a back-measuring system to determine the position of the sample stage within the high-vacuum sample chamber (11) and - a stage control unit (22) for controlling the drive systems on the sample stage (20) and / or a control unit for deflecting the focused ion beam (13) as a function of the actual position data obtained by the feedback measuring system and / or the desired position data derived from navigation data of the semiconductor sample (30). [14] Analysis device (100) according to claim 13, characterized bythat the drive systems are formed by DC motors and spindles, with an encoder connected to each spindle as a feedback measuring system. [15] Analysis device (100) according to claim 13 or 14, characterized by that the drive systems are each designed as a DC motor-spindle combination, which is supplemented by a sliding piezo actuator and that the laser interferometer is provided as a feedback measuring system.

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