Testing of transistor devices

A series circuit with a controller efficiently tests transistor devices by repeatedly operating them in diode mode with a reverse current, addressing inefficiencies in current regulator methods and ensuring reliable bipolar degradation assessment.

DE102024209244A1Pending Publication Date: 2026-03-26INFINEON TECHNOLOGIES AG
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Patent Information

Authority / Receiving Office
DE · DE
Patent Type
Applications
Current Assignee / Owner
Filing Date
2024-09-25
Publication Date
2026-03-26

AI Technical Summary

Technical Problem

Existing methods for testing transistor devices, particularly SiC-based devices, are inefficient due to the slow operation of current regulators and the inability to effectively test for bipolar degradation, which is exacerbated by high recombination rates of charge carriers at crystal defects.

Method used

A method involving a series circuit of transistor devices connected between output nodes of a current source, with a controller to repeatedly operate each device in diode mode for a predetermined duration, using a reverse current to simulate actual operating conditions and minimize voltage fluctuations, thereby testing for bipolar degradation efficiently.

Benefits of technology

This approach allows for precise and reproducible testing of transistor devices by maintaining a constant test current and voltage, reducing the risk of unpredictable stress, and providing reliable assessment of bipolar degradation.

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Abstract

A method and a circuit arrangement are disclosed. The method comprises connecting a series circuit (1) containing several series-connected transistor devices (11-1N) between output nodes (31, 32) of a current source arrangement (3); driving a test current (I3) provided by the current source arrangement (3) through the series circuit (1) such that a reverse current flows through each of the several transistor devices (11-1N); and repeatedly operating each of the several transistor devices (11-1N) in a diode mode for a predetermined time period (T11-T1N).
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Description

Technical field

[0001] This disclosure relates generally to a method for testing transistor devices and a corresponding circuit arrangement. BACKGROUND

[0002] A transistor device, such as a MOSFET (metal-oxide-semiconductor field-effect transistor), can be operated in diode mode. In this mode, a conducting channel in a body region is interrupted along a gate electrode and gate dielectric, and a voltage applied between the drain and source nodes is such that a PN junction between the body region and a drift region is forward-biased, allowing current to flow between the drain and source nodes. In diode mode, a charge carrier plasma containing majority and minority charge carriers, such as electrons (N-type charge carriers) and holes (P-type charge carriers), is present in the drift region. Electrons and holes can recombine, with a high recombination rate being particularly critical at positions where the drift region's crystal lattice exhibits crystal defects.Charge carrier recombination is associated with energy released into the crystal lattice, which can cause crystal defects to grow and propagate. Such propagation of crystal defects can lead to an increase in the on-resistance of the transistor device. This mechanism can be described as bipolar degradation and is particularly relevant for silicon carbide (SiC)-based transistor devices. The "on-resistance" is the electrical resistance of the transistor device in a forward-biased state, which is an operating state in which there is a conducting channel in the body region along the gate electrode and the gate dielectric, so that the transistor device, unlike the diode mode, operates in a unipolar conducting mode.

[0003] When fabricating SiC transistor devices, it is desirable to test samples for bipolar degradation. This can involve repeatedly operating the sample device in diode mode and determining the on-resistance after each operation.

[0004] Operating the transistor device in diode mode can involve driving a current through the device at a predetermined current level. This current can be supplied by a current source that is repeatedly switched on and off. The current source typically includes a current regulator. A current regulator is relatively slow when switching the current between zero and the predetermined current value, making this type of operation slow and inefficient.

[0005] There is a need for an improved method for testing transistor devices, such as SiC transistor devices. Summary

[0006] One example concerns a method. The method involves connecting a series circuit containing several series-connected transistor devices between output nodes of a current source arrangement, driving a current provided by the current source arrangement through the series circuit so that a reverse current flows through each of the several transistor devices, and repeatedly operating each of the several transistor devices in a diode mode for a predetermined duration.

[0007] Another example concerns a circuit arrangement. The circuit arrangement comprises a current source arrangement containing output nodes and configured to provide a current, a series circuit containing several transistor devices connected in series between the output nodes of a current source arrangement so that a reverse current can flow through each of the several transistor devices when the current is provided by the current source arrangement, and a controller configured to repeatedly operate each of the several transistor devices in a diode mode for a predetermined period of time.

[0008] Examples are explained below with reference to the drawings. The drawings serve to illustrate certain principles, so only aspects necessary for understanding these principles are depicted. The drawings are not to scale. In the drawings, the same reference symbols denote the same features. Brief descriptions of the drawings

[0009] The elements in the drawings are not necessarily to scale relative to one another. Identical reference numerals denote corresponding similar parts. The features of the various illustrated embodiments can be combined, provided they are not mutually exclusive. Embodiments are shown in the drawings and are described in detail in the following description. Fig. Figure 1 illustrates an example of a test setup comprising a current source arrangement, a series circuit of several transistor devices connected in series between the output nodes of the current source arrangement, and a controller configured to repeatedly operate the transistor devices in a diode mode; Fig. Figure 2 shows signal diagrams illustrating an example of a method for repeatedly operating the transistor devices in diode mode; Fig. 3- Fig. Figure 4 shows signal diagrams illustrating a transition between the end of one of the transistor devices operating in diode mode and the beginning of another of the transistor devices operating in diode mode; Fig. Figure 5 shows signal diagrams illustrating another example of a method for repeatedly operating the transistor devices in diode mode; Fig. Figure 6 shows a test setup according to another example; Fig. Figure 7 shows signal diagrams that illustrate an example of operating the system in Fig. 6 illustrated test setups; Fig. Figure 8 illustrates an example of a temperature sensor; Fig. Figure 9 illustrates another example of a temperature sensor; Fig. Figure 10 shows an example of a test setup containing several parallel transistor series circuits; Fig. Figure 11 shows signal diagrams that provide an example of operating the in Fig. 10 illustrated test setups; Fig. Figure 12 shows an example of a test setup that includes a dummy transistor device connected in series with the transistor devices; Fig. Figure 13 illustrates an example of a logic circuit configured to provide a control signal to the dummy transistor device; and Fig. Figure 14 shows an example of a test setup containing several dummy transistor devices connected in series with the transistor devices. Detailed description

[0010] The following detailed description refers to the accompanying drawings. The drawings form part of the description and show examples of how the invention can be used and implemented. It is understood that the features of the various embodiments described herein can be combined unless expressly stated otherwise.

[0011] Fig. Figure 1 illustrates an example of a circuit arrangement comprising a series circuit 1 with several series-connected transistor devices 11-1N. The series circuit 1 is connected between output nodes 31, 32 of a current source arrangement 3. The current source arrangement 3 is configured to provide a current I3. The circuit arrangement further includes a controller 4 configured to generate control signals to repeatedly operate each of the transistor devices 11-1N in diode mode for a predetermined duration.

[0012] The controller 4 can be implemented in hardware and / or software. In a hardware implementation, the controller can be, for example, a computer, a microprocessor, or a dedicated circuit. In a software implementation, the controller can be a computer program product, a function, a routine, an algorithm, part of program code, or an executable object that can be executed by a computer or microcontroller.

[0013] The transistor devices 11-1N in series can also be referred to as devices under test (DUTs). The current I3 provided by the current source arrangement 3 can also be referred to as the test current.

[0014] Each of the 11-1N transistor devices comprises a gate node for controlling an operating state of the transistor device and a load path between a first and a second load path node. Furthermore, the transistor device internally includes a gate-controlled channel and an internal diode and is configured to operate in a forward or reverse bias state. In the forward bias state, the gate-controlled channel conducts. In the reverse bias state, the gate-controlled channel is blocked. The internal diode bypasses the gate-controlled channel, allowing the transistor device to conduct current when the transistor device is in the reverse bias state and a current is driven through the load path, which forward biases the internal diode. The "diode mode" is the operating mode in which the transistor device is in the reverse bias state and the internal diode conducts current.

[0015] For example, the transistor devices are 11-1N MOSFETs (metal-oxide field-effect transistors). In a MOSFET, the drain and source nodes are the first and second load path nodes, respectively. The MOSFETs can be N-type or P-type. In an N-type MOSFET, the polarity of the internal diode is such that one anode of the diode is connected to the source node and one cathode of the diode is connected to the drain node of the MOSFET. Therefore, the internal diode conducts when a positive voltage is applied between the source and drain nodes, provided that this voltage exceeds the internal diode's forward voltage.In a P-type MOSFET, the polarity of the internal diode is such that the cathode of the diode is connected to the source node and the anode of the diode is connected to the drain node of the MOSFET, so that the internal diode conducts when the voltage between the source and drain nodes is negative and has a magnitude higher than the forward voltage of the internal diode.

[0016] In a MOSFET, the gate-controlled channel is an internal channel in a body region along a gate dielectric and a gate electrode. The gate electrode is connected to the gate node, and the conducting channel is controlled by a drive voltage (gate-source voltage) between the gate and source nodes. This is generally known, so no further explanation is needed.

[0017] MOSFETs can be enhancement (off-limiting) or depletion (on-limiting) MOSFETs. An N-type enhancement MOSFET, for example, has a positive threshold voltage and is on when the drive voltage is higher (more positive) than the threshold voltage. An N-type depletion MOSFET, for example, has a negative threshold voltage and is on when the drive voltage is higher (more positive) than the threshold voltage.

[0018] It should be noted that the 11-1N transistor devices are not limited to being implemented as MOSFETs. Instead, any other type of transistor device that incorporates an integrated diode and can be operated in diode mode can be used. For example, the 11-1N transistor devices are JFETs (junction field-effect transistors) with an integrated body diode. For illustrative purposes only, the circuit symbols shown in Fig. Figure 1 illustrates N-type enhancement MOSFETs in transistor devices.

[0019] With reference to the above, an operating state in which the transistor device is in the off state and the internal diode is conducting is called diode mode. In diode mode, N-type charge carriers (electrons) and P-type charge carriers (holes) contribute to the current flow through the transistor device. Thus, diode mode can also be called the bipolar operating mode of the transistor device.

[0020] An operating state in which the transistor device is in the forward direction, such that the gate-controlled channel bypasses the internal diode and the current through the transistor device has a current direction suitable for forward biasing the internal diode, is hereafter referred to as the reverse conduction state. In the reverse conduction state, essentially only one type of charge carrier contributes to the current flow through the transistor device when a voltage across the transistor device is lower than the forward voltage of the internal diode, so this operating mode can be a unipolar operating mode of the transistor device. In an N-type transistor device, for example, the charge carriers contributing to the current flow in the unipolar mode are N-type charge carriers (electrons). However, the reverse conduction mode is not limited to being a unipolar mode.If the transistor device is in reverse bias mode and the current through the device is high enough to produce a voltage across the transistor device that forward-biases the internal diode, a charge carrier plasma can also occur in reverse bias mode. Thus, reverse bias mode is not necessarily a purely unipolar mode.

[0021] In the following, "reverse current" refers to a current with a direction that, when the transistor device is in the off-state, forward-biases the internal diode. In an N-type transistor device, for example, the reverse current is a positive source-drain current (negative drain-source current). This type of operating mode can also be called "third-quadrant operation" because the current flowing in this mode is conventionally shown in the third quadrant of a Cartesian coordinate system, which illustrates the current through the transistor device versus the voltage applied to the transistor device.

[0022] For illustrative purposes, in Fig. 1 The internal diodes of the transistor devices 11-1 N are represented by their circuit symbols. The transistor devices are connected in series, so the internal diodes are connected in series (in contrast to some of the internal diodes being connected in reverse series).

[0023] To control the operating states of the transistor devices 11-1N, the circuit arrangement includes a control circuit 2 with several drivers 21-2N, each driver 21-2N being configured to control the operation of one of the transistor devices 11-1N. To control the operation of a specific transistor device 11-1N, each driver 21-2N is configured to provide a drive voltage Vdrv11-Vdrv1N that either switches the respective transistor device 11-1N on or off.

[0024] The polarity and magnitude of the drive voltages Vdrv11-Vdrv1 N depend on the specific type of transistor device 11-1N. For example, in N-type transistor devices 11-1N, the drive voltages Vdrv11-Vdrv1 N for operating the transistor devices 11-1N in the forward state are positive and higher than a respective threshold voltage, and the drive voltages Vdrv11-Vdrv1 N for operating the transistor devices in the reverse state are lower than the respective threshold and can be positive, zero, or even negative. For example, in SiC N-type transistor devices, the drive voltages Vdrv11-Vdrv1 N for operating the transistor devices 11-1 N in the forward state are selected from the threshold voltage and 25 volts (V) or 30 V, and the drive voltages Vdrv11-Vdrv1 N for operating the transistor devices 11-1N in the reverse state are selected from 0 V and -20 V.

[0025] The drivers 21-2N are controlled by control signals S11-S1N provided by the controller 4. Each of the control signals S11-S1N is configured to control the operation of its respective driver 21-2N, turning its respective transistor device 11-1N on or off. In one example, the driver circuit 2 is a single monolithic circuit in which the individual drivers 21-2N are integrated. In another example, the driver circuit 2 contains two or more monolithic circuits in which the individual drivers 21-2N are integrated. In yet another example, each driver 21-2N is integrated in a single monolithic circuit. In yet another example, the driver circuit 2 with the drivers 21-2N is implemented as an electronic circuit with discrete devices.

[0026] The transistor series circuit 1 is connected to the current source arrangement 3, such that the current I3 supplied by the current source arrangement 3 to the transistor series circuit 1 is a reverse current of the individual transistor devices 11-1N. Thus, the transistor devices 11-1N operate either in diode mode (when the respective transistor device is in the off state) or in reverse conduction mode (when the respective transistor device is in the on state).

[0027] For example, the transistor devices 11-1 N are silicon carbide (SiC) transistor devices. SiC transistor devices can suffer from bipolar degradation. Bipolar degradation can occur when the transistor devices 11-1 N are operated in diode mode. For testing purposes, it is desirable to repeatedly operate each of the transistor devices 11-1 N in diode mode. This can involve driving a reverse current through the respective transistor device and alternately operating the transistor device in the off-state and on-state conditions. When a transistor device is in the off-state, it operates in diode mode (bipolar mode), and when the transistor device is in the on-state, it operates in reverse conduction mode. Reverse conduction mode is, for example, a unipolar mode.However, if, as explained above, the 11-1N transistor devices are operated in reverse conduction mode at high current densities, such that the internal diodes are forward-biased, a charge carrier plasma can also occur in reverse conduction mode. Thus, reverse conduction mode is not necessarily a purely unipolar mode.

[0028] When a reverse current of a given current level flows through the series transistor circuit 1, the voltage V11-V1N across each transistor 11-1N depends on whether the transistor 11-1N is in diode mode or reverse conduction mode. Normally, the voltage in diode mode is higher than in reverse conduction mode. However, this is just one example. It is also possible to operate the transistors 11-1N in reverse conduction mode, so that the voltage across each transistor 11-1N in reverse conduction mode is essentially the same as the voltage in diode mode.

[0029] In any case, the 11-1 N transistor devices are operated alternately in diode mode and reverse conduction mode for testing purposes. Transistor devices are frequently used in electronic circuits where they are operated alternately in diode mode and reverse conduction mode. The test procedure therefore resembles an actual operating scenario for transistor devices.

[0030] By connecting several transistor devices 11-1N in series, each of the transistor devices 11-1N can be repeatedly operated in diode mode, and at the same time, a total voltage drop V1 across the transistor series circuit 1 can be kept essentially constant. The total voltage drop V1 across the series circuit is given by the sum of the voltage drops V11-V1N across the individual transistor devices 11-1N.

[0031] With reference to the foregoing, when a current of a given current level flows through a given transistor device, the voltage drop across the transistor device can differ depending on whether the transistor device is in diode mode or reverse conduction mode. According to an example, the operation of the transistor devices 11-1N in series 1 is controlled such that at any given time a predetermined number of transistor devices are in diode mode and the remainder are in reverse conduction mode.According to an example, the transistor devices 11-1N in series 1 are implemented such that when a test current I3 with a given current level flows through the transistor series 1, the voltages across the transistor devices operating in diode mode are at least approximately equal, and the voltages across the transistor devices operating in reverse conduction mode are at least approximately equal. In this case, the total voltage V1 across series 1 is approximately equal at any given time.

[0032] This allows the power source arrangement 3 to operate continuously in the same operating state. Referring to Fig. 1. The current source arrangement 3 can include a current source 35 with first and second circuit nodes 351, 352 and be configured to generate a substantially constant test current I3. The magnitude of the test current can be selected based on a rated current (e.g., a rated current as provided by the transistor device manufacturer in a transistor device datasheet) of the transistor devices in the test. For example, the magnitude of the test current can be equal to the rated current of at least one of the transistor devices 11-1N in the test. Alternatively, the magnitude of the test current can be greater than the rated current, 1.5 times the rated current, at least twice the rated current, or at least three times the rated current. The larger the test current, the more bipolar degradation is triggered in each unit of time.Therefore, a higher test current can be used to assess the tendency or risk of bipolar degradation of transistor devices within an acceptable timeframe. However, if the test current is increased too much, the transistor devices may degrade too quickly and / or be destroyed. In that case, the test results would not be useful for obtaining statistics to assess bipolar degradation for the tested transistor devices.

[0033] The current source 35 can include a current regulator configured to control a voltage V35 between the first and second circuit nodes 351, 352 such that the test current I3 is at the specified current level. If the electrical resistance of the series circuit 1 connected to the current source arrangement 3 were to change, the current source 35 would have to readjust the voltage between circuit nodes 351, 352 to readjust the test current I3 to the specified current level. Such readjustment of the current is time-consuming and unnecessary if the transistor series circuit 1 is operated such that the same specified number of transistor devices operate simultaneously in diode mode and the remainder operate in reverse conduction mode, so that the overall voltage V1 is essentially constant.Furthermore, providing the test current at a predefined current level allows for precise adjustment and control of the electrical test conditions, enabling a high degree of reproducibility. Reproducibility is crucial for comparing results obtained across different test runs, devices under test (DUTs), test setups, or technology nodes. This ensures greater reliability of test results compared to situations where the actual current fluctuates significantly, exposing the DUTs to a range of varying electrical test conditions during testing. Furthermore, changes in current can lead to unpredictable stress.

[0034] Optionally, the current source arrangement 3 includes an inductor 34 connected in series with the current source 35. A freewheeling element 33, such as a diode, can be connected in parallel with the inductor 34. The freewheeling element 33 can take over some of the current through the inductor 34 when the current supplied by the current source 35 changes. The inductor 34 keeps the current I3 through the series circuit 1 substantially constant when slight fluctuations or changes in the resistance or impedance supplied by the transistor series circuit 1 to the current source arrangement 3 occur.

[0035] Fig. Figure 2 shows signal diagrams illustrating an example of a method for repeatedly operating the transistor devices 11-1N in diode mode. More precisely, it shows Fig. 2. Signal diagrams of the control signals S11-S1N received by the drivers 21-2N and the voltages V11-V1N across the individual transistor devices 11-1N. Each of the control signals S11-S1N can have a first signal level, which causes the respective driver 21-2N to turn on the respective transistor device 11-1N, so that the respective transistor device 11-1N operates in reverse conduction mode, or a second signal level, which causes the respective driver 21-2N to turn off the respective transistor device 11-1N, so that the respective transistor device 11-1N operates in diode mode. For illustrative purposes only, the first signal level is a high signal level (logic 1) and the second signal level is a low signal level (logic 0) in the Fig. 2 illustrated examples.

[0036] In one example, each of the transistor devices 11-1N is operated in diode mode for a predetermined duration T11-T1N. In another example, these durations T11-T1N are at least approximately equal. However, this is only an example. The durations T11-T1N for which the individual transistor devices 11-1N are operated in diode mode can differ. Furthermore, the duration of these times T11-T1N can vary across successive switching cycles.

[0037] With reference to the foregoing, operating a transistor device in diode mode involves operating the transistor device in the off-state and driving the test current I3 through the transistor device such that the test current I3 forward-biases the internal diode and flows through it. According to an example, the specified time durations T11-T1N are long enough to generate a charge carrier plasma containing both P-type and N-type charge carriers within the respective transistor device.

[0038] In the Fig. In the illustrated example 2, one of the transistor devices 11-1N is simultaneously in diode mode, while the remaining transistor devices 11-1N are in reverse conduction mode. The transistor devices 11-1N can also be operated sequentially in diode mode. As shown in the example, the transistor devices 11-1N are operated in the same predetermined sequence in diode mode.

[0039] According to one example, the transistor series circuit 1 is operated in several successive test cycles, with each of the transistor devices 11-1N being operated once in diode mode in each of these test cycles. According to one example, the order in which the transistor devices are operated in diode mode is the same in each of the test cycles. According to another example, the order in which the transistor devices are operated in diode mode varies over time in the test cycles.

[0040] For illustrative purposes only, the following is included in the Fig. In the illustrated example 2, the voltage V11-V1N across each of the transistor devices 11-1N in reverse conduction mode is lower than in diode mode. Thus, in this example, the voltage increases when the respective transistor device 11-1N switches from reverse conduction mode to diode mode, and decreases when the transistor device 11-1N switches back from diode mode to reverse conduction mode. However, this is only one example. As explained above, it is also possible that the voltage across each transistor device in reverse conduction mode is essentially the same as the voltage in diode mode.

[0041] Fig. Figure 2 schematically illustrates an ideal scenario in which each time the operating state of one of the transistor devices 11-1N changes from diode mode to reverse conduction mode, the operating state of another of the transistor devices 11-1N changes from reverse conduction mode to diode mode, so that the total voltage V1 across the series circuit 1 is at least approximately constant over the period in which the transistor devices 11-1N are repeatedly operated in diode mode.

[0042] In a less than ideal operating scenario, the total voltage V1 may contain short voltage spikes or short voltage drops, which can lead to problems. Fig. 3 and Fig. Figure 4 is schematically illustrated. Each of the Fig. 4 and Fig. Figure 5 shows signal diagrams of the control signals Si, Sii for controlling two of the transistor devices 11-1N and the corresponding voltages Vi, Vii across the two transistor devices. The two transistor devices are transistor devices that are operated sequentially in diode mode.

[0043] In the Fig. In the illustrated example 3, the transistor device represented by the control signal Si and the voltage Vi switches from diode mode to reverse conduction mode at a first time t1, before the transistor device represented by the control signal Sii and the voltage Vii switches from reverse conduction mode to diode mode at a second time t2. Thus, the time periods T1i and T1ii, during which the two transistor devices operate in diode mode, are separated in time, which can lead to a temporarily reduced resistance of the transistor series circuit 1.

[0044] In the Fig. In the illustrated example 4, the transistor device represented by the control signal Si and the voltage Vi switches from diode mode to reverse conduction mode before the transistor device represented by the control signal Sii and the voltage Vii has switched from reverse conduction mode to diode mode. Thus, the time periods T1i and T1ii, during which the two transistor devices operate in diode mode, overlap, which can lead to a temporarily increased resistance of transistor series 1.

[0045] To minimize suboptimal operation, the timing of the control signals S11-S1N and the gate drive performed by the gate drivers 21-2N can be adjusted accordingly. For example, the timing of the control signals S11-S1N can be set to create a small time overlap of the second signal levels in the successive control signals Sii, Si, or a small time gap between the second signal levels in the successive signals. The gate drive by the gate drivers 21-2N can be adjusted, for example, by setting a gate drive voltage, a gate drive current, and / or a gate resistance.

[0046] With reference to the above, the current source 35 can be implemented as a current regulator that adjusts the voltage V35 between its circuit nodes 351 and 352 such that the test current I3 is essentially constant. The temporarily reduced resistance of the series circuit 1 in the Fig. The scenario illustrated in point 3 can therefore lead to an increase in current I3 before the current source 35 readjusts the voltage V35 to regulate the current I3, and the temporarily increased resistance of the series circuit 1 in the Fig. In the scenario illustrated in section 4, a decrease in current I3 can occur before the current source 35 readjusts the voltage V35 to regulate the current I3. However, the inductor 34 can help to regulate the current I3 during those periods of increased or decreased resistance (which leads to the voltage drop / increase in the total voltage V1 in the circuit shown). Fig. 3 illustrated scenario and the tension peak in which in Fig. 4 illustrated scenario) to essentially keep constant, and can help prevent the power source 35 from starting to readjust the voltage V35 during those short periods of time.

[0047] In the following, an operating mode of the transistor series circuit 1, in which the test current I3 is driven through the transistor series circuit 1, is referred to as the test mode. The duration for which the transistor series circuit 1 is operated in test mode is referred to as the test mode duration. For example, simultaneously operating the same number of transistor devices in diode mode involves operating the same number of transistor devices in diode mode for 95% or even 98% of the test mode duration.

[0048] Operating only one of the transistor devices 11-1N simultaneously in diode mode, as in Fig. Figure 2 illustrates this, but it is only an example. Any number of transistor devices less than a total of N of transistor devices 11-1N can be operated simultaneously in diode mode. Normally, more power is dissipated in the transistor devices in diode mode than in reverse conduction mode, so the transistor devices can heat up during operation in diode mode. Operating each transistor device in reverse conduction mode for specific durations can help keep the temperature of the transistor devices below a temperature threshold, such as a predetermined upper temperature limit, or within a predetermined temperature range.

[0049] For illustrative purposes, shows Fig. 5 signal diagrams illustrating an example of a method for operating the transistor devices 11-1N such that more than one of the transistor devices 11-1N is operated simultaneously in diode mode. In the diagram shown in Fig. In the illustrated example 5, two of the transistor devices 11-1N are operated simultaneously in diode mode. Fig. T11-T1N denotes the durations during which the respective transistor devices are operated in diode mode. As previously explained, these durations T11-T1N can be essentially the same or they can differ from one another. Furthermore, the duration for which a respective transistor device is repeatedly operated in diode mode can be fixed or it can vary over successive switching cycles.

[0050] In any case, the durations T11-T1N, for which the individual transistor devices 11-1N are operated in diode mode, can range, for example, from a few nanoseconds (µm) to several seconds.

[0051] With reference to the foregoing, operating the transistor devices 11-1N in diode mode can cause them to heat up. According to one example, to prevent the transistor devices 11-1N from overheating, or to prevent their temperature from exceeding a predetermined upper temperature limit, the duration of operation of the transistor series 1 in test mode can be limited to a predetermined time, which may range from a few hundred nanoseconds to several minutes. According to another example, the transistor devices are allowed to cool down during a pause period before the series 1 is next operated in test mode for a predetermined time. During the pause period, the test current I3 is not driven through the transistor series 1. This type of operating mode is hereafter referred to as pause mode.

[0052] According to one example, in order to enable the current source arrangement 3 to operate continuously when the operation of the transistor series circuit 1 switches from test mode to pause mode and back again, a bypass circuit is connected in parallel with the transistor series circuit 1 and is configured to supply the test current I3 during the pause periods. An example of a circuit arrangement containing a bypass circuit is given in Fig. 6 illustrates.

[0053] With reference to Fig. The bypass circuit 6 contains a first electronic switch 61 and a load Z connected in series with the first electronic switch 61. A second electronic switch 62 is connected in series with the transistor series circuit 1. The bypass circuit with the load Z and the first electronic switch 61 is connected in parallel with the series circuit containing the second electronic switch 62 and the transistor series circuit 1. The first and second electronic switches 61 and 62 are controlled by the controller 4 via respective control signals S61 and S62.

[0054] An example of operating the first and second electronic switches 61, 62 is given in Fig. Figure 7 illustrates the signal diagrams of the control signals S61, S62 received by the first and second electronic switches 61, 62. Each of these control signals S61, S62 can have an on level, which turns the respective switch 61, 62 on, or an off level, which turns the respective switch 61, 62 off. For illustrative purposes only, the on level is a high signal level and the off level is a low signal level in the diagram. Fig. 7 illustrated examples.

[0055] In test mode, the second electronic switch 62 is in the on-state and the first electronic switch 61 is in the off-state, so the test current I3 flows through the transistor series circuit 1. At the end of test mode and at the beginning of pause mode, the second electronic switch 62 switches off and the first electronic switch 61 switches on, so that the bypass circuit takes over the test current I3. As in Fig. As illustrated in dashed lines in Figure 7, the durations during which the first and second electronic switches 61, 62 are in the on-state may slightly overlap at the end of the test mode to ensure that there is always a conductive current path for the test current I3.

[0056] According to one example, the load Z is implemented such that it has an electrical resistance that is at least approximately equal to the electrical resistance provided by the transistor series circuit 1 to the current source arrangement 3 in the test mode. In this example, there is no need for the current source arrangement to readjust the voltage V35 across the current source 35.

[0057] Even if the resistance of the load Z differs from the resistance of the transistor series circuit 1, there is always a current path for the test current I3, so there is no need for the current source arrangement 3 to increase the test current I3 again at the beginning of the next period in which the series circuit 1 is operating in test mode.

[0058] According to an example, the method further includes measuring the temperature of at least one of the transistor devices 11-1N during the pause period. For this purpose, a temperature detector is connected to at least one of the transistor devices 11-1N and is configured to provide a temperature signal that is representative of the temperature of the at least one of the transistor devices 11-1N.

[0059] Fig. Figure 8 illustrates an example of a temperature detector 5 connected to each of the transistor devices 11-1N, specifically 1i. In this example, the temperature sensor 5 includes a current source 51 configured to drive a measuring current I51 through the internal diode of the transistor device 1i. During the pause period, the transistor device 1i is in the off state, so the measuring current I51 drives the transistor device in diode mode. A voltage sensor 52 detects a voltage across the internal diode of the transistor device 1i, as caused by the measuring current I51, and outputs a measurement signal S52 that is representative of the voltage. The voltage across the internal diode caused by the measuring current depends on the temperature, decreasing as the temperature increases.Thus, the measurement signal S52, which is output by the voltage sensor 52, is representative of the temperature of the transistor devices 1i.

[0060] According to another example, which is in Fig. As illustrated in Figure 9, the temperature detector 5 is connected to the entire series circuit 1. In this example, during the pause period, the measuring current I51 operates each of the transistor devices 11-1N in diode mode, and the voltage sensor 52 measures the total voltage V1 across the series circuit 1. Here, the measurement signal S52 can be representative of the average temperature of all transistor devices 11-1N. Alternatively, the voltage sensor 52 can be connected in parallel with only a subset of the transistor devices 11-1N in the series circuit 1, and the current source 51 drives the measuring current I51 through at least this subset of transistor devices. In this case, the measurement signal S52 can be representative of the average temperature of this subset of transistor devices.For example, the measuring current I51 can be driven through all transistor devices 11-1N of the series circuit 1, and the voltage sensor 52 is connected in parallel with only one of the transistor devices. According to one example, the temperature detector 5 can contain multiple current sources 51 and / or multiple voltage sensors 52 (not shown). For example, the temperature detector 5 contains multiple voltage sensors 52, each of which is connected in parallel with a different subset of the transistor devices 11-1N of the series circuit 1. In another example, the temperature detector 5 contains a current source 51 that drives the measuring current I51 through all transistor devices 11-1N of the series circuit 1, and contains a voltage sensor 52 corresponding to each transistor device 11-1N of the series circuit 1 and connected in parallel with the corresponding transistor device.Thus, a separate temperature measurement is possible for each of the transistor devices. The circuit arrangement according to... Fig. 9 may contain a bypass circuit. However, such a bypass circuit is in Fig. 9 not illustrated.

[0061] According to one example, the temperature sensor 5 is configured to drive the measuring current I51 through the at least one transistor device only for a short measurement duration, enabling the temperature sensor to measure the voltage across the at least one transistor device, so that measuring the temperature does not lead to an increase in the temperature of the at least one transistor device. According to one example, the measuring current is selected from between 1 milliampere (mA) and 100 mA. According to another example, the measuring current I51 is smaller than the test current, such as at most 10%, at most 2%, or at most 1% of the test current I3.

[0062] It should be noted that the one in the Fig. 8 and Fig. The temperature sensor shown in Figure 9 is only one example. Any type of temperature sensor designed to measure the temperature of the transistor device 1i can also be used.

[0063] It should be noted that the circuit arrangement can contain multiple temperature sensors. Thus, the circuit arrangement can include two or more temperature sensors, each connected to one of the 11-1N transistor devices. In addition to the two or more temperature sensors connected to one of the 11-1N transistor devices, the circuit arrangement can include a temperature sensor that is located in Fig. 9 illustrated types included.

[0064] According to one example, the temperature information provided by the at least one temperature sensor 5 is used to set the duration of the pause period. According to another example, the transistor series circuit 1 is repeatedly operated in test mode, with successive test mode periods separated by pause periods. According to another example, the duration of the pause periods is set depending on the temperature information provided by the at least one temperature sensor. According to another example, the duration of each pause period is variable, and the pause period ends when the temperature information provided by the at least one temperature sensor indicates that the temperature provided by the at least one temperature sensor is lower than a predetermined temperature threshold.According to one example, the circuit arrangement contains several temperature sensors and the pause period ends when each of the temperatures detected by the temperature sensors is lower than the specified temperature threshold.

[0065] According to one example, not only the durations of the pause periods but also the durations of the test mode periods are set based on the temperature information provided by the at least one temperature sensor 5. According to another example, based on the temperature information provided by the at least one temperature sensor 5, the durations of the pause periods and the test mode periods are set such that the temperature of the transistor devices 11-1N is maintained within a given temperature range, such as between 100 °C and 200 °C, and in particular between 140 °C and 170 °C, during the test mode periods and the pause periods. Maintaining the temperature within a given temperature range can help to reproduce test conditions in different tests and can be useful when comparing test results from different tests.

[0066] For example, the relationship between the duration of the test mode periods and the pause mode periods can define a duty cycle of the test. The duty cycle can be set based on the temperature information provided by the at least one temperature sensor 5 to maintain the temperature of the transistor devices 11-1 N within a predetermined temperature range during the test. The duty cycle can be set by setting only the test mode periods and keeping the pause mode periods fixed, or by setting only the pause mode periods and keeping the test mode periods fixed, or by setting both the test mode periods and the pause mode periods.

[0067] According to one example, the durations of the pause periods are long enough to allow the temperature of at least one of the transistor devices to be measured during the pause periods.

[0068] As with reference to Fig. As explained in section 6, providing a bypass circuit in parallel to the transistor series circuit 1 can offer the advantage of continuously operating the current source arrangement 3 with a substantially constant voltage V35 and a substantially constant test current I3 during the test mode periods and pause periods. In the example according to Fig. 6 The power provided by the power source arrangement 3 during the pause period is dissipated in the load Z.

[0069] According to an example that was in Fig. As illustrated in Figure 10, the circuit arrangement comprises at least two transistor series circuits 1a, 1b, which are connected in parallel and each is connected to the current source arrangement 3. "Connected in parallel" in this context means that each of the two transistor series circuits 1a, 1b is connected in series with a respective electronic switch 63, 64, and the series circuits, each containing one of the transistor series circuits 1a, 1b and the respective switch 63, 64, are connected in parallel.

[0070] In the Fig. In the illustrated example 10, the circuit arrangement contains two transistor series circuits 1a, 1b. However, this is only one example. According to another example, the circuit arrangement contains more than two transistor series circuits, each connected in series with a respective electronic switch, wherein the series circuits, each containing a transistor series circuit and a respective electronic switch, are connected in parallel and connected to the current source arrangement 3.

[0071] Each of the transistor series circuits 1a, 1b contains several transistor devices 11a-1Na, 11b-1Nb connected in series. Everything previously explained herein concerning the implementation of the transistor series circuit 1 and the transistor devices 11-1N contained therein applies accordingly to each of the at least two transistor series circuits 1a, 1b, which are connected in Fig. Figure 10 illustrates this. According to one example, the at least two transistor series circuits 1a, 1b are implemented with the same number of transistor devices and with the same type of transistor device. However, this is only one example. It is also possible to implement the at least two transistor series circuits 1a, 1b with different numbers of transistor devices and with different types of transistor devices.

[0072] According to an example, each of the at least two transistor series circuits 1a, 1b is repeatedly operated in test mode. Operating each of the transistor series circuits 1a, 1b in test mode involves turning on the electronic switch 63, 64, which is connected in series with the respective transistor series circuit 1a, 1b, so that the test current I3 flows as a reverse current through the respective transistor series circuit 1a, 1b. During the test mode of one of the transistor series circuits 1a, 1b, the electronic switches that are connected in series with the rest of the transistor series circuits are in the off state, so that no test current flows through the rest of the transistor series circuits and the rest of the transistor series circuit is in the pause mode.

[0073] Everything previously explained herein regarding the operation of the transistor series circuit 1 described above in test mode applies accordingly to the operation of one of the at least two transistor series circuits 1a, 1b in test mode. The electronic switches 63, 64, which determine which of the transistor series circuits 1a, 1b is operated in test mode, are controlled by the controller 4 by respective control signals S63, S64. Furthermore, the operation of the transistor series circuits 1a, 1b in test mode is controlled by the controller 4, which is configured to generate control signals S11a-S1Na, S11b-S1Nb for the transistor devices 11a-1Na, 11b-1Nb contained in the transistor series circuits 1a, 1b. The control signals S11a-S1Na, S11b-S1Nb are received by control circuits 2a, 2b, which control the operation of the transistor devices 11a-1Na, 11b-1Nb depending on the control signals S11a-S1Na, S11b-S1Nb.

[0074] According to one example, repeatedly operating the at least two transistor series circuits 1a, 1b in test mode involves simultaneously operating only one of the at least two transistor series circuits 1a, 1b in test mode. According to another example, repeatedly operating the at least two transistor series circuits 1a, 1b in test mode involves simultaneously operating the same number of transistor devices in diode mode in each of the at least two transistor series circuits 1a, 1b. In this example, if the at least two transistor series circuits 1a, 1b are implemented with transistor devices of the same type and the same number of transistor devices, the voltages V1a, V1b across the at least two transistor series circuits 1a, 1b in test mode are at least approximately equal.Therefore, there is no need for the current source arrangement 3 to readjust the voltage V35 across the current source 35 when the circuit arrangement switches from the test mode of one of the transistor series circuits 1a, 1b to the test mode of another of the transistor series circuits 1a, 1b.

[0075] The switches 63, 64, which are connected in series with the transistor series circuits 1a, 1b, are controlled such that when one of the electronic switches 63, 64 switches off to end the test mode of the transistor series circuit 1a, 1b connected in series with it, the electronic switch connected in series with the transistor series circuit to be operated in test mode switches on immediately next, or switches on a short time beforehand. This helps to avoid voltage overshoots caused by the inductor 32 and is in Fig. Figure 11 schematically illustrates examples of signal diagrams of the control signals S63, S64, which are received by the electronic switches 63, 64.

[0076] Fig. Figure 12 illustrates a circuit arrangement according to another example. In the circuit arrangement according to Fig. 12 is another transistor device 70, which can also be called a dummy transistor device or sacrificial transistor device, connected in series with the transistor series circuit 1, wherein the series circuit containing the transistor series circuit 1 and the dummy transistor device 70 is connected to the current source arrangement 3.

[0077] The dummy transistor device 70 contains an internal diode, allowing it to operate in diode mode. The dummy transistor device 70 is connected in series with the transistor series circuit 1, such that its internal diode is connected in series with the internal diodes of the transistor devices 11-1N in the transistor series circuit 1. By way of example, the dummy transistor device 70 is a transistor device of the same type as the transistor devices 11-1N in the transistor series circuit 1, such that the voltage drop across the dummy transistor device 70 when operated in diode mode is at least approximately equal to the voltage drop across any one of the transistor devices 11-1N in the transistor series circuit 1 when operated in diode mode.

[0078] The dummy transistor device 70 is operated by a driver 80, which is configured to switch the dummy transistor device 70 on or off depending on a control signal S70 received by the controller 4.

[0079] According to an example, operating the transistor series circuit 1 according to Fig. 12. The operation of the transistor series circuit 1 is such that at any given time at most one of the transistor devices 11-1N is operated in diode mode and the remaining transistor devices are operated in reverse conduction mode. During periods in which none of the transistor devices 11-1N of the transistor series circuit 1 is in diode mode, the dummy transistor device 70 is operated in diode mode, so that during the entire period in which the test current I3 flows through the series circuit containing the transistor series circuit 1 and the dummy transistor device 70, the total voltage V1 across the series circuit is substantially the same. During periods in which one of the transistor devices 11-1N of the transistor series circuit 1 is in diode mode, the dummy transistor device is operated in reverse conduction mode.

[0080] The control signal S70, which controls the operation of the dummy transistor device, depends on the control signals S11-S1N for controlling the operation of the transistor devices 11-S1N of the transistor series circuit 1. An example of a circuit 41, which is included in the control 4 and is configured to generate the control signal S70 of the dummy transistor device 70, is shown in Fig. Figure 13 illustrates this. In this example, the control signal S70 is obtained by negating (through a NOT gate 412) an output signal of an OR gate 411, which receives the control signals S11-S1N of the transistor devices 11-1N of the transistor series 1. In this example, the dummy transistor device 70 turns off to operate in diode mode when each of the transistor devices 11-1N of the transistor series 1 is in the forward state to operate in reverse conduction mode.

[0081] Fig. Figure 14 shows a circuit arrangement based on the circuit arrangement according to Fig. 13 is based. In which in Fig. In the illustrated example 14, each of the transistor devices 11-1N in the transistor series circuit 1 has an associated dummy transistor device 71-7N. The transistor device 11-1N and the associated dummy transistor device 71-7N are operated complementarily, such that at any given time one of the transistor devices 11-1N and the corresponding dummy transistor device 71-7N is in diode mode. Thus, at any given time, a number of transistor devices equal to the number of transistor devices 11-1N contained in the transistor series circuit 1 is simultaneously operated in diode mode, so that the total voltage V1 across the circuit containing the transistor series circuit 1 and the respective dummy transistor devices 71-7N is at least approximately the same at any given time. The manner in which the transistor devices 11-1N are repeatedly operated in diode mode is arbitrary.This means, in particular, that the number of transistor devices in transistor series 1 that are operated simultaneously in diode mode is arbitrary and can even change over time.

[0082] In the Fig.The illustrated example 14 includes the transistor circuit connected to the current source arrangement 3, the transistor series circuit 1 with the transistor devices 11-1N under test, and the dummy transistor series circuit 7 with the dummy transistor devices 71-7N connected in series. However, this is for illustrative purposes only. The way in which the transistor devices 11-1N and the dummy transistor devices 71-7N are connected in series is arbitrary. According to an unillustrated example, the transistor devices 11-1N under test and the dummy transistor devices 71-7N are arranged alternately in the series circuit connected to the current source arrangement 3.

[0083] Some of the aspects discussed above are briefly summarized below with reference to numbered examples. Example 1. Method comprising: connecting a series circuit containing several series-connected transistor devices between output nodes of a current source arrangement; driving a test current provided by the current source arrangement through the series circuit so that a reverse current flows through each of the several transistor devices; and repeatedly operating each of the several transistor devices in a diode mode for a predetermined duration of time. Example 2. Method according to Example 1, wherein the transistor devices are MOSFETs. Example 3. Method according to Example 1 or 2, wherein the specified time period is chosen such that a charge carrier plasma is generated during diode mode operation within the specified time period, and wherein a time period between two successive specified time periods is chosen such that the charge carrier plasma can completely recombine within the time period. Example 4. Method according to one of Examples 1 to 3, wherein the repeated operation of each of the multiple transistor devices in diode mode involves the simultaneous operation of a predetermined first number of transistor devices in diode mode. Example 5. Procedure according to Example 4, where the given first number is 1. Example 6. Method according to Example 4, wherein the specified first number is greater than 1 and less than a total number of the multiple transistor devices. Example 7. Method according to Example 4, wherein the simultaneous operation of the specified first number of transistor devices in diode mode includes operating the specified first number of transistor devices in diode mode for at least 95% of the duration of driving the current through the series connection. Example 8. Method according to Example 4, wherein the simultaneous operation of the specified first number of transistor devices in diode mode includes the simultaneous operation of the first number of transistor devices in diode mode, such that a voltage across the series circuit is at least approximately constant over the duration of driving the current through the series circuit. Example 9. Method according to Example 4, wherein at each time during the driving of the test current through the series circuit exactly the specified first number of transistor devices is operated in diode mode. Example 10. Method according to any of Examples 1 to 9, wherein the repeated operation of each of the multiple transistor devices in diode mode includes operating the series circuit in several successive test cycles, wherein in each of the test cycles each of the multiple transistor devices is operated in diode mode at least once for the specified duration. Example 11. Method according to Example 10, wherein in each test cycle the multiple transistor devices are operated in the same sequence in diode mode. Example 12. Method according to one of Examples 1 to 7, wherein the specified time duration is at least approximately the same for each of the multiple transistor devices. Example 13. Method according to any one of Examples 1 to 12, wherein driving the test current through the series circuit includes driving the current through the series circuit during a test mode of the series circuit, and wherein the method further includes bypassing the series circuit with the test current during a pause mode of the series circuit. Example 14. Method according to Example 13, wherein bypassing the series circuit with the test current involves driving the test current through a bypass circuit. Example 15. Method according to Example 13, wherein the series circuit is one of at least two series circuits connected in parallel between the output nodes of the current source arrangement, and wherein bypassing the series circuit by the test current involves driving the test current through another of the at least two series circuits. Example 16. Method according to Example 15, further comprising: alternately driving the test current through the at least two series circuits. Example 17. Method according to one of Examples 13 to 16, further comprising: measuring the temperature of at least one of the several transistor devices. Example 18. Method according to Example 17, wherein measuring the temperature of at least one of the several transistor devices includes measuring the temperature when the series circuit is in pause mode. Example 19. Method according to Example 17 or 18, further comprising: setting a duration of the pause mode and / or the test mode depending on the measured temperature. Example 20. Method according to any one of Examples 1 to 19, further comprising: connecting at least one dummy transistor device in series with the multiple transistor devices; and operating the at least one dummy transistor device in diode mode, such that at any given time a predetermined second number of devices, comprising the multiple transistor devices and the at least one further transistor device, is operated in diode mode. Example 21. Method according to Example 20, wherein the at least one dummy transistor device contains several dummy transistor devices and wherein the number of several dummy transistor devices is equal to the number of several transistor devices. Example 22. Method according to any of Examples 1 to 21, wherein the current source arrangement includes a current regulator and an inductor connected in series with the current regulator. Example 23. Circuit arrangement comprising: a current source arrangement containing output nodes and configured to provide a current; a series circuit comprising several transistor devices connected in series between the output nodes of a current source arrangement such that a reverse current can flow through each of the several transistor devices when the current is provided by the current source arrangement; and a controller configured to repeatedly operate each of the several transistor devices in a diode mode for a predetermined period of time.

Claims

[1] Procedure, encompassing: Connecting a series circuit (1) containing several series-connected transistor devices (11-1N) between output nodes (31, 32) of a current source arrangement (3); Driving a test current (I3) provided by the current source arrangement (3) through the series circuit (1) so that a reverse current flows through each of the multiple transistor devices (11-1N); and Repeated operation of each of the multiple transistor devices (11-1N) in a diode mode for a predetermined time period (T11-T1N). [2] Method according to claim 1, wherein the transistor devices are MOSFETs. [3] Method according to claim 1 or 2, wherein the specified time duration is chosen such that a charge carrier plasma is generated during diode mode operation within the specified time duration, and wherein a time interval between two successive predetermined time intervals is chosen such that the charge carrier plasma can completely recombine within the time interval. [4] Method according to any one of claims 1 to 3, wherein the repeated operation of each of the multiple transistor devices (11-1N) in diode mode comprises the simultaneous operation of a predetermined first number of transistor devices (11-1N) in diode mode. [5] Method according to claim 4, wherein the predetermined first number is 1. [6] Method according to claim 4, wherein the predetermined first number is greater than 1 and less than a total number of the multiple transistor devices (11-1N). [7] Method according to claim 4, wherein the simultaneous operation of the predetermined first number of transistor devices in diode mode comprises operating the predetermined first number of transistor devices in diode mode for at least 95% of the duration of driving the current (I3) through the series connection. [8] Method according to claim 4, wherein the simultaneous operation of the predetermined first number of transistor devices (11-1N) in diode mode comprises the simultaneous operation of the first number of transistor devices (11-1N) in diode mode, such that a voltage across the series circuit (1) is at least approximately constant over the duration of driving the current (I3) through the series circuit (1). [9] Method according to claim 4, wherein at each time during the driving of the test current (I3) through the series connection (1) exactly the predetermined first number of transistor devices is operated in diode mode. [10] Method according to any one of claims 1 to 9, wherein the repeated operation of each of the multiple transistor devices (11-1N) in diode mode includes operating the series connection (1) in several successive test cycles, wherein in each of the test cycles each of the multiple transistor devices (11-1N) is operated in diode mode at least once for the specified time period (T11-T1N). [11] Method according to claim 10, wherein in each test cycle (T) the multiple transistor devices (11-1N) are operated in the same sequence in diode mode. [12] Method according to any one of claims 1 to 7, wherein the predetermined time duration (T11-T1N) is at least approximately the same for each of the multiple transistor devices (11-1N). [13] Method according to any one of claims 1 to 12, wherein driving the test current (I3) through the series circuit (1) includes driving the current (I3) through the series circuit (1) during a test mode of the series circuit (1), and wherein the method further comprises bypassing the series connection (1) by the test current (I3) during a pause mode of the series connection. [14] Method according to claim 13, wherein bypassing the series circuit (1) by the test current (I3) comprises driving the test current through a bypass circuit. [15] Method according to claim 13, wherein the series circuit is one of at least two series circuits (1a, 1b) connected in parallel between the output nodes (31, 32) of the current source arrangement (3), and where bypassing the series circuit by the test current (I3) includes driving the test current (I3) through another of the at least two series circuits (1a, 1b). [16] The method of claim 15, further comprising: alternating driving of the test current (I3) through the at least two series circuits (1a, 1b). [17] Method according to any one of claims 13 to 16, further comprising: Measuring the temperature of at least one of the several transistor devices (11-1N). [18] Method according to claim 17, wherein measuring the temperature of at least one of the several transistor devices (11-1N) comprises measuring the temperature when the series circuit (1a, 1b) is in pause mode. [19] Method according to claim 17 or 18, further comprising: Setting the duration of the pause mode and / or the test mode depending on the measured temperature. [20] Method according to any one of claims 1 to 19, further comprising: Connect at least one dummy transistor device (7; 71-7N) in series with the several transistor devices (11-1N); and Operating the at least one dummy transistor device (7; 71-7N) in diode mode, such that at any given time a predetermined second number of devices containing the multiple transistor devices (11-1N) and the at least one further transistor device (70; 71-7N) is operated in diode mode. [21] Method according to claim 20, wherein the at least one dummy transistor device comprises several dummy transistor devices (71-7N), and where the number of multiple dummy transistor devices (71-7N) is equal to the number of multiple transistor devices (11-1N). [22] Method according to any one of claims 1 to 21, wherein the current source arrangement (3) comprises a current regulator (35) and an inductor (32) connected in series with the current regulator. [23] Circuit arrangement comprising: a power source arrangement (3) comprising output nodes (31, 32) and configured to provide a current (I3); a series circuit (1) comprising several transistor devices (11-1N) connected in series between the output nodes (31, 32) of a current source arrangement (3) such that a reverse current can flow through each of the several transistor devices (11-1N) when the current (I3) is supplied by the current source arrangement (3); and a controller (4) which is configured to operate each of the multiple transistor devices (11-1N) repeatedly in a diode mode for a predetermined time period (T11-T1N).

Citation Information

Patent Citations

  • CN000118130995A