Semiconductor device and power conversion device

Abstract

A semiconductor device is provided in which the occurrence of a short-circuit failure is suppressed. A semiconductor device (100) comprises: a substrate (1); a semiconductor element (2); a terminal (4); and a metal wire (6). The semiconductor element (2) is arranged on the substrate (1). The terminal (4) is arranged at a position that is farther away from the substrate (1) than the semiconductor element (2). The metal wire (6) connects the semiconductor element (2) and the terminal (4). A notch portion (h) is provided in the terminal (4). A part of the metal wire (6) is inserted into the notch portion (h).

Description

CROSS-REFERENCE TO RELATED APPLICATIONS

[0001] This non-provisional application is based on Japanese Patent Application No. 2024-033678, filed with the Japan Patent Office on March 6, 2024, the entire contents of which are hereby incorporated by reference. BACKGROUND OF THE INVENTIONField of the invention

[0002] The present disclosure relates to a semiconductor device and a power conversion device. Description of the state of the art

[0003] A wire bonding method using a metal wire is conventionally known as a method for forming internal wiring in a semiconductor device (see, for example, Japanese Utility Model Laid-Open No. 1-163345 (full text)). In Japanese Utility Model Laid-Open No. 1-163345, a metal wire is formed along a direction in which a terminal extends. SUMMARY OF THE INVENTION

[0004] However, in a transfer-molded semiconductor device, a metal wire may be deformed by a molding resin when the molding resin is injected as a sealing resin. Consequently, the deformation of the metal wire may cause a short-circuit failure.

[0005] The present disclosure has been made to solve the above-described problem, and an object of the present disclosure is to provide a semiconductor device in which the occurrence of a short-circuit failure is suppressed.

[0006] A semiconductor device according to the present disclosure comprises: a substrate; a semiconductor element; a terminal; and a metal wire. The semiconductor element is disposed on the substrate. The terminal is disposed at a position farther from the substrate than the semiconductor element. The metal wire connects the semiconductor element and the terminal. A notch portion is provided in the terminal. A part of the metal wire is inserted into the notch portion.

[0007] A power conversion device according to the present disclosure includes: a main conversion circuit; and a control circuit. The main conversion circuit includes the semiconductor device described above and converts input power and outputs the converted input power. The control circuit outputs a control signal for controlling the main conversion circuit to the main conversion circuit.

[0008] The above and other objects, features, aspects and advantages of the present invention will become more apparent from the following detailed description of the present invention when taken in conjunction with the accompanying drawings. BRIEF DESCRIPTION OF THE DRAWINGS Fig. 1 is a side view of a semiconductor device according to a first embodiment. Fig. 2 is a plan view of the semiconductor device according to the first embodiment. Fig. 3 is a partially enlarged side view of a Fig. 1 shown area III. Fig. 4 is a plan view of a signal terminal according to the first embodiment. Fig. 5 is a side view of a semiconductor device according to a second embodiment. Fig. 6 is a plan view of the semiconductor device according to the second embodiment. Fig. 7 is a side view of a semiconductor device according to a third embodiment. Fig. 8 is a plan view of the semiconductor device according to the third embodiment. Fig. 9 is a plan view of a signal terminal according to the third embodiment. Fig. 10 is a side view of a semiconductor device according to a fourth embodiment. Fig. 11 is a partially enlarged side view of a Fig. 10 shown area XI. Fig. 12 is a plan view of a signal terminal according to a fifth embodiment. Fig. 13 is a plan view of a signal terminal according to a sixth embodiment. Fig. 14 is a block diagram showing a configuration of a power conversion system to which a power conversion device according to a seventh embodiment is applied. DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0009] Embodiments of the present disclosure will be described below. Unless otherwise noted, the same or corresponding portions in the following drawings are denoted by the same reference numerals, and their descriptions will not be repeated. First embodiment<Konfiguration der Halbleitervorrichtung>

[0010] Fig. 1 is a side view of a semiconductor device 100 according to a first embodiment. Fig. 2 is a plan view of the semiconductor device 100 according to the first embodiment. Fig. 3 is a partially enlarged side view of a Fig. 1 shown area III. Fig. 4 is a plan view of a signal terminal 41 according to the first embodiment.

[0011] The Fig. 1 to Fig. The semiconductor device 100 shown in Fig. 4 is, for example, a power semiconductor device 100 and mainly comprises a substrate 1, a semiconductor element 2, a connecting portion 3, a terminal 4, a metal wire 6 and a sealing portion 7. In the Fig. 1 and Fig. 2, the sealing section 7 is indicated by a dotted line.

[0012] The substrate 1 comprises a heat spreader 11, an insulating film 12, and a metal foil 13. The heat spreader 11 is arranged on the insulating film 12. The insulating film 12 is arranged on the metal foil 13. The metal foil 13 is arranged on a surface of the insulating film 12 that is opposite a surface on which the heat spreader 11 is arranged.

[0013] One material of the heat spreader 11 is, for example, copper (Cu). As in Fig. As shown in Figure 2, the heat spreader 11 includes a plurality of heat spreader sections 11a and 11b. The plurality of heat spreader sections 11a and 11b are arranged to be spaced apart from each other in the y-direction.

[0014] As in Fig. As shown in Figure 2, the substrate 1 has a main surface 11s. The main surface 11s is a surface to which the semiconductor element 2 is electrically connected. The heat spreader portion 11a has a surface 11sa. The heat spreader portion 11b has a surface 11sb. The surfaces 11sa and 11sb form the main surface 11s of the substrate 1.

[0015] As in Fig. 1 and Fig. As shown in Figure 2, a direction perpendicular to the main surface 11s is defined as the z-direction. The x-direction and the y-direction are directions perpendicular to the z-direction. The y-direction is a direction perpendicular to the x-direction. That is, the main surface 11s is a surface extending in the x-direction and the y-direction.

[0016] The insulating film 12 is connected to a surface of the heat spreader 11 that is opposite the surface 11sa and the surface 11sb. The insulating film 12 can be, for example, an insulating film containing inorganic powder or glass fiber. The metal foil 13 and the heat spreader 11 are electrically insulated by the insulating film 12.

[0017] A material of the metal foil 13 may be a metal with high thermal conductivity. For example, the material of the metal foil 13 may be any material selected from the group consisting of aluminum, copper, iron, and nickel, or may be an alloy containing at least one material selected from the group consisting of aluminum, copper, iron, and nickel.

[0018] As in Fig. 1 and Fig. 2, the heat spreader 11 may be smaller than each of the insulating film 12 and the metal foil 13 in the x-direction and the y-direction in a plan view of the main surface 11s.

[0019] The substrate 1 having a three-layer structure consisting of the heat spreader 11, the insulating film 12, and the metal foil 13 can be used as the substrate 1, or an insulating substrate can be used as the substrate 1. The insulating substrate can be composed of a base plate, an insulating layer, and a circuit pattern. The insulating layer can be disposed on the base plate, and the circuit pattern can be disposed on the insulating layer. Each of the base plate and the circuit pattern is made of, for example, a metal such as copper. The insulating layer ensures electrical insulation from the outside of the semiconductor device 100. A material of the insulating layer can be, for example, inorganic ceramic or can be a material including ceramic powder dispersed in a thermosetting resin such as epoxy resin.

[0020] The semiconductor element 2 comprises a plurality of semiconductor element sections 21, 22, 23 and 24. As in Fig. As shown in Figure 1, the semiconductor element 2 is bonded to the main surface 11s of the substrate 1 with the bonding portion 3 interposed therebetween. Specifically, each of the semiconductor element portions 21 and 22 is bonded to the surface 11sa with the bonding portion 3 interposed therebetween. Each of the semiconductor element portions 23 and 24 is bonded to the surface 11sb with the bonding portion 3 (not shown) interposed therebetween.

[0021] A material of the connecting portion 3 may, for example, be solder, an electrically conductive adhesive, or a connecting material containing silver (Ag) particles or copper (Cu) particles with sinterability. By using the connecting material with sinterability to connect the semiconductor element 2 and the substrate 1, the heat dissipation properties and the service life of the connecting portion 3 are improved compared to using solder.

[0022] The semiconductor element 2 is the so-called power semiconductor element 2, which controls the electrical power. A material of the semiconductor element 2 may be silicon (Si), or may be silicon carbide (SiC), gallium nitride (GaN), gallium oxide (Ga2O3), or diamond as a wide-band-gap semiconductor material. When such a so-called wide-band-gap semiconductor material with a wider band gap than that of silicon is used as the material of the semiconductor element 2, a semiconductor device 100 with high efficiency and compatibility with high temperatures can be obtained.

[0023] The semiconductor element 2 can be of any type. For example, an insulated gate bipolar transistor (IGBT), a freewheeling diode (FWD), or a metal-oxide-semiconductor field-effect transistor (MOSFET) can be used.

[0024] As in Fig. As shown in Figure 2, semiconductor element sections 21 and 22 are arranged such that they are spaced apart from each other in the x-direction. Semiconductor element sections 23 and 24 are arranged such that they are spaced apart from each other in the x-direction.

[0025] As in Fig. As shown in Figure 2, each of the semiconductor element sections 21 and 23 includes one main electrode 81 and three signal electrodes 82. The main electrode 81 and three signal electrodes 82 are provided on one surface (upper surface) of each of the semiconductor element sections 21 and 23. Each of the semiconductor element sections 22 and 24 includes one main electrode 83. The main electrode 83 is provided on one surface (upper surface) of each of the semiconductor element sections 22 and 24. The main electrode 81 is arranged to be spaced apart in the x-direction from each of the three signal electrodes 82. Three signal electrodes 82 may be arranged to be spaced apart from each other at equal intervals in the y-direction.

[0026] The connector 4 has a main connector 42 and a plurality of signal connectors 41. As shown in Fig. As shown in FIG. 2, the main terminal 42 includes a plurality of main terminal portions 42a, 42b, and 42c. The metal wire 6 connects the semiconductor element 2 and the terminal 4. The metal wire 6 includes a plurality of metal wire portions 61, 62, 63, and 64. In the semiconductor device 100 according to the first embodiment, six metal wire portions 61, six metal wire portions 62, three metal wire portions 63, and one metal wire portion 64 are provided.

[0027] Each of the three metal wire portions 62 connects the main terminal portion 42a, the main electrode 83 of the semiconductor element portion 22, and the main electrode 81 of the semiconductor element portion 21 by a wire bonding method. Each of the three metal wire portions 62 connects the main terminal portion 42c, the main electrode 83 of the semiconductor element portion 24, and the main electrode 81 of the semiconductor element portion 23 by a wire bonding method. In this way, the main terminal 42, through which a main current flows, is electrically connected to the main electrodes 81 and 83, which input and output the main power.

[0028] Each of the six metal wire portions 61 connects each of the six signal terminals 41 and each of the six signal electrodes 82 of the semiconductor element portions 21 and 23 by a wire bonding method. Thus, the signal terminal 41, through which a control signal flows, is electrically connected to the signal electrode 82, which inputs and outputs a control signal and a detection signal.

[0029] As in Fig. As shown in FIG. 2, each of the three metal wire portions 63 can connect the main electrode 81 of the semiconductor element portion 21 and the surface 11sb of the heat spreader portion 11b by a wire bonding method. The metal wire portion 64 can connect the main terminal portion 42b and the surface 11sa of the heat spreader portion 11a by a wire bonding method.

[0030] A material of the metal wire 6 can be any metal and can be, for example, aluminum (Al) or copper (Cu). A diameter of the metal wire 6 can be, for example, equal to or more than 80 µm and equal to or less than 600 µm. Specifically, a diameter of the metal wire portion 62 through which the main current flows can be 400 µm. On the other hand, a diameter of the metal wire portion 61 through which the control signal and the like flow can be 200 µm.

[0031] A material of terminal 4 is, for example, copper (Cu). The material of terminal 4 can be any material with heat dissipation properties in addition to electrically conductive properties. The material of terminal 4 can be, for example, an alloy containing copper or aluminum, or can be a composite material obtained by stacking these metals.

[0032] A part of each of the plurality of main terminal portions 42a, 42b, and 42c and the plurality of signal terminals 41 extends in the x-direction from the semiconductor element 2 to the outside of the sealing portion 7. The signal terminal 41 extends along a direction opposite to a direction in which the main terminal 42 extends.

[0033] The sealing portion 7 covers the substrate 1, the semiconductor element 2, the connecting portion 3, a part of the main terminal 42, a part of the signal terminal 41 and the metal wire 6. As shown in Fig. As shown in FIG. 1, a surface of the metal foil 13 opposite a surface bonded to the insulating foil 12 may be exposed from the sealing portion 7. When the semiconductor device 100 is incorporated into a power conversion device or the like, the metal foil 13 may be bonded to a heat dissipation fin in the portion of the metal foil 13 exposed from the sealing portion 7. To electrically insulate the metal foil 13 from the outside, the sealing portion 7 may cover the entire metal foil 13.

[0034] A part of the terminal 4 extends from a surface of the sealing portion 7 to the outside, so that the terminal 4 can be connected to an external device outside the sealing portion 7. The portion of the terminal 4 extending to the outside of the sealing portion 7 can be bent, for example, by molding. A conductor (not shown), such as a wire or a terminal for electrically connecting to a circuit board or other semiconductor device, can be connected to the above-described portion of the terminal 4. Any method can be used as a method for connecting the conductor and the above-described portion, and the conductor and the above-described portion can be fastened, for example, by a fastening member such as a screw.

[0035] The material of the sealing portion 7 can be a resin with insulating properties. The resin with insulating properties can be, for example, an epoxy resin. The sealing portion 7 can be formed by transfer molding.

[0036] As described above, the metal wire portion 61 as the metal wire 6 connects the semiconductor element 2 and the terminal 4. When the signal terminal 41 as the terminal 4 is arranged at the same height as the semiconductor element 2 in the z-direction, a position in the z-direction at which the metal wire portion 61 is connected to the signal terminal 41 is the same as a position at which the metal wire portion 61 is connected to the semiconductor element 2.

[0037] The diameter of the metal wire portion 61 is smaller than the diameter of the metal wire portion 62. Therefore, when a resin is injected during the molding of the sealing portion 7, the metal wire portion 61 may be crushed along the -z direction and deformed due to the injection pressure of the resin. If the deformed metal wire portion 61 comes into contact with an element (e.g., the heat spreader 11) that has a potential different from the potential of the metal wire portion 61, a short-circuit failure occurs in the semiconductor device 100.

[0038] Furthermore, when the plurality of metal wire portions 61 are arranged to be adjacent to each other, the adjacent metal wire portions 61 may come into contact with each other during manufacturing of the semiconductor device 100 due to vibrations generated during transportation of the semiconductor device 100 or the injection pressure of the resin during resin injection. As a result, a short-circuit failure occurs in the semiconductor device 100.

[0039] The semiconductor device 100 according to the first embodiment is characterized in that a notch portion h is provided in the terminal 4 as shown in Fig. 4. By arranging the terminal 4 such that a part of the metal wire 6 is inserted into the notch portion h, deformation and movement of the metal wire 6 are limited by the notch portion h. As a result, contact between the metal wire 6 and the other elements and contact between adjacent metal wires 6 are suppressed. Thus, the occurrence of a short-circuit failure in the semiconductor device 100 is suppressed.

[0040] In addition, the signal terminal 41 is arranged at a position farther away from the substrate 1 than the semiconductor element 2. Therefore, the metal wire 6 on the side of the connecting portion 6a connected to the semiconductor element 2 is held with respect to a center of the metal wire 6 in the x-direction, and thus deformation of the metal wire 6 is further suppressed.

[0041] As in Fig. 3 and Fig. As shown in Figure 4, the signal terminal 41 has an upper surface 41c, a lower surface 41d, a tip end surface 41s1, and a pair of side surfaces 41s2. The upper surface 41c and the lower surface 41d are surfaces substantially perpendicular to the z-direction. The upper surface 41c and the lower surface 41d face each other in the z-direction. The notch portion h passes through the signal terminal 41, extending from the upper surface 41c to the lower surface 41d.

[0042] As in Fig. 4, the signal terminal 41 extends in the x-direction within the seal portion 7. Each of the tip end surface 41s1 and the pair of side surfaces 41s2 is continuous with the upper surface 41c and the lower surface 41d. The tip end surface 41s1 may be a surface substantially perpendicular to the x-direction. The pair of side surfaces 41s2 face each other in the y-direction. The pair of side surfaces 41s2 may be surfaces substantially perpendicular to the y-direction. The notch portion h may be open to the tip end surface 41s1. The notch portion h may be arranged at a position where the notch portion h is sandwiched between the pair of side surfaces 41s2 in the y-direction, or may be provided at a center of the signal terminal 41 in the width direction (the y-direction in the first embodiment).

[0043] A distance t2 from the main surface 11s of the substrate 1 to the upper surface 41c of the signal terminal 41 is longer than a distance t1 from the main surface 11s of the substrate 1 to a surface of the semiconductor element portion 21. Thus, a part of the metal wire portion 61 is inserted into the notch portion h.

[0044] From a different perspective, as in Fig. As shown in Figure 3, the metal wire portion 61 includes an apex portion 6T and connecting portions 6a and 6b. The apex portion 6T is a portion of the metal wire portion 61 located at a position farthest from the semiconductor element 2 in the z-direction. The connecting portion 6a is a portion of the metal wire portion 61 that is in contact with the signal electrode 82. The connecting portion 6b is a portion of the metal wire portion 61 that is in contact with the signal terminal 41.

[0045] As described above, the signal terminal 41 is arranged at the position farther from the substrate 1 than the semiconductor element 2. Therefore, the connecting portion 6b is arranged at a position farther from the semiconductor element portion 21 than the connecting portion 6a in the z-direction. In addition, the metal wire portion 61 is formed to be curved. Therefore, the apex portion 6T is arranged at a position farther from the semiconductor element portion 21 than the connecting portion 6b in the z-direction. From another perspective, a distance t3 from the substrate 1 to the apex portion 6T is longer than the distance t1 from the substrate 1 to the connecting portion 6a and is longer than the distance t2 from the substrate 1 to the connecting portion 6b.Thus, a tip end of the signal terminal 41 can suppress deformation of the metal wire portion 61 in the -z direction and suppress contact with the other elements in the metal wire portion 61.

[0046] A portion of the metal wire portion 61 is surrounded by the notch portion h in a plan view of the main surface 11s. Thus, contact between adjacent metal wires 6 can be suppressed. Even if the metal wire 6 comes into contact with an inner wall of the terminal 4 forming the notch portion h, the characteristics of the semiconductor device 100 are not affected because the metal wire 6 and the terminal 4 have the same potential.

[0047] When the width w of the notch portion h in the y-direction is large, the movement amount of the metal wire portion 61 is large. When the width w of the notch portion h in the y-direction is small, it is difficult to insert the metal wire portion 61 into the notch portion h. Therefore, the width w of the notch portion h in the y-direction may be equal to or more than 1.5 times and equal to or less than 2 times the diameter of the metal wire portion 61.

[0048] Furthermore, as in Fig. 3, a part of a portion of the metal wire portion 61 from the connecting portion 6a to the apex portion 6T is inserted into the notch portion h (see the dotted line in Fig. 3). From another perspective, the notch portion h is arranged between the apex portion 6T and the connecting portion 6a in the x-direction. Specifically, the notch portion h may be arranged on the connecting portion 6a side with respect to a center of the metal wire portion 61 in the x-direction. Thus, since the notch portion h holds the metal wire portion 61 on the connecting portion 6a side, deformation of the metal wire portion 61 is further suppressed. As a result, the occurrence of a short-circuit failure in the semiconductor device 100 is suppressed.

[0049] The notch portion h may be arranged only between the apex portion 6T and the connecting portion 6a in the z-direction. The notch portion h may be arranged at a center between the apex portion 6T and the connecting portion 6a in the z-direction. The notch portion h may be arranged on the apex portion 6T side when viewed from the center between the apex portion 6T and the connecting portion 6a. The notch portion h may be arranged on the connecting portion 6a side when viewed from the center between the apex portion 6T and the connecting portion 6a.

[0050] When the signal terminal 41 is arranged so that it does not overlap with the substrate 1, the metal wire portion 61 becomes longer. As a result, the size of the semiconductor device 100 increases in the x-direction. In addition, as the metal wire portion 61 becomes longer, deformation of the metal wire portion 61 may increase during manufacturing of the semiconductor device 100 due to vibrations generated during transportation of the semiconductor device 100 or the injection pressure of the resin during resin injection.

[0051] Therefore, as in the Fig. 1 to Fig. 3, a part of the signal terminal 41 may be arranged at a position where the part of the signal terminal 41 protrudes from the substrate 1. Specifically, a part of the signal terminal 41 may overlap with the substrate 1 in a plan view of the main surface 11s. Thus, since the signal terminal 41 is arranged so that a part thereof overlaps with the substrate 1, the length of the metal wire portion 61 can be reduced even when the size of the substrate 1 increases. As a result, an increase in the size of the semiconductor device 100 in the x-direction can be suppressed.

[0052] The signal terminal 41 includes a tip end region 41a and an outer region 41b. The tip end region 41a is a region where the signal terminal 41 overlaps with the substrate 1 in a plan view of the main surface 11s. The outer region 41b is a region of the signal terminal 41 other than the tip end region 41a and is a region where the signal terminal 41 does not overlap with the substrate 1 in a plan view of the main surface 11s.

[0053] The notch portion h is provided in the tip end portion 41a of the signal terminal 41. The connecting portion 6b is connected to the outer portion 41b of the signal terminal 41 in the x-direction. That is, the connecting portion 6b is arranged at a position that does not overlap with the substrate 1 in a plan view of the main surface 11s.

[0054] Thus, an increase in the size of the semiconductor device 100 in the x-direction can be suppressed. With an increase in the size of the substrate 1, the size of the heat spreader 11 can be increased. As a result, the heat dissipation characteristics of the semiconductor device 100 can be improved. In addition, by reducing the length of the metal wire portion 61, deformation of the metal wire portion 61 during manufacturing of the semiconductor device 100 due to vibrations generated during transportation of the semiconductor device 100 or the injection pressure of the resin during resin injection can be suppressed.

[0055] The example in which the notch portion h is provided in the signal terminal 41 has been described. However, the notch portion h may be provided in the main terminal 42, or the above-described configuration may be applied to the main terminal 42 and the metal wire portions 62 and 64. <Funktionen und Wirkungen>

[0056] The semiconductor device 100 according to the present disclosure includes the substrate 1, the semiconductor element 2, the terminal 4, and the metal wire 6. The semiconductor element 2 is arranged on the substrate 1. The terminal 4 is arranged at the position farther away from the substrate 1 than the semiconductor element 2. The metal wire 6 connects the semiconductor element 2 and the terminal 4. The notch portion h is provided in the terminal 4. A part of the metal wire 6 is inserted into the notch portion h.

[0057] With such a configuration, contact between the metal wire 6 and the other elements and contact between adjacent metal wires 6 are suppressed. As a result, the occurrence of a short-circuit failure in the semiconductor device 100 is suppressed.

[0058] According to the semiconductor device 100 described above, the terminal 4 includes a tip end portion 41a and an outer portion 41b. The tip end portion 41a overlaps with the substrate 1 in a plan view of the substrate 1. The outer portion 41b is a different portion from the tip end portion 41a. The metal wire 6 is connected to the outer portion 41b.

[0059] With such a configuration, an increase in the size of the semiconductor device 100 in the direction in which the terminal 4 extends can be suppressed. In addition, by reducing the length of the metal wire 6, deformation of the metal wire 6 during manufacturing of the semiconductor device 100 due to vibrations generated during transportation of the semiconductor device 100 or the injection pressure of the resin during resin injection can be suppressed.

[0060] According to the semiconductor device 100 described above, the notch portion h is provided at the center of the terminal 4 in the width direction.

[0061] With such a configuration, contact between the metal wire 6 and the other elements and contact between adjacent metal wires 6 are suppressed. As a result, the occurrence of a short-circuit failure in the semiconductor device 100 is suppressed. Second embodiment<Konfiguration der Halbleitervorrichtung>

[0062] Fig. 5 is a side view of the semiconductor device 100 according to a second embodiment. Fig. 5 corresponds to Fig. 1. Fig. 6 is a plan view of the semiconductor device 100 according to the second embodiment. Fig. 6 corresponds to Fig. 2. The Fig. 5 and Fig. 6 has substantially the same configuration as that shown in the Fig. 1 to Fig. 4 and can have the same effect as the semiconductor device 100 shown in the Fig. 1 to Fig. 4 shown semiconductor device 100. However, this differs in the Fig. 5 and Fig. 6 shows a semiconductor device 100 of the one shown in Fig. 1 to Fig. 4 shown semiconductor device 100 in that the main electrodes 81 and 83 (see Fig. 2) are connected to the main terminal 42, with the connecting sections 3 arranged therebetween.

[0063] As in Fig. As shown in FIG. 6, the main terminal portion 42a may extend to a position that overlaps with the main electrode 81 of the semiconductor element portion 21 in the x-direction. The main terminal portion 42b may have a protruding portion 44 extending in the x-direction. The main terminal portion 42c may extend to a position that overlaps with the main electrode 81 of the semiconductor element portion 23 in the x-direction.

[0064] As in Fig. As shown in Figure 5, the main terminal portion 42a is connected to the main electrode 81 of the semiconductor element portion 21 with the connecting portion 3 interposed therebetween. The main terminal portion 42a is connected to the main electrode 83 of the semiconductor element portion 22 with the connecting portion 3 interposed therebetween. The main terminal portion 42a may include a protruding portion 43. The protruding portion 43 extends from the main terminal portion 42a in the y-direction to overlap with the surface 11sb of the heat spreader portion 11b. The protruding portion 43 is connected to the surface 11sb of the heat spreader portion 11b with the connecting portion 3 (not shown) interposed therebetween.

[0065] The protruding portion 44 is connected to the surface 11sa of the heat spreader portion 11a with the connecting portion 3 (not shown) interposed therebetween.

[0066] As in Fig. As shown in Figure 6, the main terminal portion 42c is connected to the main electrode 81 of the semiconductor element portion 23 with the connecting portion 3 (not shown) interposed therebetween. The main terminal portion 42c is connected to the main electrode 83 of the semiconductor element portion 24 with the connecting portion 3 (not shown) interposed therebetween.

[0067] By connecting the main terminal 42 to the main electrodes 81 and 83 with the connecting portions 3 (made of solder) interposed therebetween as described above, the thermal cycle resistance and the lifetime of the semiconductor device 100 are improved compared to connecting the main terminal 42 and the main electrodes 81 and 83 to each other with metal wire portions 62 interposed therebetween.

[0068] A material of the connecting portions 3 connecting the main terminal 42 and the main electrodes 81 and 83 may be, for example, solder, an electrically conductive adhesive, or a connecting material containing silver (Ag) particles or copper (Cu) particles with sinterability. By using the connecting material with sinterability to connect the main terminal 42 and the main electrodes 81 and 83, the heat dissipation properties and durability of the connecting portions 3 are improved compared to using solder. <Funktionen und Wirkungen>

[0069] According to the semiconductor device 100 described above, the semiconductor element 2 includes the main electrode 81 and the signal electrode 82. The terminal 4 includes the main terminal 42 and the signal terminal 41. The main terminal 42 is connected to the main electrode 81 with the connecting portion 3 interposed therebetween. The signal terminal 41 is connected to the signal electrode 82 via the metal wire 6.

[0070] With such a configuration, the thermal cycle stability and lifetime of the semiconductor device 100 are improved. Third embodiment<Konfiguration des Halbleiterbauelements>

[0071] Fig. 7 is a side view of the semiconductor device 100 according to a third embodiment. Fig. 7 corresponds to Fig. 5. Fig. 8 is a plan view of the semiconductor device 100 according to the third embodiment. Fig. 8 corresponds Fig. 6. Fig. 9 is a plan view of the terminal 4 according to the third embodiment. Fig. 9 corresponds Fig. 4. The Fig. 7 to Fig. 9 has substantially the same configuration as that shown in the Fig. 5 and Fig. 6 and can have the same effect as the semiconductor device 100 shown in the Fig. 5 and Fig. 6 shown semiconductor device 100. However, this differs in the Fig. 7 to Fig. 9 shown semiconductor device 100 of the one shown in the Fig. 5 and Fig. 6 in that the notch portion h is provided at one end of the terminal 4 in the width direction.

[0072] From another perspective, the notch portion h may be opened to the tip end surface 41s1 and one of the pair of side surfaces 41s2.

[0073] With such a configuration, the width of the signal terminal 41 in the y-direction can be reduced. As a result, the size of the semiconductor device 100 in the y-direction can be reduced. In addition, the material of the signal terminal 41 can be reduced. <Funktionen und Wirkungen>

[0074] According to the semiconductor device 100 described above, the notch portion h is provided at the end of the terminal 4 in the width direction.

[0075] With such a configuration, the width of the signal terminal 41 in the y-direction can be reduced. As a result, the size of the semiconductor device 100 in the y-direction can be reduced. In addition, the material of the signal terminal 41 can be reduced. Fourth embodiment<Konfiguration der Halbleitervorrichtung>

[0076] Fig. 10 is a side view of the semiconductor device 100 according to a fourth embodiment. Fig. 10 corresponds Fig. 5. Fig. 11 is a partially enlarged side view of a Fig. 10 shown area XI. Fig. 11 corresponds Fig. 3. The Fig. 10 and Fig. 11 has substantially the same configuration as that shown in the Fig. 5 and Fig. 6 and can have the same effect as the semiconductor device 100 shown in the Fig. 5 and Fig. 6 shown semiconductor device 100. However, this differs in the Fig. 10 and Fig. 11 shown semiconductor device 100 of the one shown in the Fig. 5 and Fig. 6 in that a tip end of the terminal 4 is inclined with respect to the z-direction.

[0077] As terminal 4, signal terminal 41 has an inclined portion 45. The inclined portion 45 is located at the tip end portion 41a of signal terminal 41. The inclined portion 45 is inclined to be located between the connecting portion 6b and the apex portion 6T in the z-direction, which is a direction perpendicular to the main surface 11s of the substrate 1.

[0078] By tilting the tip end of the signal terminal 41 in the z-direction as described above, the position of the notch portion h in the z-direction can be changed. As a result, deformation of the metal wire 6 during manufacturing of the semiconductor device 100 due to vibrations generated during transportation of the semiconductor device 100 or the injection pressure of the resin during resin injection can be suppressed. <Funktionen und Wirkungen>

[0079] According to the semiconductor device 100 described above, the metal wire 6 has an apex portion 6T and a connecting portion 6b. The apex portion 6T is farthest from the semiconductor element 2. The connecting portion 6b is in contact with the terminal 4. The terminal 4 has an inclined portion 45. The inclined portion 45 is arranged between the connecting portion 6b and the apex portion 6T in the direction perpendicular to the main surface 11s of the substrate 1.

[0080] With such a configuration, contact between the metal wire 6 and the other elements and contact between adjacent metal wires 6 are suppressed. As a result, the occurrence of a short-circuit failure in the semiconductor device 100 is suppressed. Fifth embodiment<Konfiguration der Halbleitervorrichtung>

[0081] Fig. 12 is a plan view of the signal terminal 41 according to a fifth embodiment. Fig. 12 corresponds Fig. 4. The Fig. 12 has substantially the same configuration as that shown in the Fig. 1 to Fig. 4 and can have the same effect as the semiconductor device 100 shown in the Fig. 1 to Fig. 4 shown semiconductor device 100. The Fig. However, the semiconductor device 100 shown in Figure 12 differs from that shown in Fig. 1 to Fig. 4 in that the notch portion h has a pair of inclined surfaces 41s3. Specifically, the notch portion h has the pair of inclined surfaces 41s3, an inner wall surface 41s4, and a bottom surface 41s5. The pair of inclined surfaces 41s3, the inner wall surface 41s4, and the bottom surface 41s5 form the notch portion h.

[0082] Each of the inclined surfaces 41s3 is continuous with the side surface 41s2 and the inner wall surface 41s4. The bottom surface 41s5 is a surface of the notch portion h that is furthest recessed from the tip end of the signal terminal 41 in the x-direction. The bottom surface 41s5 is continuous with the inner wall surface 41s4.

[0083] A portion of the inclined surface 41s3 that is continuous with the inner wall surface 41s4 is disposed between a portion of the inclined surface 41s3 that is continuous with the side surface 41s2 and the bottom surface 41s5 in the x-direction. Thus, each of the pair of inclined surfaces 41s3 is inclined toward a center A1 of the signal terminal 41 in the width direction. From another perspective, as shown in Fig. As shown in Figure 12, in a plan view of the main surface 11s, each of the inclined surfaces 41s3 is inclined to face the center A1. That is, a distance between the pair of inclined surfaces 41s3 gradually becomes shorter from the tip end of the signal terminal 41 to the bottom surface 41s5. Thus, it becomes easier to insert the metal wire 6 into the notch portion h. <Funktionen und Wirkungen>

[0084] According to the semiconductor device 100 described above, the notch portion h has the inclined surface 41s3. The inclined surface 41s3 is inclined toward the center A1.

[0085] With such a configuration, it becomes easier to insert the metal wire 6 into the notch portion h. Sixth embodiment<Konfiguration des Halbleiterbauelements>

[0086] Fig. 13 is a plan view of the signal terminal 41 according to a sixth embodiment. Fig. 13 corresponds Fig. 12. The Fig. 13 has substantially the same configuration as that shown in Fig. 12 and can have the same effect as the semiconductor device 100 shown in Fig. 12 shown semiconductor device 100. The Fig. However, the semiconductor device 100 shown in Figure 13 differs from that shown in Fig. 12 in that the notch portion h has a return surface 41s6. In particular, the return surface 41s6 protrudes from the inner wall surface 41s4 to the center A1 (see Fig. 12). The return surface 41s6 is continuous with the inner wall surface 41s4 and the inclined surface 41s3. The return surface 41s6 faces the bottom surface 41s5.

[0087] With such a configuration, pushing out of the metal wire 6 to the outside of the notch portion h during manufacturing of the semiconductor device 100 due to vibrations generated during transportation of the semiconductor device 100 or the injection pressure of the resin during injection of the resin is suppressed. <Funktionen und Wirkungen>

[0088] According to the semiconductor device 100 described above, the notch portion h has the return surface 41s6. The return surface 41s6 protrudes toward the center A1 (see Fig. 12).

[0089] With such a configuration, pushing out of the metal wire 6 to the outside of the notch portion h during manufacturing of the semiconductor device 100 due to vibrations generated during transportation of the semiconductor device 100 or the injection pressure of the resin during injection of the resin is suppressed. Seventh embodiment

[0090] A power conversion device to which the semiconductor device described in any one of the first to sixth embodiments described above is applied will now be described. Although the present disclosure is not limited to a specific power conversion device, the application of the present disclosure to a three-phase inverter will be described below as a seventh embodiment.

[0091] Fig. 14 is a block diagram showing a configuration of a power conversion system to which the power conversion device according to the present embodiment is applied. Fig. The power conversion system shown in Figure 14 consists of a power supply 400, a power conversion device 200, and a load 300. The power supply 400 is a DC power supply and supplies DC power to the power conversion device 200. The power supply 400 can be configured in a variety of ways and can be configured, for example, by a DC power system, a solar battery, or a storage battery. The power supply 400 can be configured by a rectifier circuit or an AC / DC converter connected to an AC power system. Alternatively, the power supply 400 can be configured by a DC / DC converter that converts DC power output from the DC power system into prescribed power.

[0092] The power conversion device 200 is a three-phase inverter connected between the power supply 400 and the load 300, and converts DC power supplied from the power supply 400 into AC power and supplies the AC power to the load 300. As shown in Fig. 14, the power conversion device 200 includes a main conversion circuit 201 that converts DC power into AC power and outputs the AC power, and a control circuit 203 that outputs to the main conversion circuit 201 a control signal for controlling the main conversion circuit 201.

[0093] The load 300 is a three-phase electric motor driven by the AC power supplied by the power conversion device 200. The load 300 is not limited to a specific application, and the load 300 is an electric motor mounted on various types of electrical devices, and is used, for example, as an electric motor for a hybrid vehicle, an electric vehicle, a railway vehicle, an elevator, or an air conditioning device.

[0094] Details of the power conversion device 200 will be described below. The main conversion circuit 201 includes a switching element and a freewheeling diode (not shown). When the switching element is switched, DC power supplied from the power supply 400 is converted into AC power, which is supplied to the load 300. Although there are various types of specific circuit configurations for the main conversion circuit 201, the main conversion circuit 201 according to the present embodiment is a two-stage three-phase full-bridge circuit and can be formed from six switching elements and six freewheeling diodes, each of which is connected in antiparallel to the switching elements.

[0095] The semiconductor device 100 according to at least one of the first to sixth embodiments described above is applied as a semiconductor module 202 to at least one of the switching elements and the freewheeling diodes of the main conversion circuit 201. The six switching elements each include two switching elements connected in series to form upper and lower arms, and the upper and lower arms configure the phases of the full-bridge circuit (a U phase, a V phase, and a W phase). Output terminals of the upper and lower arms, that is, three output terminals of the main conversion circuit 201, are connected to the load 300.

[0096] The main conversion circuit 201 includes a drive circuit (not shown) that drives each switching element. The main conversion circuit 201 may have the drive circuit built into the semiconductor module 202 or may include the drive circuit separate from the semiconductor module 202. The drive circuit generates a drive signal for driving the switching elements of the main conversion circuit 201 and supplies the drive signal to a control electrode of each switching element of the main conversion circuit 201. Specifically, according to the control signal from the control circuit 203 described below, a drive signal for bringing a switching element into an on state and a drive signal for bringing a switching element into an off state are output to the control electrode of each switching element.When the switching element is kept in the on state, the drive signal is a voltage signal (ON signal) equal to or higher than a threshold voltage of the switching element. When the switching element is kept in the off state, the drive signal is a voltage signal (OFF signal) equal to or lower than the threshold voltage of the switching element.

[0097] The control circuit 203 controls the switching elements of the main conversion circuit 201 such that the desired power is supplied to the load 300. Specifically, the control circuit 203 calculates a time for which each switching element of the main conversion circuit 201 should be turned on (ON time) based on the power to be supplied to the load 300. For example, the control circuit 203 may control the main conversion circuit 201 through PWM control, by which an ON time of a switching element is modulated according to a voltage to be output. The control circuit 203 outputs a control command (control signal) to the drive circuit of the main conversion circuit 201 such that the ON signal is output to a switching element to be turned on at each time and the OFF signal is output to a switching element to be turned off at each time.In response to this control signal, the drive circuit outputs the ON signal or the OFF signal as the drive signal to the control electrode of each switching element.

[0098] In the power conversion device according to the present embodiment, the semiconductor device 100 according to any one of the first to sixth embodiments described above is applied as a semiconductor module 202 to at least one of the switching elements and the freewheeling diodes of the main conversion circuit 201. Therefore, the electrical insulation properties can be improved, and the reliability of the power conversion device can be improved.

[0099] Although the example in which the present disclosure is applied to a two-stage three-phase inverter has been described in the present embodiment, the present disclosure is not limited thereto and is applicable to various power conversion devices. Although a two-stage power conversion device has been described in the present embodiment, a three-stage power conversion device or a multi-stage power conversion device may be used, and when electric power is supplied to a single-phase load, the present disclosure can be applied to a single-phase inverter. When electric power is supplied to a DC load or the like, the present disclosure is also applicable to a DC / DC converter or an AC / DC converter.

[0100] The power conversion device to which the present disclosure is applied is not limited to the above case where the load is an electric motor. For example, the power conversion device can also be used as a power supply device for an electric discharge machine, a laser beam machine, an induction heating cooking device, or a contactless power supply system, and can also be used as a power conditioner for a solar power generation system, a power storage system, or the like.

[0101] It should be noted that the semiconductor devices described in the embodiments can be combined in various ways as needed. Furthermore, for the dependent claims, dependent forms corresponding to the combinations are also intended to be included within the scope of the patent claims.

[0102] Although the embodiments of the present disclosure have been described, it is to be understood that the embodiments disclosed herein are in all respects illustrative and not restrictive. The scope of the present disclosure is defined by the terms of the claims and is intended to include all modifications within the scope and meaning consistent with the terms of the claims. QUOTES CONTAINED IN THE DESCRIPTION

[0000] This list of documents submitted by the applicant was generated automatically and is included solely for the convenience of the reader. This list is not part of the German patent or utility model application. The DPMA assumes no liability for any errors or omissions. Cited patent literature

[0000] JP 2024-033678

[0001] JP 1-163345

[0003]

Claims

[1] Semiconductor device comprising: a substrate (1); a semiconductor element (2) arranged on the substrate (1); a terminal (4) arranged at a position which, viewed from the substrate (1), is further away than the semiconductor element (2); and a metal wire (6) connecting the semiconductor element (2) and the terminal (4), wherein a notch portion (h) is provided in the terminal (4), and a part of the metal wire (6) is inserted into the notch portion (h). [2] A semiconductor device according to claim 1, wherein the semiconductor element (2) has a main electrode (81) and a signal electrode (82), and the terminal (4) has a main terminal (42) connected to the main electrode (81) with a connecting portion (3) arranged therebetween, and a signal terminal (41) connected to the signal electrode (82) via the metal wire (6). [3] Semiconductor device according to claim 1 or 2, wherein the terminal (4) comprises a tip end portion (41a) which overlaps with the substrate (1) in a plan view of the substrate (1), and an outer region (41b) other than the tip end portion (41a), and the metal wire (6) is connected to the outer area (41b). [4] A semiconductor device according to any one of claims 1 to 3, wherein the notch portion (h) is provided at a center (A1) of the terminal (4) in a width direction. [5] A semiconductor device according to claim 4, wherein the notch portion (h) has an inclined surface (41s3) inclined toward the center (A1). [6] A semiconductor device according to claim 4 or 5, wherein the notch portion (h) has a return surface (41s6) projecting toward the center (A1). [7] A semiconductor device according to any one of claims 1 to 3, wherein the notch portion (h) is provided at one end of the terminal (4) in a width direction. [8] Semiconductor component according to one of claims 1 to 7, wherein the metal wire (6) has a vertex portion (6T) furthest from the semiconductor element (2) and a connecting portion (6b) in contact with the terminal (4), and the terminal (4) has an inclined portion (45) arranged between the connecting portion (6b) and the apex portion (6T) in a direction perpendicular to a main surface (11s) of the substrate (1). [9] Power conversion device comprising: a main conversion circuit (201) comprising the semiconductor device (100) according to any one of claims 1 to 8 for converting input power and outputting the converted input power; and a control circuit (203) for outputting a control signal for controlling the main conversion circuit (201) to the main conversion circuit (201).

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