DISPLAY DEVICE

The display device efficiently arranges conductors by minimizing overlap between touch guide and base voltage lines, reducing the non-display area and enhancing signal integrity through a non-overlapping wiring structure.

DE102025130232A1Pending Publication Date: 2026-02-19LG DISPLAY CO LTD
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Patent Information

Application Number
DE102025130232
Authority / Receiving Office
DE · DE
Patent Type
Applications
Current Assignee / Owner
Priority Date
2024-08-13
Filing Date
2025-07-30
Publication Date
2026-02-19

AI Technical Summary

Technical Problem

Existing display devices face challenges in efficiently arranging conductors in the non-display area, leading to increased non-display area size and signal interference due to overlapping wires, which affects power consumption and signal integrity.

Method used

A display device design that minimizes the overlap between touch guide conductor areas and base voltage conductor areas by arranging the base voltage line to cross touch guide lines at a crossing point and branch into two separate sections, with touch guide lines positioned between these sections, thereby reducing overlapping areas and parasitic capacitance.

Benefits of technology

This configuration allows for a more compact non-display area, reducing parasitic capacitance and potentially lowering power consumption while improving signal integrity.

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Abstract

Implementations of the disclosure describe a display device with a substrate having a display area and a non-display area. Several touch guide lines and a base voltage line are arranged in the non-display area. The base voltage line crosses several touch guide lines at a crossing point and subsequently branches into a first and a second branching section. In a region extending from the crossing point, the several touch guide lines are arranged between the first and second branching sections without overlapping. This non-overlapping arrangement allows for a more compact wiring design, thereby reducing the size of the non-display area, such as the enclosure of the display device.
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Description

[0001] This application claims priority over Korean patent application No. 10-2024-0108308, which was filed on August 13, 2024. TECHNICAL AREA

[0002] The present disclosure relates generally to a display device. BACKGROUND

[0003] With the development of the information society, the demand for display devices for showing images in various formats is increasing. In recent years, various display devices such as liquid crystal displays and organic light-emitting displays have been used.

[0004] The display device may include a display panel. The display panel may include a display area in which an image is shown and a non-display area, which is an area outside the display area. Several lines may be arranged in the non-display area. SUMMARY

[0005] According to one aspect of the present disclosure, in a display device, conductors can be arranged efficiently by minimizing the overlap area between touch guide conductor areas and base voltage conductor areas. The configurations described here can reduce the non-display area of ​​the display device in a way that mitigates the challenges associated with the design of conductors to be arranged in the non-display area. For example, a display device can reduce the size of a non-display area by minimizing the area in which touch guide conductor areas and a base voltage conductor area overlap. In other examples, a display device provides low-power drive capability through efficient conductor arrangement.

[0006] At least one of the problems is solved by the features of the independent claims. Preferred embodiments are specified in the dependent claims.

[0007] One aspect provides a display device comprising: a substrate with a display area and a non-display area, wherein the non-display area comprises a contact area, multiple touch guide lines extending in a first direction from the contact area to the display area, and a base voltage line crossing the multiple touch guide lines and extending in the first direction from a position crossing the multiple touch guide lines without overlapping the multiple touch guide lines.

[0008] Another aspect provides a display device comprising: a substrate with a display area and a contact area of ​​a non-display area, a first metal pattern arranged on the substrate and extending in a first direction from the contact area to the display area such that it branches into two lines, and a second metal pattern arranged on the first metal pattern, extending in the first direction and at least partially overlapping the first metal pattern.

[0009] Another aspect provides a display device comprising: a substrate with a display area and a non-display area having a contact area; a first metal pattern arranged in the non-display area and extending in a first direction from the contact area to the display area; and several second metal patterns arranged on the substrate and extending in a first direction from the contact area to the display area.

[0010] Another aspect provides a display device comprising: a substrate with a display area and a non-display area, wherein the non-display area comprises a contact area; several contact guide lines arranged in the non-display area and extending in a first direction from the contact area to the display area;and a base voltage line arranged in the non-display area, wherein the base voltage line extends in the first direction from the contact area to the display area, wherein the base voltage line is designed to cross the multiple touch guide lines at a crossing position and subsequently branches into a first and a second branching section, wherein in an area extending in the first direction from the crossing position, multiple touch guide lines are arranged between the first and the second branching section of the base voltage line without overlapping the first and the second branching section.

[0011] In one or more embodiments, the base voltage line can be branched into two lines at the position where it crosses the multiple contact guide lines and extend in the first direction.

[0012] In one or more embodiments, the base voltage line can have a Y-shape, with the trunk section being connected to the contact point area.

[0013] In one or more embodiments, the multiple contact guide lines can be arranged between the two branched lines of the base voltage line.

[0014] In one or more embodiments, the multiple touch guide lines can comprise a first touch guide line designed to transmit a touch control signal and a second touch guide line designed to transmit a touch detection signal.

[0015] In one or more embodiments, the display device may further comprise a first touch electrode, which is arranged in the display area and electrically connected to the first touch guide line, and a second touch electrode, which is arranged in the display area and electrically connected to the second touch guide line.

[0016] In one or more embodiments, the display device may further include a touch detection circuit designed to supply the touch control signal to the first touch guidance line and to receive the touch detection signal from the second touch guidance line.

[0017] In one or more embodiments, the display device may further comprise several subpixels arranged in the display area.

[0018] In one or more embodiments, each of the multiple subpixels can be electrically connected to the base voltage line to receive a base voltage.

[0019] In one or more embodiments, the non-display area may further comprise a bending area between the contact area and the display area.

[0020] In one or more embodiments, the multiple contact guide lines and the two branching sections of the base voltage line can extend through the bending area.

[0021] In one or more embodiments, the multiple contact guide lines may not overlap with the base voltage line in the bending area.

[0022] In one or more embodiments, the display device may further comprise several gate drive voltage lines arranged in the non-display area and extending in the first direction.

[0023] In one or more embodiments, the multiple gate drive voltage lines may not overlap with the multiple touch guide lines.

[0024] In one or more embodiments, the multiple gate drive voltage lines may not overlap with the base voltage line.

[0025] In one or more embodiments, at least one of the multiple contact guide lines can have a double-line structure comprising two metal layers separated by an insulating layer.

[0026] In one or more embodiments, at least one of the multiple contact guide lines can comprise a double-line structure in a first section of the non-display area and a single-line structure in the bending area.

[0027] In one or more embodiments, the double conductor structure can comprise two metal layers with an insulating layer between them.

[0028] In one or more embodiments, the twin-wire structure can be located in an area between the display area and the bending area.

[0029] The multiple contact guide lines can have a single-line form, which differs from the double-line form.

[0030] In one or more embodiments, the base voltage line may comprise: a first metal material extending from the contact point area to the bending area; and a second metal material arranged within the bending area and electrically connected to the first metal material.

[0031] The base voltage line can have a plate shape.

[0032] In one or more embodiments, the trunk section of the base voltage line can be designed as a single continuous conductor having a width that is significantly greater than the width of any one of the multiple contact guide lines.

[0033] In one or more embodiments, the first metal pattern can cross the multiple second metal patterns at a crossing position and subsequently branch into a first and a second branching section.

[0034] In one or more embodiments, in an area extending from the intersection position in the first direction, the multiple second metal patterns can be arranged between the first and second branching sections of the first metal pattern without overlapping the first and second branching sections.

[0035] In one or more embodiments, the first metal pattern can be a base voltage line and the multiple second metal patterns can be multiple contact guide lines.

[0036] In one or more embodiments, the substrate may further comprise a bending area positioned between the display area and the contact area.

[0037] In one or more embodiments, at least one of the multiple contact guide lines can have a single-line structure within the bending area and a double-line structure in an area between the bending area and the display area.

[0038] In one or more embodiments, the double-conductor structure can comprise a touch sensor metal layer and a bridge metal layer, wherein an insulating layer is arranged between the touch sensor metal layer and the bridge metal layer.

[0039] In one or more embodiments, the non-display area may further comprise a bending area between the contact area and the display area.

[0040] In one or more embodiments, the multiple contact guide lines and the first and second branching sections of the base voltage line can extend through the bending area.

[0041] In one or more embodiments, the display device may further comprise multiple gate drive voltage lines arranged in the non-display area and extending in the first direction, wherein the multiple gate drive voltage lines do not overlap with the multiple touch guide lines.

[0042] In one or more embodiments, the second metal pattern can extend towards the display area after overlapping the first metal pattern, without overlapping the first metal pattern.

[0043] In one or more embodiments, the substrate may further comprise a bending area between the display area and the contact area.

[0044] In one or more embodiments, the second metal pattern in the bending area can have a single-conductor form.

[0045] In one or more embodiments, the second metal pattern can extend in a double-conductor form from the bending area to the display area.

[0046] In one or more embodiments, the second metal pattern may not overlap the first metal pattern in the bending area.

[0047] In one or more embodiments, at least one section of the second metal pattern can extend from the bending area to the display area without overlapping the first metal pattern.

[0048] According to implementations of the disclosure, a display device can be created in which lines can be arranged efficiently by minimizing the overlap area between touch guide line areas and base voltage line areas.

[0049] According to implementations of the disclosure, a display device can be created in which the size of a non-display area can be reduced by minimizing the area in which touch guide line areas and a base voltage line area overlap.

[0050] According to implementations of the disclosure, a display device can be created that enables low-power control through efficient arrangement of lines. A detailed description of this is given below. BRIEF DESCRIPTION OF THE DRAWINGS

[0051] The attached drawings, which are included for a better understanding of the revelation and are incorporated into this application as a part thereof, illustrate implementations of the revelation and, together with the description, serve to explain the principle of the revelation; they show: Fig. 1 a top view showing a configuration of a display device of the disclosure; Fig. 2 a view showing a display board of an implementation of the revelation; Fig. 3 a view showing a substrate of a display board of revelation; Fig. 4 a cross-sectional view showing a display area of ​​a display board of the Revelation; Fig. 5 a view showing components for touch detection of the revelation; Fig. 6 a view showing a non-display area of ​​a display board of revelation; Fig. 7 a view showing a non-display area of ​​a display board of revelation; Fig. 8 a cross-sectional view of an area A1-A2 from Fig. 7; Fig. 9 a cross-sectional view of an area B1-B2 from Fig. 7; Fig. 10 and Fig. 11 cross-sectional views of a Fig. 7 shown area C1-C2; and Fig. 12 and Fig. 13 cross-sectional views of a Fig. 7 shown area D1-D2. DETAILED DESCRIPTION

[0052] Implementations of the disclosure relate to display devices and, in particular, to a wiring architecture within a non-display area of ​​a display device that enables a reduction in the size of the non-display area. When the non-display area or enclosure of a display device is reduced, the density of wiring, such as touch guide wires and power lines, increases. This can lead to challenges such as signal interference from parasitic capacitances caused by overlapping wires, as well as physical difficulties in routing the wires within the limited space.

[0053] Accordingly, the implementations disclosed herein provide a display device with an improved wiring structure that addresses these challenges. In various implementations, a base voltage line is designed to cross multiple touch guide lines at a crossing point. After the crossing point, the base voltage line branches into two separate sections. The multiple touch guide lines are then arranged in an area between the two branching sections of the base voltage line, thus avoiding overlap in the area where the lines run parallel. This non-overlapping arrangement allows for a more compact and efficient wiring configuration, facilitating a reduction in the width of the non-display area.Furthermore, minimizing the overlap between the base voltage line and the touch guide lines can reduce parasitic capacitance, which can contribute to improved signal integrity and potentially lower power consumption.

[0054] In the following description of examples or implementations of the disclosure, reference is made to the accompanying drawings, which show specific examples or implementations that can be implemented for illustrative purposes. The same reference signs and symbols can be used to denote identical or similar components, even if they are shown in different accompanying drawings. Furthermore, detailed descriptions of known functions and components contained herein are omitted in the following description of examples or implementations of the disclosure where it is determined that such a description might obscure the subject matter in some implementations of the disclosure.The terms used here, such as "comprise," "exhibit," "contain," "consist of," "manufacture of," and "trained from," are generally intended to allow the addition of other components, unless the terms are used with the term "only." As used here, singular forms are intended to include plural forms unless the context clearly indicates otherwise.

[0055] Terms such as "first," "second," "A," "B," "(A)," or "(B)" may be used here to describe elements of revelation. Each of these terms is not used to define the nature, order, sequence, or number of the elements, etc., but merely to distinguish the respective element from other elements.

[0056] When it is mentioned that a first element is "connected or coupled to a second element," "contacts or overlaps a second element," etc., this should be interpreted to mean that the first element is not only "directly connected or coupled to the second element" or "directly contacts or overlaps the second element," but that a third element may also be "interposed" between the first and second elements, or that the first and second elements may be "connected or coupled," "contact or overlap," etc., via a fourth element. Here, the second element may be contained within at least one of two or more elements that are "connected or coupled," "contact or overlap," etc., with each other.

[0057] When temporal relational terms such as "after", "subsequently", "next", "before" and the like are used to describe processes or operations of elements or configurations or sequences or steps in operating, processing or manufacturing procedures, these terms may be used to describe non-consecutive or non-sequential processes or operations unless the term "directly" or "immediately" is used with them.

[0058] When dimensions, relative sizes, etc., are mentioned, it should also be considered that numerical values ​​for elements or features, or corresponding information (e.g., level, range, etc.), include a tolerance or error range that may be caused by various factors (e.g., process factors, internal or external influences, noise, etc.), even if no specific description is given. Furthermore, the term "possibly" fully encompasses all meanings of the term "may."

[0059] The following section describes various implementations of the disclosure in detail with reference to the attached drawings.

[0060] Fig. Figure 1 is a view showing a system configuration of a display device 100 according to embodiments of the disclosure.

[0061] With reference to Fig. 1. A display device 100 of the disclosure may comprise a display panel 110 and display control circuits as components for displaying images. The display control circuits are circuits for controlling the display panel 110 and may include a data control circuit 120, a gate control circuit 130, and a display controller 140.

[0062] The display panel 110 can comprise a substrate 111 and several subpixels SP arranged on the substrate 111.

[0063] The scoreboard 110 can include a display area DA, which can display an image, and a non-display area NDA, which is positioned outside the display area DA.

[0064] Several subpixels SP for image display can be arranged in the display area DA, and the non-display area NDA can include a contact area PA positioned in a first direction from the display area DA. The subpixels SP can be arranged on the substrate 111.

[0065] On scoreboard 110, the non-display area (NDA) can be very small. The non-display area (NDA) is also referred to as the "border".

[0066] For example, the non-display area (NDA) can include a first non-display area positioned outside the display area (DA) in a first direction, a second non-display area positioned outside the display area (DA) in a second direction intersecting the first direction, a third non-display area positioned outside the display area (DA) in a direction opposite to the first direction, and a fourth non-display area positioned outside the display area (DA) in a direction opposite to the second direction. One or two of the first through fourth non-display areas can include a contact area to which the data drive circuit 120 is connected or bonded. Two or three of the first through fourth non-display areas that do not include the contact area can be very small.This means that the non-display area (NDA) at least partially surrounds the display area (DA). In a preferred embodiment, the non-display area (NDA) surrounds the display area (DA) on its four outer sides.

[0067] As another example, the boundary between the display area DA and the non-display area NDA can be bent in such a way that at least part of the non-display area NDA can be positioned below the display area. In this case, no or only a minor change can be made to the non-display area NDA, which is shown to the user when the user views display area 100 from the front.

[0068] Different types of signal lines for controlling multiple subpixels SP can be arranged on the substrate 111 of the display panel 110.

[0069] The display device 100 can be a liquid crystal display device or a self-emitting display device in which the display panel 110 itself emits light. If the display device 100 is a self-emitting display device, each of the multiple subpixels SP can comprise a light-emitting element.

[0070] For example, the display device 100 can be an organic light-emitting display in which the light-emitting element is implemented as an organic light-emitting diode (OLED). As another example, the display device 100 can be an inorganic light-emitting display in which the light-emitting element is implemented as a light-emitting diode based on an inorganic material. As yet another example, the display device 100 can be a quantum dot display in which the light-emitting element is implemented as a quantum dot that is a self-emitting semiconductor crystal.

[0071] The structure of each of the multiple subpixels SP can vary depending on the type of display device 100. For example, if the display device 100 is a self-emitting display device in which the subpixels SP themselves emit light, each subpixel SP can comprise a light-emitting element that itself emits light, one or more transistors, and one or more capacitors.

[0072] For example, different types of signal lines can include multiple data lines DL, which transmit data signals (also called data voltages or image signals), and multiple gate lines GL, which transmit gate signals (also called sampling signals).

[0073] The multiple data lines DL and the multiple gate lines GL can intersect. Each of the multiple data lines DL can be arranged to extend in the first direction. Each of the multiple gate lines GL can be arranged to extend in the second direction. Viewed from the front, the first direction can be a column or vertical direction, and the second direction a row or horizontal direction. The first direction can be the row direction, and the second direction the column direction. For the sake of simplicity, an example is described below in which each of the multiple data lines DL is arranged in the column direction and each of the multiple gate lines GL is arranged in the row direction.

[0074] The data control circuit 120 is a circuit for controlling the multiple data lines DL and can output data signals to the multiple data lines DL.

[0075] The data control circuit 120 can receive digital image data DATA from the display controller 140, convert the received image data DATA into analog data signals and output them to the multiple data lines DL.

[0076] For example, the data control circuit 120 can be connected to the display panel 110 by a tape-automated bonding method (TAB method), or connected to a bonding point of the display panel 110 by a chip-on-glass method (COG method) or a chip-on-board method (COP method), or implemented by a chip-on-film method (COF method) and connected to the display panel 110.

[0077] The data control circuit 120 can be connected to one side (e.g., the top or bottom) of the display panel 110. In contrast, depending on the control scheme or panel design scheme, data control circuits 120 can be connected to both sides (e.g., both the top and the bottom) of the display panel 110 or to two or more of the four sides of the display panel 110.

[0078] The data control circuit 120 can be connected outside the display area DA of the display panel 110, but alternatively the data control circuit 120 can also be arranged in the display area DA of the display panel 110.

[0079] The gate drive circuit 130 is a circuit for driving the multiple gate lines GL and can output gate signals to the multiple gate lines GL. It can be arranged on either side of the display area.

[0080] The gate drive circuit 130 can receive a first gate voltage corresponding to a turn-on level voltage and a second gate voltage corresponding to a turn-off level voltage, along with various gate drive signals GCS, generate gate signals and supply the generated gate signals to the multiple gate lines GL.

[0081] In the display device 100, the gate drive circuit 130 can be embedded in the display panel 110 as a gate-in-panel (GIP) type. If the gate drive circuit 130 is of the gate-in-panel type, it can be formed on the substrate 111 of the display panel 110 during the manufacturing process of the display panel 110.

[0082] In the display device 100, the gate control circuit 130 can be arranged in the display area DA of the display panel 110. For example, the gate control circuit 130 can be arranged in a first sub-area of ​​the display area DA (e.g., a left or right sub-area of ​​the display area DA). Alternatively, the gate control circuit 130 can be arranged in a first sub-area of ​​the display area DA (e.g., a left or right sub-area of ​​the display area DA) and a second sub-area (e.g., a right or left sub-area of ​​the display area DA).

[0083] In the revelation, the gate control circuit 130, which is embedded in the display panel 110 in a gate-in-panel type, can also be referred to as the “gate-in-panel circuit”.

[0084] The display controller 140 is a device for controlling the data control circuit 120 and the gate control circuit 130 and can control the control timing specifications for the multiple data lines DL and the control timing specifications for the multiple gate lines GL.

[0085] The display controller 140 can supply a data drive signal DCS to the data drive circuit 120 to control the data drive circuit 120, and can supply a gate drive signal GCS to the gate drive circuit 130 to control the gate drive circuit 130.

[0086] The display controller 140 can receive input image data from the host system 150 and, based on the input image data, deliver image data DATA to the data control circuit 120.

[0087] The display controller 140 can be implemented as a separate component from the data control circuit 120, or the display controller 140 and the data control circuit 120 can be integrated in an integrated circuit (IC).

[0088] The Display Controller 140 can be a timing controller used in typical display technology, a control device that can perform other control functions in addition to those of a timing controller, a control device other than a timing controller, or a circuit within the control device. The Display Controller 140 can be implemented as various circuits or electronic components, such as an integrated circuit (IC), a field-programmable gate array (FPGA), an application-specific integrated circuit (ASIC), or a processor.

[0089] The display controller 140 can be mounted on a printed circuit board or a flexible printed circuit board and can be electrically connected to the data control circuit 120 and the gate control circuit 130 via the printed circuit board or the flexible printed circuit board.

[0090] The display controller 140 can send signals to and receive signals from the data control circuit 120 according to one or more predefined interfaces. The interface can include, for example, a low-voltage differential signaling interface (LVDS interface), a point-to-point interface with embedded clock (EPI interface), and a serial peripheral interface (SPI interface).

[0091] In order to provide both a touch detection function and an image display function, the display device 100 according to implementations of the disclosure can include a touch sensor and a touch detection circuit that detects the touch sensor to detect whether a touch has been made by a touch object such as a finger or a pen, or to detect the position of the touch.

[0092] The touch detection circuit can include a touch control circuit that controls and detects the touch sensor and generates and outputs touch detection data, as well as a touch controller that can detect the occurrence of a touch or the position of the touch based on the touch detection data.

[0093] The touch sensor can include multiple touch electrodes. The touch sensor can also include multiple touch leads for electrically connecting the multiple touch electrodes and the touch control circuitry.

[0094] The touch sensor can be located outside or inside the display panel 110 in the form of a touch panel. If the touch panel is located outside the display panel 110, it is referred to as an external touch panel. If the touch sensor is of the external type, the touch panel and the display panel 110 can be manufactured separately or combined during an assembly process. The external touch panel can comprise a touch panel substrate and multiple touch electrodes on the touch panel substrate.

[0095] If the touch sensor is located inside the display panel 110, the touch sensor can be formed on the substrate during the manufacturing process of the display panel 110 together with signal lines and electrodes related to the display control.

[0096] The touch control circuit can supply a touch control signal to at least one of the multiple touch electrodes and detect at least one of the multiple touch electrodes to generate touch detection data.

[0097] The touch detection circuit can perform touch detection in a self-capacitance detection scheme or a counter-capacitance detection scheme.

[0098] When the touch detection circuit performs touch detection using the self-capacitance detection scheme, it can detect touch based on the capacitance between each touch electrode and the object being touched (e.g., finger or pen). According to the self-capacitance detection scheme, each of the multiple touch electrodes can function as both a driving touch electrode and a sensing touch electrode. The touch control circuit can drive all or some of the multiple touch electrodes and detect all or some of them.

[0099] When the touch detection circuit performs touch detection using a counter-capacitance detection scheme, it can detect touch based on the capacitance between the touch electrodes. In this scheme, the multiple touch electrodes are divided into driver electrodes and sensing electrodes. The driver electrode circuit can control the driver electrodes and detect the sensing electrodes.

[0100] The touch control circuit and the touch controller, which are included in the touch detection circuit, can be implemented as separate devices or as a single device. The touch control circuit and the data control circuit can also be implemented as separate devices or as a single device.

[0101] The display device 100 may further include a power supply circuit for supplying various types of power to the integrated display control circuit and / or the touch detection circuit.

[0102] The display device 100 can be a mobile device such as a smartphone or a tablet, or a monitor or television (TV) of various sizes, but can, without being limited to, be a display of various types and sizes that can display information or images.

[0103] The display device 100 may further comprise an electronic device such as a camera (an image sensor), a detection sensor and / or the like. The detection sensor may, for example, be a sensor that detects an object or a human body by receiving light such as infrared rays, ultrasound waves or ultraviolet rays.

[0104] Fig. 2 is a view showing a display panel 110 of Revelation.

[0105] With reference to Fig. 2. The display panel 110 can comprise a substrate 111, which is arranged in several subpixels SP, and an encapsulation layer 200 on the substrate 111. The encapsulation layer 200 can also be referred to as the encapsulation substrate or encapsulation section.

[0106] With reference to Fig. 2, if the display device 100 is a self-emitting display device, each of the several subpixels SP arranged on the substrate 111 can comprise a light-emitting element ED and a subpixel circuit SPC for controlling the light-emitting element ED.

[0107] With reference to Fig. 2. The subpixel circuit SPC can comprise several drive transistors and at least one capacitor for driving the light-emitting element ED. The subpixel circuit SPC can drive the light-emitting element ED by supplying a drive current to the light-emitting element ED at a predetermined time. The light-emitting element ED can be driven by a drive current to emit light.

[0108] The multiple pixel control transistors can include a control transistor DT for controlling the light-emitting element ED and a sampling transistor ST, which is switched on or off according to the sampling signal SC.

[0109] The control transistor DT can supply a control current to the light-emitting element ED.

[0110] The sampling transistor ST can be designed to control the electrical state of a corresponding node in the subpixel circuit SPC, or to control the state or operation of the drive transistor DT.

[0111] The at least one capacitor may include a storage capacitor Cst to maintain a constant voltage during a single frame.

[0112] To control the subpixel SP, a data signal VDATA can be applied as an image signal and a sampling signal SC as a gate signal. Furthermore, a common pixel drive voltage, comprising the drive voltage VDD and the base voltage VSS, can be applied to the subpixel SP.

[0113] The light-emitting element ED can comprise an anode AND, an intermediate layer for light-emitting elements EL, and a cathode CAT. The intermediate layer for light-emitting elements EL can be positioned between the anode AND and the cathode CAT.

[0114] If the light-emitting element ED is an organic light-emitting element, the light-emitting element interlayer EL can comprise a light-emitting layer EML, a first common interlayer COM1 between the anode AND and the light-emitting layer EML, and a second common interlayer COM2 between the light-emitting layer EML and the cathode. The light-emitting layer EML can be arranged for each subpixel SP. In contrast, the first common interlayer COM1 and the second common interlayer COM2 can be arranged together across multiple subpixels SP. The light-emitting layer EML can be arranged for each light-emitting region, and the first common interlayer COM1 and the second common interlayer COM2 can be arranged together across multiple light-emitting regions and / or the non-light-emitting region.The first common intermediate layer COM1 and the second common intermediate layer COM2 can together be referred to as the common intermediate layer EL_COM.

[0115] For example, the first common intermediate layer COM1 can comprise a hole injection layer HIL and a hole transport layer HTL. The second common intermediate layer COM2 can comprise an electron transport layer ETL and an electron injection layer EIL. The hole injection layer can inject holes from the anode AND into the hole transport layer, the hole transport layer can transport the holes to the light-emitting layer EML, the electron injection layer can inject electrons from the cathode CAT into the electron transport layer, and the electron transport layer can transport electrons to the light-emitting layer EML.

[0116] For example, the cathode CAT can be electrically connected to the base voltage line VSSL. The base voltage VSS, which is a type of common pixel drive voltage, can be applied to the cathode CAT via the base voltage line VSSL. The anode AND can be electrically connected to the first node N1 of the drive transistor DT of each subpixel SP.

[0117] For example, the anode AND can be a pixel electrode located in each subpixel SP, and the cathode CAT can be a common electrode located in multiple subpixels SP. Alternatively, the cathode CAT can be a pixel electrode located in each subpixel SP, and the anode AND can be a common electrode located in multiple subpixels SP. For the sake of simplicity, the following description assumes that the anode AND is a pixel electrode and the cathode CAT is a common electrode.

[0118] Each light-emitting element (ED) can have sections where the anode (AND), the light-emitting element interlayer (EL), and the cathode (CAT) overlap. A predetermined light-emitting region can be formed by each ED. For example, the emission region of each ED can include an area where the anode (AND), the light-emitting element interlayer (EL), and the cathode (CAT) overlap.

[0119] For example, the light-emitting element ED can be an organic light-emitting diode (OLED), an inorganic light-emitting diode (LED), or a light-emitting quantum dot element. If the light-emitting element ED is, for example, an organic light-emitting diode (OLED), the light-emitting element interlayer EL of the light-emitting element ED can comprise a light-emitting element interlayer EL containing an organic material.

[0120] The control transistor DT can be used to supply a control current to the light-emitting element ED. The control transistor DT can be connected between a control voltage line VDDL and the light-emitting element ED.

[0121] The control transistor DT can include a first node N1, which is electrically connected to the light-emitting element ED, a second node N2, to which the data signal VDATA can be applied, and a third node N3, to which the control voltage VDD from the control voltage line VDDL is applied.

[0122] In the driver transistor DT, the second node N2 can be a gate node, the first node N1 can be a source or a drain node, and the third node N3 can be a drain or a source node. For the sake of simplicity, in the following description of the driver transistor DT, the second node N2 can be a gate node, the first node N1 a source node, and the third node N3 a drain node.

[0123] The in Fig. The subpixel circuit SPC shown contains a sampling transistor ST, which can be a switching transistor for transmitting the data signal VDATA, which is an image signal, to the second node N2, which is the gate node of the drive transistor DT.

[0124] The sampling transistor ST can be controlled by the sampling signal SC, which is a gate signal applied via the sampling line SCL (a type of gate line GL), to turn it on or off in order to control the electrical connection between the second node N2 of the driver transistor DT and the data line DL. The drain or source electrode of the sampling transistor ST can be electrically connected to the data line DL, the source or drain electrode of the sampling transistor ST can be electrically connected to the second node N2 of the driver transistor DT, and the gate electrode of the sampling transistor ST can be electrically connected to the sampling line SCL.

[0125] The storage capacitor Cst can be electrically connected between the first node N1 and the second node N2 of the driver transistor DT. The storage capacitor Cst can comprise a first capacitor electrode that is electrically connected to, or corresponds to, the first node N1 of the driver transistor DT, and a second capacitor electrode that is electrically connected to, or corresponds to, the second node N2 of the driver transistor DT.

[0126] The capacitor Cst can be an external capacitor that is intentionally placed outside the drive transistor DT, but not a parasitic capacitor (e.g. Cgs or Cgd), which is an internal capacitor that may be present between the first node N1 and the second node N2 of the drive transistor DT.

[0127] The driver transistor DT and the sampling transistor ST can each be an n-type transistor or a p-type transistor.

[0128] The display board 110 can have a structure with upward emission or a structure with downward emission.

[0129] If the display panel 110 has an upward-emitting structure, at least a section of the subpixel circuit SPC may overlap, at least partially, with the light-emitting element ED in the vertical direction. However, if the display panel 110 has a downward-emitting structure, the subpixel circuit SPC may not overlap with the light-emitting element ED in the vertical direction.

[0130] As it is in Fig. As shown in Figure 2, the subpixel circuit SPC can have a 2T1C structure (2-transistor-1-capacitor structure) comprising two transistors DT and ST and one capacitor Cst. In some cases, the subpixel circuit SPC may further include one or more transistors or one or more capacitors.

[0131] For example, the SPC subpixel circuit can have an 8T1C structure with 8 transistors and 1 capacitor. As another example, the SPC subpixel circuit can have a 6T2C structure with 6 transistors and 2 capacitors. As yet another example, the SPC subpixel circuit can have a 7T1C structure with 7 transistors and 1 capacitor.

[0132] Depending on the structure of the subpixel circuit SPC, the type and number of gate lines or gate signals supplied to the subpixel SP may differ.

[0133] Furthermore, the type and number of common pixel drive voltages supplied to the subpixel SP can differ depending on the structure of the subpixel circuit SPC.

[0134] Since the circuit elements (in particular the light-emitting element ED implemented as an organic light-emitting diode (OLED) with an organic material) in each subpixel SP are susceptible to external moisture or oxygen, the encapsulation layer 200, which prevents the ingress of external moisture or oxygen into the circuit elements (in particular the light-emitting element ED), can be arranged on the display panel 110. The encapsulation layer 200 can be formed in various shapes so that the light-emitting elements ED do not come into contact with moisture or oxygen.

[0135] With reference to Fig. 2. The display device 100 may further comprise a touch sensor layer TSL with multiple sensor electrodes and a touch detection circuit TSL designed to detect the multiple sensor electrodes in order to determine the presence or absence of a touch or the coordinates of a touch.

[0136] The touch sensor layer TSL can be embedded in the display panel 110. For example, the touch sensor layer TSL can be arranged on the encapsulation layer 200 in the display panel 110.

[0137] The display panel 110 can include not only the touch sensor layer TSL, but also several touch contact points to which the touch detection circuit TSL is electrically connected, as well as several touch lead wires TL for electrically connecting the multiple sensor electrodes contained in the touch sensor layer TSL and the multitude of touch contact points to which the touch detection circuit TSL is connected.

[0138] Fig. Figure 3 shows a substrate 111 of a display board 110 of the Revelation.

[0139] With reference to Fig. 3. The substrate 111 of the display board 110 can comprise a display area DA in which an image can be displayed and a non-display area NDA in which no image is displayed.

[0140] With reference to Fig. 3. The non-display area (NDA) can comprise a first non-display area (NDA1) positioned in the first direction relative to the display area (DA), a second non-display area (NDA2) positioned in the second direction relative to the display area (DA), a third non-display area (NDA3) positioned in a direction opposite to the first direction relative to the display area (DA), and a fourth non-display area (NDA4) positioned in a direction opposite to the display area (DA). For example, the first direction can be a column direction (Y-axis direction), and the second direction, which intersects the first direction, can be a row direction (X-axis direction).

[0141] With reference to Fig. 3. The first non-display area NDA1 can include a contact point area PA in which several contact points are arranged.

[0142] In the contact point area PA, multiple contact points can be arranged to which the control circuitry is electrically connected. Multiple control circuitry or printed circuit boards can be electrically connected. For example, the multiple contact points can include multiple indicator contact points and multiple touch contact points. Multiple DLs, a drive voltage line VDDL, and a base voltage line VSSL can be connected to the multiple contact points located in the PA area. Fig. The three shown are electrically connected. Several touch guide lines TL can be electrically connected to the multiple touch contact points.

[0143] With reference to Fig. 3. The first non-display area NDA1 may also include a bending area BA. In this case, the substrate 111 may be a flexible substrate. In some cases, the first non-display area NDA1 may not include the bending area BA.

[0144] With reference to Fig. 3. The display panel 110 can further comprise a ground wire located in the non-display area NDA of the substrate 111. The ground wire can extend from a point in the contact area PA, through the second non-display area NDA2, the third non-display area NDA3, and the fourth non-display area NDA4, to another point in the contact area PA. Thus, the ground wire can surround the display area DA.

[0145] With reference to Fig. 3. The display panel 110 can include an encapsulation layer area A_ENCAP and a dam area A_DAM.

[0146] With reference to Fig. 3. The encapsulation layer region A_ENCAP can be a region in which the encapsulation layer 200 is located. In the display panel 110, the encapsulation layer 200 can have a structure in which an inorganic layer and at least one organic layer are arranged one above the other. In this case, an edge of the encapsulation layer 200 can be considered an edge of the organic layer.

[0147] With reference to Fig. 3. The dam region A_DAM can be an area surrounding the encapsulation layer A_ENCAP. A structure acting as a dam can be positioned within the dam region A_DAM. The dam can prevent the liquid organic layer from flowing out.

[0148] Fig. Figure 4 is a cross-sectional view showing a section of a display area DA of a display panel 110 according to implementations of the disclosure.

[0149] With reference to Fig. 4. The substrate SUB can comprise a first substrate SUB1, an intermediate insulating film IPD, and a second substrate SUB2. The intermediate insulating film IPD can be positioned between the first substrate SUB1 and the second substrate SUB2. By configuring the substrate SUB with the first substrate SUB1, the intermediate insulating film IPD, and the second substrate SUB2, it is possible to prevent moisture ingress. For example, the first substrate SUB1 and the second substrate SUB2 can be polyimide substrates (PI substrates). The first substrate SUB1 can be referred to as the primary PI substrate, and the second substrate SUB2 can be referred to as the secondary PI substrate.

[0150] With reference to Fig. 4. Various patterns ACT, SD1 and GATE1 for forming a transistor, such as a drive transistor DRT, various insulating films MBUF, ABUF1, ABUF2, GI, ILD1, ILD2 and PAS0, as well as various metal patterns TM, GM, ML1 and ML2 can be arranged on the substrate SUB.

[0151] With reference to Fig. 4. A multi-buffer layer MBUF can be arranged on the second substrate SUB2. A first active buffer layer ABUF1 can be arranged on the multi-buffer layer MBUF.

[0152] A first metal layer ML1 and a second metal layer ML2 can be arranged on the first active buffer layer ABUF1. The first metal layer ML1 and the second metal layer ML2 can form a light-shielding layer LS for shielding light.

[0153] A second active buffer layer ABUF2 can be arranged on the first metal layer ML1 and the second metal layer ML2. An active layer ACT of the driver transistor DRT can be arranged on the second active buffer layer ABUF2.

[0154] A gate insulating film (GI) can be arranged to cover the active layer (ACT).

[0155] A first gate electrode GATE1 of the driver transistor DRT can be arranged on the gate insulating film GI. In this case, a gate material layer GM can be arranged on the gate insulating film GI together with the first gate electrode GATE1 of the driver transistor DRT at a position that differs from the position at which the driver transistor DRT is formed.

[0156] The first interlayer insulating film ILD1 can be arranged to cover the first gate electrode GATE1 and the gate material layer GM. A metal pattern TM can be arranged on the first interlayer insulating film ILD1. The metal pattern TM can be located in a different position than the position where the drive transistor DRT is formed. The second interlayer insulating layer ILD2 can be arranged to cover the metal pattern TM on the first interlayer insulating layer ILD1.

[0157] Two first source-drain electrode patterns SD1 can be arranged on the second intermediate layer insulating layer ILD2. One of the two first source-drain electrode patterns SD1 is the source node of the driver transistor DRT, and the other is the drain node of the driver transistor DRT. The two first source-drain electrode patterns SD1 can be electrically connected to the two opposite sides of the active layer ACT via the contact hole of the second intermediate layer insulating layer ILD2, the first intermediate layer insulating layer ILD1, and the gate insulating layer GI.

[0158] A section of the active layer ACT that overlaps the first gate electrode GATE1 is a channel region. One of the two first source-drain electrode patterns SD1 can be connected to one side of the channel region in the active layer ACT, and the other of the two first source-drain electrode patterns SD1 can be connected to the other side of the channel region in the active layer ACT.

[0159] A passivation layer PAS0 is arranged to cover the first two source-drain electrode patterns SD1. A planarization layer PLN can be arranged on top of the passivation layer PAS0. The planarization layer PLN can comprise a first planarization layer PLN1 and a second planarization layer PLN2.

[0160] The first planarization layer PLN1 can be placed on the passivation layer PAS0.

[0161] A second source-drain electrode pattern SD2 can be arranged on the first planarization layer PLN1. The second source-drain electrode pattern SD2 can be connected to one of the first two source-drain electrode patterns SD1 (corresponding to the second node N2 of the drive transistor DRT in the subpixel SP of Fig. 2) be connected through the contact hole of the first planarization layer PLN1.

[0162] The second planarization layer PLN2 can be arranged to cover the second source-drain electrode pattern SD2. A light-emitting element ED can be arranged on the second planarization layer PLN2.

[0163] In the stacked structure of the light-emitting element ED, the anode electrode AE ​​can be arranged on the second planarization layer PLN2. The anode electrode AE ​​can be electrically connected to the second source-drain electrode pattern SD2 via the contact hole of the second planarization layer PLN2.

[0164] The bank BANK can be positioned to cover a section of the anode electrode AE. A section of the bank BANK corresponding to the light-emitting area EA of the subpixel SP can be open.

[0165] A section of the anode electrode AE ​​may be exposed through an opening (an open section) of the bank BANK. A light-emitting layer EL may be positioned on a side face of the bank BANK and the opening (the open section) of the bank BANK. All or part of the light-emitting layer EL may be positioned between adjacent banks BANK.

[0166] In the opening of the bank BANK, the light-emitting layer EL can contact the anode electrode AE. A cathode electrode CE can be arranged on the light-emitting layer EL.

[0167] The light-emitting element ED can be formed by the anode electrode AE, the light-emitting layer EL, and the cathode electrode CE. The light-emitting layer EL can comprise an organic film.

[0168] An encapsulation layer ENCAP can be arranged on the light-emitting element ED described above.

[0169] The encapsulation layer ENCAP can have a single-layer or a multi-layer structure. For example, in Fig. 6 and Fig. As shown in Figure 7, the encapsulation layer ENCAP can comprise a first inorganic encapsulation layer PAS1, an organic encapsulation layer PCL and a second inorganic encapsulation layer PAS2.

[0170] For example, the first inorganic encapsulation layer PAS1 and the second inorganic encapsulation layer PAS2 can be inorganic films, and the organic encapsulation layer PCL can be an organic film. Beneath the first inorganic encapsulation layer PAS1, the organic encapsulation layer PCL, and the second encapsulation layer PAS2, the organic encapsulation layer PCL can be the thickest and serve as a planarizing layer.

[0171] The first inorganic encapsulation layer, PAS1, can be located on the cathode electrode, CE, and closest to the light-emitting element, ED. PAS1 can be composed of an inorganic insulating material that can be deposited at low temperatures. For example, PAS1 can be made of silicon nitride (SiNx), silicon dioxide (SiOx), silicon oxynitride (SiON), or aluminum oxide (Al2O3). Because PAS1 is deposited in a low-temperature atmosphere, it can prevent damage to the light-emitting layer, EL, which contains an organic material sensitive to high temperatures during the deposition process.

[0172] The organic encapsulation layer PCL can be formed in a smaller area than the first inorganic encapsulation layer PAS1. In this case, the organic encapsulation layer PCL can be formed such that two opposite ends of the first inorganic encapsulation layer PAS1 are exposed. The organic encapsulation layer PCL serves as a buffer to relieve mechanical stresses between the layers due to bending of the display device 100 and can also serve to improve planarity. For example, the organic encapsulation layer PCL can be an acrylic resin, an epoxy resin, polyimide, polyethylene, or silicon oxycarbon (SiOC) and can be formed from an organic insulating material. For example, the organic encapsulation layer PCL can be formed by an inkjet process.

[0173] The second inorganic encapsulation layer, PAS2, can be positioned above the substrate SUB where the organic encapsulation layer, PCL, is formed, such that it covers the top surface and side faces of both the organic encapsulation layer, PCL, and the first inorganic encapsulation layer, PAS1. The second inorganic encapsulation layer, PAS2, can minimize or block the penetration of moisture or oxygen from the outside into the first inorganic encapsulation layer, PAS1, and the organic encapsulation layer, PCL. For example, the second encapsulation layer, PAS2, can be composed of an inorganic insulating material such as silicon nitride (SiNx), silicon dioxide (SiOx), silicon oxynitride (SiON), or aluminum oxide (Al2O3).

[0174] With reference to Fig. 4. If the touch sensor TS is embedded in the display panel PNL, it can be located on the encapsulation layer ENCAP. The touch sensor structure is described in detail below.

[0175] A touch buffer layer T-BUF can be placed on the encapsulation layer ENCAP. A touch sensor TS can be placed on the touch buffer layer T-BUF.

[0176] The touch sensor TS can include touch sensor metals TSM and a bridge metal BRG, arranged on different layers.

[0177] A touch interlayer insulating film T-ILD can be arranged between the touch sensor metals TSM and the bridge metal BRG.

[0178] For example, the touch sensor metals (TSMs) can comprise a first touch sensor metal (TSM), a second touch sensor metal (TSM), and a third touch sensor metal (TSM) arranged adjacent to each other. The third touch sensor metal (TSM) is positioned between the first and second touch sensor metals, and if the first and second touch sensor metals (TSMs) are electrically connected, they can be electrically connected via the bridge metal (BRG) arranged on a separate layer. The bridge metal (BRG) can be insulated from the third touch sensor metal (TSM) by the touch interlayer insulating film (T-ILD).

[0179] When the touch sensor TS is formed on the display panel PNL, moisture can be generated by the chemical solution used in the process (e.g., developer or etchant). By placing the touch sensor TS on the touch buffer film T-BUF, it is possible to prevent any chemical solution or moisture from penetrating the light-emitting layer EL, which contains an organic material, during the manufacturing process of the touch sensor TS. Thus, the touch buffer film T-BUF can prevent damage to the light-emitting layer EL, which is sensitive to chemicals or moisture.

[0180] The touch buffer film T-BUF consists of an organic insulating material with a low permittivity of 1 to 3 and is formed at a low temperature, not exceeding a predetermined temperature (e.g., 100 °C), to prevent damage to the light-emitting layer EL, which contains the high-temperature-sensitive organic material. For example, the touch buffer layer T-BUF can be formed from an acrylic, epoxy, or siloxane-based material. If the display device is bent at 100 °C, the encapsulation layer ENCAP can be damaged, and the touch sensor metal mounted on the touch buffer layer T-BUF can break.Even if the display device is bent 100°, the touch buffer layer T-BUF, formed from an organic insulating material and possessing planarizability, can prevent damage to the encapsulation layer ENCAP and / or breakage of the metals TSM and BRG that form the touch sensor TS.

[0181] A protective layer PAC can be arranged to cover the touch sensor TS. The protective layer PAC can be an organic insulating film.

[0182] According to one implementation, the display device can perform touch detection using either a counter-capacitance-based or a self-capacitance-based touch detection scheme. In the following example, the display device performs counter-capacitance-based touch detection and includes a touch sensor structure for this purpose, for the sake of simplicity.

[0183] Fig. Figure 5 is a view showing components for touch detection according to the disclosure.

[0184] With reference to Fig. 5. A touch sensor structure for counter-capacitance-based touch detection can comprise multiple first touch electrode leads TEL1 and multiple second touch electrode leads TEL2. The multiple first touch electrode leads TEL1 and the multiple second touch electrode leads TEL2 can be positioned on the encapsulation layer ENCAP.

[0185] Each of the multiple first touch electrode leads TEL1 can be arranged in a second direction DR2, and each of the multiple second touch electrode leads TEL2 can be arranged in a first direction DR1. The first direction DR1 and the second direction DR2 are intersecting directions.

[0186] With reference to Fig. 5. Each of the multiple first touch electrode leads TEL1 can consist of multiple first touch electrodes TE1 that are electrically connected to each other. Each of the second touch electrode leads TEL2 can consist of multiple second touch electrodes Y-TE that are electrically connected to each other. The multiple first touch electrodes TE1 and the multiple second touch electrodes TE2 are contained within the multiple touch electrodes TE. The multiple first touch electrodes TE1 that form each of the multiple first touch electrode leads TEL1 can be drive touch electrodes, and the multiple second touch electrodes TE2 that form each of the multiple second touch electrode leads TEL2 can be sensing touch electrodes.In this case, each of the several first touch electrode lines TEL1 corresponds to the control touch electrode line and each of the several second touch electrode lines TEL2 corresponds to the detection touch electrode line.

[0187] With reference to Fig. 5. A touch sensor metal for detecting touches can comprise multiple touch guide lines TL, as well as multiple first touch electrode lines TEL1 and multiple second touch electrode lines TEL2. The multiple touch guide lines TL can comprise one or more first touch guide lines TL1 connected to each of the multiple first touch electrode lines TEL1, and one or more second touch guide lines TL2 connected to each of the multiple second touch electrode lines TEL2.

[0188] With reference to Fig. 5. Each of the multiple first contact electrode leads TEL1 can comprise multiple first contact electrodes TE1 arranged in the same row or column, and one or more first bridge metals BRG1 electrically connecting them. The first bridge metal BRG1 connecting the two adjacent first contact electrodes TE1 can be a metal integrated into the two adjacent first contact electrodes TE1, or it can be a metal connected to the two adjacent first contact electrodes TE1 via a contact hole.

[0189] Each of the multiple second touch electrode leads TEL2 can comprise multiple second touch electrodes TE2 arranged in the same column or row, and one or more second bridge metals BRG2 electrically connecting them. The second bridge metal BRG2 connecting the two adjacent second touch electrodes TE2 can be a metal integrated into the two adjacent second touch electrodes TE2, or it can be a metal connected to the two adjacent second touch electrodes TE2 via a contact hole.

[0190] The first bridge metal BRG1 or the second bridge metal BRG2, which is connected via the contact hole to the first contact electrode TE1 or the second contact electrode TE2, can be referred to as the "connection pattern".

[0191] In an area (a contact electrode conductor crossing area) where the first contact electrode conductor TEL1 and the second contact electrode conductor TEL2 cross, the first bridge metal BRG1 and the second bridge metal BRG2 can cross.

[0192] As described above, the first bridge metal BRG1 and the second bridge metal BRG2 can be arranged in different layers when they cross in the contact electrode conduction intersection area.

[0193] In order to cross the multiple first contact electrode leads TEL1 and the multiple second contact electrode leads TEL2, the multiple first contact electrodes TE1, the multiple first bridge metals BRG2, the multiple second contact electrode leads TEL2 and the multiple second bridge metals BRG2 can therefore be arranged in two or more layers, each having an insulating layer in between.

[0194] With reference to Fig. 8. Each of the multiple first contact electrode leads TEL1 is electrically connected to the corresponding first contact point TP1 via one or more first contact guide leads TL1. In other words, the first contact electrode TE1, which is located on the outermost side among the multiple first contact electrodes TE1 contained in the single first contact electrode lead TEL1, is electrically connected to the corresponding first contact point TP1 via the first contact guide lead TL1.

[0195] Each of the multiple second touch electrode leads TEL2 is electrically connected to the corresponding second touch contact point TP2 via one or more second touch guide leads TL2. In other words, the second touch electrode TE2, located at the outermost point beneath the multiple second touch electrodes TE2 contained within a second touch electrode lead TEL2, is electrically connected to the corresponding second touch contact point TP2 via the second touch guide lead TL2. The wires or leads electrically connected to the touch contact points TP1 and TP2 are described in detail below.

[0196] Fig. Figure 6 is a view showing a non-display area NDA of a scoreboard 110 according to implementations of the disclosure.

[0197] The in Fig. Substrate 111 shown in Figure 6 is the same as the one in Fig. Substrate 111 is shown in Figure 3. Therefore, a repeated description is omitted. With reference to Fig. 6. An area 300 can be identified in which a section of the non-display area (NDA) is enlarged.

[0198] With reference to Fig. 6. The multiple contact points PD' can be arranged in the contact point area PA. On the substrate 111 adjacent to the contact point area, or in other words between the contact point area and the bending area BA, the following are arranged: a first contact guide area A_TL1', a second contact guide area A_TL2', a base voltage guide area A_VSS', a drive voltage guide area VDDL A_VDD', and a gate drive voltage guide area A_GD'.

[0199] The conductors arranged in the first contact guide area A_TL1' can be electrically connected to some of the multiple contact points PD'. The multiple first contact guide conductors can be arranged in the first contact guide area A_TL1'.

[0200] The conductors arranged in the second contact guide area A_TL2' can be electrically connected to some of the multiple contact points PD'. The multiple second contact guide conductors can be arranged in the second contact guide area A_TL2'.

[0201] The conductors arranged in the base voltage line section A_VSS' can be electrically connected to some of the multiple contact points PD'. A circuit board for supplying a base voltage can be arranged in the base voltage line section A_VSS'.

[0202] The conductors located in the control voltage line section A_VDD' can be electrically connected to some of the multiple contact points PD'. A circuit board for supplying a control voltage can be located in the A_VDD' section of the control voltage line VDDL.

[0203] The lines arranged in the gate drive voltage line region A_GD' can be electrically connected to some of the multiple contact points PD'. The multiple gate drive voltage lines VGDL can be arranged in the gate drive voltage line region A_GD'.

[0204] With reference to Fig. 6 can the first contact guidance line area A_TL1' in Fig. 6 is viewed on the left side. The first contact guide area A_TL1' can be electrically connected to some of the multiple contact points PD' and can extend in the first direction DR1. If the first contact guide area A_TL1' extends in the first direction DR1, it can be inclined to the right. For example, it can be arranged obliquely in a lower right direction. Furthermore, the first contact guide area A_TL1' can extend beyond the bending area BA in the first direction DR1 and can be arranged to bend to the left.

[0205] The second contact guide area A_TL2' can be positioned on the right side of the first contact guide area A_TL1'. The second contact guide area A_TL2' can be electrically connected to some of the multiple contact points PD' and can extend in the first direction DR1. If the second contact guide area A_TL2' extends in the first direction DR1, it can be inclined to the right. For example, the second contact guide area A_TL2' can be arranged obliquely in a lower right direction. Furthermore, the second contact guide area A_TL2' can extend beyond the bending area BA in the first direction DR1 and can extend to the left and right.

[0206] The base voltage line region A_VSS' can be electrically connected to some of the multiple contact points PD' and can extend in the first direction DR1. The base voltage line region A_VSS' can extend in the first direction DR1 and simultaneously be positioned on the right side of the second contact line region A_TL2'. If the base voltage line region A_VSS' extends in the first direction DR1, it can overlap the first contact line region A_TL1' and the second contact line region A_TL2'. If the base voltage line region A_VSS' overlaps the first contact line region A_TL1' and the second contact line region A_TL2', it can also overlap the gate drive voltage line region A_GD'.The base voltage line area A_VSS' may not overlap with the drive voltage line area VDDL A_VDD'.

[0207] The section A_VDD' of the control voltage line VDDL can be positioned on the right side of the base voltage line section A_VSS'. The section A_VDD' of the control voltage line VDDL can be electrically connected to some of the multiple contact points PD', and the section A_VDD' of the control voltage line VDDL can extend in the first direction DR1. If the section A_VDD' of the control voltage line VDDL extends in the first direction DR1, the control voltage line A_VDD' can be inclined to the right.

[0208] The gate drive voltage line region A_GD' can be electrically connected to a portion of the multiple contact points PD', and its position can be a right-hand portion of the region A_VDD' of the drive voltage line VDDL. The gate drive voltage line region A_GD' can extend in the first direction DR1, then bend to the left and extend in that direction, and then extend again in the first direction DR1. In other words, the gate drive voltage line region A_GD' can be bent twice by 90 degrees. In this case, the gate drive voltage line region A_GD' can overlap the first contact guide line region A_TL1' and the second contact guide line region A_TL2'. Furthermore, the gate drive voltage line region A_GD' can overlap the base voltage line region A_VSS' and the drive voltage line VDD' A_VDD'.The gate drive voltage line area A_GD' can pass through the bending area BA and simultaneously extend in the first direction DR1.

[0209] However, the first contact guidance area A_TL1' and the second contact guidance area A_TL2' can be defined with reference to Fig. 6. With the exception of a section electrically connected to the contact point, at least partially overlap the base voltage lead area A_VSS'. Leads exhibiting a single-lead or dual-lead configuration may be arranged in the first touch lead area A_TL1' and the second touch lead area A_TL2'. The single-lead configuration refers to a configuration where one lead extends, and the dual-lead configuration refers to a configuration where two leads are connected in parallel. If the first touch lead area A_TL1' and the second touch lead area A_TL2' overlap the base voltage lead area A_VSS', it may be difficult to design a dual-lead configuration due to space constraints. Even if a single-lead configuration is designed, additional design challenges may arise, such as increased resistance and amplified noise issues.

[0210] Accordingly, implementations of the disclosure can create a display device in which lines can be arranged efficiently by changing the arrangement of the lines.

[0211] Implementations of the disclosure can create a display device in which lines can be arranged efficiently by minimizing an area where touch guide line areas and the base voltage line area A_VSS' overlap.

[0212] Implementations of the disclosure can create a display device that, through efficient arrangement of lines, enables low-power control. A detailed description of this is given below.

[0213] Fig. Figure 7 is a view showing a non-display area NDA of a scoreboard 110 according to implementations of the disclosure.

[0214] Several first contact guide lines TL1 can be arranged in the first contact guide line area A_TL1. The first contact guide line TL1 can be electrically connected to several first contact points PD1. The first contact guide line area A_TL1 can extend in the first direction DR1. The first contact guide line area A_TL1 can pass through the bending area BA. The first contact guide line area A_TL1 can be arranged such that it bends to the left after passing through the bending area BA.

[0215] The multiple secondary contact guide lines can be arranged in the second contact guide line area A_TL2. The second contact guide line area A_TL2 can be arranged on the right side of the first contact guide line area A_TL1 such that it is adjacent to the first contact guide line area A_TL1. The second contact guide line area A_TL2 can be arranged such that it bends to the left and right after passing through the bending area BA.

[0216] A section of the base voltage line area VSSL A_VSS, adjacent to the contact point area PA, can be located on the right side of the second contact guide area A_TL2, such that it is adjacent to the second contact guide area A_TL2. The area A_VSS of the base voltage line VSSL can have a Y-shape, particularly rotated by 180 degrees. In this case, the first contact guide area A_TL1 and the second contact guide area A_TL2 can be located in a region between the bottom sides of the Y-shape rotated by 180 degrees. In other words, the first contact guide area A_TL1 and the second contact guide area A_TL2 can be located between two lines into which the base voltage line area A_VSS branches.In other words, the first contact guide conductor area A_TL1 and the second contact guide conductor area A_TL2 are located in the space or area between the two branch sections of the Y-shaped base voltage area A_VSS. Thus, A_TL1 and A_TL2 are not overlapped by the base voltage line VSSL in this area. In particular, there is no overlap between A_TL1 and A_TL2 with the base voltage line VSSL in the bending area BA.

[0217] The A_VSS section of the VSSL base voltage line can be electrically connected to one or more contact points PD and extend in the first direction DR1. The A_VSS section of the VSSL base voltage line can have two or more plate shapes, but can also have multiple line shapes without restriction.

[0218] A section of area A_VDD of the control voltage line VDDL, adjacent to the contact point area PA, can be arranged on the right side of area A_VSS of the base voltage line VSSL such that it is adjacent to area A_VSS of the base voltage line VSSL. Area A_VDD of the control voltage line VDDL can extend through the bending area BA in the first direction DR1.

[0219] A section of region A_GD of the gate drive voltage line VGDL, adjacent to the contact area PA, can be positioned on the right side of region A_VDD of the drive voltage line VDDL such that it is adjacent to the drive voltage line region A_VDD. Region A_GD of the gate drive voltage line VGDL can pass through the bending area BA and extend in the first direction DR1. The gate drive voltage line VGDL can extend from the contact area PA to the bending area BA. Region A_GD of the gate drive voltage line VGDL can overlap region A_VDD of the drive voltage line VDDL.

[0220] A partial view showing the non-display area (NDA) of scoreboard 110 was taken with reference to Fig. 7 described, and a cross-sectional view of it is described below. With reference to Fig. The areas A1-A2, B1-B2, C1-C2 and D1-D2 can be identified. This is described in more detail below.

[0221] Fig. Figure 8 is a cross-sectional view of the area A1-A2 from Fig. 7.

[0222] The in Fig. The cross-sectional structure shown in Figure 8 is the same as the one in Figure 8. Fig. The cross-sectional structure shown in Figure 4 is therefore omitted. Repeated descriptions are omitted.

[0223] The gate material layer GM can be arranged on the gate insulating film GI. The first intermediate insulating film ILD1 can be arranged on the gate material layer GM. The metal pattern TM can be arranged on the first intermediate insulating film ILD1. A section of the gate material layer GM can overlap the metal pattern TM. A section of the gate material layer GM can be a gate drive voltage line VGDL. A section of the gate drive voltage line VGDL can be electrically connected to the metal pattern TM, and in this case, contact it via the contact hole formed in the first intermediate insulating film ILD1.

[0224] The first source-drain electrode pattern SD1 can be arranged on the second intermediate insulating film ILD2. The first planarization layer PLN1 can be arranged on the first source-drain electrode pattern SD1. The second source-drain electrode pattern SD2 can be arranged on the first planarization layer PLN1. The second planarization layer PLN2 can be arranged on the second source-drain electrode pattern SD2.

[0225] With reference to Fig. Figure 8 is the first structured source-drain electrode pattern SD1. It is formed by the left section of Fig. As described in section 8, a portion of the first source-drain electrode pattern SD1 can overlap the gate material layer GM and the metal pattern TM. In this case, the first source-drain electrode pattern SD1 can extend to the right-hand portion. Accordingly, the first source-drain electrode pattern SD1 can overlap the gate drive voltage line VGDL.

[0226] Referring to the far right side of Fig. 8. The contact area PA can be identified. Several first touch contact points can be arranged within contact area PA. These multiple first touch contact points can comprise the respective materials of the first source-drain electrode pattern SD1, the second source-drain electrode pattern SD2, and the touch sensor metal TSM. In other words, the multiple first touch contact points can be in the form of a multilayer metal. With respect to contact area PA, the second source-drain electrode pattern SD2 can overlap the first source-drain electrode pattern SD1. The touch sensor metal TSM can also overlap the second source-drain electrode pattern SD2.

[0227] With reference to Fig. 8. A base voltage line VSSL can be arranged between the bending area BA and the contact area PA. In this case, the base voltage line VSSL can contain the material of the first source-drain electrode pattern SD1.

[0228] Two dams, DAM1 and DAM2, can be arranged between the bending area BA and the display area DA. The dam can contain two organic insulating layer materials, or it can contain only one. The second dam, DAM2, can be located outside the first dam, DAM1. A section of a component containing the material of the bank BANK, which can function as a dam, can be located outside the second dam, DAM2.

[0229] A light-emitting element (ED) can be positioned on the side of the display area (DA). After the bank (BANK) is completely deposited, a section of the bank (BANK) can be etched and removed to define a position for the light-emitting element (ED). The area where the bank (BANK) is etched out can correspond to the display area (DA). The non-display area (NDA) can be an area outside the display area (DA). A touch sensor metal (TSM) and a bridge metal (BRG) can be positioned within the display area (DA) to form a touch sensor. A first touch guide wire (TL1) can be positioned within the non-display area (NDA).

[0230] The first touch guide line TL1 can extend from the upper surface of the encapsulation layer PCL to the side surface of the encapsulation layer PCL. The first touch guide line TL1 can extend along an inclined surface formed on a side surface of the encapsulation layer PCL, and the first touch guide line TL1 can pass through the bending region BA. The first touch guide line TL1 can be in the form of a double line consisting of a touch sensor metal TSM and a bridge metal BRG, or it can be in the form of a single line. The first touch guide line TL1 can pass through the bending region BA and extend to the contact point area PA. The first touch guide line TL1 can be electrically connected to the first touch contact point TP1.The first touch guide wire TL1 and the first touch contact point TP1 can each contain the material of the touch sensor metal TSM, but can also share the material of the continuous touch sensor metal TSM. The first touch guide wire TL1 can contact the second source-drain electrode structure SD2 in the bending area BA. Accordingly, an interruption can be prevented even if the first touch guide wire TL1 is bent in the bending area BA.

[0231] With reference to Fig. 8. The first touch guide line TL1 can overlap the base voltage line VSSL in a section of the area A1-A2. In other words, because a section of the first touch guide line TL1 overlaps the base voltage line VSSL, the space in which the first touch guide line TL1 is to be designed can be relatively enlarged. Accordingly, the first touch guide line TL1 can easily be designed as a double line. A cross-sectional view of the area B1-B2 is described below.

[0232] Fig. Figure 9 is a cross-sectional view of area B1-B2. Fig. 7.

[0233] The in Fig. The cross-sectional structure shown in Figure 9 is the same as the one in Figure 9. Fig. The cross-sectional structure shown in section 4 is therefore omitted. Repeated descriptions are therefore omitted. Furthermore, a description of the section shown in Fig. 9 cross-sectional structure shown, which corresponds to the one in Fig. The cross-sectional structure shown in section 8 is identical, omitted.

[0234] With reference to Fig. 9 The base voltage line VSSL may contain materials that are included in the first source-drain electrode pattern SD1, the second source-drain electrode pattern SD2, and the cathode electrode CE.

[0235] With reference to Fig. 9. The first contact guide line TL1 can extend from the contact area PA to the bending area BA. The first contact guide line TL1 can overlap the base voltage line VSSL in an area adjacent to the bending area BA. The base voltage line VSSL can pass through the bending area BA and extend to the display area DA. In the bending area BA, the base voltage line VSSL can contain the material of the second source-drain electrode pattern SD2. In the bending area BA, the second source-drain electrode pattern SD2 can be electrically connected to the first source-drain electrode pattern SD1 via the contact hole formed in the first planarization layer PLN1. Subsequently, the first source-drain electrode pattern SD1 can extend from the bending area BA to the display area DA. The first source-drain electrode pattern SD1 can pass through the lower sections of the first dam DAM1 and the second dam DAM2.The first source-drain electrode pattern SD1 can be electrically connected to the second source-drain electrode pattern SD2 within the first dam DAM1. The second source-drain electrode pattern SD2 can extend through the lower sections of the first dam DAM1 and the second dam DAM2. The second source-drain electrode pattern SD2 can be electrically connected to the first source-drain electrode pattern SD1 via the contact hole formed in the first planarization layer PLN1 within the first dam DAM1. The second source-drain electrode pattern SD2 can be electrically connected to the cathode electrode CE within the first dam DAM1. The cathode electrode CE can extend along the side surface of the bank to the display area DA. The cathode electrode CE can be formed from the light-emitting element ED in the emission area.

[0236] With reference to Fig. 9. In the area A1-A2, the first touch guide line TL1 can overlap the base voltage line VSSL in a section thereof. In other words, since a section of the first touch guide line TL1 overlaps with the base voltage line VSSL, the space in which the first touch guide line TL1 is to be designed can be relatively enlarged. Accordingly, the first touch guide line TL1 can easily be designed as a double line. A cross-sectional view of the area C1-C2 is described below.

[0237] Fig. 10 and Fig. 11 are cross-sectional views of the in Fig. 7 shown area C1-C2.

[0238] With reference to Fig. 10. The base voltage line VSSL can be arranged on the second intermediate layer insulating film ILD2. With reference to Fig. 10. The base voltage line VSSL can include a first source-drain electrode pattern SD1. With reference to Fig. 11 However, the base voltage line VSSL can be configured as a double line comprising the first source-drain electrode pattern SD1 and the second source-drain electrode pattern SD2.

[0239] With reference to Fig. 10. The control voltage line VDDL can be arranged on the second intermediate insulating film ILD2. With reference to Fig. 10. The drive voltage line VDDL can include a first source-drain electrode pattern SD1. With reference to Fig. 11 However, the control voltage line VDDL can be configured as a double line comprising the first source-drain electrode pattern SD1 and the second source-drain electrode pattern SD2.

[0240] With reference to Fig. 10. The gate drive voltage line VGDL can be located on the second intermediate insulating layer ILD2. With reference to Fig. 10. The gate drive voltage line VGDL can include a first source-drain electrode pattern SD1. With reference to Fig. 11 However, the gate drive voltage line VGDL can be configured as a double line comprising the first source-drain electrode pattern SD1 and the second source-drain electrode pattern SD2.

[0241] With reference to Fig. 10. The base voltage line VSSL, the drive voltage line VDDL, and the gate drive voltage line VGDL can be arranged in the same layer. The drive voltage line VDDL can be located between the base voltage line VSSL and the gate drive voltage line VGDL.

[0242] With reference to Fig. 10. The contact guide lines TL1 and TL2 can be arranged on the base voltage line VSSL. With reference to Fig. 10. The contact guide lines TL1 and TL2 can be configured as a double line. With reference to Fig. 11. Depending on the selection, the touch guide lines TL1 and TL2 can also be designed as a single line, and the touch guide lines TL1 and TL2 can contain the material of the touch sensor metal TSM.

[0243] Fig. 12 and Fig. 13 are cross-sectional views of the in Fig. 7 shown area D1-D2.

[0244] With reference to Fig. 12. A section of the base voltage line VSSL is divided into two sections. The base voltage line VSSL can have a Y-shape rotated by 180 degrees, and a section of the base voltage line VSSL corresponding to the upper end section of the Y-shape is divided.

[0245] The gate drive voltage line VGDL can be placed between the base voltage line VSSL and the drive voltage line VDDL.

[0246] With reference to Fig. 12. The base voltage line VSSL, the drive voltage line VDDL, and the gate drive voltage line VGDL can each be in the form of a single line. With reference to Fig. 13 However, the base voltage line VSSL, the drive voltage line VDDL and the gate drive voltage line VGDL can each be configured as a double line.

[0247] With reference to Fig. 12. The contact guide lines TL1 and TL2 may not overlap the base voltage line VSSL. Referring to Fig. 10 and Fig. 12. The first touch guide line TL1 can overlap the base voltage line VSSL in a section thereof. In other words, since a section of the first touch guide line TL1 overlaps the base voltage line VSSL, the space in which the first touch guide line TL1 is to be designed can be relatively increased. Accordingly, the first touch guide line TL1 can easily be designed as a double line. With reference to Fig. 12. The contact guide lines TL1 and TL2 can be designed in the form of a single line, and with reference to Fig. 13. The contact guide lines TL1 and TL2 can be designed in the form of a double line.

[0248] The above description was presented to enable those skilled in the art to realize and utilize the technical idea of ​​the disclosure and was given in the context of a particular application and its requirements. Various modifications, additions, and substitutions of the described implementations are readily apparent to those skilled in the art, and the general principles defined herein can be applied to other implementations and applications without departing from the idea and scope of the disclosure. The foregoing description and the accompanying drawings provide an example of the technical idea of ​​the disclosure. That is to say, the disclosed implementations are intended to illustrate the scope of the technical idea of ​​the disclosure. QUOTES INCLUDED IN THE DESCRIPTION

[0000] This list of documents cited by the applicant was automatically generated and is included solely for the reader's convenience. The list is not part of the German patent or utility model application. The DPMA accepts no liability for any errors or omissions. Cited patent literature

[0000] KR 10-2024-0108308

[0001]

Claims

[1] Display device (110) comprising: a substrate (111, SUB); a display area (DA); and a non-display area (NDA), wherein the non-display area (NDA) contains a contact point area (PA); several contact guide lines (TL1, TL2) arranged in the non-display area (NDA) and extending from the contact point area (PA) to the display area (DA); and a base voltage line (VSSL) located in the non-indication area (NDA), wherein the base voltage line (VSSL) comprises a trunk section and two branch sections extending from the trunk section. [2] Display device according to claim 1, wherein the multiple contact guide lines (TL1, TL2) cross the trunk section and extend between the two branch sections without overlapping the two branch sections, and / or the trunk section of the base voltage line (VSSL) is connected to the contact point area (PA). [3] Display device according to claim 1 or 2, wherein the multiple touch guide lines (TL1, TL2) comprise a first touch guide line (TL1) designed to transmit a touch control signal, and a second touch guide line (TL2) designed to transmit a touch detection signal, and / or a first touch electrode (TEL1) arranged in the display area (DA) and electrically connected to the first touch guide line (TL1); and a second touch electrode (TEL2) arranged in the display area (DA) and electrically connected to the second touch guide line (TL2). [4] Display device according to claim 3, further comprising a touch detection circuit (TSL) designed to supply the touch control signal to the first touch guide line (TL1) and to receive the touch detection signal from the second touch guide line (TL2), and / or wherein the touch detection circuit (TSL) is connected to the first and the second touch guide lines (TL1, TL2) in the contact point area (PA). [5] Display device according to one of the preceding claims, further comprising several subpixels (SP) arranged in the display area (DA), each of the several subpixels (SP) being electrically connected to the base voltage line to receive a base voltage. [6] Display device according to one of the preceding claims, wherein the non-display area (NDA) further comprises a bending area (BA) between the contact area (PA) and the display area (DA); and / or the multiple contact guide lines (TL1, TL2) and the two branching sections of the base voltage line (VSSL) extend through the bending area (BA). [7] Display device according to one of the preceding claims, further comprising several gate drive voltage lines (VGDL) arranged in the non-display area (NDA) and extending in the first direction (DR1), wherein the several gate drive voltage lines (VGDL) do not overlap the several touch guide lines (TL1, TL2) and / or the several gate drive voltage lines (VGDL) do not overlap the base voltage line (VSSL). [8] Display device according to one of the preceding claims, wherein at least one of the multiple touch guide lines (TL1, TL2) has a double-line structure comprising two metal layers separated by an insulating layer, and / or at least one of the multiple touch guide lines (TL1, TL2) comprises a double-line structure in a first section of the non-display area (NDA) and a single-line structure in the bending area (BA), wherein the double-line structure is preferably arranged in an area between the display area (DA) and the bending area (BA). [9] Display device according to any of the preceding claims, wherein the base voltage line (VSSL) comprises: a first metal material extending from the contact area (PA) to the bending area (BA); and a second metal material that is positioned within the bending area (BA) and electrically connected to the first metal material. [10] Display device according to one of the preceding claims, wherein the trunk section of the base voltage line (VSSL) is designed as a single continuous conductor having a width that is substantially greater than the width of one of the multiple touch guide lines (TL1, TL2). [11] Display device comprising: a substrate (SUB, 111) having a display area (DA) and a non-display area (NDA) with a contact area (PA); a first metal pattern (VSSL) located in the non-display area (NDA) and extending in a first direction from the contact area (PA) to the display area (DA); and mehrere zweite Metallmuster (TL1, TL2), die auf dem Substrat (111) angeordnet sind und sich in der ersten Richtung (DR1) von dem Kontaktstellenbereich (PA) zu dem Anzeigebereich (DA) erstrecken, wobei das erste Metallmuster (VSSL) die mehreren zweiten Metallmuster (TL1, TL2) an einer Kreuzungsposition kreuzt und sich anschließend in einen ersten und einen zweiten Verzweigungsabschnitt verzweigt, und wobei in einem Bereich, der sich in der ersten Richtung (DR1) von der Kreuzungsposition aus erstreckt, die mehreren zweiten Metallmuster (TL1, TL2) zwischen dem ersten und dem zweiten Verzweigungsabschnitt des ersten Metallmusters (VSSL) angeordnet sind, ohne den ersten und den zweiten Verzweigungsabschnitt (TL1, TL2) zu überlappen. [12] Anzeigevorrichtung nach Anspruch 11, wobei das erste Metallmuster (VSSL) eine Basisspannungsleitung (VSSL) ist und die mehreren zweiten Metallmuster (TL1, TL2) mehrere Berührungsführungsleitungen (TL1, TL2) sind. [13] Display device according to one of the preceding claims, wherein the substrate (SUB, 111) further comprises a bending area (BA) positioned between the display area (DA) and the contact area (PA), and at least one of the multiple touch guide lines (TL1, TL2) has a single-line structure within the bending area (BA) and a double-line structure in an area between the bending area (BA) and the display area (DA), wherein the double-line structure preferably comprises a touch sensor metal layer and a bridge metal layer, wherein an insulating layer is arranged between the touch sensor metal layer and the bridge metal layer. [14] Display device comprising: ein Substrat (SUB, 111), das einen Anzeigebereich (DA) und einen Nichtanzeigebereich (NDA) aufweist, wobei der Nichtanzeigebereich (NDA) einen Kontaktstellenbereich (PA) enthält; several contact guide lines (TL1, TL2) arranged in the non-indicating area (NDA) and extending in a first direction (DR1) from the contact point area (PA) to the indicating area (DA); and a base voltage line (VSSL) located in the non-display area (NDA), wherein the base voltage line (VSSL) extends in the first direction (DR1) from the contact area (PA) to the display area (DA), wherein the base voltage line (VSSL) crosses the several touch guide lines (TL1, TL2) at a crossing position and then branches into a first and a second branching section, wherein in an area extending in the first direction (DR1) from the crossing position, the multiple contact guide lines (TL1, TL2) are arranged between the first and second branching sections of the base voltage line (VSSL) without overlapping the first and second branching sections. [15] Display device according to one of the preceding claims, wherein the non-display area (NDA) further comprises a bending area (BA) between the contact area (PA) and the display area (DA); and the multiple branching sections (TL1, TL2) and the first and second branching sections of the base voltage line (VSSL) extend through the bending area (BA), and / or which further comprises multiple gate drive voltage lines (VGDL) arranged in the non-display area (NDA) and extending in the first direction (DR1), wherein the multiple gate drive voltage lines (VGDL) do not overlap the multiple contact guide lines (TL1, TL2).

Citation Information

Patent Citations

  • 10-2024-0108308