Voltage converters and methods for voltage multiplication

Abstract

Voltage converter for voltage multiplication, to which a capacitor (2) can be coupled and comprising: - a charging circuit (3) designed to charge the capacitor (2) and comprising a first current limiter (40) with a first resistance value R1, and - a discharge circuit (4) comprising a second current limiter (20) with a second resistance value R2, such that the first and second current limiters (20, 40) are controlled to adjust the first and second resistance values ​​R1, R2, wherein a control device (206) switches the voltage converter (1) between a charging phase and a discharging phase at a clock frequency (f), wherein during the charging phase the first current limiter (40) is in a conductive operating state and the second current limiter (20) is in a non-conductive operating state, wherein in the discharge phase the first current limiter (40) is in a non-conductive operating state and the second current limiter (20) is in a conductive operating state, wherein: - the first current limiter (40) includes a first switch (41) and has the first resistance value R1 when the first switch (41) is turned on and - the second current limiter (20) includes a second switch (21) and has the second resistance value R2 when the second switch (21) is turned on, - the first switch (41) includes a first field-effect transistor (43), which has the first resistance value R1 as a turn-on resistor, and - the second switch (21) includes a second field-effect transistor, which has the second resistance value R2 as a switching resistance, wherein the voltage converter (1) includes: an amplifier (51) implemented as a differential amplifier with: - a first input (52) coupled to a first output switch (31) comprising the discharge circuit (4), wherein a terminal of the first output switch (31) is coupled to an output terminal (60) of the voltage converter (1), - a second input (53) to which a reference voltage (VR) can be supplied, and - an output (54) coupled to a control terminal (44) of the first field-effect transistor (43) and a control terminal of the second field-effect transistor, a switch (47) with: - a first input which is connected to the output (54) of the amplifier (51), - a second input connected to a reference potential terminal (8) or a supply voltage terminal (9), - an output connected to the control terminal (44) of the first field-effect transistor (43), and - a control input (49) for selectively connecting the first or the second input to the output, and another switch with - a first input which is connected to the output (54) of the amplifier (51), - a second input connected to the reference potential terminal (8) or the supply voltage terminal (9), - an output connected to the control terminal of the second field-effect transistor, and - a control input for optionally connecting the first or the second input to the output, wherein a further terminal of the first output switch (31) is coupled to a first terminal (5) of the voltage converter (1), to which a first electrode (62) of the capacitor (2) can be coupled; and wherein the voltage converter (1) has a second output switch (32) with - a first terminal which is connected to the further terminal of the first output switch (31), and - a second connection which is connected to a circuit node (34) which is coupled to the first input (52) of the amplifier (51).

Description

[0001] The present invention relates to a voltage converter for voltage multiplication and a method for voltage multiplication.

[0002] Voltage converters, also known as direct current / direct current converters (DC / DC converters), are often used to convert a low voltage to a higher voltage. This can be achieved by using a capacitor that is first charged in a charging circuit and then discharged in a discharging circuit.

[0003] Document JP 2005-312169 A describes a voltage-inverting charge pump circuit with a capacitor. An input of the charge pump circuit is connected to a first electrode of the capacitor via a first switch. The first electrode is connected to a reference potential terminal via a third switch and a transistor. A second electrode of the capacitor is connected to the reference potential terminal via a second switch and to an output of the charge pump circuit via a fourth switch. An amplifier of a voltage regulation circuit compares an output voltage with a reference voltage and controls a control terminal of the transistor depending on the comparison.

[0004] Document US 6 618 296 B2 deals with a charge pump circuit. A first electrode of a first capacitor is coupled to a first node via a first switch and to a reference potential terminal via a third switch. A second electrode of the first capacitor is coupled to a second node via a second switch and to an output of the charge pump circuit via a fourth switch. The first node is connected to a supply voltage via a first transistor. The second node is also connected to the supply voltage via a second transistor. An amplifier is connected to the input side of the first and second nodes. An output of the amplifier is connected to a control terminal of the second transistor.The charge pump circuit thus comprises an input current control circuit with a current limiting device for controlling an inrush current and thus a charging current in the charge pump capacitor.

[0005] Document US 2006 / 0 139 830 A1 explains a voltage supply circuit. A first supply input is coupled to a first electrode of a capacitor via a first parallel circuit. The first parallel circuit comprises a first switch arranged in parallel with a series circuit comprising a first resistor and a fifth switch. The first electrode is connected to a reference potential terminal via a second switch. A second supply input is coupled to a second electrode of the capacitor via a second parallel circuit. The second parallel circuit comprises a third switch arranged in parallel with a series circuit comprising a second resistor and a sixth switch. The second electrode is connected to an output of the voltage supply circuit via a fourth switch. The voltage supply circuit performs current limitation.

[0006] The publication "Optimized control of the "flying" capacitor operating voltage in "gearbox" charge-pumps - the key factor for a smooth operation", author E. Bayer, IEEE 34th Annual Conference on Power Electronics Specialist, 2003; PESO '03, 2003, pp. 610-615, describes various charge pumps with a "flying" capacitor. The output voltage of the charge pump can be adjusted using a variable internal resistor.

[0007] The publication "Current Mode Charge Pump: Topology, Modeling and Control," authored by G. Thiele and E. Bayer, IEEE 35th Annual Power Electronics Specialists Conference, 2004, pp. 3812-3817, deals with capacitive voltage converters. A supply voltage is connected to a capacitor via a transistor whose resistance can be adjusted.

[0008] The object of the present invention is to provide a voltage converter for voltage multiplication and a method for voltage multiplication.

[0009] This object is achieved by the subject matter of patent claim 1 and the method according to patent claim 9. Further developments and refinements are the subject matter of the dependent claims.

[0010] In one embodiment, a voltage converter for voltage multiplication comprises a charging circuit and a discharging circuit. A capacitor can be coupled to the voltage converter. The charging circuit has a first current limiter, and the discharging circuit has a second current limiter.

[0011] The capacitor is charged by the charging circuit during a charging phase, so that electrical energy is stored in the capacitor. In a discharging phase, the capacitor provides electrical energy for release via the discharging circuit.

[0012] The charging circuit advantageously includes the first current limiter, so that the magnitude of the current flowing in the voltage converter during the charging phase is limited. The discharging circuit advantageously includes the second current limiter, so that the magnitude of the current is also limited during the discharging phase. Advantageously, the first and second current limiters can be used to reduce the fluctuation range of an output voltage tapped at the output side of the voltage converter, and to adjust the output voltage.

[0013] The first current limiter has a first resistance value R1, and the second current limiter has a second resistance value R2. The first and second current limiters are controlled to adjust the first and second resistance values ​​R1, R2.

[0014] A control device switches the voltage converter between the charging phase and the discharging phase at a clock frequency. During the charging phase, the first current limiter is in a conductive state and the second current limiter is in a non-conductive state. During the discharging phase, the first current limiter is in a non-conductive state and the second current limiter is in a conductive state.

[0015] The first current limiter comprises a first switch and has the first resistance value when the first switch is switched on. The second current limiter comprises a second switch and has the second resistance value when the second switch is switched on. The first switch comprises a first field-effect transistor, which has the first resistance value as an on-resistance. The second switch comprises a second field-effect transistor, which has the second resistance value as an on-resistance.

[0016] The voltage converter includes an amplifier with: - a first input coupled to a first output switch included in the discharge circuit, wherein a terminal of the first output switch is coupled to an output terminal of the voltage converter, - a second input to which a reference voltage can be fed, and - an output coupled to a control terminal of the first field effect transistor and a control terminal of the second field effect transistor.

[0017] The amplifier is implemented as a differential amplifier.

[0018] The voltage converter also includes a switch with: - a first input connected to the output of the amplifier, - a second input connected to a reference potential terminal or a supply voltage terminal, - an output connected to the control terminal of the first field-effect transistor, and - a control input for selectively connecting the first or second input to the output.

[0019] In addition, the voltage converter includes another switch with - a first input connected to the output of the amplifier, - a second input connected to the reference potential terminal or the supply voltage terminal, - an output connected to the control terminal of the second field-effect transistor, and - a control input for selectively connecting the first or second input to the output.

[0020] A further terminal of the first output switch is coupled to a first terminal of the voltage converter, to which a first electrode of the capacitor can be coupled.

[0021] Furthermore, the voltage converter comprises a second output switch having a first terminal connected to the further terminal of the first output switch and a second terminal connected to a circuit node coupled to the first input of the amplifier.

[0022] A circuit arrangement can comprise the voltage converter and other circuit components to which an input voltage provided to the voltage converter is also supplied. The first and second current limiters can minimize disturbances in the input voltage, so that the other circuit components of the circuit arrangement are, to a first approximation, unaffected by the switching processes from the charging phase to the discharging phase and from the discharging phase to the charging phase in the voltage converter. The first and second current limiters can advantageously reduce the effect of the voltage converter on the input voltage and any connected battery.

[0023] Advantageously, due to the reduction of current and voltage peaks, the higher frequency component in the input voltage, the output voltage and the currents flowing in the voltage converter is reduced, so that the electromagnetic compatibility of the voltage converter with other circuit components and other devices is improved.

[0024] In one embodiment, a semiconductor body comprises the voltage converter. In a preferred embodiment, the capacitor can be coupled to the semiconductor body. The voltage converter advantageously provides two current limiters, so that the power generated during current limiting is converted into heat at two different locations on the semiconductor body. This advantageously allows for a more uniform temperature distribution on the semiconductor body.

[0025] In a preferred embodiment, the voltage converter is implemented as a boost converter.

[0026] During the charging phase, the first switch is on, i.e., closed, and the second switch is off, i.e., open. During the discharging phase, the first switch is off and the second switch is on.

[0027] The first and second resistance values ​​R1, R2 are adjustable.

[0028] It is advantageous if the on-resistances are adjustable using control signals. The on-resistances are controlled.

[0029] To adjust the first and second resistance values ​​R1, R2, the control terminals of the first and second field-effect transistors are coupled to the output of the voltage converter. The output voltage of the voltage converter or a voltage derived from the output voltage is compared with a reference voltage configured as a predeterminable reference value. The first and second resistance values ​​R1, R2 are adjusted depending on the comparison result.

[0030] The first resistance value R1 is adjustable from a first set comprising a continuous range of values. The second resistance value R2 is also adjustable from a second set comprising a continuous range of values. The first and second sets can each comprise a value at which the first and second switches, respectively, are in an open state. The first and second field-effect transistors, respectively, can be switched to a non-conductive state.

[0031] In a preferred embodiment, the voltage converter comprises an operational transconductance amplifier (OTA). The output voltage of the voltage converter or a voltage derived therefrom, as well as the reference voltage, are fed to the OTA on the input side. The transconductance amplifier is connected to the control terminals of the first and second field-effect transistors on the output side. The transconductance amplifier thus charges a gate capacitance encompassed by the respective field-effect transistor. This results in a smooth and adjustable switching of the first and second field-effect transistors from a non-conductive operating state to a conductive operating state.

[0032] In one embodiment, the voltage converter comprises a first charging capacitor that is charged by the transconductance amplifier. The first charging capacitor can be connected at one terminal to the control terminal of the first field-effect transistor. In a further development, the voltage converter comprises a second charging capacitor that is charged by the transconductance amplifier. The second charging capacitor can be connected at one terminal to the control terminal of the second field-effect transistor.

[0033] In one embodiment, a method for voltage multiplication comprises charging a capacitor using an input voltage via a charging circuit and providing an output voltage via a discharging circuit. The charging circuit has a first current limiter, and the discharging circuit has a second current limiter. Advantageously, the first and second current limiters are controlled in such a way that fluctuation in the output voltage is reduced.

[0034] The first current limiter has a first resistance value R1 and the second current limiter has a second resistance value R2.

[0035] The first current limiter is controlled to set the first resistance value R1 and the second current limiter is controlled to set the second resistance value R2. Advantageously, the level of the output voltage can be reduced by increasing the first and second resistance values ​​R1, R2. Increasing the first and second resistance values ​​R1, R2 advantageously reduces a fluctuation range of the input voltage and a fluctuation range of the output voltage. Advantageously, by increasing the first and second resistance values ​​R1, R2, a value of a current flowing in the charging circuit during a charging phase and a value of a current flowing in the discharging circuit during a discharging phase are reduced. This advantageously lowers the maximum current density that can occur in the charging and discharging circuits, thus reducing the likelihood of electromigration occurring.

[0036] The invention is explained in more detail below using several exemplary embodiments with reference to the figures. Components and circuit parts with the same function or effect bear the same reference numerals. To the extent that circuit parts or components correspond in function, their description will not be repeated in each of the following figures. Fig. 1A to 1C show an exemplary embodiment of a voltage converter according to the proposed principle, Fig. 2A to 2C show exemplary embodiments of a current limiter, Fig. 3A to 3C show further exemplary embodiments of a voltage converter according to the proposed principle with a connectable capacitor, Fig. 4A to 4C show an alternative exemplary embodiment of a voltage converter according to the proposed principle with two connectable capacitors, Fig. Figure 5 shows an exemplary embodiment of a power supply arrangement comprising a voltage converter according to the proposed principle, and Fig. 6 shows an exemplary embodiment of a switch.

[0037] Fig. 1A shows an exemplary embodiment of a voltage converter for voltage multiplication, which has an input terminal 61, an output terminal 60, a first terminal 5, and a second terminal 6. A capacitor 2 is connected between the first terminal 5 and the second terminal 6. The voltage converter 1 comprises an input switch 11, a first output switch 31, a first current limiter 40, and a second current limiter 20. The input switch 11 couples the input terminal 61 to the first terminal 5. The first terminal 5 is coupled to the output terminal 60 via the first output switch 31. The second terminal 6 is coupled to a reference potential terminal 8 via the first current limiter 40. The input terminal 61 is coupled to the second terminal 6 via the second current limiter 20.

[0038] The first current limiter 40 comprises a first switch 41 and a first resistor 42. Similarly, the second current limiter 20 comprises a second switch 21 and a second resistor 22. The first and second resistors 22, 42 are adjustable. The voltage converter 1 further comprises a second output switch 32 connected in parallel to the first output switch 31. A first terminal of the second output switch 32 is coupled to the first terminal 5. A second terminal of the second output switch 32 is connected via a circuit node 34 and an output resistor 33 to the output terminal 60, to which an output capacitor 7 is coupled. The first and second switches 21, 41, the input switch 11, and the first and second output switches 31, 32 are implemented as field-effect transistors. These are designed as metal-oxide-semiconductor field-effect transistors, abbreviated to MOSFETs.The voltage converter 1 further comprises an amplifier 51, which is connected at an output 54 to a control input of the first resistor 42 and a control input of the second resistor 22. The amplifier 51 is connected at a first input 52 to the circuit node 34. The circuit node 34 is connected to the reference potential terminal 8 via a voltage divider comprising a first and a second voltage divider resistor 56, 57. The first input 52 is connected to a node between the first and second voltage divider resistors 56, 57. A voltage source 55 is connected to a second input 53 of the amplifier 51.

[0039] A battery voltage VBAT is supplied to the input terminal 61. An output voltage VOUT can be tapped at the output capacitor 7 and thus at the output terminal 60. The operation of the voltage converter 1 is illustrated by way of example using the Fig. 1A and Fig. 1B explains.

[0040] Fig. 1B shows the voltage converter according to Fig. 1A in an exemplary charging phase. During the charging phase, the input switch 11 and the first current limiter 40 are in a conductive, i.e., closed, operating state. The first and second output switches 31, 32 as well as the second current limiter 20 are in a non-conductive, i.e., open, operating state. Thus, a charging current IL can flow from the input terminal 61 via the input switch 11 and the first terminal 5 to a first electrode 62 of the capacitor 2. Likewise, a current flow is possible from a second electrode 63 of the capacitor 2 via the second terminal 6 and the first current limiter 40 to the reference potential terminal 8. The charging circuit 3 comprises the input terminal 61, the input switch 11, the capacitor 2, the first current limiter 40, and the reference potential terminal 8. During the charging phase, the capacitor 2 is thus charged to a maximum of the input voltage VBAT.A signal voltage V1 is supplied to the first input 52 of amplifier 51, which is derived from the output voltage VOUT by a voltage division using the output resistor 33 and the first and second voltage divider resistors 56, 57. A comparison voltage VR is supplied to the second terminal 53 of amplifier 51. The comparison voltage VR is designed as a predeterminable reference value. The comparison voltage VR is provided by the voltage source 55. If the signal voltage V1 is higher than the comparison voltage VR, a first resistance value R1 of the first current limiter 40 is increased. The first current limiter 40 serves to limit a current flowing during the charging phase.

[0041] Fig. 1C shows the voltage converter according to Fig. 1A in an exemplary discharge phase. In the discharge phase, in contrast to the charge phase, the input switch 11 and the first current limiter 40 are in a non-conductive operating state. The second current limiter 20 and the first and second output switches 31, 32 are switched to a conductive operating state. The discharge circuit 4 comprises the input terminal 61, the second current limiter 20, the capacitor 2, the output switches 31, 32, and the output terminal 60. Thus, a current flows from the input terminal 61 via the second current limiter 20 to the second electrode 63 of the capacitor 2. The second electrode 63 of the capacitor 2 is thus raised approximately to a maximum value of the input voltage VBAT. At the first electrode 62 of the capacitor 2, approximately twice the input voltage VBAT is available at the maximum. A discharge current IE flows through the output terminal 60.During the discharge phase, a larger portion of the discharge current IE can flow from the first electrode 62 of the capacitor 2 via the first output switch 31 to the output terminal 60 of the voltage converter 1, so that during the discharge phase the capacitor 2 can be discharged and the output capacitor 7 can be charged. A small portion of the discharge current IE can also flow from the first electrode 62 of the capacitor 2 via the second output switch 32 and the output resistor 33 to the output terminal 60.

[0042] The signal voltage V1, which is applied to the first input 52 of the amplifier 51, is derived from the output voltage VOUT by voltage division using the first and second voltage divider resistors 56, 57. If the signal voltage V1 rises above the reference voltage VR, a second resistance value R2 of the second current limiter 20 is increased. This reduces a current peak at the beginning of the discharge phase.

[0043] Advantageously, the increase in the charging current IL flowing through the input terminal 61 and the increase in the discharging current IE flowing through the output terminal 60 are limited by a current limiter each.

[0044] The output resistor 33 advantageously increases the stability of voltage converter 1, since the output resistor 33 creates a zero point in the feedback loop. This makes the stability of voltage converter 1 independent of the clock frequency f of voltage converter 1. The clock frequency f can thus also be set to low frequency values ​​to achieve particularly efficient operation with low power consumption.

[0045] Fig. Figure 2A shows an exemplary embodiment of a current limiter as it can be used as the first or second current limiter 20, 40 in the voltage converter according to the Fig. 1A to 1C, 3A to 3C, 4A to 4C, and 5. The current limiter comprises a transistor 43. The transistor 43 is implemented as a field-effect transistor. The output 54 of the amplifier 51, which is implemented as a transconductance amplifier, abbreviated OTA, is coupled to a control terminal 44 of the transistor 43. The transistor 43 is designed as a MOSFET. The transistor 43 in the first current limiter 40 is implemented as an n-channel MOSFET, and the transistor 43 in the second current limiter 20 is implemented as a p-channel MOSFET. The current limiter is advantageously implemented exclusively with a single component, namely the transistor 43, and is thus very inexpensive. The transistor 43 can be switched into a non-conductive operating state and into a conductive operating state in which the transistor 43 has an on-resistance adjustable by means of the amplifier 51 with the first and second resistance values ​​R1, R2, respectively.The transistor 43 can thus be used to implement the first switch 41 and the first resistor 42 of the first current limiter 40. Likewise, the transistor 43 can be used to implement the second switch 21 and the second resistor 22 of the second current limiter 20.

[0046] Fig. 2B shows an exemplary further development of a current limiter, as it is used as the first or second current limiter 20, 40 in the voltage converter according to the Fig. 1A to 1C, 3A to 3C, 4A to 4C and 5. The current limiter according to Fig. 2B comprises the transistor 43 and a switch 47. A first input of the switch is connected to the output 54 of the amplifier 51. An output of the switch 47 is connected to the control terminal 44 of the transistor 43. The transistor 43 of the first current limiter 40 is implemented as an n-channel MOSFET. Therefore, a second input of the switch 47 is connected to the reference potential terminal 8. The switch 47 has a control input 49, which is connected to a control device 206, as shown, for example, in Fig. 5 is shown.

[0047] If the control terminal 44 of the transistor 43 is connected to the reference potential terminal 8 by means of a signal SU at the control input 49 of the switch 47, the transistor 43 is switched to a non-conductive operating state and the gate capacitance present at the control terminal 44 of the transistor 43 is discharged. If the output 54 of the amplifier 51 is then connected to the control terminal 44 by means of the signal SU, the gate capacitance is charged by the amplifier 51. Due to the implementation of the amplifier 51 as an OTA, the amplifier 51 provides a current IOT at its output 54, which leads to a slow charging and thus a slow switching on of the transistor 43. This advantageously avoids current peaks when the transistor 43 is switched on.

[0048] In the case of the second current limiter 20, the transistor 43 is implemented as a p-channel MOSFET, and the second input of the switch 47 is connected to a supply voltage terminal 9. The supply voltage terminal 9 can be the input terminal 61. The transistor 43 can thus be placed in a non-conductive operating state by applying the voltage present at the input terminal 61 to the control terminal 44.

[0049] In an alternative embodiment, a charging capacitor 48 is connected to the control terminal 44 of the transistor 43. The charging capacitor 48 can be used to adjustably slow down the turn-on process of the transistor 43. The charging capacitor 48 can be connected between the control terminal 44 and a substrate terminal of the transistor 43.

[0050] Fig. Figure 2C shows an exemplary embodiment of a current limiter as it can be used as first or second current limiter 20, 40 in the voltage converter according to the Fig. 1A to 1C, 3A to 3C, 4A to 4C and 5. In Fig. 2C is a further training of the Fig. 2B. The current limiter additionally includes a current source 46, which connects the second input of the switch 47 to the reference potential terminal 8. The first input 52 of the amplifier 51 is implemented as an inverting input, and the second input 53 of the amplifier 51 is implemented as a non-inverting input.

[0051] The signal SU sets the charging and discharging phases. The current source 46 supplies a current source current IQ. This sets the edge steepness of a voltage at the control terminal 44 of the transistor 43 during the turn-off process. The duration of the turn-off process can thus be set such that voltage or current spikes are avoided. The switch opens with a limited slew rate. The current IOT is supplied by the amplifier 51 as a function of a difference between the reference voltage VR and the signal voltage V1.

[0052] In one embodiment, the current source 46 is implemented as a resistor.

[0053] In an embodiment not shown, to realize the second current limiter 20, the transistor 43 is realized as a p-channel MOSFET and the second input of the switch 47 is connected to the supply voltage terminal 9 via the current source 46.

[0054] Fig. 3A shows an exemplary further development of the voltage converter, which is used in the Fig. 1A to 1C. The voltage converter according to Fig. 3A includes a holding capacitor 35 that couples the circuit node 34 to the reference potential terminal 8. According to Fig. 3A is the Fig. 1A, the output resistor 33 is omitted and replaced by an open circuit. By means of the holding capacitor 35, the value of the output voltage VOUT that is provided at the end of the discharge phase is present at circuit node 34. Since the voltage divider 56, 57 is designed with high resistance, the value of the voltage at circuit node 34 drops only slightly during the subsequent charging phase. Thus, the first resistance value R1 can also be set during the charging phase. By means of the on-resistance of the first output switch 31, a zero point can also be achieved in the feedback circuit in order to achieve stability of the voltage converter. The holding capacitor 35 and the second output switch 32 function as a sample / hold element.

[0055] Fig. 3B shows an exemplary further development of the Fig. 1A to 1C. A third output switch 36 is connected in parallel to the second output switch 32. A first terminal of the third output switch 36 is connected to the circuit node 34, and a second terminal of the third output switch 36 is connected to the output terminal 60. The second and third output switches 32, 36 can also be implemented together as a changeover switch, with the two inputs of the changeover switch being connected to the two terminals of the first output switch 31, and an output of the changeover switch being connected to the circuit node 34. During the charging phase, the second output switch 32 is in an open operating state and the third output switch 36 is in a closed operating state. In contrast, during the discharging phase, the second output switch 32 is in a closed operating state and the third output switch 36 is in an open operating state.Thus, the output voltage VOUT is advantageously approximately present at circuit node 34 in both phases.

[0056] Fig. 3C shows an alternative development of the Fig. 1A to 1C shown voltage converter 1. According to Fig. 3C, the output resistor 33 is designed as a controllable resistor. The output resistor 33 is implemented as a transistor. A control terminal of the output resistor 33 is connected to the output 54 of the amplifier 51.

[0057] Fig. 4A shows a further development of the voltage converter according to Fig. 1A to 1C. The voltage converter 100 comprises the voltage converter 1 as shown in the Fig. 1A to 1C or 3A to 3C. In addition, the voltage converter 100 comprises a further voltage converter 1', which also functions like one of the voltage converters shown in the Fig. 1A to 1C or the Fig. 3A to 3C. The further voltage converter 1' comprises a further first terminal 5', which is coupled to a further input terminal 61' via a further input switch 11' and to a further output terminal 60' via a further first and a further second output switch 31', 32' and a further output resistor 33'. The further output terminal 60' and the output terminal 60 are connected to one another. The further voltage converter 1' has a further second terminal 6', which is coupled to the reference potential terminal 8 via a further first current limiter 40' and to the further input terminal 61' via a further second current limiter 20'. A further amplifier 51' is provided for controlling the further first and the further second current limiter 20', 40'.Another capacitor 2' is connected between the further first and the further second terminal 5', 6'.

[0058] The voltage converter 100 further comprises a coupling switch 101, which connects a coupling terminal 23 of the voltage converter 1 to a further coupling terminal 23' of the further voltage converter 1'. The coupling terminal 23 is arranged between the first current limiter 40 and the second current limiter 20. The further coupling terminal 23' is connected to the further first terminal 5'.

[0059] Fig. 4B shows an exemplary phase A of a method for operating the voltage converter 100. In phase A, the input switch 11, the coupling switch 101, and the further first current limiter 40' are switched to a conducting operating state. The input voltage VBAT thus drops across a series circuit comprising the two capacitors 2, 2'. The value of capacitor 2 and the value of the further capacitor 2' are approximately equal. Thus, the voltage drop across capacitor 2 is approximately up to a maximum of half the input voltage VBAT. Accordingly, the voltage drop across the further capacitor 2' is also approximately up to a maximum of half the input voltage VBAT.

[0060] Fig. 4C shows an exemplary phase B of a method for operating the voltage converter 100, which follows phase A and alternates periodically with phase A at a clock frequency f. In phase B, the second current limiter 20, the first and second output switches 31, 32, the further first and second output switches 31', 32', and the further second current limiter 20' are switched to a conducting operating state. The second electrode 63 of the capacitor 2 and the second electrode 63' of the further capacitor 2' are each connected to the input terminals 61, 61', so that they are approximately at the potential of the input voltage VBAT. Thus, approximately up to a maximum of 1.5 times the input voltage VBAT is present both at the first electrode 62 of the capacitor 2 and at the first electrode 62' of the further capacitor 2' and is fed to the output capacitor 7 via the output terminal 60.Advantageously, 1.5 times the input voltage VBAT can be provided as output voltage VOUT at the output terminal 60 using phases A and B.

[0061] In an alternative method not shown, twice the input voltage VBAT can also be provided at the output terminal 60. For this purpose, the voltage converter 1 is switched to a charging phase, as described, for example, in Fig. 1B. The voltage converter 1 is then switched into a discharge phase as shown in Fig. 1C is shown, and the further voltage converter 1' is switched into a charging phase according to Fig. 1B. In a subsequent step, voltage converter 1 is switched to a charging phase, and the other voltage converter 1' is switched to a discharging phase. Thus, voltage converter 1 and the other voltage converter 1' operate 180 degrees out of phase. This advantageously provides the output voltage VOUT with an even smaller fluctuation range.

[0062] In another alternative method (not shown), the input switches 11, 11' and the four output switches 31, 31', 32, 32' are switched to a conducting state, and the four current limiters 20, 20', 40, 40' are switched to a blocking state. Thus, the two input terminals 61, 61' are directly connected to the output terminal 60, so that the input voltage VBAT is applied to the output terminal 60 as the output voltage VOUT. This method can thus realize a multiplication factor M = 1.

[0063] In the Fig. 4A to 4C thus show a voltage converter 100 which, depending on the method, can have the multiplication factors M = 1 as well as 1.5 and 2. The multiplication factor M is the ratio of the output voltage VOUT to the input voltage VBAT.

[0064] Fig. 5 shows an exemplary power supply arrangement 200 which comprises the voltage converter 1 according to Fig. 1A to 1C or 3A to 3C. The power supply arrangement 200 further comprises a first output terminal 201, a second output terminal 202, an input terminal 203, a current sink 204, a comparator 205, a control device 206, and a voltage source 207. The input terminal 61 of the voltage converter 1 is connected to the input terminal 203 of the power supply arrangement 200. The output terminal 60 of the voltage converter 1 is connected to the first output terminal 201 of the power supply arrangement 200, with the output capacitor 7 being connected to the first output terminal 201. The output terminal 60 of the voltage converter 1 is connected to the second output terminal 202 of the power supply arrangement 200 via the current sink 204. A light-emitting diode 208 is connected between the second output terminal 202 and the reference potential terminal 8.The first output terminal 201 is connected to a first input of the comparator 205. The second output terminal 202 is connected to a second input of the comparator 205 via the voltage source 207. An output of the comparator 205 is connected to an input of the control device 206. An output of the control device 206 is connected via a control input of the voltage converter 1 to the control terminals of the input switch 11, the first and second current limiters 20, 40, and the first and second output switches 31, 32.

[0065] A voltage source 209 is coupled to the input terminal 203 of the power supply arrangement 200. A filter 64 is connected between the voltage source 209 and the input terminal 203. The filter 64 comprises an inductor 210 and a first and a second filter capacitor 211, 212. The inductor 210 is arranged between the voltage source 209 and the input terminal 203. The inductor 210 is implemented as a coil. The input terminal 203 is coupled to the reference potential terminal 8 via the first filter capacitor 211, and a node between the inductor 210 and the voltage source 209 is coupled to the reference potential terminal 8 via the second filter capacitor 212. The power supply arrangement 200 comprises a timer 213. An output of the timer 213 is connected to a control input of the current sink 204.

[0066] The control device 206 switches the voltage converter 1 between the charging phase and the discharging phase at a clock frequency f. The power supply arrangement 200 is provided for driving the light-emitting diode 208. The light-emitting diode 208 is supplied with a current provided by the current sink 204. The output voltage VOUT thus drops across the current sink 204 and the light-emitting diode 208. The voltage drop across the current sink 204 is compared by the comparator 205 with a threshold value VS provided by the voltage source 207. If the voltage across the current sink 204 drops below the threshold value VS, the control device 206 controls the voltage converter 1 such that the output voltage VOUT is increased. The comparator 205 has a hysteresis, so that frequent switching back and forth between two values ​​of the multiplication factor M is advantageously avoided.The timer 213 is provided for switching off the current sink 204 and thus for switching off the current through the light-emitting diode 208 after a flash is emitted.

[0067] Filter 64 is designed as a low-pass filter. Filter 64 is configured to attenuate signals occurring at the clock frequency f, since switching peaks occurring at a frequency higher than the clock frequency f are already reduced by voltage converter 1. Thus, the feedback of the switching operations in voltage converter 1 on voltage source 209 is further reduced.

[0068] Advantageously, the cathode of the LED 208 is directly connected to the reference potential terminal 8. Since the reference potential terminal 8 is typically designed as a connection with a large contact area, the reference potential terminal 8 ensures a very good heat sink. Connecting the cathode of the LED 208 to the reference potential terminal 8 thus leads to a lower temperature increase of the LED 208 during operation and thus to a longer service life of the LED 208.

[0069] Advantageously, very good electromagnetic compatibility is achieved by means of the two current limiters 20, 40 and the filter 64. This is particularly important for mobile communication devices. The timer advantageously prevents overloading of the LED 208 even if the output voltage VOUT of the voltage converter 1 is not reduced as usual after a lightning strike.

[0070] Alternatively, the inductance 210 can be implemented as a conductor track on a printed circuit board, abbreviated PCB.

[0071] Alternatively, the power supply arrangement 200 according to Fig. 5 as voltage converter also the voltage converter 100 according to the Fig. 4A to 4C are used, to which the further capacitor 2' is connected.

[0072] Fig. 6 shows an exemplary embodiment of a switch that can be used as input switch 11, first and second output switches 31, 32, and first and second switches 21, 41 in the voltage converters shown in the above figures. The switch comprises a parallel circuit consisting of transistor 43 and another transistor 43', which are implemented as p-channel MOSFETs. If the current to be driven is high, both transistors 43, 43' are advantageously switched in parallel to a conducting state and in parallel to a non-conducting state. If the current to be switched is low, transistor 43 is alternately switched to a conducting and a non-conducting state, while the other transistor 43' is constantly in a non-conducting state.If the input switch 11, the first and / or the second output switch 31, 32 each comprise the transistors 43, 43', the control terminals of the transistors 43, 43' are connected to different outputs of the control device 206, which is shown for example in . Fig. 5. If the first and / or the second switch 21, 41 each comprise the transistors 43, 43', the control terminal 44 of the transistor 43 is connected to the output of the Fig. 2B, and a control terminal 44' of the further transistor 43' is connected to an output of another switch (not shown). The two inputs of the further switch are connected to the two inputs of the switch 47. The control inputs of the two switches are coupled to different outputs of the control device 206.

[0073] In one embodiment, the ratio of channel width W1 to channel length L1 of transistor 43 is different from a ratio of channel width W2 to channel length L2 of the further transistor 43'. Advantageously, by selecting the transistor to be switched on, the current driving capability of the switch can be better adapted to the current to be switched.

[0074] Alternatively, the two transistors 43, 43' are implemented as n-channel MOSFETs. The first switch advantageously comprises 41 n-channel MOSFETs.

[0075] Alternatively, at least one additional transistor 43'' is connected in parallel to the transistor 43. List of reference symbols 1, 1' voltage converter 2.2' capacitor 3 Charging circuit 4 Discharge circuit 5.5' first connection 6, 6' second connection 7 Output capacitor 8 Reference potential connection 9 Supply voltage connection 11, 11' Input switch 20, 20' second current limiter 21, 21' second switch 22, 22' second resistance 23, 23' coupling connection 31, 31' first exit switch 32, 32' second output switch 33, 33' output resistance 34, 34' circuit node 35 Holding capacitor 36 third exit switch 40, 40' first current limiter 41, 41' first switch 42, 42' first resistance 43, 43', 43'' Transistor 44, 44', 44'' control connection 46 Power source 47 switches 48 Charging capacitor 49 Control input 51, 51' amplifier 52, 52' first entrance 53, 53' second entrance 54, 54' Exit 55, 55' voltage source 56, 56' first voltage divider resistor 57, 57' second voltage divider resistor 60, 60' output connection 61, 61' input connection 62, 62' first electrode 63, 63' second electrode 64 filters 100 voltage converters 101 coupling switch 200 Energy supply order 201 first output connection 202 second output connection 203 Input connector 204 Current sink 205 comparators 206 Control device 207 Voltage source 208 LEDs 209 Voltage source 210 Inductance 211 first filter capacitor 212 second filter capacitor 213 timers IE discharge current IL charging current IOT electricity IQ current source current S1, S2, S3 control signal SU Signal VBAT input voltage VOUT output voltage VR equivalent stress VS threshold V1 signal voltage

Claims

[1] Voltage converter for voltage multiplication, to which a capacitor (2) can be coupled and comprising: - a charging circuit (3) designed to charge the capacitor (2) and comprising a first current limiter (40) with a first resistance value R1, and - a discharge circuit (4) comprising a second current limiter (20) with a second resistance value R2, such that the first and second current limiters (20, 40) are controlled to adjust the first and second resistance values ​​R1, R2, wherein a control device (206) switches the voltage converter (1) between a charging phase and a discharging phase at a clock frequency (f), wherein in the charging phase the first current limiter (40) is in a conductive operating state and the second current limiter (20) is in a non-conductive operating state, wherein in the discharge phase the first current limiter (40) is in a non-conductive operating state and the second current limiter (20) is in a conductive operating state, wherein: - the first current limiter (40) comprises a first switch (41) and has the first resistance value R1 in the switched-on state of the first switch (41) and - the second current limiter (20) comprises a second switch (21) and has the second resistance value R2 in the switched-on state of the second switch (21), - the first switch (41) comprises a first field-effect transistor (43) which has the first resistance value R1 as an on-resistance, and - the second switch (21) comprises a second field-effect transistor which has the second resistance value R2 as an on-resistance, wherein the voltage converter (1) comprises: an amplifier (51) implemented as a differential amplifier with: - a first input (52) coupled to a first output switch (31) which the discharge circuit (4) comprises, wherein a terminal of the first output switch (31) is coupled to an output terminal (60) of the voltage converter (1), - a second input (53) to which a reference voltage (VR) can be fed, and - an output (54) coupled to a control terminal (44) of the first field-effect transistor (43) and a control terminal of the second field-effect transistor, a changeover switch (47) with: - a first input connected to the output (54) of the amplifier (51), - a second input connected to a reference potential terminal (8) or a supply voltage terminal (9), - an output connected to the control terminal (44) of the first field-effect transistor (43), and - a control input (49) for selectively connecting the first or the second input to the output, and another switch with - a first input connected to the output (54) of the amplifier (51), - a second input connected to the reference potential terminal (8) or the supply voltage terminal (9), - an output connected to the control terminal of the second field-effect transistor, and - a control input for selectively connecting the first or second input to the output, wherein a further terminal of the first output switch (31) is coupled to a first terminal (5) of the voltage converter (1), to which a first electrode (62) of the capacitor (2) can be coupled; and wherein the voltage converter (1) has a second output switch (32) with - a first terminal connected to the further terminal of the first output switch (31), and - a second terminal connected to a circuit node (34) coupled to the first input (52) of the amplifier (51). [2] Voltage converter according to claim 1, wherein the amplifier (51) is designed as a transconductance amplifier. [3] Voltage converter according to claim 1 or 2, wherein, depending on a comparison result of the amplifier (51), an increase in the first and / or the second resistance value R1, R2 is achieved to reduce a fluctuation of an output voltage (VOUT) provided at the output terminal (60) of the voltage converter (1), provided that a signal voltage (V1) derived from the output voltage (VOUT) is higher than the comparison voltage (VR). [4] Voltage converter according to one of claims 1 to 3, comprising an output resistor (33) connected between the circuit node (34) and the output terminal (60) of the voltage converter (1). [5] Voltage converter according to one of claims 1 to 3, comprising a holding capacitor (35) connected between the circuit node (34) and a reference potential terminal (8). [6] Voltage converter according to one of claims 1 to 3, comprising a third output switch (36) connected between the circuit node (34) and the output terminal (60) of the voltage converter (1). [7] Voltage converter according to one of claims 1 to 6, comprising a filter (64) connected in the charging circuit (3). [8] Method for voltage conversion by means of a voltage converter according to one of claims 1 to 7, comprising - charging a capacitor (2) by means of a charging circuit (3) comprising a first current limiter (40) having a first resistance value R1, using an input voltage (VBAT) such that the first current limiter (40) is controlled to set the first resistance value R1, and - Providing an output voltage (VOUT) by means of a discharge circuit (4) comprising a second current limiter (20) having a second resistance value R2, such that the second current limiter (20) is controlled to set the second resistance value R2. [9] Method according to claim 8, wherein the first and second current limiters (20, 40) are controlled such that a fluctuation of the output voltage (VOUT) is reduced.

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