Dynamically set threshold for occupying a secondary cache memory

DE112012004209B4Active Publication Date: 2025-07-17INTERNATIONAL BUSINESS MACHINE CORPORATION
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Patent Information

Application Number
DE112012004209
Authority / Receiving Office
DE · DE
Patent Type
Patents
Current Assignee / Owner
Priority Date
2011-10-31
Filing Date
2012-10-19
Publication Date
2025-07-17
Estimated Expiration
2032-10-19

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Abstract

A method for populating a secondary cache memory (300) of a data store of a computer-implemented cache data storage system (110) with data, the method comprising: determining a comparison metric (310) of potential data (320) to be input to the secondary cache memory (300) of a data store; setting a threshold value of the comparison metric (310) according to a cache efficiency of a current state of the secondary cache memory (300) of the data store; rejecting (330, 465) potential data (320) provided to the secondary cache memory (300) of the data store whose comparison metric (310) is less than the threshold value; and storing (350, 470) potential data (320) in the secondary cache memory (300) of the data store whose comparison metric (310) is equal to or greater than the threshold value of the comparison metric (310).
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Description

FIELD OF THE INVENTIONThis invention relates to computer implemented caches of a data store and, more particularly, to caches having multiple levels.BACKGROUND OF THE INVENTIONComputer implemented data storage systems typically include various types of data storage in which data is stored for host computer systems. Storage controllers or storage controllers control access to data storage media and memory in response to read and write requests. The memory controllers may control the data in accordance with data storage units such as latches, nonvolatile memories, RAID (Redundant Array of Independent Disks), JBOD (Just a Bunch Of Disks), etc. disposed at various levels of redundancy, access speed, and security.For example, an International Business Machines Corp. (IBM®) ESS (Enterprise Storage System) data storage system, such as a system DS8000™ includes redundant clusters of computer entities, caches, nonvolatile memories, etc., referred to as "central electronics complexes" ("CECs") or "CECs.".In a data storage system, cache memory includes fast memory or storage device used to store data or instructions accessed, accessed frequently, or possibly accessed shortly. Data stored in cache memory can be accessed quickly, rather than being retrieved or recomputed, thereby saving both time and resources.A cache memory may be provided at multiple levels. For example, a cache data storage system may include both a "first" or "primary" cache and a "secondary" cache. Typically, the primary cache has a faster access and is more expensive per unit of data than a secondary cache, the secondary cache having a higher storage capacity than the primary cache. For example, a primary cache includes dynamic random access memory (DRAM), while the secondary cache includes flash memory semiconductor (SSD) media such as "Flash_Cache" (trademark of International Business Corp.). When accessing data, a data processing system or device may first search for data in the primary cache and, if there is no data, search for the data in the secondary cache. When writing data, a data processing system or device may write data to the primary cache. If data in the primary cache is not accessed immediately or frequently, that data may be decremented to the secondary cache. If data is not accessed immediately or frequently from the secondary cache, it may be moved to a lower access speed data store such as RAID, JBOD, etc.Usually, a least recently used (LRU) algorithm is used to select which data to downgrade to the next lower level.US 2008 / 0 059 707 A1 describes a method for incrementing a counter value associated with a cache line when the cache line is inserted into a first level cache and storing the cache line into a second level cache coupled to the first level cache or into a third level cache coupled to the second level cache based on the counter value after offloading from the first level cache.SUMMARY OF THE INVENTIONThe objects underlying the invention are achieved in each case by the features of the independent patent claims. Embodiments of the invention are the subject of the dependent claims.Methods, computer implemented cache data storage systems and computer program products are provided for controlling data occupying a secondary cache of a data storage. In this context, "secondary" means any level of cache memory of the data store between a first level of cache memory of the data store and another data store. Thus, in a three-level cache of the data store, a "secondary" cache of the data store may be the second level or the third level.In one embodiment of a computer implemented cache data storage system having a secondary cache of the data storage, the following steps are performed:determining a measure of comparison of potential data to be entered into the cache of the data store;setting a threshold value of the comparison metric according to a cache efficiency of a current state of the secondary cache memory of the data memory;rejecting potential data provided to the cache of the data store whose comparison metric is less than the threshold; andtaking into the secondary cache of the data store potential data provided to the cache of the data store whose comparison metric is equal to or greater than the threshold value of the comparison metric.In another embodiment, the cache efficiency is determined by:providing a reference metric relating to hits of data last entered into the secondary cache of the data store;providing a reference metric relating to hits of data that was last moved from the secondary cache of the data store; andthe setting step includes setting the threshold value of the comparison metric according to the reference metric of the most recently input data and the reference metric of the most recently shifted data.In yet another embodiment, the adjusting step comprises:comparing the reference metric of the most recently input data with the reference metric of the most recently shifted data;reducing the threshold value when the reference metric of the most recently input data is greater than the reference metric of the most recently shifted data; andincreasing the threshold value when the reference metric of the last input data is less than the reference metric of the last shifted data.In another embodiment, where the cache data storage system additionally includes a primary cache of the data storage, the comparison metric is based on the up-to-date (heat) of the data when the data has been stored in the primary cache of the data storage of the cache data storage system.In another embodiment, the data provided to the secondary cache of the data store comprises data that has been decremented from the primary cache of the data store.In another embodiment, the most recently entered data is listed in an MRI list and the most recently moved data is listed in an MRE list and the reference metric includes a count of hits in the secondary cache of the data store for the data listed in the MRI list while the data is in the secondary cache of the data store and hits for the data in the MRE list after the data is moved from the secondary cache of the data store.In another embodiment, where the data comprises memory pages of data, the count of hits for the comparison metric is determined page by page, and the reference metrics of the most recently entered data and the most recently moved data are determined for all the pages listed in the MRI list and the MRE list, respectively.In a further embodiment, the setting step additionally comprises the threshold value of the comparison metric remaining unchanged if the reference metric of the last input data and the reference metric of the last shifted data are substantially the same.In another embodiment, the primary cache of the data store comprises a primary DRAM cache that provides data to the secondary cache and the secondary cache comprises flash memory.For a better understanding of the present invention, reference should be made to the following detailed description taken in conjunction with the accompanying drawings.BRIEF DESCRIPTION OF THE DRAWINGSFIG. 1 is a block diagram of an exemplary network and computer implemented storage server system in which the present invention may be implemented; FIG. 2 is a schematic illustration of a computer implemented cache data storage system of FIG. 1 ; FIG. 3 is a schematic illustration of various states of the system of FIGS. 1 and 2 ; and FIG. 4 is a flow chart illustrating an example method of operating the system of FIGS. 1 and 2.DETAILED DESCRIPTION OF THE INVENTIONThe invention will be described in the following description in preferred embodiments with reference to the figures, in which like numerals represent the same or similar elements. While this invention will be described in terms of the best mode for achieving the object of this invention, it will be apparent to one skilled in the art in view of these findings that variations can be realized without departing from the scope of the invention.Referring now to FIG. 1, an example of a computer-implemented network architecture 100 having a computer-implemented data storage system 110 is illustrated that can implement a computer-implemented cache data storage system and method discussed herein. The architecture 100 is presented by way of example only and is not intended to be limiting. The computer implemented cache data storage system and method disclosed herein can be applied to a wide variety of different computers, servers, data storage systems, and network architectures.The example network architecture 100 may include one or more host computer systems 102 connected to a network, such as a storage area network (SAN) 108. The network may have any suitable private or public interconnect using any suitable protocol.The storage system 110 includes a storage controller 200 configured to transmit data to and from the switches 202 and the data memories 203 and 204 and control the operation thereof. The data store may include, for example, arrays of solid state media and hard disk drives that are accessible via switches 202. Alternatively or additionally, data storage 203 and 204 may comprise single devices or may comprise multi-device data storage libraries. All or some of the host systems 102 may control and utilize the storage system 110 and utilize the memory controller 200 and the system to cache data included therein.The system for caching may be implemented in a memory controller 200 and may also be applied to other memory systems. As shown, the storage controller 200 includes one or more servers 206. Controller 200 may also include host adapters 208 and device adapters 210 to provide the interfaces that connect controller 200 to host systems 102 and data storage 203 and 204, respectively. Multiple servers 206a, 206b may provide redundancy to ensure that data is always available to connected hosts 102. Thus, should one server 206 a fail, the other server 206 bmay remain operable to ensure that data transfer between the host systems 102 and the data storage 203 and 204 may continue. This process may be referred to as "failover" (fail-safe).An example of a storage system 110 having an architecture similar to the architecture shown in FIG. 1 is the International Business Machines Corp. (IBM®) DS8000 TM Enterprise Storage Server. The DS8000 TM is a high capacity, high capacity, efficient memory controller that provides a data store configured to support persistent operation and implement virtualization of the data store, which is presented herein merely as an example of the embodiment and is not intended to be limiting. Therefore, the caching system discussed herein is not limited to the DS8000 TM, but may be implemented on any comparable storage controller 200 having caching, regardless of manufacturers, product names, or components or component names associated with the system 110.In the example of FIG. 1, each server 206 may include one or more computer processors 212 and a memory 214. The computer processors 212 may have internal processing and storage capabilities to store software modules that run within the processors and are used to access data in the data stores 203 and 204, among other things.In one embodiment, memory 214 may include cache 218. Whenever a host 102 accesses data from the storage system 110, for example, in a read operation, the server 206 performing the operation, for example, reading data from the memory 204, may store the data in its cache memory 218 in the event that it is required again. When the data is re-accessed by a host 102, the server 206 may fetch the data from the cache memory 218 rather than fetching it from the memory 204, thereby saving time and resources. Similarly, when a host system 102 performs a write operation, the server 206 may store the data to be stored in the cache memory 218 or the host system 102 may instruct the data to be stored in the cache memory 218 to be swapped out to the memory 204 at a later time. When write data is stored in cache 218, the write data may also be stored in non-volatile memory (NVS) 220 of opposing server 206 such that the write data may be recovered by opposing server 206 if first server 206 fails.In FIGS. 1 and 2, a storage system 110 may include both a data storage 204 such as hard disk drives and a data storage 203 such as semiconductor disks (SSDs) based on a non-volatile memory such as a flash memory. The input / output (I / O) performance of SSDs or other types of semiconductor memory is typically much higher than the I / O performance of hard disk drives. Because of the higher I / O performance, in certain embodiments, the SSDs 203 may be used to provide a large secondary cache 300 adjacent to the cache 218 serving as the primary cache and the hard disk volumes 204. The use of a large secondary cache memory 300 may significantly improve the I / O performance of the memory system 110.When a read request is received by a server 206 using the secondary cache memory 300, the server may initially search for data in the primary cache memory 218 and, when the data is not present, search for the data in the secondary cache memory 300 located in the SSDs 203. If the data is not available in any cache, the server 206 may retrieve the data from the hard disk volumes 204. Similarly, when writing or modifying data, a server 205 may initially write the data or modified data to the primary cache 218. The data may eventually be moved to the secondary cache 300 to make room in the primary cache 218. This data may eventually be moved to the disk drives 204 to provide space in the secondary cache 300.When data is read from hard disk drives 204, they may also be stored in primary cache 218 if it is to be accessed again.Secondary cache memory 300 may be dimensioned, for example, to provide about one to twenty percent of the total data storage capacity of storage system 110. Thus, for a storage system 110 that provides about 40 terabyte of data storage (from both hard disk drives 204 and SSDs 203), about 2 terabyte of that storage space may be used as secondary cache 300. The primary cache 218 typically has a small percentage of the size of the secondary cache 300. In an exemplary embodiment, the memory space for both the primary cache 218 and the secondary cache 300 may be arranged in the form of memory pages to provide easy handling.Referring to FIGS. 2, 3 and 4, in one embodiment, a dynamically adjusted threshold is applied to ensure selective occupying of the secondary cache 300.In an embodiment where the threshold is used to filter data that has been decremented from the primary cache 218, the setting of the threshold is realized by maintaining statistics only on memory pages that have been cached in the primary cache 218 and a small portion of the secondary cache 300.The statistics maintained by the controller 200 include benchmarks 310 of memory pages in the primary cache 218 that are allowed to be decremented to the secondary cache 300.An example of a measure of comparison is a count of the number of times the data page has been accessed ("hit") since it was placed in the primary cache 218. Because most caches determine which data to downgrade based on a least recent used (LRU) algorithm (many types of which are known to those skilled in the art), one effective way to obtain the statistics is to track and keep track of the benchmark of all memory pages in the primary cache 218. The number of hits may be implemented, for example, in the form of a counter in the metadata entry for each page of memory in the primary cache 218.Other examples of benchmarks include a number of "hits" of a memory page over a limited period of time while the memory page was placed in the primary cache 218, and a ratio of "hits" on a memory page compared to an average of "hits" on all memory pages in the primary cache 218.In one embodiment, the benchmark and potential data are only data copied from memory 204 during a read operation, for example.In FIG. 3, the adjustable threshold T is in the form of a reference metric. The threshold value T of the comparison metric is set according to a cache efficiency of a current state of the secondary cache memory 300 of the data memory. The controller 200 of FIG. 1 compares the benchmark 310 of FIG. 2 of a potential memory page to be decremented 320 with the benchmark threshold T. The controller rejects 330 the potential data provided to the secondary cache of the data store when the comparison metric 310 of the potential data is less than the threshold. In one example, the rejected data 330 is discarded 340. Discarding means that a reference to the data when copied from the memory 204 of FIG. 1 is removed from the memory 218, and metadata (such as an index) of the primary memory 218 and the original copy are kept in the memory 204.On the other hand, if the potential data 320 includes data initially written to the primary cache 218, discarding means that the data is written to the data store 204 of FIG. 1.Still referring to FIG. 3, the controller 200 of FIG. 1 receives, into the secondary cache memory 300 of the data memory, potential data 350 provided to the secondary cache memory 300 of the data memory whose benchmark 310 of FIG. 2 is equal to or greater than the threshold T of the benchmark.Referring to FIGS. 2 and 3, in one embodiment, the setting of cache efficiency to the threshold value T of the comparison metric maintained by the controller 200 of FIG. 1 is based on the maintaining of a reference metric 360 regarding hits of data last entered 365 into the secondary cache 300 of the data store and the maintaining of a reference metric 370 regarding hits of data last moved (MRE) 375 from the secondary cache 300 of the data store. In one embodiment, the numbers of memory pages having data used at the MRI and MRE reference metrics are equal. For example, the most recently entered data 365 is listed in an MRI list 380 and the most recently moved data is listed in an MRE list 390 and the reference metric includes counting hits in the secondary cache of the data store for the data listed in the MRI list while the data is in the secondary cache of the data store and hits for the data listed in the MRE list after the data has been moved from the secondary cache of the data store. The lists 380, 390 may be in the form of a small ghost cache memory that uses a replacement strategy according to the FIFO principle. Alternatively, the lists may be determined by adding and deleting all memory page identifiers when moved to the secondary cache, within the secondary cache, and out of the secondary cache. At each page reference, the controller updates the two lists keeping track of the number of hits occurring in the MRI list "r(MRI)" and in the MRE list "r(MRE)".In another embodiment, where the data includes memory pages of data, a count of hits for the up-to-date metric 310 is determined page by page, in one example, the number of hits for a memory page while that memory page is in the primary cache 218. In contrast, the reference metrics 360, 370 of the most recently input data and the most recently moved data are determined for all the memory pages listed in the MRI list 365 and the MRE list 375, respectively.In one embodiment, the controller 200 of FIG. 1 compares the reference metric 360 of the most recently input data with the reference metric 370 of the most recently moved data and decreases the threshold T when the reference metric 360 of the most recently input data is greater than the reference metric 370 of the most recently moved data and increases the threshold when the reference metric 360 of the most recently input data is less than the reference metric 370 of the most recently moved data.Referring now to FIGS. 2, 3, and 4, in one embodiment, the controller 200 of FIG. 1 in step 400 pulls down a page of memory p from the primary cache 218.In step 410, which may occur in a time period not related to step 400, the reference metric 360 of the most recently entered data 365 of the secondary cache 300 is compared to the reference metric 370 of the most recently moved data 375.In one embodiment, in the steady state, a page must be moved for each page of memory that is being incorporated into the secondary cache 300. That is, each shot means that one page is replaced. Therefore, at each downgrade in the primary cache, the controller will evaluate the last n secondary cache pick decisions: if they were correct (i.e., resulted in a greater hit ratio), the threshold T is decreased. Specifically, if the reference metric 360 of the most recently input data is greater 415 than the reference metric 370 of the most recently moved data, the threshold T is decreased 420. That is, the preceding threshold T 0 is decreased by one unit of the metric, and becomes the new threshold T 1. In one example, the setting for T1 allows a memory page with a hit less to be cached. The lower threshold results in a more dynamic occupying of the secondary cache.On the other hand, if the n latest secondary cache memory pick decisions were incorrect (i.e., resulted in a smaller hit ratio), threshold T is increased. Specifically, if the reference metric 360 of the most recently input data is less than 425 the reference metric 370 of the most recently moved data, the threshold T is increased 430. That is, the preceding threshold T 0 is increased by one unit of the metric, and becomes the new threshold T 1. In one example, the setting for T1 allows only one page of memory with a hit to be included in the cache memory. The higher threshold results in a larger number of incoming memory pages being discarded 340.In one embodiment, an alternative steady state condition may be maintained, wherein if the reference metric 360 of the most recently input data and the reference metric 370 of the most recently shifted data are substantially equal 440, the threshold value T of the comparison metric remains unchanged.Alternatively, the setting of the threshold value T can be carried out at specific time intervals.Thus, if r(MRI)>r(MRE), it means that the newly recorded memory pages are more up to date than the moved memory pages and the threshold value T should be lower. On the other hand, if r(MRI)<r(MRE), it means that the moved memory pages were more valuable for the host system 102 than the newly recorded memory pages and should not have been replaced with the new memory pages; therefore, the occupancy rate should be lower and the capture threshold T should be higher.In one embodiment, at step 460, the compare value 310 of the downgraded memory page 320 "h(p)" is compared to the new threshold T1. The controller rejects 465, 330 the potential data 320 provided to the secondary cache of the data store if the comparison metric 310 of the potential data is less than the threshold T, e.g., by discarding 340 the rejected data. The controller 200 of FIG. 1 takes 470, 350 potential data 320 provided to the secondary cache memory 300 of the data memory in the secondary cache memory 300 of the data memory, the benchmark 310 of which is equal to or greater than the threshold value T of the benchmark.For example, if, during the last 1000 accesses, the threshold T was set to have 50 hits in the MRE list (on one of its pages) and only 10 hits in the MRI list (on one of its pages), it means that memory pages with a higher level of caching are moved out of the secondary cache to enter new memory pages with a lower level of caching, and therefore the controller should decrease the uptake rate for the secondary cache 300 (increase the threshold T). On the other hand, if there were 50 hits in the MRI list (on one of its pages) and only 10 hits in the MRE list (on one of its pages) during the last 100 accesses, this means that new pages with a higher level of caching are entered into the secondary cache and pages with a lower level of caching are moved, therefore the controller should increase the uptake rate for the secondary cache 300 (decrease the threshold T) to allow for the uptake of a larger number of memory pages with a higher level of caching.It will be appreciated by those skilled in the art that the embodiments of the present invention disclosed herein, including the computer implemented controller 200 for controlling the occupying of a secondary cache memory 300 of the system 100 of FIGS. 1 and 2, and the functionality provided herein, may be embodied as a system, method, or computer program product. Accordingly, embodiments of the present invention may take the form of a hardware-only embodiment, a software-only embodiment (including firmware, resident software, microcode, etc.), or a combination thereof, such as an embodiment combining software and hardware aspects, all of which may be referred to herein as a "circuit," "module," or "system.". Furthermore, aspects of the present invention may take the form of a computer program product embodied in one or more non-transitory computer readable media having computer readable program code embodied therein.Any combination of one or more non-transitory computer readable media may be utilized. The computer readable medium may be a computer readable storage medium. A computer readable storage medium may be, for example, but is not limited to, an electronic, magnetic, optical, electromagnetic, infrared, or semiconductor system, device, or device, or any suitable combination of the foregoing. More specific examples (a non-exhaustive list) of the computer readable storage medium would include the following: an electrical connection having one or more wires, a portable computer diskette, a hard disk, a random access memory (RAM), a read-only memory (ROM), an erasable programmable read-only memory (EPROM or Flash memory), an optical fiber, a portable compact disc read-only memory (CD-ROM), an optical storage unit, a magnetic storage unit, or any suitable combination of the foregoing. In the context of this document, a computer readable storage medium may be any tangible medium that can contain or store a program for use by or in connection with a system, apparatus, or device for instruction execution.Program code embodied on a computer readable medium may be transmitted using any suitable medium, including, but not limited to, wireless, wired, fiber optic cable, RF media, or any suitable combination of the foregoing.Computer program code for carrying out operations for aspects of the present invention may be written in any combination of one or more programming languages, including an object oriented programming language such as Java, Smalltalk, C++ or the like and conventional procedural programming languages, such as the "C" programming language or similar programming languages. The program code may execute on only a user's computer, partially on a user's computer, as a stand-alone software package, partially on a user's computer and partially on a remote computer, or only on the remote computer or server. In the latter scenario, the remote computer may be connected to the user's computer through any type of network, including a local area network (LAN) or a wide area network (WAN), or the connection may be made to an external computer (e.g., via the Internet using an Internet Service Provider).Embodiments of the present invention are described herein with reference to flowchart illustrations and / or block diagrams of methods, apparatus (systems) and computer program products according to embodiments of the invention. It will be appreciated that each block of the flowchart illustrations and / or block diagrams, and combinations of blocks in the flowchart illustrations and / or block diagrams, may be implemented by computer program instructions. These computer program instructions may be provided to a processor of a general purpose computer, special purpose computer, or other programmable data processing apparatus to form a machine, such that instructions executed via the processor of the computer or other programmable data processing apparatus generate means for implementing the functions / acts specified in the flowchart and / or block diagram block or blocks.These computer program instructions may also be stored in a computer readable medium that can direct a computer, other programmable data processing apparatus, or other devices to function in a particular manner, such that the instructions stored in the computer readable medium produce an article of manufacture including instructions that implement the function / effect specified in the flowchart and / or block diagram block / s.Computer program instructions may also be loaded into a computer, other programmable data processing apparatus, or other devices to effect a series of operational steps to be performed on the computer, other programmable data processing apparatus, or other devices to produce a computer implemented process such that the instructions performed on the computer or other programmable apparatus provide processes for implementing the functions / acts specified in the flowchart and / or block diagram block or blocks.

Claims

A method for occupying a secondary cache memory (300) of a data store of a computer implemented cache data storage system (110) with data, the method comprising: determining a comparison metric (310) of potential data (320) to be input to the secondary cache memory (300) of a data store; setting a threshold value of the comparison metric (310) according to a cache efficiency of a current state of the secondary cache memory (300) of the data store; rejecting (330, 465) potential data (320) provided to the secondary cache memory (300) of the data store whose comparison metric (310) is less than the threshold value; and receiving (350, 470) potential data (320) in the secondary cache memory (300) of the data memory whose comparison metric (310) is equal to or greater than the threshold value of the comparison metric (310).The method of claim 1, further comprising: maintaining a reference metric (360) relating to hits of data last entered into the secondary cache (300) of the data store; maintaining a reference metric (370) relating to hits of data last moved from the secondary cache (300) of the data store; and wherein the adjusting step comprises adjusting the threshold of the comparison metric (310) according to the reference metric (360) of the last entered data and the reference metric (370) of the last moved data.The method of claim 2, wherein the adjusting step comprises: comparing (410) the reference metric (360) of the most recently input data with the reference metric (370) of the most recently moved data; if the reference metric (360) of the most recently input data is greater (415) than the reference metric (370) of the most recently moved data, decreasing (420) the threshold value; and if the reference metric (360) of the most recently input data is less (425) than the reference metric (370) of the most recently moved data, increasing (430) the threshold value.The method of claim 3, wherein the cache data storage system (110) additionally comprises a primary cache (218) of the data storage and wherein the comparison metric (310) is based on the comparison value of the data while that data has been stored in the primary cache (218) of the data storage of the cache data storage system (110).The method of claim 4, wherein the data provided to the secondary cache (300) of the data store comprises data that has been downgraded (400) from the primary cache (218) of the data store.The method of claim 5, wherein the most recently entered data is listed in an MRI list (380) and the most recently moved data is listed in an MRE list (390), and the reference metric (360, 370) comprises a count of hits in the secondary cache (300) of the data store for the data listed in the MRI list (380) while the data is in the secondary cache (300) of the data store and hits for the data listed in the MRE list (390) after the data is moved from the secondary cache (300) of the data store.The method of claim 6, wherein the data comprises memory pages of data and counts of hits for the comparison metric (310) are determined page by page and the reference metrics (360, 370) for the most recently input data and the most recently moved data are determined for all memory pages listed in the MRI list (380) and MRE list (390), respectively.The method of claim 3, wherein the adjusting step additionally comprises keeping (450) the threshold value of the comparison metric (310) unchanged if the reference metric (360) for the most recently input data and the reference metric (370) for the most recently moved data are substantially the same (440).A computer implemented cache data storage system (110) comprising: a secondary cache (300) of the data storage; and a controller (200) for occupying the secondary cache (300) of the data storage with data, wherein the controller (200): determines a comparison metric (310) of potential data (320) to be input to the secondary cache (300) of the data storage; sets the threshold of the comparison metric (310) according to a cache efficiency of a current state of the secondary cache (300) of the data storage; rejects (330, 465) potential data (320) provided to the secondary cache (300) of the data storage whose comparison metric (310) is less than the threshold; and taking (350, 470) potential data (320) provided to the secondary cache memory (300) of the data memory into the secondary cache memory (300) of the data memory whose comparison measure (310) is equal to or greater than the threshold value.The computer implemented cache data storage system (110) of claim 9, wherein the controller (200) additionally: maintains a reference metric (360) related to hits of data that was last entered into the secondary cache memory (300) of the data memory; maintains a reference metric (370) related to hits of data that was last moved from the secondary cache memory (300) of the data memory, and in the setting step, sets the threshold value of the comparison metric (310) according to the reference metric (360) of the last entered data and the reference metric (370) of the last moved data.The computer implemented cache data storage system (110) of claim 10, wherein in the setting step, the controller (200): compares (410) the reference metric (360) of the most recently input data with the reference metric (370) of the most recently moved data; reduces (420) the threshold if the reference metric (360) of the most recently input data is greater (415) than the reference metric (370) of the most recently moved data; and increases (430) the threshold if the reference metric (360) of the most recently input data is less (425) than the reference metric (370) of the most recently moved data.The computer implemented cache data storage system (110) of claim 11, additionally comprising a primary cache (218) of the data storage; and wherein the comparison metric (310) is based on the comparison value of the data while the data has been stored in the primary cache (218) of the data storage of the cache data storage system (110).The computer implemented cache data storage system (110) of claim 12, wherein the data provided to the secondary cache memory (300) of the data memory comprises data that has been downgraded (400) from the primary cache memory (218) of the data memory.The computer implemented cache data storage system (110) of claim 13, wherein in the steps of maintaining reference values, the controller (200) additionally: lists the most recently entered data in an MRI list (380) and lists the most recently moved data in an MRE list (390), and wherein the reference metric (360, 370) comprises counts of hits in the secondary cache (300) of the data storage for the data listed in the MRI list (380) and hits for the data listed in the MRE list (390) after the data is moved from the secondary cache (300) of the data storage.The computer implemented cache data storage system (110) of claim 14, wherein the data includes memory pages of data, and the controller (200) determines the counts of the hits for the comparison metric (310) page by page and determines the reference metrics (360, 370) of the most recently input data and the most recently moved data for all memory pages listed in the MRI list (380) and the MRE list (390), respectively.The computer implemented cache data storage system (110) of claim 11, wherein the adjusting step of the controller (200) additionally comprises the threshold value of the comparison metric (310) remaining unchanged (450) when the reference metric (360) of the most recently input data and the reference metric (370) of the most recently moved data are substantially the same (440).The computer implemented cache data storage system (110) of claim 11, wherein the primary cache (218) of the data storage comprises a primary DRAM cache that provides data to the secondary cache (300), and the secondary cache (300) comprises flash memory.A computer program product for occupying a secondary cache (300) of the data store of a computer implemented cache data storage system (110) with data, the computer program product comprising a computer usable storage medium having non-transitory computer usable program code embodied therein, the computer usable program code comprising: computer usable program code for determining a comparison metric (310) of potential data (320) to be input to the secondary cache (300) of the data store; computer usable program code for setting a threshold of the comparison metric (310) according to a cache efficiency of a current state of the secondary cache (300) of the data store; Computer usable program code for rejecting (330, 465) potential data (320) provided to the secondary cache memory (300) of the data memory and whose benchmark (310) is less than the threshold value; and computer usable program code for including (350, 470) potential data (320) provided to the secondary cache memory (300) of the data memory into the secondary cache memory (300) of the data memory, whose benchmark (310) is equal to or greater than the threshold value of the benchmark (310).The computer program product of claim 18, additionally comprising computer usable program code for: maintaining a reference metric (360) relating to hits of data last entered into the secondary cache (300) of the data store; maintaining a reference metric (370) relating to hits of data last moved from the secondary cache (300) of the data store; and in the setting step, setting the threshold of the comparison metric (310) according to the reference metric (360) of the last entered data and the reference metric (370) of the last moved data.The computer program product of claim 19, further comprising computer usable program code for, in the adjusting step: comparing (410) the reference metric (360) of the most recently input data with the reference metric (370) of the most recently shifted data; decreasing (420) the threshold value if the reference metric (360) of the most recently input data is greater (415) than the reference metric (370) of the most recently shifted data; and increasing (430) the threshold value if the reference metric (360) of the most recently input data is less (425) than the reference metric (370) of the most recently shifted data.The computer program product of claim 20, wherein the cache data storage system (110) additionally comprises a primary cache memory (218) of the data memory, and wherein the comparison metric (310) is based on the comparison value of the data while the data has been stored in the primary cache memory (218) of the data memory of the cache data storage system (110).The computer program product of claim 21, wherein the data provided to the secondary cache (300) of the data store includes data that has been downgraded (400) from the primary cache (218) of the data store.The computer program product of claim 22, wherein the most recently input data is listed in an MRI list (380) and the most recently moved data is listed in an MRE list (390), and the reference metric (360, 370) comprises counts of hits in the secondary cache (300) of the data store for the data listed in the MRI list (380) while the data is in the secondary cache (300) of the data store and hits for the data listed in the MRE list (390) after the data is moved from the secondary cache (300) of the data store.The computer program product of claim 23, wherein the data includes memory pages of data and counts of hits for the comparison metric (310) are determined page by page and the reference metrics (360, 370) of the most recently input data and the most recently moved data are determined for all memory pages listed in the MRI list (380) and the MRE list (390), respectively.The computer program product of claim 20, wherein the computer usable program code in the setting step leaves (450) the threshold value of the comparison metric (310) unchanged if the reference metric (360) of the most recently input data and the reference metric (370) of the most recently moved data are substantially equal (440).

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