Method for producing an epitaxial wafer and silicon-based substrate for epitaxial growth

Abstract

Method for producing an epitaxial wafer with an epitaxial layer on a silicon-based substrate, the method for producing the epitaxial wafer comprising: Performing a terrace processing operation, comprising a process for removing an outer circumferential section of constant width from a surface of the silicon-based substrate on one side, where an epitaxial layer is formed to be flat without changing the outer diameter, wherein the terrace processing operation is performed by grinding with a grinding wheel. wherein a section undergoing terrace processing is referred to as a terrace section and the resulting flat surface is referred to as a terrace surface, Converting the polished terrace surface into a high-gloss surface or a quasi-high-gloss surface by etching, and Epitaxial growth of a semiconductor layer on the silicon-based substrate, after terrace processing on an outer circumferential section of the silicon-based substrate is carried out such that the semiconductor layer on the terrace section becomes a polycrystal directly on the terrace surface.

Description

BACKGROUND OF THE INVENTION 1. Field of the invention

[0001] The present invention relates to a method for producing an epitaxial wafer with an epitaxial growth layer on a silicon-based substrate and a silicon-based substrate used for the method of producing the epitaxial wafer. 2. Description of the related technology

[0002] To produce an epitaxial semiconductor wafer, epitaxial growth is performed on the surface of a silicon-based substrate (such as a silicon substrate and a silicon carbide substrate) or the like using a commercially available epitaxial fabrication device to produce a hetero- / homoepitaxial wafer.

[0003] In an epitaxial wafer, where an epitaxial growth layer composed of a nitride semiconductor is placed on a silicon-based substrate, the film thickness of the epitaxial growth layer increases in an outer circumferential section, thereby creating a rim (a protrusion that is higher than a main surface of the epitaxial growth layer) in the epitaxial growth layer.

[0004] To optimize substrate curvature on the silicon-based substrate and the stress on the epitaxial growth layer in a central section of the wafer used as a semiconductor device, the thickness or other parameters of each epitaxial growth layer are selected. Therefore, when the crown is created, the balance between the stress exerted on the epitaxial growth layer and the substrate curvature is lost, thus affecting the epitaxial growth layer and creating a honeycomb crack or similar feature in the epitaxial growth layer in the vicinity of the outer periphery (see, for example, [reference]). Fig. 4).

[0005] To prevent the formation of such a wreath, a method has been proposed whereby the outer circumferential section of the silicon-based substrate is chamfered and an epitaxial growth layer is formed on it (for example, JP S59 - 227 117 A).

[0006] As a countermeasure in the event of a crack, it was further proposed to carry out epitaxial growth after roughening the area around a Si substrate edge (WO 2011 / 161 975 A1), using a silicon substrate as the substrate for heteroepitaxial growth, wherein the silicon substrate has as its main surface a (111) plane with a planar orientation in a direction that is determined by rotating a <110> The direction is obtained counterclockwise through angles of 30°, 90° and 150°, while the <111> direction is used as the axis of rotation (JP 2011 - 165 962 A ), or to carry out epitaxial growth in a state in which a surrounding section of the silicon-based substrate is covered with a ring (JP 2013 - 171 898 A).

[0007] Furthermore, if a crack is created at a wafer end section during epitaxial growth of a GaN layer or an AIN layer epitaxially on a silicon substrate, TMA (trimethylaluminium) or TMG (trimethylgallium) gas, which is a substance, penetrates through the crack area, reacts with Si and creates a reaction site.

[0008] As a countermeasure to such a reaction site, it has been proposed to epitaxially grow a thick GaN film over a buffer film (AIN film) on an SOI substrate (JP 2007 - 246 289 A).

[0009] US Patent 2013 / 0140567A1 discloses an epitaxial structure obtained by etching an outer circumferential section of a silicon substrate to create a terrace, forming a crack-preventing or crack-reducing section on a silicon edge section, and growing a nitride semiconductor thin film on the silicon substrate.

[0010] US 5 882 401 A describes how a main surface of a silicon single-crystal substrate is polished to a high gloss after grinding a CVD layer of a beveled section of a silicon single-crystal substrate with an abrasive belt. SUMMARY OF THE INVENTION

[0011] However, even in an epitaxial wafer, which is typically referred to as a "crack-free" epitaxial wafer, there is a crack in an area within approximately several millimeters of an outer circumferential section due to the formation of a ring.

[0012] There is concern that this crack could propagate or, by triggering delamination of an epitaxial growth layer during a component manufacturing process, could cause contamination of a production line. Therefore, an epitaxial substrate that is completely free of cracks is desirable.

[0013] The present invention was developed with regard to the above problems, and one objective is to provide a method for producing an epitaxial wafer which can be used to obtain an epitaxial wafer that is completely free of cracks.

[0014] To achieve the above objective, the present invention provides a method for producing an epitaxial wafer with an epitaxial layer on a silicon-based substrate, comprising the features of claim 1. The manufacturing method includes the epitaxial growth of a semiconductor layer on the silicon-based substrate after performing a terraced process on an outer circumferential section of the silicon-based substrate.

[0015] As described above, by epitaxial growth of the semiconductor layer on the silicon-based substrate after performing terrace processing on the outer circumferential section of the silicon-based substrate, it is possible to easily obtain an epitaxial wafer that is completely free of cracks, and it is possible to suppress crack propagation or contamination of a production line due to delamination of the epitaxial growth layer triggered in a downstream process, such as a device manufacturing process.

[0016] It is preferred to carry out the terrace processing by grinding using a grinding wheel.

[0017] As described above, by using a grinding wheel for terrace processing, it is possible to carry out terrace processing in an extremely simple way.

[0018] It is preferred to include a further process by which the polished terrace surface can be transformed into a high-gloss surface or a quasi-high-gloss surface.

[0019] As described above, by transforming the polished terrace surface into a high-gloss surface or a quasi-high-gloss surface in this way, it is possible to suppress particle generation from the polished terrace surface and prevent defects due to particle generation.

[0020] It is possible to adopt a configuration in which the epitaxially grown semiconductor layer is made up of a nitride semiconductor.

[0021] A nitride semiconductor is preferably used as a semiconductor layer that can be grown epitaxially.

[0022] The nitride semiconductor can be one or more of the following: AIN, GaN, InN and a mixed crystal of the same.

[0023] The above materials can preferably be used as nitride semiconductors, which are used for the semiconductor layer to be grown epitaxially.

[0024] The present invention further provides an epitaxial wafer with an epitaxial layer consisting of a semiconductor layer on a silicon-based substrate for epitaxial growth, comprising the features of claim 4. The silicon-based substrate has a terraced section obtained by performing a terraced process on an outer circumferential section of the silicon-based substrate.

[0025] If the silicon-based substrate has a terraced section obtained in this way by performing a terraced processing on the outer circumferential section, it is possible to easily obtain an epitaxial wafer that is completely free of cracks by epitaxial growth of the semiconductor layer using this silicon-based substrate, and it is possible to suppress the propagation of a crack or contamination of a production line due to delamination of the epitaxial growth layer triggered in a downstream process, such as a device manufacturing process.

[0026] The surface of the terrace section should preferably be a high-gloss surface.

[0027] If the terrace surface of the terrace section is a high-gloss surface, it is possible to suppress particle generation from the terrace surface and prevent defects due to particle generation.

[0028] It is possible to adopt a configuration in which the semiconductor layer to be grown epitaxially is made up of a nitride semiconductor.

[0029] The present invention can preferably be used for the silicon-based substrate for epitaxial growth, in which a nitride semiconductor is used as the semiconductor layer to be epitaxially grown.

[0030] The nitride semiconductor can be one or more of the following: AIN, GaN, InN and a mixed crystal of the same.

[0031] The present invention can preferably be carried out on a silicon-based substrate for epitaxial growth, in which the materials described above are used as a nitride semiconductor, which is used for the semiconductor layer to be epitaxially grown.

[0032] Furthermore, the present invention provides for an epitaxial wafer in which an epitaxial layer is allowed to grow on the above silicon-based substrate for epitaxial growth.

[0033] According to the epitaxial wafer, in which the epitaxial layer is grown on the silicon-based substrate, which has a terraced section obtained by performing a terraced processing on the outer circumferential section, it is possible to produce the epitaxial wafer completely free of cracks in a simple manner, and it is possible to produce an epitaxial wafer that does not cause crack propagation or contamination of a manufacturing line due to delamination of the epitaxial growth layer triggered in a downstream process, such as a device manufacturing process.

[0034] As described above, according to the present invention it is possible to obtain an epitaxial semiconductor wafer that is completely free of cracks in a simple manner, and it is possible to suppress crack propagation or contamination of a production line due to delamination of an epitaxial growth layer triggered in a downstream process, such as a device manufacturing process. BRIEF DESCRIPTION OF THE DRAWINGS Fig. Figure 1 is a representation illustrating an example of the manufacturing process of a method for producing an epitaxial wafer according to the present invention; Fig. Figure 2 is a representation illustrating a silicon-based substrate undergoing terrace processing, which is obtained in a manufacturing process according to the method of producing the epitaxial wafer according to the present invention; Fig. Figure 3 is a representation illustrating an environmental section of an epitaxial wafer produced using a manufacturing method in an example; and Fig. Figure 4 is a representation illustrating an environmental section of an epitaxial wafer produced using a manufacturing method in a comparative example. DETAILED DESCRIPTION OF PREFERRED EXECUTION FORMS

[0035] Although one embodiment of the present invention is described in detail below with reference to the drawings, the present invention is not limited thereto.

[0036] As described above, even an epitaxial wafer described as "crack-free" will still exhibit a crack within a radius of approximately several millimeters around an outer circumference due to the formation of a ring of cracks. There is concern that this crack could propagate during the manufacturing process of a device or contaminate a production line by triggering delamination of an epitaxial growth layer. Therefore, an epitaxial substrate that is completely free of cracks is desirable.

[0037] Accordingly, the present inventors have intensively investigated a method for producing an epitaxial wafer which can easily obtain an epitaxial wafer that is completely free of cracks and which can suppress crack propagation or contamination of a production line due to delamination of an epitaxial growth layer triggered in a downstream process, such as a device manufacturing process.

[0038] As a result, the present inventors have found that by epitaxially growing a semiconductor layer on a silicon-based substrate after performing terrace processing on an outer circumferential section of the silicon-based substrate, it is possible to easily obtain an epitaxial wafer that is completely free of cracks, and it is possible to suppress crack propagation or contamination of a production line due to delamination of an epitaxial growth layer triggered in a downstream process, such as a device manufacturing process, thereby completing the invention.

[0039] A method for producing an epitaxial semiconductor wafer according to the present invention is described below with reference to Fig. 1 explained.

[0040] First, as in Fig. Figure 1(a) illustrates the fabrication of a silicon-based substrate. The silicon-based substrate is, for example, a silicon (Si) substrate, a silicon carbide (SiC) substrate, or the like.

[0041] Then, as in Fig. Figure 1(b) illustrates the terrace processing carried out on an outer circumferential section of the silicon-based substrate.

[0042] Here's how in Fig. 2(e) is illustrated, the terrace processing is a processing for removing the outer circumferential section of constant width from a surface of the silicon substrate on one side, on which an epitaxial layer is formed so that it is flat without changing the outer diameter, a section subjected to this processing is called a terrace section and the flat surface formed is called a terrace surface.

[0043] In this terrace processing, for example, grinding is carried out to obtain a section with a width equal to or greater than 1 mm, preferably 1 to 3 mm, and a depth equal to or greater than 3 µm, preferably 3 to 50 µm, using a grinding wheel with a grit size of approximately #800 to #4000.

[0044] The silicon-based substrate, which undergoes terrace processing in this way, is in Fig. 2 illustrated.

[0045] Fig. 2(a) is a photograph of an outer circumferential section of a wafer, where a section with a width of 3 mm and a depth of 6 µm is ground, and Fig. 2(b) is an enlarged photograph of the Fig. 2(a).

[0046] Furthermore, Fig. 2(c) a photograph of an outer circumferential section of a wafer in which a section with a width of 1 mm and a depth of 6 µm is ground, and Fig. 2(d) is an enlarged photograph of the Fig. 2(c).

[0047] Furthermore, Fig. 2(e) a cross-sectional representation of a surrounding section of the polished silicon substrate.

[0048] By performing terrace processing on the outer circumferential section of the silicon-based substrate in this manner, it is possible to suppress cracking on the outer circumferential section or delamination of an epitaxial layer during epitaxial growth in a downstream process, and to prevent the formation of a reaction site. It is assumed that crack and reaction site formation is suppressed when stress is mitigated by an epitaxially grown layer that becomes a polycrystal at the terraced section undergoing terrace processing.

[0049] Furthermore, it is also possible to convert the terrace surface into a high-gloss surface, or a near-high-gloss surface, by etching it with a mixed acid or similar agent after grinding. By converting the terrace surface into a high-gloss surface, or a near-high-gloss surface, through etching, it is possible to suppress particle generation and prevent defects caused by particle generation.

[0050] Next, as in Fig. Figure 1(c) illustrates an epitaxial growth layer formed on a silicon-based substrate set to 900°C or higher, for example 1200°C, using an epitaxial growth process such as a metal-organic chemical vapor deposition (MOCVD) process.

[0051] Although the composition of this epitaxial layer is not particularly restricted, the epitaxial layer can be a nitride semiconductor, and this nitride semiconductor can be one or more of the following: AlN, AlGaN, and GaN. For example, it is possible to grow a buffer layer in which an AlGaN layer and a GaN layer are alternately laminated after forming an AlN layer and a GaN layer on a surface of the buffer layer, making it possible to grow the epitaxial layer with a total thickness of approximately 3 to 10 µm.

[0052] By producing an epitaxial wafer according to the manufacturing process described above Fig. 1. Is it possible to easily obtain an epitaxial semiconductor wafer that is completely free of cracks, and is it possible to suppress crack propagation or contamination of a production line due to delamination of an epitaxial growth layer triggered in a downstream process, such as a device manufacturing process?

[0053] Next, a silicon-based substrate for epitaxial growth according to the present invention will be described.

[0054] The silicon-based substrate for epitaxial growth according to the present invention is a silicon-based substrate for epitaxial growth for epitaxially growing a semiconductor layer, wherein the silicon-based substrate for epitaxial growth has a terraced section obtained by performing a terraced processing on an outer circumferential section of the silicon-based substrate (see Fig. 2(e)).

[0055] By epitaxially growing a semiconductor layer using a silicon-based substrate with a terraced section obtained by performing a terraced process on an outer circumferential section, it is possible to easily obtain an epitaxial wafer that is completely free of cracks, and it is possible to suppress crack propagation or contamination of a production line due to delamination of an epitaxial growth layer triggered in a downstream process, such as a device manufacturing process.

[0056] Furthermore, the terrace surface of the terrace section is preferably a high-gloss surface or virtually a high-gloss surface.

[0057] If the terrace surface is a high-gloss surface or virtually a high-gloss surface in this way, it is possible to suppress particle generation from the terrace surface and prevent a defect due to particle generation.

[0058] Furthermore, it is possible to adopt a configuration in which the semiconductor layer to be grown epitaxially consists of a nitride semiconductor.

[0059] The present invention can preferably be applied to a silicon-based substrate for epitaxial growth, in which a nitride semiconductor is used as the semiconductor layer to be epitaxially grown.

[0060] This nitride semiconductor can be one or more of the following: AIN, GaN, InN and a mixed crystal of the same.

[0061] The present invention can preferably be applied to the silicon-based substrate for epitaxial growth, in which the above-described materials are used as a nitride semiconductor for an epitaxially grown semiconductor layer.

[0062] Furthermore, the epitaxial wafer according to the present invention is an epitaxial wafer in which an epitaxial layer is grown on the above silicon-based substrate for epitaxial growth in the epitaxial wafer.

[0063] According to such an epitaxial wafer, in which the epitaxial layer is allowed to grow on the silicon-based substrate with the terraced section obtained by performing a terraced processing in this way on the outer circumferential section, it is possible to easily make the epitaxial wafer completely free of cracks, and it is possible to produce an epitaxial wafer that does not cause crack propagation or contamination of a manufacturing line due to delamination of an epitaxial growth layer triggered in a downstream process, such as a device manufacturing process. EXAMPLES

[0064] Although the present invention is described in more detail below by means of an example and a comparative example, the present invention is not limited thereto. Example

[0065] The terrace processing was carried out on an outer circumferential section of a silicon substrate with a diameter of 150 mm and a thickness of 1 mm by grinding using a grinding wheel with a grain size of #3000 by a width of 3 mm and a depth of two levels with 6 µm and 50 µm.

[0066] After an AIN layer was formed by epitaxial growth on the silicon substrate, which had undergone terrace processing, a buffer layer consisting of alternating laminations of an AIGaN layer and a GaN layer was epitaxially grown, and a GaN layer was epitaxially grown on a surface of the buffer layer, thus producing an epitaxial wafer. The total thickness of the epitaxial layer was 10 µm.

[0067] When the outer circumferential section of the epitaxial wafer, which was produced as described above, was observed using a focused light, both in the plane with a depth of 6 µm (see Fig. 3(a)) as well as in the plane with a depth of 50 µm (see Fig. 3(b)) No crack, no delamination of an epitaxial layer and no generation of a reaction site was found. Comparative example

[0068] Epitaxial growth was performed on a silicon substrate with a diameter of 150 mm and a thickness of 1 mm in the same way as in the example, except that no terrace processing was carried out.

[0069] As a result, as in Fig.As illustrated in Figure 4, cracks were found around almost the entire circumference of the epitaxial wafer. Furthermore, delamination of an epitaxial layer was scattered across the entire circumference, and reaction sites were sparsely distributed.

Claims

[1] Method for producing an epitaxial wafer with an epitaxial layer on a silicon-based substrate, the method for producing the epitaxial wafer comprising: Performing a terrace processing operation, comprising a process for removing an outer circumferential section of constant width from a surface of the silicon-based substrate on one side, where an epitaxial layer is formed to be flat without changing the outer diameter, wherein the terrace processing operation is performed by grinding with a grinding wheel, wherein a section undergoing terrace processing is referred to as a terrace section and the resulting flat surface is referred to as a terrace surface, Converting the polished terrace surface into a high-gloss surface or a quasi-high-gloss surface by etching, and Epitaxial growth of a semiconductor layer on the silicon-based substrate, after terrace processing on an outer circumferential section of the silicon-based substrate is carried out such that the semiconductor layer on the terrace section becomes a polycrystal directly on the terrace surface. [2] Method for producing the epitaxial wafer according to claim 1, wherein the semiconductor layer to be grown epitaxially is built on a nitride semiconductor. [3] Method for producing the epitaxial wafer according to claim 2, wherein the nitride semiconductor is one or more of the following: AIN, GaN, InN and a mixed crystal thereof. [4] Epitaxial wafer with an epitaxial layer consisting of a semiconductor layer on a silicon-based substrate for epitaxial growth, wherein the epitaxial wafer comprises: a terrace section which is an outer perimeter section of the silicon-based substrate that is recessed and has a level difference with respect to the non-recessed section of the silicon-based substrate, wherein a terrace surface of the terrace section, which is the surface of the terrace section, is a high-gloss surface or a quasi-high-gloss surface, and where the semiconductor layer is a polycrystal directly on the terrace surface, [5] Epitaxial wafer according to claim 4, wherein the semiconductor layer is composed of a nitride semiconductor. [6] Epitaxial wafer according to claim 5, wherein the nitride semiconductor is one or more of the following: AIN, GaN, InN and a mixed crystal thereof.

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