Power semiconductor device and power semiconductor core module

Abstract

Power semiconductor device - comprising a plurality of power semiconductor core modules in which a conductive cover plate (2) is arranged above a conductive base plate (1), - where each power semiconductor core module comprises: - a plurality of power semiconductor chips (5; 6) comprising a plurality of self-switching semiconductor elements (5) and a plurality of diodes (6) arranged side by side in a top view, - an upper metal plate (8) arranged between each self-switching semiconductor element (5) and each diode (6), and the conductive cover plate (2), - a lower metal plate (9) arranged between each self-switching semiconductor element (5) and each diode (6), and the conductive base plate (1), and - a plurality of first feathers (3), - wherein the majority of self-switching semiconductor elements (5) of each power semiconductor core module are arranged in a top view along an L-shaped line, or a cross-shaped line, or a T-shaped line and - wherein in each respective packaged power semiconductor core module each of the plurality of first springs (3) (i) is arranged between the upper metal plate (8) and the conductive cover plate (2) and (ii) is in contact with the upper metal plate (8) and the conductive cover plate (2) as it extends in an up-and-down direction.

Description

Technical field

[0001] The present invention relates to a pressure contact power semiconductor device and a power semiconductor core module. State of the art

[0002] Recently, numerous methods have been proposed relating to a pressure-contact power semiconductor device packaged by means of a pressure contact, or relating to other types of semiconductor devices. Patent document 1, for example, discloses a pressure-contact high-performance semiconductor module comprising a conductive base plate, a conductive cover plate, a plurality of rigid module housing components, and a plurality of semiconductor chips.

[0003] It is noted that each semiconductor chip has a bottom surface connected to the base plate by means of a first electrode, and a top surface connected to the cover plate by means of a second electrode and a plurality of flexible and compressible contact components (individual push-fit pins representing elements for electrical connection). It is also noted that the semiconductor chips and the contact components are enclosed within a submodule housing element made of a polyamide resin. State of the art patent document

[0004] Patent document 1: Japanese patent JP 4 280 626 B2

[0005] US patent 6,281,569 B1 discloses a pressure-contact semiconductor device comprising a first main electrode plate, a second main electrode plate facing the first main electrode plate, and an insulating housing for holding the circumference of each of the first and second main electrode plates such that the first and second main electrode plates are opposite each other. A gate terminal is configured to penetrate the housing. Furthermore, a gate electrode plate is insulated on the main surface of the first main electrode, facing the second main electrode, and electrically connected to the gate terminal. Pressure-contact pins are insulated on the main surface of the first main electrode and electrically connected to the gate electrode plate. Semiconductor chips are arranged between the first and second main electrode plates such that they are subjected to pressure by these plates.The semiconductor chips each have a first and a second main electrode in pressure contact with the first and second main electrode plates, respectively. Furthermore, a gate electrode is formed with which the corresponding pressure contact pin comes into pressure contact.

[0006] US patent 2004 / 0207070A1 discloses a stackable power semiconductor module comprising electrically conductive base plates, an electrically conductive cover plate, and multiple semiconductor chips. The semiconductor chips are arranged in groups of several on separate base plates in pre-assembled submodules. The base plates are movable relative to the cover plate. The submodules are connected in parallel within the module housing. The submodules are fully testable according to their current ratings. By changing the number of submodules connected in parallel within the housing, the total current rating of a module can be varied. Problem to be solved by the invention

[0007] The high-performance semiconductor module in patent document 1 is configured such that a plurality of pre-tested submodules are arranged in parallel within a single module housing component. Subsequently, a gate electrode of an insulated-gate bipolar transistor (IGBT), which is a semiconductor chip, is connected via a bond wire contact to a gate runner located on the side of the semiconductor chip, thus merging them into a single, common gate signal conductor. The gate signal conductor is likely capable of electrically communicating with the outside via a gate / auxiliary contact area mounted on a module cover.

[0008] In such a setup, the gate of a self-switching semiconductor element is connected to a gate runner positioned between the chips via a bond wire contact. Therefore, the base plate, in conjunction with the wire on the gate runner, has a large contact area. This is unsuitable for a small device. Accordingly, an electrical spring contact area can be used instead of the gate runner. Unfortunately, it is difficult to position the electrical spring contact area, which is supplied separately, relative to a conductor connected to it during manufacturing. This degrades the reliability of the electrical connection between the electrical spring contact area and the conductor.

[0009] The present invention was implemented with this problem in mind. It is an object of the present invention to provide a pressure-contact power semiconductor device and a power semiconductor core module that are capable of suitably reducing their size. Means to solve the problem

[0010] The problem underlying the invention is solved according to the invention in a power semiconductor device by the features of claim 1 and in a power semiconductor core module by the features of claim 7. Advantageous embodiments are the subject of the respective dependent claims.

[0011] A power semiconductor device according to a first aspect of the present invention comprises a plurality of power semiconductor core modules in which a conductive cover plate is arranged over a conductive base plate. Each power semiconductor core module comprises the following: a plurality of power semiconductor chips, comprising a plurality of self-switching semiconductor elements and a plurality of diodes arranged side by side in a top view; an upper metal plate arranged between each self-switching semiconductor element and each diode, and the conductive cover plate; a lower metal plate arranged between each self-switching semiconductor element and each diode, and the conductive base plate; and a plurality of first springs arranged between the upper metal plate and the conductive cover plate.The majority of self-switching semiconductor elements in each power semiconductor core module are arranged in a top view along an L-shaped, cross-shaped, or T-shaped line. In each packaged power semiconductor core module, each of the majority of first springs is located between the top metal plate and the conductive cover plate and is in contact with both plates as it extends in an up-and-down direction.

[0012] In a power semiconductor core module according to a second aspect of the present invention, a conductive cover plate is arranged above a conductive base plate. The power semiconductor core module comprises: a plurality of power semiconductor chips, comprising a plurality of self-switching semiconductor elements and a plurality of diodes arranged side by side in a top view; an upper metal plate arranged between a portion of each self-switching semiconductor element and each diode, and the conductive cover plate; a lower metal plate arranged between each self-switching semiconductor element and each diode, and the conductive base plate; and a plurality of first springs arranged between the upper metal plate and the conductive cover plate.a signal substrate extending downwards from a region of a lower part of the conductive cover plate, the region being located above a remaining region distinct from the portion of each self-switching semiconductor element; a second spring positioned between the remaining region of each self-switching semiconductor element and the signal substrate, electrically connecting the remaining region and the individual substrate;and a frame that individually surrounds the majority of self-switching semiconductor elements and the majority of diodes. An upper part of the frame has a recess that is inserted into the signal substrate. In each respective packaged power semiconductor core module, each of the majority of first springs is arranged between the top metal plate and the conductive cover plate and is in contact with the top metal plate and the conductive cover plate as it extends in an up-and-down direction. Effects of the invention

[0013] According to the first aspect of the present invention, the majority of self-switching semiconductor elements of each power semiconductor core module are arranged in a top view along the L-shaped line, the cross-shaped line, or the T-shaped line. This improves the heat dissipation capability of the self-switching semiconductor element and reduces the size of the device.

[0014] According to the second aspect of the present invention, the upper part of the frame has a recess that is inserted into the signal substrate. Consequently, the recess acts as a positioning aid, thereby reducing the size of the device while simplifying the positioning between the signal substrate and the second spring.

[0015] These and other tasks, features, aspects and advantages of the present invention will become clearer with reference to the following detailed description of the present invention in conjunction with the accompanying figures. Brief description of the characters Fig. Figure 1 is a schematic top view of the structure of a part of a power semiconductor device according to a first embodiment. Fig. Figure 2 is a schematic top view of a structure of a power semiconductor core module according to the first embodiment. Fig. Figure 3 is a schematic cross-sectional view of the structure of the power semiconductor core module according to the first embodiment. Fig. Figure 4 is a schematic cross-sectional view of the structure of the power semiconductor core module according to the first embodiment. Fig. Figure 5 is a schematic top view of the structure of a part of a power semiconductor device according to a second embodiment. Fig. Figure 6 is a schematic top view of the structure of a part of a power semiconductor device according to a third embodiment. Fig. Figure 7 is a schematic top view of the assembly of part of a power semiconductor device according to a modification. Description of the embodiment(s)<Erste Ausführungsform>

[0016] Fig. Figure 1 is a schematic top view of the structure of a part of a power semiconductor device according to a first embodiment of the present invention. The power semiconductor device in Fig. Figure 1 comprises a total of four (or a plurality of) essentially rectangular power semiconductor core modules arranged in two rows and two columns in the longitudinal and transverse directions. It is noted that any number of power semiconductor core modules can be arranged, and that it is necessary to arrange two or more power semiconductor core modules.

[0017] Fig. Figure 2 is a schematic top view of a power semiconductor core module according to the first embodiment, and is specifically an enlarged top view of a region A in Fig. 1. The Fig. 3 and Fig. Figure 4 shows cross-sectional views of the structure of the power semiconductor core module. Specifically, it is Fig. 3 a cross-sectional view along a line BB' in Fig. 2 was taken from; furthermore Fig. 4 a cross-sectional view along a line CC' in Fig. 2 was taken.

[0018] As in the Fig. 3 and Fig. As illustrated in Figure 4, the power semiconductor core module comprises a conductive base plate 1 and a conductive cover plate 2, which is arranged above the conductive base plate 1.

[0019] The power semiconductor core module comprises the following: a plurality of power semiconductor chips comprising a plurality of self-switching semiconductor elements 5 and a plurality of diodes 6; upper metal plates, which in this embodiment are upper chip metal plates 8; and lower metal plates, which in this embodiment are lower chip metal plates 9.

[0020] The majority of self-switching semiconductor elements 5 and the majority of diodes 6 are arranged side by side in a top view. In the example of Fig. Figure 1 shows five self-switching semiconductor elements 5 and four diodes 6 arranged in a 3 x 3 matrix. It should be noted that the chip arrangement is not limited to a 3 x 3 matrix.

[0021] It is also noted that examples for each self-switching semiconductor element 5 include a metal-oxide-semiconductor field-effect transistor (MOSFET) and an insulated-gate bipolar transistor (IGBT). It is also noted that examples for each diode 6 include a Schottky diode (SBD) and a PN diode.

[0022] The upper chip metal plates 8 are each arranged between a portion of the self-switching semiconductor element 5 or the diode 6 and the conductive cover plate 2. It should be noted that in the first embodiment, a single upper chip metal plate 8 is arranged on a single self-switching semiconductor element 5.

[0023] The lower chip metal plates 9 are each arranged between the self-switching semiconductor element 5 or the diode 6 and the conductive base plate 1. It should be noted that in the first embodiment, a single lower chip metal plate 9 is arranged on a single diode 6.

[0024] In addition to these components, the power semiconductor core module includes a plurality of pressure contact wire springs 3 (first springs), signal wire springs 4 (second springs), a signal substrate 7, and spring supports 13, which have insulating properties.

[0025] The spring supports 13 and the plurality of pressure-contact wire springs 3 are each arranged between the upper chip metal plate 8 and the conductive cover plate 2. The spring support 13 has a plurality of cylindrical holes on the upper chip metal plate 8. The plurality of pressure-contact wire springs 3 are inserted into the plurality of cylindrical holes. Furthermore, the plurality of pressure-contact wire springs 3 are in contact with the upper chip metal plate 8 and the conductive cover plate 2 as they expand and contract.

[0026] The spring support 13 and the signal wire spring 4 are positioned between the signal substrate 7 and an exposed area of ​​the self-switching semiconductor element 5, the exposed area being the portion of the upper chip metal plate 8 (i.e., the exposed area is the remaining portion that is distinct from the self-switching semiconductor element 5). The spring support 13 has a cylindrical hole on the exposed area of ​​the self-switching semiconductor element 5. The signal wire spring 4 is inserted into the cylindrical hole. Furthermore, the signal wire spring 4 is in contact with the exposed area of ​​the self-switching semiconductor element 5 and the signal substrate 7 as it extends in an upward and downward direction.Accordingly, the signal wire spring 4 has two ends: one is electrically connected to a signal pad of a gate or emitter located in the exposed area of ​​the self-switching semiconductor element 5; and the other is electrically connected to the signal substrate 7 of the gate or emitter.

[0027] Examples of each pressure contact wire spring 3 and each signal wire spring 4 include a coil spring and a spring washer. It is noted that the signal pads of the gate and emitter of the self-switching semiconductor element 5 can be electrically connected to the signal substrates 7 of the gate and emitter. Accordingly, a plurality of signal wire springs 4 can be provided.

[0028] As in the Fig. 3 and Fig. As illustrated in Figure 4, the signal substrate 7 protrudes downwards from a region of the lower part of the conductive cover plate 2, with the region being located above the exposed area of ​​the self-switching semiconductor element 5. Furthermore, the signal substrate 7 is provided for each power semiconductor core module and features, as shown in the Fig. 1 and Fig. Figure 2 illustrates this in a top view of an L-shape. The signal substrate 7 is insulated from the conductive cover plate 2 and is configured to be excited in the direction in which the signal substrate 7 extends. In the example of Fig. In this arrangement, the signal substrate 7 is collectively connected to five self-switching semiconductor elements 5. This configuration provides a common connection between signal wires above the self-switching semiconductor element 5, resulting in a small power semiconductor device.

[0029] The power semiconductor core module is packaged while being compressed from above and below, i.e., by the conductive base plate 1 and the conductive cover plate 2. The pressure contact wire spring 3 and the signal wire spring 4 are thus compressed, generating a restoring force in response to the compression. The restoring force of the signal wire spring 4 causes it to make contact with the self-switching semiconductor element 5 and the signal substrate 7. This improves the reliability of the electrical connection (junction) between the self-switching semiconductor element 5 and the signal substrate 7, and further enhances the operational reliability of the chip.It is noted that an electrical connection (connection point) with respect to the pressure contact wire spring 3 can be realized in a similar manner to the signal wire spring 4, thereby electrically connecting the diode 6 and another component; alternatively, the diode 6 can be connected to the other component by means of a bond wire (not shown).

[0030] In addition to these components, the power semiconductor core module includes a sealing resin 10 and a frame (an inner resin frame 11 and an outer resin frame 12).

[0031] The inner resin frame 11 is attached to the conductive base plate 1, while it individually surrounds the plurality of self-switching semiconductor elements 5 and the plurality of diodes 6. That is, the inner resin frame 11 separates the plurality of power semiconductor chips (the plurality of self-switching semiconductor elements 5 and the plurality of diodes 6) from each other.

[0032] The outer resin frame 12 is attached to the conductive cover plate 2, while surrounding the inner resin frame 11. The sealing resin 10 is filled into a container formed from the conductive base plate 1 and the inner resin frame 11, so that a predetermined height is achieved.

[0033] As in Fig. As illustrated in Figure 4, the upper part of the inner resin frame 11 has a recess, which is a cutout 11a. Additionally, the upper part of the resin frame 12 has a recess or cutout (not shown). Furthermore, the signal substrate 7 is inserted into the cutout 11a of the inner resin frame 11 and the cutout of the outer resin frame 12. Due to this arrangement, the cutouts act as positioning aids. This facilitates the positioning of the signal substrate 7 and the self-switching semiconductor element 5 relative to the signal wire spring 4. Moreover, this arrangement establishes a suitable electrical contact, thereby improving the reliability of the electrical connection (junction).

[0034] It is noted that the inner resin frame 11 acts as a stopper, preventing the distance between the conductive base plate 1 and the conductive cover plate 2 from becoming shorter than a certain value when pressure is applied from above and below, i.e., from these plates. Therefore, adjusting the height of the inner resin frame 11 allows the pressure contact wire springs 3 and the signal wire spring 4 to generate suitable restoring forces (pressures). Furthermore, a uniform height of the inner resin frame 11 ensures that the distance between the conductive base plate 1 and the conductive cover plate 2 remains constant.This enables the majority of pressure contact wire springs 3 to exert a uniform downward force (pressure) on the majority of power semiconductor chips arranged inside, and consequently on the upper chip metal plates 8 arranged on the power semiconductor chips, thereby improving the reliability of the connection.

[0035] With renewed reference to Fig. 1. In the first embodiment, the majority of self-switching semiconductor elements 5 of each power semiconductor core module are arranged in a top view along an L-shaped line (the L-shaped signal substrate 7). The diodes 6 are thus located in the center of the power semiconductor. Fig. 1 arranged; in addition, the self-switching semiconductor elements 5 and consequently the signal wire springs 4 are located in the outer edge region of the power semiconductor in Fig. 1 arranged.

[0036] The signal substrate 7 has two ends 7a that are exposed at cutouts in the side faces of the power semiconductor core module (the outer resin frame 12) on the outside of the power semiconductor core module. Although not shown, the exposed ends 7a of the signal substrate 7 of the adjacent power semiconductor core modules are electrically connected to each other. The connection can be, for example, an electrical connection by means of a cable. Different connection types can be used, including a connection with a connector, a solder joint, and a screw connection.

[0037] Here, a power semiconductor core module, rotated in a top view, meets the other power semiconductor core modules. For example, if the position of the L-shape of a power semiconductor core module in Fig. When one power semiconductor core module is rotated by 90 degrees, it meets the other three. This configuration, which allows the power semiconductor device to be built from a single type of power semiconductor core module, increases productivity and reduces costs.

[0038] As in Fig. Figure 1 illustrates the conductive base plate 1, the conductive cover plate 2, and the plural of (four in Fig. 1) Power semiconductor core modules, comprising the aforementioned components enclosed by these plates, are arranged on a common collector metal plate 16. Furthermore, the signal substrates 7 (a gate signal substrate and an emitter signal substrate) of the individual power semiconductor core modules are exposed on the side faces of the power semiconductor core modules. The ends of the signal substrates 7 are electrically connected to each other. Here, the emitter signal substrates, whose ends are electrically connected to each other, are electrically connected to a common emitter metal plate (not shown). The common emitter metal plate (not shown) is press-welded to each power semiconductor core module at a position opposite the common collector metal plate 16.Thus, the power semiconductor device according to the first embodiment has an integrated structure comprising the plurality of power semiconductor core modules, the common collector metal plate 16, and the common emitter metal plate (not shown).

[0039] The power semiconductor device in the first embodiment is configured such that the majority of self-switching semiconductor elements 5 of each power semiconductor core module are arranged along the L-shaped line in a top view. The diodes 6 are thus located in the center of the power semiconductor; furthermore, the self-switching semiconductor elements 5 are located in the outer edge region of the power semiconductor. This improves the heat dissipation capability of the self-switching semiconductor elements 5. Consequently, the self-switching semiconductor element 5 can consist of a single element that generates a large amount of heat.

[0040] In the first embodiment, the cutout into which the signal substrate 7 is inserted is arranged above the frame (the inner resin frame 11 and the outer resin frame 12). Consequently, the cutout acts as a positioning aid. This facilitates the positioning of the signal substrate 7 and the self-switching semiconductor element 5 relative to the signal wire spring 4. Furthermore, this design provides a suitable electrical contact, thereby improving the reliability of the electrical connection (junction).

[0041] In the first embodiment, the signal substrate 7 is exposed at the cutout on the outside of the power semiconductor core module. This creates an electrical connection between the exposed areas of the signal substrates 7 of the adjacent power semiconductor core modules. Accordingly, adjusting the number of parallel-connected power semiconductor core modules can create a power semiconductor device with a desired current capacity. Furthermore, cost reduction and simplified manufacturing can be achieved.

[0042] In the first embodiment, the signal substrate 7 has an L-shape in a top view. This improves the substrate yield, thereby reducing costs. It is noted that the signal substrate 7 can be formed from a printed substrate consisting of two or more layers, or from a metal-coated substrate with an insulating layer inserted between the metals. This allows for wiring by using a narrow signal substrate 7. This results in a smaller power semiconductor device and enables a gate and emitter circuit to have a short loop, thus preventing abnormal operation due to electromagnetic induction and noise.

[0043] It is noted that at least the self-switching semiconductor element 5 or the diode 6 is made of silicon or of a semiconductor with a wide bandgap (made of silicon carbide, gallium nitride, or diamond). Such a design enables stable operation of the power semiconductor device at high temperatures and a fast switching speed of the power semiconductor device. <Zweite Ausführungsform>

[0044] Fig. Figure 5 is a schematic top view of the structure of a part of a power semiconductor device according to a second embodiment of the present invention. It should be noted that identical or similar components between the power semiconductor device in the first embodiment and the power semiconductor device in the second embodiment are identified by the same reference numerals, and that this description mainly focuses on components that differ between these power semiconductor devices.

[0045] In the second embodiment, the plurality of semiconductor chips (the plurality of self-switching semiconductor elements 5 and the plurality of diodes 6) are arranged in an L-shaped line in a top view, in the same manner as in the first embodiment. In contrast to the signal substrate 7 in the first embodiment, the signal substrate 7 of the power semiconductor core module in the second embodiment has a cross shape. In this way, the shape of the arrangement of the plurality of power semiconductor chips can differ from the shape of the signal substrate 7.

[0046] In the first embodiment, the power semiconductor device comprises four interconnected power semiconductor core modules. For a power semiconductor device comprising five or more interconnected power semiconductor core modules, the signal substrate 7, which in the first embodiment has a simple L-shape, causes a non-uniform spacing between adjacent signal substrates 7. This leads to a signal delay between the signal substrates 7, which can cause non-uniform operation. The non-uniform operation adversely affects the self-switching semiconductor elements 5.

[0047] The signal substrate 7 in the second embodiment accordingly has a cross shape rather than an L-shape. Furthermore, the signal substrate 7 has four ends 7a that are exposed on the outside of the power semiconductor core module. That is, the ends 7a of the signal substrate 7 are exposed on the respective four sides of the power semiconductor core module. This design easily establishes electrical connections between the ends 7a of adjacent signal substrates 7, thereby simplifying the fabrication of the power semiconductor device. Additionally, this design ensures a uniform spacing between adjacent signal substrates 7 in a power semiconductor device comprising two or more power semiconductor core modules, thus reducing any adverse effects on the self-switching semiconductor element 5.

[0048] In the first embodiment, multiple power semiconductor core modules are formed by rotating a single type of power semiconductor core module by 90 degrees for each rotation. In the second embodiment, an identically oriented arrangement of a single type of power semiconductor core module can form multiple power semiconductor core modules without such rotations. This reduces errors in the arrangement, thereby improving work efficiency. It should be noted that the power semiconductor device, although in the example of Fig. 5 comprises four power semiconductor core modules, may comprise any number of power semiconductor core modules; however, the power semiconductor device requires that it contain two or more power semiconductor core modules. <Dritte Ausführungsform>

[0049] Fig. Figure 6 is a schematic top view of the assembly of a part of a power semiconductor device according to a third embodiment of the present invention. It should be noted that identical or similar components between the power semiconductor device in the second embodiment and the power semiconductor device in the third embodiment are identified by the same reference numerals, and that the main focus here is on describing the differences between the components of these power semiconductor devices.

[0050] In the first and second embodiments, the plurality of power semiconductor chips (the plurality of self-switching semiconductor elements 5 and the plurality of diodes 6) are arranged in a top view along an L-shaped line. In the first embodiment, the power semiconductor core module of a single type is rotated by 90 degrees to distribute the generated heat and improve heat dissipation. In the second embodiment, the power semiconductor core modules of a single type, arranged in a parallel offset from one another, produce differences in heat generation. Consequently, this presents a user with thermal design challenges, which can adversely affect the quality of the power semiconductor device.

[0051] To address this problem, the power semiconductor device in the third embodiment is configured to improve the differences in heat generation. Specifically, in the third embodiment, as shown in [reference missing], the majority of the power semiconductor chips (the majority of self-switching semiconductor elements 5 and the majority of diodes 6) are arranged in a specific configuration. Fig. Figure 6 illustrates the arrangement of the power semiconductor core modules in a cross-shaped line in a top view. This achieves a homogeneous distribution of heat generation with respect to the power semiconductor core modules. This prevents variations in heat generation within the power semiconductor device. This simplifies the thermal design, thus preventing adverse effects on quality. Furthermore, the majority of the self-switching semiconductor elements 5 are not locally clustered but are essentially arranged such that, in a top view, lines are formed when the power semiconductor core modules are positioned. Consequently, the heat generated by the majority of the self-switching semiconductor elements 5 is dissipated to relatively low-temperature areas of the diodes 6. This does not affect the heat dissipation capacity.Furthermore, in the third embodiment, the signal substrate 7, which has a cross shape, facilitates the manufacture of the power semiconductor device in a similar way to the signal substrate 7 in the second embodiment and achieves a uniform distance between the adjacent signal substrates 7. <modifikation>

[0052] The aforementioned embodiments describe how the majority of the self-switching semiconductor elements 5 of each power semiconductor core module can be arranged in a top view along an L-shaped line or a cross-shaped line. The majority of self-switching semiconductor elements 5 can be arranged along a line of any shape; for example, the self-switching semiconductor elements 5 of each power semiconductor core module can be arranged in a top view along a T-shaped line, as shown in Fig. 7 illustrates.

[0053] The aforementioned embodiments describe a signal substrate 7 having an L-shape or a cross shape in a top view. The signal substrate 7 can assume any shape; for example, the signal substrate 7 can have a T-shape, and three ends 7a of the T-shape can be exposed to the outside of the power semiconductor core module. Reference symbol list 1 conductive base plate, 2 conductive cover plates, 3 pressure contact wire springs, 4 signal wire springs, 5 self-switching semiconductor element, 6 diodes, 7 Signal substrate, 8 upper chip metal plate, 9 lower chip metal plate, 11 inner resin frame, 11a Excerpt, 12 outer resin frame.< / modifikation>

Claims

Power semiconductor device, comprising a plurality of power semiconductor core modules in which a conductive cover plate (2) is arranged above a conductive base plate (1), wherein each power semiconductor core module comprises: a plurality of power semiconductor chips (5; 6), which comprise a plurality of self-switching semiconductor elements (5) and a plurality of diodes (6) arranged side by side in a top view, an upper metal plate (8) arranged between each self-switching semiconductor element (5) and each diode (6), and the conductive cover plate (2), a lower metal plate (9) arranged between each self-switching semiconductor element (5) and each diode (6), and the conductive base plate (1), and a plurality of first springs (3), wherein the plurality of self-switching semiconductor elements (5) of each power semiconductor core module are arranged in a top view along an L-shaped line,or a cross-shaped line, or a T-shaped line and- wherein in each respective packaged power semiconductor core module each of the plurality of first springs (3)(i) is arranged between the upper metal plate (8) and the conductive cover plate (2) and(ii) is in contact with the upper metal plate (8) and the conductive cover plate (2) while extending in an up-and-down direction., Power semiconductor device according to claim 1, - wherein the upper metal plate (8) is arranged between a portion of each self-switching semiconductor element (5) and the conductive cover plate (2), - wherein each power semiconductor core module further comprises: - a signal substrate (7) projecting downwards from a region of a lower portion of the conductive cover plate (2), the region being located above a remaining region that is distinct from the portion of each self-switching semiconductor element (5), - a second spring (4) arranged between the remaining region of each self-switching semiconductor element (5) and the signal substrate (7), and electrically connecting the remaining region and the signal substrate (7), and - a frame (11) individually surrounding the plurality of self-switching semiconductor elements (5) and the plurality of diodes (6).and- wherein an upper part of the frame (11) of each power semiconductor core module comprises a recess (11a) into which the signal substrate (7) is inserted. Power semiconductor device according to claim 2, wherein the signal substrate (7) of the power semiconductor core module is exposed from the recess (11a) to an outside of the power semiconductor core module, and wherein exposed areas of the signal substrates (7) of the adjacent power semiconductor core modules are electrically connected to each other. Power semiconductor device according to one of claims 2 or 3, wherein:- the signal substrate (7) has an L-shape in a top view, and- two ends (7a) of the L-shape are exposed to an outside of the power semiconductor core module. Power semiconductor device according to one of claims 2 or 3, wherein:- the signal substrate (7) has a cross shape in a top view, and- four ends (7a) of the cross shape are exposed to an outside of the power semiconductor core module. Power semiconductor device according to one of claims 1 to 3, wherein at least the self-switching semiconductor element (5) or the diode (6) consists of silicon carbide, gallium nitride or diamond. Power semiconductor core module, - wherein a conductive cover plate (2) is arranged above a conductive base plate (1), - wherein the power semiconductor core module comprises: - a plurality of power semiconductor chips (5; 6), which comprise a plurality of self-switching semiconductor elements (5) and a plurality of diodes (6) arranged side by side in a top view; - an upper metal plate (8), which is arranged between a portion of each self-switching semiconductor element (5) and each diode (6) and the conductive cover plate (2); - a lower metal plate (9), which is arranged between each self-switching semiconductor element (5) and each diode (6) and the conductive base plate (1); - a plurality of first springs (3);- a signal substrate (7) which projects downwards from a region of a lower part of the conductive cover plate (2), the region being located above a remaining region which is distinct from the part of each self-switching semiconductor element (5); - a second spring (4) which is arranged between the remaining region of each self-switching semiconductor element (5) and the signal substrate (7) and electrically connects the remaining region and the signal substrate (7);and- a frame (11) that individually surrounds the plurality of self-switching semiconductor elements (5) and the plurality of diodes (6),- wherein an upper part of the frame (11) comprises a recess (11a) into which the signal substrate is inserted, and- wherein in each respective packaged power semiconductor core module each of the plurality of first springs (3)(i) is arranged between the upper metal plate (8) and the conductive cover plate (2) and(ii) is in contact with the upper metal plate (8) and the conductive cover plate (2) while extending in an up-and-down direction.; Power semiconductor core module according to claim 7, wherein the signal substrate (7) is exposed from the recess (11a) to an outside of the power semiconductor core module. Power semiconductor core module according to claim 7 or 8, wherein at least the self-switching semiconductor element (5) or the diode (6) consists of silicon carbide, gallium nitride or diamond.

Images