Power semiconductor device and manufacturing method therefor
By forming epitaxial layers and doped regions of different conductivity types on a substrate, and using epitaxial growth to set a second epitaxial layer, the problem of low mobility in trench MOSFETs is solved, enabling the fabrication of high-performance power semiconductor devices, reducing costs and time, and improving device reliability and withstand voltage performance.
Patent Information
- Authority / Receiving Office
- WO · WO
- Patent Type
- Applications
- Current Assignee / Owner
- HUNAN SANAN SEMICON CO LTD
- Filing Date
- 2024-11-26
- Publication Date
- 2026-06-04
AI Technical Summary
How to obtain high-performance trench MOSFETs, especially to improve their mobility, so that they can be used in electronic devices in high-power, high-frequency and high-temperature environments.
By forming a first epitaxial layer and a second epitaxial layer with different conductivity types on a substrate, and forming a doped region in the second epitaxial layer, the second epitaxial layer is set by using an epitaxial growth method to reduce the implantation dose of the doped region and reduce the scattering effect. The conductive channel is formed by combining etching and ion implantation processes.
It improves the mobility of power semiconductor devices, reduces device manufacturing time and cost, and enhances device reliability and withstand voltage performance.
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Figure CN2024134451_04062026_PF_FP_ABST
Abstract
Citation Information
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