A method and system for multimodal large model proxy design of power semiconductors

Abstract

This invention belongs to the field of power semiconductor device design and artificial intelligence technology, specifically relating to a method and system for multimodal large-model proxy design of power semiconductor devices. This invention addresses the problem of relying on manual, repeated interpretation of electric field diagrams and structural modifications followed by re-simulation in TCAD design of power semiconductor device terminal structures, as well as the difficulty of existing methods in automatically proposing and verifying new terminal structure schemes while meeting process / reliability constraints. This invention unifies the scheduling of terminal structure simulation execution, simulation result acquisition, and structural file rewriting within the TCAD simulation environment. It utilizes a multimodal simulation evidence-driven design suggestion generation and candidate structure screening mechanism to achieve a closed-loop iteration of "simulation—analysis—structural update—re-simulation." After obtaining high-potential structures, it further performs numerical optimization of continuous parameters under a fixed topology, thereby improving the breakdown voltage of power devices under manufacturability and reliability constraints while ensuring the traceability and reproducibility of the optimization process.

Description

TECHNICAL FIELD

[0001] The application belongs to the technical field of power semiconductor device design and artificial intelligence, and particularly relates to a method and system for designing a power semiconductor device by using a multi-modal large model agent. BACKGROUND

[0002] Power semiconductor devices are widely used in the fields of power electronics and pulse power. The breakdown voltage is an important indicator for measuring the voltage resistance of the device, and the terminal structure design directly affects the breakdown voltage and reliability that can be achieved by the device. The existing terminal structure design usually relies on engineers to repeatedly perform structure modification, simulation solving and result interpretation (such as electric field / potential distribution and breakdown position analysis) in TCAD, and adjust the structure and parameters accordingly. The iteration is time-consuming and is easily affected by individual experience differences, making it difficult to quickly obtain a terminal structure scheme with high breakdown voltage while ensuring manufacturability and reliability.

[0003] In recent years, artificial intelligence technologies such as large language models (LLM) and visual language models (VLM) have provided new tools for automated design. LLM can generate structure descriptions or simulation scripts, VLM can understand simulation two-dimensional distribution image information, and Bayesian optimization (BO) can be used for continuous parameter optimization under expensive black-box simulation. However, in the context of terminal structure design for power semiconductor devices, existing methods based on LLM / BO often generate deck files or search for parameters under a fixed topology, still requiring engineers to manually perform TCAD simulation calls, result retrieval, image interpretation and structure rewriting. There is a lack of an automatic closed-loop mechanism for "simulation execution - multi-modal evidence analysis - structure modification - re-simulation verification" oriented to the TCAD front end, and there is also a lack of executable consistency verification of model generation results, process constraints and reliability, making it difficult to form an automated terminal structure breakdown voltage optimization process that can be repeatedly implemented. SUMMARY

[0004] To solve the problem of power semiconductor device terminal structure relying on manual repeated interpretation of electric field maps and modification of structures for re-simulation in TCAD design, and the problem of existing methods being difficult to automatically propose and verify new terminal structure schemes while meeting process / reliability constraints, the present application provides a method and system for optimizing the breakdown voltage of a power semiconductor device terminal structure based on a multi-modal large model agent.

[0005] The technical solutions adopted by the present application are as follows:

[0006] A method for designing a power semiconductor device by using a multi-modal large model agent, comprising the following steps:

[0007] S1. Based on the design objectives, obtain the initial structure and constraints as simulation inputs. Specifically, obtain the initial terminal structure and design objectives and constraints. The initial terminal structure is provided in the form of a TCAD structure file. The design objectives include at least increasing the target breakdown voltage. The constraints include at least manufacturability constraints and reliability constraints.

[0008] S2. Generate constraint specifications (SPEC), specifically, generate SPEC based on the obtained design objectives and constraints. The SPEC is used to limit the allowable range of terminal structure modifications, the value range of continuous parameters, and the evaluation criteria of candidate structure / parameter schemes, and serves as the basis for subsequent design suggestion generation, candidate screening, and parameter optimization.

[0009] The SPEC includes global constraints and sub-constraints: global constraints are used to limit the hard and soft constraints of the entire process, while sub-constraints are used to tighten or update the modification boundaries and key parameters of the current iteration based on the current structure and simulation results.

[0010] S3. Perform initial structural simulation. Specifically, the TCAD simulation interface is called through the scheduling mechanism for physical simulation to perform breakdown simulation on the initial terminal structure and collect scalar performance indicators and two-dimensional electric field / potential distribution information as input for multimodal large model analysis to determine the high field region that limits the breakdown voltage and potential improvement directions.

[0011] S4. Generate a design recommendation document (BV-DSD). Specifically, based on the simulation results obtained in S3 and the constraints in S2, the multimodal large model performs joint analysis on scalar performance indicators and two-dimensional electric field / potential distribution information to generate a design recommendation document (BV-DSD) for improving breakdown voltage. The BV-DSD shall at least provide terminal structure improvements and parameter suggestions that can be mapped to a rewritten structure file, and meet the manufacturability and reliability requirements specified by SPEC.

[0012] S5. Improvement and screening of sub-constraint specifications and terminal structures: Specifically, generate one or more candidate terminal structures according to BV-DSD and perform executability verification; perform TCAD simulation verification on the candidate structures that pass the verification; evaluate and screen the candidate structures based on the simulation results and constraint specifications; output the advancement structure that meets the constraints and improves the breakdown voltage and update the iteration state until the preset stopping condition is met or the preset performance target is reached, and obtain the high-potential terminal structure. The high-potential structure will be used as the initial structure of S1 in the next iteration to realize further evolution of the topology.

[0013] S6. Numerical optimization of parameters for high-potential structures: Specifically, for the high-potential terminal structure obtained in S5, numerical optimization of continuous design parameters is performed while keeping its topology unchanged. The numerical optimization takes the improvement of breakdown voltage as the main objective, and comprehensively considers conduction performance, terminal occupancy and reliability indicators under the constraints, and outputs the optimized parameter combination and corresponding terminal structure that meet the constraints.

[0014] Furthermore, the specific method for generating BV-DSD through a multimodal large model in S4 is as follows: the multimodal large model is defined as being composed of a visual language model (VLM) and a language model (LLM) working together. The VLM extracts evidence from the two-dimensional electric field / potential distribution map, including breakdown points or hotspot locations, areas where the oxide layer electric field exceeds the limit, and the distribution of high-field regions related to reliability. This is combined with the scalar results BV, Ronsp, and Wt to ​​form an "evidence package." The VLM generates the BV-DSD within the context of SPEC and knowledge base rules, including...

[0015] Observations: Description of the field strength / potential distribution based on the evidence package;

[0016] Actions: The structural modification actions and parameters mapped to the terminal structure code rewriting;

[0017] Reasons: Physical reasons or reference to empirical rules corresponding to structural modifications;

[0018] Expected effects: Improved breakdown voltage or relocation of hot spots;

[0019] The BV-DSD also records the simulated evidence identifiers used so that subsequent candidate structures can be evaluated traceably. Furthermore, the structural modifications in the “Action” field of the BV-DSD are only allowed to be mapped to the action identifiers and parameters in the pre-registered set of structural modification actions; otherwise, they are deemed invalid suggestions.

[0020] LLM is used to generate structured instructions such as structural modification actions, parameter suggestions, and simulation scripts. Through engineering adaptation, the model's capabilities are limited to executable tool invocation processes, specifically including:

[0021] (1) Role and responsibility constraints: Agents are divided into analysis agents (AA), code agents (CA) and supervisor review agents (SA) through predefined system prompt word templates; among them, AA receives multimodal simulation evidence and SPEC and outputs BV-DSD, CA maps the "action" field of BV-DSD to executable actions and generates / verifies TCAD structure files and simulation scripts, and SA performs consistency checks, hard constraint verification, similarity merging and sorting on BV-DSD and candidate structure entries;

[0022] (2) Enhanced RAG retrieval: Retrieve process rules, reliability red lines, terminal design experience rules and historical structural cases from the knowledge base, and use the retrieval results and SPEC as the model context input to constrain the generated results to meet the physical and manufacturability requirements of semiconductor devices;

[0023] (3) Structured output and whitelist verification: The model is required to output action identifiers and parameters in a fixed field format and compare them with the set of allowed actions in the structure editing interface to verify the integrity and range of the parameter items;

[0024] (4) Executability Ticket Mechanism: A valid execution flag is generated only when the BV-DSD entry passes the verification. The system only allows candidate structure entries carrying valid execution flags to enter the TCAD simulation queue, thereby suppressing non-executable outputs and reducing invalid simulations.

[0025] Furthermore, the specific implementation process of evaluating and selecting candidate structures based on simulation results and constraint specifications in S5 includes:

[0026] S51. Generate sub-level constraints related to the current structure based on the current terminal structure and global constraint specifications, which are used to limit the boundaries of candidate structure generation and screening in this round.

[0027] S52. Based on the terminal structure improvement suggestions of S4, a set of candidate structures is generated, and the candidate structures are checked for manufacturability and executability and redundancy removal is performed.

[0028] S53. Convert the candidate structure into an executable simulation input and perform TCAD simulation to obtain the scalar performance index and electric field / potential distribution information of the candidate structure.

[0029] S54. Based on the simulation results of the candidate structure and the constraint specifications, generate a candidate structure evaluation record. The evaluation record includes at least the scalar performance index of the candidate structure, the related characteristics of the two-dimensional electric field / potential distribution, and the hard constraint check results.

[0030] S55. Calculate the comprehensive evaluation index FOM based on the simulation results of the candidate structure, and combine the hard constraints and threshold judgment rules preset in the constraint specification to mark the candidate structure that meets the hard constraints and improves the comprehensive evaluation as a high potential structure.

[0031] S56. Perform comprehensive scoring and ranking on candidate structures, and calculate similarity or distance metrics based on the key structural parameter vectors and topological identifiers of candidate structures. When the preset duplicate judgment conditions are met, perform merging and redundancy removal, and retain only high-potential structures with higher scores to enter the simulation queue or the set of promoted structures.

[0032] S57. For the advancement structure, perform a limited number of exploratory parameter scans within the allowable range of its high leverage parameters to evaluate the structure’s sensitivity and robustness to parameter perturbations, and use the scan results to update sub-level constraints and / or as initial samples for parameter numerical optimization.

[0033] S58. Confirmed upgrade structures are recorded in the high-potential structure set and participate in subsequent terminal topology evolution as new basic structures; when the comprehensive evaluation index of a high-potential structure reaches the preset proportion threshold of the target value, step S6 will be entered to perform continuous parameter optimization.

[0034] Furthermore, the numerical optimization process for continuous design parameters in S6 includes:

[0035] S61. Generate optimization constraints for each advancement structure to clarify the set of continuous parameters allowed for optimization under this topology, the parameter range, the optimization objective, and the hard constraints of reliability and process that must be met.

[0036] S62. Under the constraints of the optimization conditions, the Bayesian optimizer is used to iteratively generate parameter candidates and perform simulation evaluation to obtain parameter performance feedback and update the next round of parameter candidates accordingly.

[0037] S63. When the simulation cost is high, a proxy model based on historical simulation data is introduced to pre-evaluate or screen parameter candidates in order to reduce the number of actual simulation calls.

[0038] S64. Output the optimized parameter combination that satisfies the optimization constraints and the corresponding terminal structure file, and save the simulation results, parameter configuration and version information to ensure reproducibility and traceability.

[0039] A system for designing power semiconductors using a multimodal large model proxy includes: a TCAD simulation module, a SPEC constraint and knowledge base / historical structure management module, an analysis module, a code module, a candidate structure management module, and a parameter optimization module.

[0040] The TCAD simulation module is used to perform the TCAD simulation in steps S3 and S53;

[0041] The SPEC constraint and knowledge base / historical structure management module is used to perform SPEC generation in step S2 and sub-level constraint maintenance and historical structure management in steps S51, S57 and S58, and provides evaluation rules and threshold determination basis to step S55.

[0042] The analysis module is used to perform BV-DSD generation in step S4, candidate structure basic evaluation and evidence feature extraction in step S54, and support the high-potential structure determination in step S55 based on the SPEC evaluation rules.

[0043] The code module is used to perform the structural modification action mapping, TCAD structural file / simulation script generation and verification in step S53, and to parse the error log and trigger a limited number of error correction retries when the simulation fails;

[0044] The candidate structure management module is used to perform candidate structure pre-screening, redundancy removal, sorting and queue scheduling in steps S52 and S56, and to perform high-potential structure set maintenance and basic structure iterative registration in step S58.

[0045] The parameter optimization module is used to perform continuous design parameter numerical optimization in step S6.

[0046] The beneficial effects of this invention are as follows: This invention unifies the scheduling of terminal structure simulation execution, simulation result acquisition, and structural file rewriting in the TCAD simulation environment, and utilizes a multimodal simulation evidence-driven design suggestion generation and candidate structure screening mechanism to achieve a closed-loop iteration of "simulation-analysis-structural update-resimulation"; after obtaining a high-potential structure, it further performs numerical optimization of continuous parameters under a fixed topology, thereby improving the breakdown voltage of power devices under manufacturability and reliability constraints and ensuring that the optimization process is traceable and reproducible. Attached Figure Description

[0047] Figure 1 This is a schematic diagram of the two-stage closed-loop optimization system of the present invention;

[0048] Figure 2 This is a schematic diagram of the workflow of the present invention; wherein, (a) is a schematic diagram of the evidence extraction and BV-DSD generation process based on TCAD project and multimodal simulation results; (b) is a schematic diagram of the candidate structure generation, impact prediction, ranking and high-potential structure screening process; and (c) is a schematic diagram of the process of opening a new workflow branch and Bayesian parameter optimization based on high-potential structure. Detailed Implementation

[0049] The specific embodiments of the present invention will now be described in detail with reference to the accompanying drawings and examples.

[0050] Example

[0051] See Figure 1 and Figure 2 This embodiment provides a system and method for designing the termination structure of a MOS Controlled Thyristor (MCT) device using a multimodal large-model surrogate to improve its breakdown voltage. The method includes the following steps:

[0052] Step S1: Input initial structure and constraints

[0053] Step S2: Generate the global constraint specification file (SPEC)

[0054] Step S3: Perform initial structural simulation

[0055] Step S4: Generate Design Recommendation Document (BV-DSD)

[0056] Step S5: Generate sub-constraint specifications and improve and filter terminal structures (Phase 1)

[0057] Step S6: Numerical optimization of parameters for high-potential structures (Phase 2)

[0058] The system described in this invention includes: a TCAD simulation module, an analysis module, a code module, a SPEC constraint and knowledge base / historical structure management module, a candidate structure management module, and a Bayesian optimization module. The TCAD simulation module performs breakdown simulations and outputs scalar and two-dimensional distribution results; the analysis module generates a BV-DSD based on multimodal simulation evidence and evaluates the potential of candidate structures; the code module maps structural modification actions of the BV-DSD to executable structural file rewriting and simulation scripts; the SPEC constraint and knowledge base / historical structure management module maintains design objectives, process / reliability constraints, and historical data; the candidate structure management module removes redundancy, sorts, and queues candidate structures; and the Bayesian optimization module performs stage two continuous parameter numerical optimization. Data interaction between modules is as follows: Figure 1 As shown.

[0059] In this embodiment, the following data object is defined:

[0060] (1) TCAD structural files / projects: executable simulation inputs containing terminal structure geometry, doping, materials and boundary conditions;

[0061] (2) SPEC document: A structured constraint document that records design objectives, hard / soft constraints and evaluation criteria;

[0062] (3) Multimodal simulation results: including at least two-dimensional electric field / potential distribution map, key cutoff data, hot spot coordinates and region labels;

[0063] (4) Scalar results: including at least the breakdown voltage BV, on-resistance Ronsp, termination width Wt, and simulation convergence state;

[0064] (5) BV-DSD file: It must contain at least the fields of observation, action, reason, and expectation, and reference the corresponding simulation evidence identifier;

[0065] (6) Candidate structure and labels: The structure file of the candidate structure and its labels, the labels including at least "high potential / low potential / invalid (non-convergence or violation of hard constraints)" etc.

[0066] In step S1, the initial input is provided by the user, including the initial terminal structure file for TCAD simulation execution, and the target breakdown voltage value and reliability / process constraints given in parametric form. The design objectives and constraints can also be input by the user in natural language, and then parsed by the language model into structured global constraint specification entries before being written into the SPEC file.

[0067] In step S2, the system's constraint specification generation module, based on the user-input design goals and constraints, and combining the process rules, reliability red lines, and feasible ranges in the historical structure database, generates a constraint specification and scoring list file SPEC for optimizing the breakdown voltage of the terminal structure. The SPEC includes global constraints and sub-level constraints, where global constraints are used to define the hard constraints, soft budgets, and evaluation criteria for the entire process, and sub-level constraints are used to update the modification boundaries, key parameters, and judgment thresholds by combining the current structural metadata and the simulation evidence of this round.

[0068] The global constraint specification file mentioned in step S2 includes at least: target breakdown voltage, terminal width budget (soft budget and hard upper limit), oxide layer electric field upper limit, conduction resistance upper limit, minimum linewidth / minimum spacing and other manufacturing rules, and the allowable basic range of structural parameters; wherein the manufacturing rules and electric field upper limit are hard constraints. The global constraint specification is stored in file form and serves as the unified judgment basis for the simulation execution interface, structure editing interface and candidate selection rules.

[0069] In step S3, the input initial structure calls the TCAD simulation control interface, structure editing interface, image export interface, local physical quantity probe interface, and reliability check interface through the tool bus for physical simulation to perform simulation on the initial terminal structure and collect results such as breakdown voltage, conduction current, electric field / potential distribution diagram, and local physical quantities. The collected information is sent to the multimodal large model for breakdown voltage enhancement analysis.

[0070] The specific content of each interface call in step S3 is as follows:

[0071] The inputs to the simulation execution interface include at least: terminal structure file path, reverse bias scan strategy, breakdown judgment condition, simulation version identifier, and timeout threshold; the outputs of the simulation execution interface include at least: breakdown voltage BV, on-resistance Ronsp, terminal width Wt, simulation convergence status identifier, simulation log and result file path, and simulation version number.

[0072] The structure modification interface only allows the execution of a pre-registered set of structure modification actions; the set of actions includes at least: adding a terminal guard ring, modifying terminal guard ring parameters, adding a field plate, modifying oxide layer thickness, adding or modifying parameters of the lightly doped buffer zone (JTE region) outside the main junction, etc.; each action corresponds to a predefined parameter item and its unit and value range; when the action output by the model does not belong to the set of actions, or the output parameters are missing or exceed the value range, the system refuses to generate the corresponding structure file and determines the candidate scheme as invalid.

[0073] The two-dimensional distribution map includes at least an electric field intensity distribution map or an oxide layer electric field distribution map; the probe interface is used to output at least the peak electric field, hotspot coordinates, hotspot location area identifier, cutoff direction, and number of cutoff data points.

[0074] In step S4, the sub-level constraint is the sub-level constraint part of the SPEC generated based on the simulation results, which is a separate constraint condition generated according to the metadata of the current structure. The BV-DSD is a topology suggestion file for improving the breakdown voltage of the next step, generated by the multimodal large model based on the simulation information analysis of the current structure and the SPEC. After receiving the TCAD device simulation results through the interface, the large model performs multimodal analysis on the current simulation scalar results and image results of the device. Based on the knowledge base and empirical rules, and following the SPEC constraints, it uniformly records simulation phenomena, electric field hotspot locations, structural adjustment actions, physical cause analysis, and expected effects, generating the BV-DSD for this iteration.

[0075] Specifically, in step S4, please refer to... Figure 2 In part (a), the BV-DSD is the evidence extracted from the two-dimensional electric field / potential distribution map by the Visual-Language Model (VLM) after the system obtains the multimodal simulation results in step S3. This includes the locations of breakdown points or hot spots, areas where the oxide layer electric field exceeds the limit, and the distribution of high-field regions related to reliability. The evidence is then combined with the scalar results BV, Ronsp, and Wt to ​​form an "evidence package." Based on this, the VLM generates the BV-DSD within the context of SPEC and knowledge base rules. The BV-DSD includes at least the following: Observation: a description of the field strength / potential distribution based on the evidence package; Action: structural modification actions and parameters that can be mapped to rewriting the terminal structure code; Reason: the physical reasons or empirical rule references corresponding to the structural modification; Expectation: the expected effect on the breakdown voltage increase or hot spot relocation. The BV-DSD also records the simulated evidence identifiers (image file identifiers, hotspot coordinates / region identifiers, etc.) used for subsequent traceable evaluation of candidate structures. Furthermore, the structural modification content in the "Action" field of the BV-DSD is only allowed to be mapped to the action identifiers and parameters in the pre-registered set of structural modification actions; otherwise, it is determined to be an invalid suggestion.

[0076] In this invention, the multimodal large model agent is composed of a visual language model (VLM) and a language model (LLM): the VLM is used to extract evidence and determine structural potential from two-dimensional distribution images such as electric field / potential, while the LLM is used to generate structured instructions such as structural modification actions, parameter suggestions, and simulation scripts. To make the general pre-trained model applicable to the breakdown voltage optimization of power semiconductor device terminal structures, this invention limits the model's capabilities to executable tool invocation processes through engineering adaptation, specifically including:

[0077] (1) Role and Responsibility Constraints: Agents are divided into analysis agents (AA), code agents (CA), and supervisor review agents (SA) through predefined system prompt word templates. Among them, AA receives multimodal simulation evidence and SPEC and outputs BV-DSD. CA maps the "action" field of BV-DSD to actions that can be executed by the structure editing interface and generates / verifies TCAD structure files and simulation scripts. SA performs consistency checks, hard constraint verification, similarity merging, and sorting on BV-DSD and candidate structure entries.

[0078] (2) Enhanced RAG retrieval: Retrieve process rules, reliability red lines, terminal design experience rules and historical structural cases from the knowledge base, and use the retrieval results and SPEC as the model context input to constrain the generated results to meet the physical and manufacturability requirements of semiconductor devices;

[0079] (3) Structured output and whitelist verification: The model is required to output action identifiers and parameters in a fixed field format and compare them with the set of allowed actions in the structure editing interface to verify the integrity and range of parameter items.

[0080] (4) Executability Ticket Mechanism: A valid execution identifier (ticket / certificate) is generated only when the BV-DSD entry passes the above verification. The system only allows candidate structure entries carrying valid execution identifiers to enter the TCAD simulation queue, thereby suppressing non-executable outputs and reducing invalid simulations.

[0081] In step S5 (Phase 1), the terminal structure improvement follows a process of "suggestion-screening-generation-simulation-analysis-writeback". The large model evaluates and scores the simulation results of each topology structure and then improves it through a self-evolving multi-branch optimization path. Based on the BV-DSD, the geometry, doping parameters, or field plate structure of the terminal structure are modified, and a new terminal structure TCAD file is generated through the structure editing interface for subsequent simulation verification. The multimodal large model performs a joint quantitative and qualitative evaluation of candidate structures from the candidate structure set based on the objective function, reliability redline, and process constraints defined in the global constraint file SPEC, screening and promoting high-potential structures, thereby providing a high-quality entry point for subsequent topology evolution and parameter numerical optimization.

[0082] Specifically, step S5 includes:

[0083] Step S51: The multimodal large model generates the sub-level current-round constraint specification part of the SPEC based on the current structure of the device, including high leverage parameters and separate hard constraints generated based on the current structure and metadata. Among them, the high leverage parameters are those that have a significant impact on the device structure, as determined by the multimodal large model.

[0084] The sub-level current-round constraint specifications mentioned in step S51 include at least: the scope of structural modifications allowed in this round, the key parameter items that need to be adjusted first, and the hard constraint verification items that match the current structure.

[0085] Step S52: See Figure 2 In part (b), before the candidate structure is generated, the system sets up BV-DSD Manager to pre-screen, remove redundancy and sort BV-DSD entries: the pre-screening includes at least manufacturability check, hard constraint consistency check and action executability check, and the qualified structures are comprehensively scored and sorted. The scoring is based on breakdown voltage, supplemented by field quality, conduction degradation, reliability document pass rate.

[0086] Step S53: The code module of the multimodal large model converts the candidate modification entries output by BV-DSD Manager into runnable TCAD new structure code and performs TCAD rule checks on the new structure code according to SPEC. If the simulation fails, the error log is read to trigger a request for correction code and retry, and the number of retries is limited to prevent infinite loops. When a candidate structure fails due to non-convergence, out-of-bounds errors, or violation of hard constraints, the system writes the parameters of the candidate and the reason for failure into a failure log file; when subsequent candidates are generated, the system prohibits or restricts repeated failure parameter ranges based on the failure log, thereby reducing repeated invalid simulations.

[0087] Step S54: After performing TCAD simulation on the candidate structure, the analysis module performs a basic evaluation of the candidate structure and generates a candidate structure evaluation record for subsequent judgment and ranking. The basic evaluation includes at least: scalar performance indicators of the candidate structure, evidence features of the two-dimensional electric field / potential distribution (including peak electric field, hot spot location and its relative outward displacement, etc.), and simulation convergence state and hard constraint check results. The analysis module writes the key parameters of the candidate structure, simulation results and the evaluation record into the historical structure library, and updates the SPEC scoring list or sub-level constraint items based on the evaluation record.

[0088] Step S55: The system evaluates candidate structures according to the pre-defined evaluation rules in the SPEC. A candidate structure is considered a high-potential structure when it reaches a preset improvement threshold in breakdown voltage or overall performance index (FOM) compared to the baseline or previous generation structure; or when its electric field and potential distribution show improvement trends such as reduced peak electric field, outward shift of hotspot locations, or more uniform voltage distribution; and simultaneously meets hard constraints such as oxide layer electric field, terminal width, and manufacturability. The formula for FOM is:

[0089]

[0090] Where BV is the breakdown voltage. Let Wt be the on-resistance, ϕ(Wt) be the terminal width, and ϕ(Wt) be the terminal width penalty factor. ϕ(Wt) is 1 when the terminal width is less than the terminal width budget threshold; ϕ(Wt) is 1 when the terminal width is greater than the terminal width budget threshold.

[0091]

[0092] in This is a preset constant. This is the terminal width budget threshold.

[0093] Specifically, the criteria for determining a high-potential structure in step S55 are as follows: a candidate structure is determined to be a high-potential structure only if it simultaneously satisfies all hard constraints and at least one of the following:

[0094] (1) The breakdown voltage is increased by no less than the first threshold relative to the reference structure; or (2) The comprehensive evaluation index FOM is increased by no less than the second threshold relative to the reference structure; (3) The electric field hot spot location is moved outward relative to the reference structure by no less than the preset distance threshold.

[0095] Step S56: For candidate structures that pass the hard constraint check, the system combines breakdown voltage, comprehensive evaluation index FOM, electric field peak size, terminal width occupancy, and reliability and physical consistency information generated by the ticket mechanism to perform comprehensive scoring and ranking. The similarity is calculated based on the key structural parameter vector and topology identifier of the candidate structure. When the similarity is less than the preset threshold, it is judged as a duplicate candidate and merged, and only the candidate with the higher score is retained to enter the simulation queue.

[0096] Step S57: For high-potential structures obtained from the initial screening, the system can perform a limited number of exploratory scans near their key continuous design parameters to evaluate the structure's sensitivity and robustness to parameter perturbations, and use the scan results as initial samples or references for subsequent parameter numerical optimization.

[0097] Step S58: The confirmed high-potential structures are recorded in the high-potential structure set and participate in the subsequent terminal topology evolution as new basic structures; when the comprehensive evaluation index of the high-potential structure reaches the preset proportion threshold of the target value, it will also enter step S6 to perform continuous parameter optimization.

[0098] See Figure 2 In part (c), after a high-potential structure is obtained in the first stage screening, the system marks the structure as the entry structure for the second stage. In the second stage, while keeping the topology of the structure unchanged, only the pre-selected continuous parameter set is optimized. The continuous parameter set and its value range are jointly determined by SPEC and the results of the first stage.

[0099] In step S6 (stage 2), the parameter numerical optimization of high-potential structures includes: for each high-potential terminal structure obtained in step S5, the system performs constraint-based numerical optimization only on the preset continuous design parameter set while keeping its topology unchanged, in order to obtain the optimal parameter combination and its corresponding terminal structure file that satisfy the global constraint specification SPEC and the corresponding sub-level optimization constraint specification. The system also saves the simulation results, constraint check records and version information related to the optimization process, thereby ensuring the reproducibility and traceability of the optimization results.

[0100] Specifically, step S6 includes:

[0101] Step S61: For each high-potential structure, the system generates corresponding sub-level optimization constraint specifications based on the global SPEC. These specifications are used to clarify the set of continuous parameters that can be optimized under the topology, the range of values ​​for each parameter, the optimization objective function, and the reliability and process hard constraints that must be met.

[0102] The continuous parameter set mentioned in step S61 includes at least one or more of the following: the ring width and ring spacing of the terminal guard ring, the dose and junction depth of the terminal doping, the dose and width of the JTE region, the length / thickness / overlap of the field plate, and the oxide layer thickness.

[0103] The sub-level optimization constraint specification in step S61 includes at least: a list of continuous parameters that can be optimized, the range of values ​​for each parameter, hard constraints, and optimization stopping conditions; and limits the number of continuous parameters corresponding to a single topology to no more than a preset upper limit (e.g., no more than 5 continuous parameters).

[0104] Step S62: Under the constraints of the child constraint file, refer to... Figure 1At the start of Phase Two, the analysis module outputs pre-start information and prompts to the Bayesian optimizer. This information includes at least: a list of parameters to be optimized, the range of each parameter, the definition of the objective function or comprehensive evaluation index, and a list of hard constraints. Based on this, the Bayesian optimizer iteratively generates parameter sampling points. The system writes these sampling points into the structural parameters and drives the TCAD simulation. The scalar results output by TCAD are fed back to the Bayesian optimizer to update the surrogate model until the stopping condition is met, at which point the optimal parameter combination and corresponding terminal structure are output: the maximum number of iterations threshold is reached, or no improvement is achieved in several consecutive iterations, or the expected improvement is lower than a preset threshold.

[0105] Step S63: When the physical simulation calculation cost is high, the system can introduce a device simulation proxy model built based on historical simulation data to pre-evaluate or screen candidate parameters, thereby reducing the number of actual simulation calls. The final selected parameter solution is still verified and confirmed through physical simulation.

[0106] Step S64: After the parameter numerical optimization is completed, the system outputs the optimal parameter combination that meets the requirements of the sub-level constraint file and the corresponding terminal structure file, and simultaneously saves the simulation results, parameter configuration, constraint check records and version information to ensure the reproducibility and traceability of the optimization results.

[0107] By performing the above operations, this invention addresses the technical problem that in the design of existing power semiconductor device terminal structures, engineers still need to repeatedly perform a manual closed loop of "viewing electric field diagrams - modifying structures - resimulating," and that existing methods are mostly limited to optimizing continuous parameters under a fixed terminal topology, making it difficult to directly utilize two-dimensional electric field / potential distribution information and automatically generate executable structural improvement schemes. This invention creatively adopts a method combining multimodal large model proxy and a tool bus oriented to physical simulation. Under the constraints of SPEC specifications, it performs structured rewriting and simulation closed-loop iteration of TCAD terminal structure files, and performs manufacturability and hard constraint consistency verification, redundancy removal screening, and high-potential structure promotion for candidate structures. Furthermore, while keeping the topology of high-potential structures unchanged, Bayesian optimization is used to numerically optimize continuous design parameters, thereby realizing the repeatable implementation and traceable verification of the terminal structure design optimization process, improving the breakdown voltage optimization efficiency of power semiconductor devices, and taking into account the requirements of conduction performance, terminal occupancy, and reliability constraints.

Claims

1. A method for designing power semiconductors using a multimodal large-model proxy, characterized in that, Includes the following steps: S1. Based on the design objectives, obtain the initial structure and constraints as simulation inputs. Specifically, obtain the initial terminal structure and design objectives and constraints. The initial terminal structure is provided in the form of a TCAD structure file. The design objectives include at least increasing the target breakdown voltage. The constraints include at least manufacturability constraints and reliability constraints. S2. Generate constraint specifications (SPEC), specifically, generate SPEC based on the obtained design objectives and constraints. The SPEC is used to limit the allowable range of terminal structure modifications, the value range of continuous parameters, and the evaluation criteria of candidate structure / parameter schemes, and serves as the basis for subsequent design suggestion generation, candidate screening, and parameter optimization. The SPEC includes global constraints and sub-constraints: global constraints are used to limit the hard and soft constraints of the entire process, while sub-constraints are used to tighten or update the modification boundaries and key parameters of the current iteration based on the current structure and simulation results. S3. Perform initial structural simulation. Specifically, the TCAD simulation interface is called through the scheduling mechanism for physical simulation to perform breakdown simulation on the initial terminal structure and collect scalar performance indicators and two-dimensional electric field / potential distribution information as input for multimodal large model analysis to determine the high field region that limits the breakdown voltage and potential improvement directions. S4. Generate a design recommendation document (BV-DSD). Specifically, based on the simulation results obtained in S3 and the constraints in S2, the multimodal large model performs joint analysis on scalar performance indicators and two-dimensional electric field / potential distribution information to generate a design recommendation document (BV-DSD) for improving breakdown voltage. The BV-DSD shall at least provide terminal structure improvements and parameter suggestions that can be mapped to a rewritten structure file, and meet the manufacturability and reliability requirements specified by SPEC. S5. Improvement and screening of sub-constraint specifications and terminal structures: Specifically, generate one or more candidate terminal structures according to BV-DSD and perform executability verification; perform TCAD simulation verification on the candidate structures that pass the verification; evaluate and screen the candidate structures based on the simulation results and constraint specifications; output the advancement structure that meets the constraints and improves the breakdown voltage and update the iteration state until the preset stopping condition is met or the preset performance target is reached, and obtain the high-potential terminal structure. The high-potential structure will be used as the initial structure of S1 in the next iteration to realize further evolution of the topology. S6. Numerical optimization of parameters for high-potential structures: Specifically, for the high-potential terminal structure obtained in S5, numerical optimization of continuous design parameters is performed while keeping its topology unchanged. The numerical optimization takes the improvement of breakdown voltage as the main objective, and comprehensively considers conduction performance, terminal occupancy and reliability indicators under the constraints, and outputs the optimized parameter combination and corresponding terminal structure that meet the constraints.

2. The method for designing power semiconductors using a multimodal large-model proxy according to claim 1, characterized in that, The specific method for generating BV-DSD through a multimodal large model in S4 is as follows: the multimodal large model is defined as a visual language model (VLM) and a language model (LLM) working together. The VLM extracts evidence from the two-dimensional electric field / potential distribution map, including breakdown points or hot spots, areas where the oxide layer electric field exceeds the limit, and the distribution of high-field regions related to reliability. The scalar results BV, Ronsp, and Wt are combined to form an "evidence package". The VLM generates BV-DSD in the context of SPEC and knowledge base rules, including: Observations: Description of the field strength / potential distribution based on the evidence package; Actions: The structural modification actions and parameters mapped to the terminal structure code rewriting; Reasons: Physical reasons or reference to empirical rules corresponding to structural modifications; Expected effects: Improved breakdown voltage or relocation of hot spots; The BV-DSD also records the simulated evidence identifiers used so that subsequent candidate structures can be evaluated traceably. Furthermore, the structural modifications in the "Action" field of the BV-DSD are only allowed to be mapped to the action identifiers and parameters in the pre-registered set of structural modification actions; otherwise, they are deemed invalid suggestions. LLM is used to generate structured instructions such as structural modification actions, parameter suggestions, and simulation scripts. Through engineering adaptation, the model's capabilities are limited to executable tool invocation processes, specifically including: (1) Role and responsibility constraints: Agents are divided into analysis agents (AA), code agents (CA) and supervisor review agents (SA) through predefined system prompt word templates; among them, AA receives multimodal simulation evidence and SPEC and outputs BV-DSD, CA maps the "action" field of BV-DSD to executable actions and generates / verifies TCAD structure files and simulation scripts, and SA performs consistency checks, hard constraint verification, similarity merging and sorting on BV-DSD and candidate structure entries; (2) Enhanced RAG retrieval: Retrieve process rules, reliability red lines, terminal design experience rules and historical structural cases from the knowledge base, and use the retrieval results and SPEC as the model context input to constrain the generated results to meet the physical and manufacturability requirements of semiconductor devices; (3) Structured output and whitelist verification: The model is required to output action identifiers and parameters in a fixed field format and compare them with the set of allowed actions in the structure editing interface to verify the integrity and range of parameter items; (4) Executability Ticket Mechanism: A valid execution flag is generated only when the BV-DSD entry passes the verification. The system only allows candidate structure entries carrying valid execution flags to enter the TCAD simulation queue, thereby suppressing non-executable outputs and reducing invalid simulations.

3. The method for designing power semiconductors using a multimodal large-model proxy according to claim 2, characterized in that, The specific implementation process of evaluating and selecting candidate structures based on simulation results and constraint specifications in S5 includes: S51. Generate sub-level constraints related to the current structure based on the current terminal structure and global constraint specifications, which are used to limit the boundaries of candidate structure generation and screening in this round. S52. Based on the terminal structure improvement suggestions of S4, a set of candidate structures is generated, and the candidate structures are checked for manufacturability and executability and redundancy removal is performed. S53. Convert the candidate structure into an executable simulation input and perform TCAD simulation to obtain the scalar performance index and electric field / potential distribution information of the candidate structure. S54. Based on the simulation results of the candidate structure and the constraint specifications, generate a candidate structure evaluation record; the evaluation record includes at least the scalar performance index of the candidate structure, the related characteristics of the two-dimensional electric field / potential distribution, and the hard constraint check results; S55. Calculate the comprehensive evaluation index FOM based on the candidate structure evaluation record, and combine it with the preset hard constraints and threshold judgment rules in the constraint specification to mark the candidate structure that meets the hard constraints and improves the comprehensive evaluation as a high potential structure. S56. Perform comprehensive scoring and ranking on candidate structures, and calculate similarity or distance metrics based on the key structural parameter vectors and topological identifiers of the candidate structures. When the preset duplicate judgment conditions are met, perform merging and redundancy removal, and retain only the candidate structures with higher scores to enter the simulation queue or the set of promoted structures. S57. For high-potential structures, perform a limited number of exploratory parameter scans within the allowable range of their high leverage parameters to assess the structure's sensitivity and robustness to parameter perturbations, and use the scan results to update sub-level constraints and / or as initial samples for parameter numerical optimization; S58. The confirmed upgrade structure is recorded in the high-potential structure set and participates in the subsequent terminal topology evolution as a new basic structure in S1. When the comprehensive evaluation index of the high-potential structure reaches the preset proportion threshold of the target value, it will also enter step S6 to perform continuous parameter optimization.

4. The method for designing a power semiconductor using a multimodal large-model proxy according to claim 3, characterized in that, The numerical optimization process for continuous design parameters in S6 includes: S61. Generate optimization constraints for each advancement structure to clarify the set of continuous parameters allowed for optimization under this topology, the parameter range, the optimization objective, and the hard constraints of reliability and process that must be met. S62. Under the constraints of the optimization conditions, parameter candidates are iteratively generated and simulation evaluation is performed to obtain parameter performance feedback and update the next round of parameter candidates accordingly. S63. When the simulation cost is high, a proxy model based on historical simulation data is introduced to pre-evaluate or screen parameter candidates in order to reduce the number of actual simulation calls. S64. Output the optimized parameter combination that satisfies the optimization constraints and the corresponding terminal structure file, and save the simulation results, parameter configuration and version information to ensure reproducibility and traceability.

5. A system for designing power semiconductors using a multimodal large-model proxy, for use in the method described in any one of claims 1-4, characterized in that, include: The TCAD simulation module is used to call the TCAD simulation interface to perform breakdown simulation on the initial terminal structure and candidate terminal structure, and output scalar performance indicators and two-dimensional electric field / potential distribution information. The SPEC constraint and knowledge base / historical structure management module is used to generate constraint specifications SPEC based on design goals and constraints, and maintain process rules, reliability red lines, evaluation criteria and historical structure cases; The analysis module is used to generate a design recommendation document (BV-DSD) based on simulation results and constraint specifications (SPEC), and to generate sub-level constraints related to the current structure. The code module is used to map structural modification actions in BV-DSD to actions that can be executed by the structural editing interface, and to generate and verify TCAD structural files and simulation scripts. The candidate structure management module is used to perform manufacturability and executability checks on candidate structures, remove redundancy, sort them, and schedule them into the simulation queue. The parameter optimization module is used to numerically optimize continuous design parameters while keeping the topology of the high-potential terminal structure unchanged. It outputs the optimized parameter combination that meets the constraints and the corresponding terminal structure file, and saves the simulation results, parameter configuration and version information to ensure reproducibility and traceability.

Images