Semiconductor module

Abstract

Semiconductor module (100) comprising: • at least one pair of first and second switching devices (Q1, Q11) which are inserted in series between a first potential and a second potential which is lower than the first potential, and which operate in a complementary manner; • a first driver circuit (11) which controls the first switching device (Q1); and • a second driver circuit (12) which performs a control of the second switching device (Q11), wherein • that at least one pair of first and second switching devices (Q1, Q11) and the first and second driver circuits (11, 12) are sealed in a package (PKG) which has a rectangular shape in a top view, wherein the semiconductor module (100) further comprises: • a control connection (8) which is provided such that it protrudes from a side surface of a first long side of the first and second long sides of the packaging (PKG), and into which a control signal of the first and second driver circuits (11, 12) is fed; • an output terminal (3, 4, 5) which is provided such that it protrudes from a side surface of the second long side and which is supplied with an output of the first and second switching devices (Q1, Q11); • a first main terminal (1) which is provided such that it projects from a side face of a first short side of the first and second short sides of the packaging (PKG), and to which the first potential is applied; and • a second main connection (2) which is provided such that it projects from a side surface of the second short side and to which the second potential is connected, further comprising: • a reference voltage connection (6) which is provided such that it protrudes from a side face of the first long side, and to which a reference voltage of the first driver circuit (11) is applied; and • a driver voltage connection (7) which is provided adjacent to the reference voltage connection (6) and to which a driver voltage of the first driver circuit (11) is applied.

Description

Technical field

[0001] The present invention relates to a semiconductor module, and in particular a surface-mounted semiconductor module. State of the art

[0002] While plug-in mounting, in which a connector of an electronic component is inserted into and connected to a through-hole provided on a printed circuit board, and surface mounting, in which an electrode of an electronic component is connected to a pad provided on the surface of a printed circuit board, are mentioned, surface mounting has the advantage that the assembly process can be simplified, and so on, by using a surface-mounted semiconductor module. Patent document 1 discloses a surface-mounted semiconductor module as a power module, and a surface-mounted semiconductor module has been used in practice.

[0003] US 2012 / 0161303A1 describes a driver IC powered by a power supply system isolated from a control IC, which is mounted near a switching element on a first conductor pattern. A second conductor pattern, connected to a source or emitter terminal of the switching element, is electrically connected to a third conductor pattern on which the driver IC is mounted. A ground terminal of the driver IC is electrically connected to the third conductor pattern, and a driver terminal of the driver IC is electrically connected to a gate or base terminal of the switching element. State of the art documents Patent documents

[0004] Patent Document 1: JP 2015-002185 A Summary Problem to be solved by the invention

[0005] In the semiconductor module disclosed in patent document 1, the main terminals, which are called the P-phase terminal and the N-phase terminal, are arranged side by side on the same side of a module package, and the problem was that it is difficult to ensure a creepage distance between the two terminals.

[0006] The present invention was implemented to solve the above-mentioned problem, and it is an objective to provide a semiconductor module which ensures a creepage distance between a P-phase terminal and an N-phase terminal. Means to solve the problem

[0007] This problem is solved by the features of the independent claims. The dependent claims contain advantageous embodiments of the invention. Effects of the invention

[0008] According to the semiconductor module of the present invention, it is possible to obtain a semiconductor module which ensures a creepage distance between the first main terminal and the second main terminal. Brief description of the characters Fig. Figure 1 is a view showing the structure of a semiconductor module of a first embodiment according to the present invention. Fig. Figure 2 is a view showing an appearance on one side of an upper surface of the first embodiment according to the present invention. Fig. Figure 3 is a view showing a circuit setup of the first embodiment according to the present invention. Fig. Figure 4 is a view showing the structure of a semiconductor module of a second embodiment according to the present invention. Fig. Figure 5 is a view showing an appearance on one side of an upper surface of the second embodiment according to the present invention. Fig. Figure 6 is a view showing the structure of a semiconductor module of a third embodiment according to the present invention. Fig. Figure 7 is a view showing an appearance on one side of a lower surface of the third embodiment according to the present invention. Fig. Figure 8 is a cross-sectional view showing the structure of a semiconductor module of the third embodiment according to the present invention. Fig. Figure 9 is a cross-sectional view showing an example of mounting the semiconductor module of the third embodiment according to the present invention. Fig. Figure 10 is a view showing the structure of a semiconductor module of a fourth embodiment according to the present invention. Fig. Figure 11 is a view showing an appearance on one side of a lower surface of the fourth embodiment according to the present invention. Fig. Figure 12 is a cross-sectional view showing the structure of the semiconductor module of the fourth embodiment according to the present invention. Fig. Figure 13 is a view showing the structure of a semiconductor module of a fifth embodiment according to the present invention. Fig. Figure 14 is a view showing an appearance on one side of a lower surface of the fifth embodiment according to the present invention. Fig. Figure 15 is a cross-sectional view showing the structure of the semiconductor module of the fifth embodiment according to the present invention. Fig. Figure 16 is a view showing the structure of a semiconductor module of a sixth embodiment according to the present invention. Fig. Figure 17 is a view showing an appearance on one side of a lower surface of the sixth embodiment according to the present invention. Fig. Figure 18 is a cross-sectional view showing the structure of the semiconductor module of the sixth embodiment according to the present invention. Description of the embodiments<Erste Ausführungsform>

[0009] Fig. Figure 1 is a view showing the structure of a semiconductor module 100 of a first embodiment according to the present invention, in which a package PKG is omitted to show a structure within the package PKG. Furthermore, Figure 1 shows... Fig. 2. An appearance of one side of an upper surface of the semiconductor module 100 in a state sealed with the packaging PKG.

[0010] As in the Fig. 1 and Fig. As shown in Figure 2, the semiconductor module 100 is a surface-mounted module and comprises a high-potential reference voltage terminal 6, a high-potential driver voltage terminal 7, a control terminal 8, a control voltage terminal 9, and a ground terminal 10 on one long side (first long side) formed by two long sides of the package PKG, which has a rectangular shape in a plan view. It also comprises a U-phase output terminal 3, a V-phase output terminal 4, and a W-phase output terminal 5 on the other long side (second long side). Furthermore, a P-phase terminal 1 (first main terminal), which is a power terminal, is provided on one short side (first short side) formed by two short sides of the package PKG, and an N-phase terminal 2 (second main terminal), which is a power terminal, is provided on the other short side (second short side).Meanwhile, the P-phase terminal 1 and the N-phase terminal 2 are each located in the middle sections of the short sides. It should be noted that a direction parallel to the long side of the PKG package is designated as the Y-direction, and a direction parallel to the short side is designated as the X-direction.

[0011] Such a connection arrangement ensures that the P-phase connection 1 and the N-phase connection 2 are each separate from other connections, so that a creepage distance to other connections can be reliably ensured and the occurrence of an electrical short circuit can be prevented.

[0012] Fig. Figure 3 is a view showing a circuit diagram of the semiconductor module 100. While the semiconductor module 100 is a three-phase output module for a system like the one described in... Fig. For the sake of simplicity, only a circuit diagram of the U-phase consisting of 3 phases (U-phase, V-phase, and W-phase) is shown in the 3 inverters shown.

[0013] The semiconductor module 100 comprises: an inverter circuit in which a high-potential switching device Q1 (first switching device) and a low-potential switching device Q11 (second switching device) are connected in series between the P-phase terminal 1 on a high-potential side (first potential) and the N-phase terminal 2 on a low-potential side (second potential), and a connecting node of both is the U-phase output terminal 3; a high-potential driver circuit 11 (first driver circuit) which drives the high-potential switching device Q1; and a low-potential driver circuit 12 (second driver circuit) which drives the low-potential switching device Q11.Meanwhile, in this embodiment an example is shown in which a bipolar transistor with an insulated gate electrode (IGBT) is used as the high-potential switching device Q1 and the low-potential switching device Q11, but the present invention is not limited thereto, and a metal-oxide-semiconductor (MOS) transistor, or a reverse-conducting (RC) IGBT, can be used.

[0014] Furthermore, the semiconductor module 100 includes a bootstrap circuit (BS circuit). The BS circuit consists of a bootstrap diode BSD and a current-limiting resistor R, which are connected in series between a high-potential-side driver voltage terminal VB and a control voltage terminal VCC of the high-potential-side driver circuit 11, and an external bootstrap capacitor BSC.

[0015] Furthermore, the semiconductor module 100 has a structure in which an external control voltage supply PW1 is arranged, which feeds a control voltage VCC into the control voltage terminal VCC of the high-potential-side driver circuit 11 and the low-potential-side driver circuit 12. It should be noted that the BS circuit is a circuit for generating a high-potential-side driver voltage VB from a high-potential-side reference voltage VS, and the high-potential-side driver voltage VB is applied to a high-potential-side reference voltage terminal VS.

[0016] The high-potential-side driver circuit 11 is configured such that a high-potential-side input signal HIN is fed externally into a signal input terminal HI, and a control signal for controlling the actuation of the high-potential-side switching device Q1 is output from a high-potential-side output terminal HO and applied to a gate of the high-voltage-side switching device Q1. Furthermore, the low-potential-side driver circuit 12 is configured such that a low-potential-side input signal LIN is fed externally into a signal input terminal LI, and a control signal for controlling the actuation of the high-potential-side switching device Q11 is output from a low-potential-side output terminal LO and applied to a gate of the low-potential-side switching device Q11.

[0017] Now, returning to the explanation of Fig. 1. An internal structure of the semiconductor module 100 is described. It should be noted that in the following description, the expression "A and B are electrically connected" means that a current flows in both directions between structure A and structure B.

[0018] As in Fig. As shown in Figure 1, a die pad PD3, which has a rectangular shape in a top view, is arranged in a central part of the semiconductor module 100, and the high-potential switching devices Q1, Q2, and Q3 are arranged such that they are aligned in a line in the Y direction on the die pad PD3. Furthermore, the P-phase terminal 1 extends from a short side of the die pad PD3 and protrudes from a side face of the short side of the package PKG. Meanwhile, a collector is provided on a lower face of the high-potential switching devices Q1, Q2, and Q3, which is in contact with the die pad PD3, and an emitter and a gate are provided on an upper face.

[0019] Furthermore, die pads PD11, PD12, and PD13 are arranged on a short side opposite the side on which the P-phase terminal 1 of die pad PD3 extends, and the low-potential switching devices Q11, Q12, and Q13 are each arranged on die pads PD11, PD12, and PD13, respectively. Additionally, U-phase output terminal 3, V-phase output terminal 4, and W-phase output terminal 5 extend from die pads PD11, PD12, and PD13, respectively, and project from a side face of a long side of the package PKG. Meanwhile, a collector is provided on a lower surface of each of the low-potential switching devices Q11, Q12, and Q1 and is in contact with the die pads PD11, PD12, and PD13, and an emitter and a gate are provided on an upper surface.

[0020] Since the die pads PD11, PD12, and PD13 are arranged such that they are inclined to the short side of the package PKG, the U-phase output terminal 3, the V-phase output terminal 4, and the W-phase output terminal 5 have a shape that includes one or more curved sections and which project from a side face of a long side of the package PKG. It should be noted that the U-phase output terminal 3, the V-phase output terminal 4, and the W-phase output terminal 5 are each electrically connected by means of a wire WR to the emitters of the high-potential switching devices Q1, Q2, and Q3.

[0021] Furthermore, three N-phase terminals 2, which each provide a voltage to the low-potential switching devices Q11, Q12, and Q13, are provided such that they protrude from a side surface of a short side opposite the side on which the P-phase terminal 1 extends, and the three N-phase terminals 2 and the emitters of the low-potential switching devices Q11, Q12, and Q13 are electrically connected by means of the wire WR.

[0022] The high-potential reference voltage terminal 6, the high-potential driver voltage terminal 7, the control terminal 8, the control voltage terminal 9, and the ground terminal 10 are arranged such that they protrude from a side face of a long side opposite the side on which the U-phase output terminal 3, the V-phase output terminal 4, and the W-phase output terminal 5 of the package PKG protrude. Furthermore, a die pad PD2, which has a rectangular shape in a top view, is arranged between the terminal assembly and the die pad PD3, and a high-potential driver chip C11 and a low-potential driver chip C12 are arranged on the die pad PD2. It should be noted that the high-potential driver circuit 11 and the low-potential driver circuit 12 are each contained within the high-potential driver chip C11 and the low-potential driver chip C12, respectively.It should be noted that the die pad PD2 is a pad which has a potential connected to a ground potential and which has the ground connection 10, which extends from a long side opposite the side of the die pad PD3 and which protrudes from a side surface of a long side of the packaging PKG.

[0023] There are three high-potential reference voltage terminals 6 and three high-potential driver voltage terminals 7, which are arranged alternately along the long side of the PKG packaging. It should be noted that the high-potential reference voltage terminal 6 in the example is Fig. 1 is arranged in a position closest to a short side (beginning of an arrangement), and the high-potential-side driver voltage terminal 7 is arranged adjacent to it, but the arrangement order is not limited to this. However, it is preferable to arrange the high-potential-side reference voltage terminal 6 and the high-potential-side driver voltage terminal 7 adjacent to each other in order to arrange the bootstrap capacitor BSC externally, and such an arrangement facilitates the placement of the bootstrap capacitor BSC.

[0024] While the control terminal 8 is arranged to follow the arrangement of the high-potential reference voltage terminal 6 and the high-potential driver voltage terminal 7, the control voltage terminal 9 and the ground terminal 10 are located in the center of the arrangement of the control terminals 8. The control voltage terminal 9 extends from a die pad PD1, which is located between the die pad PD2 and the terminal assembly, and is a terminal into which the control voltage VCC is applied. The die pad PD1 has an elongated shape that extends along the long side of the die pad PD2 and is electrically connected via the wire WR to a top surface of the bootstrap diode BSD, which is located on each of the three high-potential driver voltage terminals 7.It should be noted that the current limiting resistor R (not shown) is integrated into the top surface of the bootstrap diode BSD, and the wire WR is connected to the current limiting resistor R.

[0025] Furthermore, each of the three high-potential reference voltage terminals 6 is electrically connected to the high-potential driver chip C11 via wire WR. Additionally, the control terminal between control voltage terminal 9 and the high-potential driver voltage terminal 7 is electrically connected to the high-potential driver chip C11 via wire WR as a control terminal on one high-potential side, and die pad PD1 is also connected to the high-potential driver chip C11 via wire WR. Furthermore, die pad PD2 is electrically connected to the high-potential driver chip C11 via wire WR. Finally, the gates and emitters of the respective high-potential switching devices Q1, Q2, and Q3 are electrically connected to the high-potential driver chip C11 via wire WR.

[0026] The arrangement of control terminals 8, in which the arrangement begins next to the ground terminal 10 on a side opposite the control voltage terminal 9, is electrically connected to the low-potential driver chip C12 via wire WR, as a control terminal on a low-potential side. Furthermore, the respective gates of the low-potential switching devices Q11, Q12, and Q13 are electrically connected to the low-potential driver chip C12 via wire WR.

[0027] As described above, by arranging the die pad PD3, on which the high-potential switching devices Q1, Q2, and Q3 are mounted on one short side of the packaging PKG, and by arranging the die pads PD11, PD12, and PD13, on which the low-potential switching devices Q11, Q12, and Q13 are mounted on the other short side of the packaging PKG, a structure can be designed such that the P-phase terminal 1 protrudes from the side surface of one short side, the N-phase terminal 2 protrudes from the side surface of the other short side, and further terminals protrude from the side surfaces of the two long sides of the packaging PKG, and it is possible to ensure a creepage distance to the further terminals. <Zweite Ausführungsform>

[0028] Fig. Figure 4 is a view showing the structure of a semiconductor module 200 of a second embodiment according to the present invention, in which a package PKG is omitted to show a structure within the package PKG. Furthermore, Figure 4 shows... Fig. 5. An appearance of one side of an upper surface of the semiconductor module 200 in a state sealed with the packaging PKG.

[0029] As in the Fig. 4 and Fig. As shown in Figure 5, the semiconductor module 200 comprises three high-potential-side driver voltage terminals 7, a U-phase output terminal 3, a V-phase output terminal 4, and a W-phase output terminal 5 on one long side of two long sides of the package PKG, which has a rectangular shape in a top view. Furthermore, the other long side of the package PKG has a control terminal 8, a control voltage terminal 9, and a ground terminal 10.

[0030] How in relation to Fig. As described in 3, a high-potential-side driver voltage connection VB of a high-potential-side driver circuit 11 is a connection to which a high-potential-side driver voltage VB from a bootstrap capacitor BSC is applied, and the three high-potential-side reference voltage connections VS of the high-potential-side driver circuit 11 are connections which have a reference potential on a high-potential side, and which each have the same potential as the U-phase output connection 3, the V-phase output connection 4, and the W-phase output connection 5.By arranging the three high-potential-side driver voltage terminals 7, into which the high-potential-side driver voltage VB is fed, alternately with the U-phase output terminal 3, the V-phase output terminal 4, and the W-phase output terminal 5 along one long side of the packaging PKG, there is no need to provide the high-potential-side reference voltage terminal 6 separately, and the packaging PKG can be reduced in size by reducing the number of terminals.

[0031] There, as in Fig. Figure 3 shows that a bootstrap diode BSD is attached to the high-potential reference voltage terminal 7, and that the bootstrap diode BSD is connected between a high-potential driver chip C11 and the control voltage terminal 9 by means of a wire WR. Fig. The semiconductor module 200 shown extends over the three die pads PD, on which the bootstrap diode BSD is arranged, on the other long side of the package PKG, and the high-potential-side driver voltage connections 7 protrude from there to one long side of the package PKG. These high-potential-side driver voltage connections 7 are arranged such that they run under the die pads PD1 to PD3, the U-phase output connection 3, the V-phase output connection 4, and the W-phase output connection 5.

[0032] Such a structure can be realized by using an upper layer connection frame comprising die pads PD1 to PD3, U-phase output terminal 3, V-phase output terminal 4, and W-phase output terminal 5, and a lower layer connection frame comprising die pad PD and the high-potential driver voltage terminal 7. The lower layer connection frame has a section of a different plane relative to the upper layer connection frame, and this section of the other plane is indicated by a dashed line. Fig. 4 marked.

[0033] By arranging the high-potential driver voltage terminal 7 to run under the die pads PD1 to PD3, the U-phase output terminal 3, the V-phase output terminal 4, and the W-phase output terminal 5, the three high-potential driver voltage terminals 7 can be arranged alternately with the U-phase output terminal 3, the V-phase output terminal 4, and the W-phase output terminal 5 along one long side of the packaging PKG.

[0034] It should be noted that the construction in which a P-phase connection 1 protrudes from a side surface of one short side, an N-phase connection 2 protrudes from a side surface of the other short side, and further connections protrude from the side surfaces of the two long sides of the packaging PKG, is the same as that of the semiconductor module 100 of the first embodiment, and a creepage distance to the further connections can be reliably ensured.

[0035] In the foregoing description, the high-potential driver voltage terminal 7 is configured to run under the die pads PD1 to PD3, the U-phase output terminal 3, the V-phase output terminal 4, and the W-phase output terminal 5, but it is also unnecessary to mention that the high-potential driver voltage terminal 7 can be configured to span the die pads PD1 to PD3, the U-phase output terminal 3, the V-phase output terminal 4, and the W-phase output terminal 5. <Dritte Ausführungsform>

[0036] Fig. Figure 6 is a view showing the structure of a semiconductor module 300 of a third embodiment according to the present invention, in which a package PKG is omitted to show a structure within the package PKG. Furthermore, Figure 6 shows... Fig. 7. An appearance of one side of a lower surface (rear) of the semiconductor module 300 in a state sealed with the packaging PKG, while Fig. 8 is a view showing a cross-section along a line AB in Fig. 6 is taken in one direction of the arrow.

[0037] As in the Fig. 6 and Fig. As shown in Figure 7, the semiconductor module 300 comprises a high-potential reference voltage terminal 6, a high-potential driver voltage terminal 7, a control terminal 8, a control voltage terminal 9, and a ground terminal 10 on one long side of the two long sides of the package PKG, which has a rectangular shape in a top view, and comprises a U-phase output terminal 3, a V-phase output terminal 4, and a W-phase output terminal 5 on the other long side. It should be noted that no terminal is provided on the two short sides of the package PKG.

[0038] As in the Fig. 7 and Fig. As shown in Figure 8, in the semiconductor module 300 a P-phase terminal 1 and an N-phase terminal 2 have a structure in which sections of them are exposed at an opening OP1 (first opening) and at an opening OP2 (second opening) on ​​a lower surface of the packaging PKG, and the exposed section acts as an electrode.

[0039] This means that the P-phase connection 1 has, as in Fig. Figure 8 shows a cross-sectional shape comprising a section in which a short side of a die pad 3 is bent towards the lower surface of the packaging PKG, a section bent such that it lies parallel to the lower surface of the packaging PKG at the opening OP1 provided on the lower surface of the packaging PKG, and a section bent towards an upper surface of the packaging PKG. Therefore, a surface of the die pad PD3 is arranged to be exposed at the lower surface of the packaging PKG at the opening OP1, and the exposed section acts as an electrode.Furthermore, the N-phase terminal 2 has a cross-sectional shape comprising a section bent towards the lower surface of the packaging PKG, a section bent parallel to the lower surface of the packaging PKG at the opening OP2 provided on the lower surface of the packaging PKG, and a section bent towards the upper surface of the packaging PKG. A surface of the N-phase terminal 2 is therefore positioned to be exposed at the lower surface of the packaging PKG at the opening OP2, and the exposed section acts as an electrode.

[0040] Since the sections of the P-phase connection 1 and the N-phase connection 2 are exposed at the openings OP1 and OP2 on the lower surface of the packaging PKG, these sections can be mounted as electrodes on a predefined printed circuit board in this way.

[0041] Fig. Figure 9 is a cross-sectional view showing an assembly example, depicting a state in which the P-phase terminal 1 and the N-phase terminal 2, exposed at openings OP1 and OP2, are connected to a wiring pattern CP on a printed circuit board CB using solder SD. Alternatively, a conductive resin can be used instead of solder SD.

[0042] By providing the P-phase terminal 1 and the N-phase terminal 2 on the back of the PKG packaging, a reliable creepage distance to other terminals can be ensured. Since only the surfaces of the P-phase terminal 1 and the N-phase terminal 2 are exposed at the openings OP1 and OP2, the structure has no corner section or edge and exhibits high resistance to electrical short circuits. Furthermore, since it is possible to dissipate heat directly from the P-phase terminal 1 and the N-phase terminal 2 to the CP wiring pattern when assembled, there is also the advantage of improved heat dissipation. <Vierte Ausführungsform>

[0043] Fig. Figure 10 is a view showing the structure of a semiconductor module 400 of a fourth embodiment according to the present invention, in which a package PKG is omitted to show a structure within the package PKG. Furthermore, Figure 10 shows... Fig. 11 an appearance of one side of a lower surface (rear) of the semiconductor module 400 in a state sealed with the packaging PKG, while Fig. 12 is a view which shows a cross-section extending along a line AB in Fig. 10 is taken in one direction of the arrow.

[0044] As in the Fig. 10 and Fig. As shown in Figure 11, the semiconductor module 400 comprises three high-potential-side driver voltage terminals 7, a U-phase output terminal 3, a V-phase output terminal 10, and a W-phase output terminal 11 on one long side of the two long sides of the package PKG, which has a rectangular shape in a top view. Furthermore, the other long side of the package PKG has a control terminal 8, a control voltage terminal 9, and a ground terminal 10. It should be noted that no terminals are provided on the two short sides of the package PKG.

[0045] In the semiconductor module 400, as in the Fig. 11 and Fig. As shown in Figure 12, a P-phase terminal 1 and an N-phase terminal 2 have a structure in which sections of them are exposed at the openings OP1 and OP2 on the lower surface of the packaging PKG, and the exposed section acts as an electrode.

[0046] This means that the P-phase connection 1 has, as in Fig. Figure 10 shows a cross-sectional shape comprising a section in which a short side of a die pad 3 is bent towards the lower surface of the packaging PKG, a section bent such that it lies parallel to the lower surface of the packaging PKG at the opening OP1 provided on the lower surface of the packaging PKG, and a section bent towards an upper surface of the packaging PKG. Therefore, a surface of the die pad PD3 is arranged to be exposed at the lower surface of the packaging PKG at the opening OP1, and the exposed section acts as an electrode.Furthermore, the N-phase terminal 2 has a cross-sectional shape comprising a section bent towards the lower surface of the packaging PKG, a section bent parallel to the lower surface of the packaging PKG at the opening OP2 provided on the lower surface of the packaging PKG, and a section bent towards the upper surface of the packaging PKG. A surface of the N-phase terminal 2 is therefore positioned to be exposed at the lower surface of the packaging PKG at the opening OP2, and the exposed section acts as an electrode.

[0047] Since sections of the P-phase terminal 1 and the N-phase terminal 2 are exposed at openings OP1 and OP2 on the lower surface of the PKG package, a reliable creepage distance to other terminals can be ensured. Furthermore, because only the surfaces of the P-phase terminal 1 and the N-phase terminal 2 are exposed at openings OP1 and OP2, the structure has no corner section or edge and exhibits high resistance to electrical short circuits. In addition, the semiconductor module 400, with the exposed sections of the P-phase terminal 1 and the N-phase terminal 2 serving as electrodes, can be mounted on a predefined printed circuit board. In this case, there is also the advantage of improved heat dissipation, as heat can be transferred directly from the P-phase terminal 1 and the N-phase terminal 2 to a wiring pattern on the circuit board.

[0048] The high-potential-side driver voltage connection 7 is configured to run beneath die pads PD1 to PD3, the U-phase output connection 3, the V-phase output connection 4, and the W-phase output connection 5. The three high-potential-side driver voltage connections 7 can be arranged alternately with the U-phase output connection 3, the V-phase output connection 4, and the W-phase output connection 5 along one long side of the package PKG. Therefore, there is no need to provide a separate high-potential-side reference voltage connection 6, and it is also possible to reduce the size of the package PKG by decreasing the number of connections. <Fünfte Ausführungsform>

[0049] Fig. Figure 13 shows a view of the structure of a semiconductor module 500 of a fifth embodiment according to the present invention in which a package PKG is omitted to show a structure within the package PKG. Furthermore, Figure 13 shows... Fig. 14 an appearance of one side of a lower surface (rear) of the semiconductor module 500 in a state sealed with the packaging PKG, while Fig. 15 is a view which shows a cross-section extending along a line AB in Fig. 13 is taken in one direction of the arrow.

[0050] As in the Fig. 13 and Fig. As shown in Figure 14, the semiconductor module 500 comprises a U-phase output terminal 3, a V-phase output terminal 4, and a W-phase output terminal 5 on one long side formed by two long sides of the package PKG, which has a rectangular shape in a top view. Furthermore, the other long side of the package PKG has a control terminal 8, a control voltage terminal 9, and a ground terminal 10. On one short side formed by two short sides of the package PKG, three high-potential reference voltage terminals 6 and three high-potential driver voltage terminals 7 are alternately provided, while no terminal is provided on the other short side.

[0051] In the semiconductor module 500, as in the Fig. 14 and Fig. As shown in Figure 15, a P-phase terminal 1 and an N-phase terminal 2 have a structure in which sections of them are exposed at the openings OP1 and OP2 on the lower surface of the packaging PKG, and the exposed section acts as an electrode.

[0052] This means that the P-phase connection 1 has, as in Fig. Figure 15 shows a cross-sectional shape comprising a section in which a short side of a die pad 3 is bent towards the lower surface of the packaging PKG, a section bent such that it lies parallel to the lower surface of the packaging PKG at the opening OP1 provided on the lower surface of the packaging PKG, and a section bent towards an upper surface of the packaging PKG. Therefore, a surface of the die pad PD3 is arranged to be exposed at the lower surface of the packaging PKG at the opening OP1, and the exposed section acts as an electrode.Furthermore, the N-phase terminal 2 has a cross-sectional shape comprising a section bent towards the lower surface of the packaging PKG, a section bent parallel to the lower surface of the packaging PKG at the opening OP2 provided on the lower surface of the packaging PKG, and a section bent towards the upper surface of the packaging PKG. A surface of the N-phase terminal 2 is therefore positioned to be exposed at the lower surface of the packaging PKG at the opening OP2, and the exposed section acts as an electrode.

[0053] Since sections of the P-phase terminal 1 and the N-phase terminal 2 are exposed at the openings OP1 and OP2 on the lower surface of the PKG package, a reliable creepage distance to other terminals can be ensured. Furthermore, because only the surfaces of the P-phase terminal 1 and the N-phase terminal 2 are exposed at the openings OP1 and OP2, the structure has no corner section or edge and exhibits high resistance to electrical short circuits. In addition, the semiconductor module 500, with the exposed sections of the P-phase terminal 1 and the N-phase terminal 2 serving as electrodes, can be mounted on a predefined printed circuit board. In this case, there is also the advantage of improved heat dissipation, as heat can be transferred directly from the P-phase terminal 1 and the N-phase terminal 2 to a wiring pattern on the circuit board.

[0054] Furthermore, the semiconductor module 500 has a structure in which, as in Fig. Figure 13 shows that on a short side, on a side where the P-phase terminal 1 of the packaging PKG is provided, the three high-potential reference voltage terminals 6 and the three high-potential driver voltage terminals 7 are arranged alternately along the short side and protrude from the side surface of the short side. It should be noted that in the example in Fig. 13 The high-potential reference voltage terminal 6 is arranged at a position closest to a long side (beginning of an arrangement), and the high-potential driver voltage terminal 7 is arranged adjacent to it, but the arrangement order is not limited to this. To achieve such an arrangement, a die pad PD1, which has an L-shaped form in a plan view, extends not only along a long side of a die pad PD2 but also along a short side, and it is electrically connected by a wire WR to a top surface of a bootstrap diode BSD, which is arranged on each of the three high-potential driver voltage terminals 7.

[0055] Since both terminals, which are to have a high potential, can be separated from the terminal of a low potential by arranging the high-potential reference voltage terminal 6 and the high-potential driver voltage terminal 7 on one short side of two short sides of the packaging PKG in such a way that a creepage distance can be more reliably ensured, and the effect on suppressing an electrical short circuit can be further improved. <Sechste Ausführungsform>

[0056] Fig. Figure 16 is a view showing the structure of a semiconductor module 600 of a sixth embodiment according to the present invention, in which a package PKG is omitted to show a structure within the package PKG. Furthermore, Figure 16 shows... Fig. 17 an appearance of one side of a lower surface (rear) of the semiconductor module 600 in a state sealed with the packaging PKG, while Fig. 18 is a view which shows a cross-section extending along a line AB in Fig. 16 is taken in one direction of the arrow.

[0057] As in the Fig. 16 and Fig. As shown in Figure 17, the semiconductor module 600 comprises a high-potential driver voltage terminal 7, a control terminal 8, a control voltage terminal 9, and a ground terminal 10 on one long side of the two long sides of the package PKG, which has a rectangular shape in a top view, and comprises a P-phase terminal 1 and an N-phase terminal 2 on the other long side. It should be noted that no terminal is provided on the two short sides of the package PKG.

[0058] The semiconductor module 600 has a structure in which a U-phase output terminal 3, a V-phase output terminal 4, and a W-phase output terminal 5, as in the Fig. 17 and Fig. Figure 18 shows one or more curved sections extending into the vicinity of a side face of the long side of the PKG packaging, but not extending from a side face of the long side, and the respective sections of these are exposed at openings (third opening) on ​​the lower face of the PKG packaging, and the exposed section acts as a connector.

[0059] This means that the U-phase output terminal 3 has a cross-sectional shape comprising a section bent towards the lower surface of the packaging PKG, a section bent parallel to the lower surface of the packaging PKG at the opening OP3 provided on the lower surface of the packaging PKG, and a section bent towards an upper surface of the packaging PKG. Furthermore, the V-phase output terminal 4 has a cross-sectional shape comprising a section bent towards the lower surface of the packaging PKG, a section bent parallel to the lower surface of the packaging PKG at the opening OP4 provided on the lower surface of the packaging PKG, and a section bent towards the upper surface of the packaging PKG.Furthermore, the W-phase output terminal 5 has a cross-sectional shape comprising a curved section bent towards the lower surface of the packaging PKG, a section bent parallel to the lower surface of the packaging PKG at the opening OP5 provided on the lower surface of the packaging PKG, and a section bent towards the upper surface of the packaging PKG. By adopting these configurations, the surfaces of the U-phase output terminal 3, the V-phase output terminal 4, and the W-phase output terminal 5 are arranged to be exposed from the lower surface of the packaging PKG at each of the openings OP3, OP4, and OP5, and each exposed section acts as an electrode.

[0060] Since the respective sections of the U-phase output terminal 3, the V-phase output terminal 4, and the W-phase output terminal 5 are exposed at the openings OP3, OP4, and OP5 on the lower surface of the PKG packaging, each exposed section can be mounted as an electrode on a predefined printed circuit board, and in this case there is also an advantage of improved heat dissipation, as it is possible to dissipate heat from the U-phase output terminal 3, the V-phase output terminal 4, and the W-phase output terminal 5 directly to a wiring pattern on the printed circuit board.

[0061] Since the U-phase output terminal 3, the V-phase output terminal 4, and the W-phase output terminal 5 in the semiconductor module 600 are located on the rear of the PKG packaging, a reliable creepage distance to other terminals can be ensured. Because only the respective surfaces of the U-phase output terminal 3, the V-phase output terminal 4, and the W-phase output terminal 5 are exposed at the openings OP3, OP4, and OP5, the structure has no corner section or edge and exhibits high resistance to an electrical short circuit.

[0062] How in relation to Fig. As described in 3, a high-potential-side driver voltage connection VB of a high-potential-side driver circuit 11 is furthermore a connection to which a high-potential-side driver voltage VB from a bootstrap capacitor BSC is applied, and the three high-potential-side reference voltage connections VS of the high-potential-side driver circuit 11 are connections which have a reference potential on a high-potential side and each have the same potential as the U-phase output connection 3, the V-phase output connection 4, and the W-phase output connection 5.By arranging the three high-potential-side driver voltage terminals 7, into which the high-potential-side driver voltage VB is fed, along one long side of the packaging PKG, and by replacing the high-potential-side reference voltage terminal 6 with the U-phase output terminal 3, the V-phase output terminal 4, and the W-phase output terminal 5, which are provided on the rear of the packaging PKG, there is no need to provide a separate high-potential-side reference voltage terminal 6, and it is also possible to reduce the size of the packaging PKG by reducing the number of terminals.

[0063] In a housing where the bootstrap capacitor BSC is externally mounted between each of the three high-potential-side driver voltage terminals 7 and the U-phase output terminal 3, the V-phase output terminal 4, and the W-phase output terminal 5, this can meanwhile be achieved by a wiring pattern on a predefined printed circuit board, so that there is no problem even if the arrangement positions of the three high-potential-side driver voltage terminals 7, the U-phase output terminal 3, the V-phase output terminal 4, and the W-phase output terminal 5 are separated.

[0064] As further explained in Fig.As shown in Figure 16, the semiconductor module 600 has a structure in which the P-phase terminal 1 extends from a long side of a die pad PD3, on which the high-potential switching devices Q1, Q2, and Q3 are arranged, and which projects from a side face of a long side of the package PKG. The arrangement of the die pads PD11, PD12, and PD13 is further arranged such that it is parallel to the long side of the package PKG and has a positional relationship in series with the die pad PD3. In addition, the three N-phase terminals 2 are provided on a opposite side of the long side from which the P-phase terminal 1 of the package PKG projects, and each of the three N-phase terminals 2 and the emitters of the low-potential switching devices Q11, Q12, and Q13 are electrically connected by a wire WR.

[0065] By adopting such a design, it is possible to ensure that the P-phase connection 1 and the N-phase connection 2 protrude from the side surface of a long side of the PKG packaging, and it is possible to separate the two from each other to ensure a creepage distance.

[0066] It should be noted that the embodiments can be combined.

Claims

[1] Semiconductor module (100) comprising: • at least one pair of first and second switching devices (Q1, Q11) which are inserted in series between a first potential and a second potential which is lower than the first potential, and which operate in a complementary manner; • a first driver circuit (11) which controls the first switching device (Q1); and • a second driver circuit (12) which performs a control of the second switching device (Q11), wherein • that at least one pair of first and second switching devices (Q1, Q11) and the first and second driver circuits (11, 12) are sealed in a package (PKG) which has a rectangular shape in a top view, wherein the semiconductor module (100) further comprises: • a control connection (8) which is provided such that it protrudes from a side surface of a first long side of the first and second long sides of the packaging (PKG), and into which a control signal of the first and second driver circuits (11, 12) is fed; • an output terminal (3, 4, 5) which is provided such that it protrudes from a side surface of the second long side and which is supplied with an output of the first and second switching devices (Q1, Q11); • a first main terminal (1) which is provided such that it projects from a side face of a first short side of the first and second short sides of the packaging (PKG), and to which the first potential is applied; and • a second main connection (2) which is provided such that it projects from a side surface of the second short side and to which the second potential is connected, further comprising: • a reference voltage connection (6) which is provided such that it protrudes from a side face of the first long side, and to which a reference voltage of the first driver circuit (11) is applied; and • a driver voltage connection (7) which is provided adjacent to the reference voltage connection (6) and to which a driver voltage of the first driver circuit (11) is applied. [2] Semiconductor module (100) comprising: • at least one pair of first and second switching devices (Q1, Q11) which are inserted in series between a first potential and a second potential which is lower than the first potential, and which operate in a complementary manner; • a first driver circuit (11) which controls the first switching device (Q1); and • a second driver circuit (12) which performs a control of the second switching device (Q11), wherein • that at least one pair of first and second switching devices (Q1, Q11) and the first and second driver circuits (11, 12) are sealed in a package (PKG) which has a rectangular shape in a top view, wherein the semiconductor module (100) further comprises: • a control connection (8) which is provided such that it protrudes from a side surface of a first long side of the first and second long sides of the packaging (PKG), and into which a control signal of the first and second driver circuits (11, 12) is fed; • an output terminal (3, 4, 5) which is provided such that it protrudes from a side surface of the second long side and which is supplied with an output of the first and second switching devices (Q1, Q11); • a first main terminal (1) which is provided such that it projects from a side face of a first short side of the first and second short sides of the packaging (PKG), and to which the first potential is applied; and • a second main connection (2) which is provided such that it projects from a side surface of the second short side and to which the second potential is connected, further comprising: • a driver voltage connection (7) which is provided such that it protrudes from a side surface of the second long side, and to which a driver voltage of the first driver circuit (11) is applied, wherein • the driver voltage connection (7) is located adjacent to the output connection (3, 4, 5). [3] Semiconductor module (300) comprising: • at least one pair of first and second switching devices (Q1, Q11) which are inserted in series between a first potential and a second potential which is lower than the first potential, and which operate in a complementary manner; • a first driver circuit (11) which controls the first switching device (Q1); and • a second driver circuit (12) which performs a control of the second switching device (Q11), wherein • that at least one pair of first and second switching devices (Q1, Q11) and the first and second driver circuits (11, 12) are sealed in a package (PKG) which has a rectangular shape in a top view, wherein the semiconductor module (200) further comprises: • a control connection (8) which is provided such that it protrudes from a side surface of a first long side of the first and second long sides of the packaging (PKG), and into which a control signal of the first and second driver circuits (11, 12) is fed; • an output terminal (3, 4, 5) which is provided such that it protrudes from a side surface of the second long side and which is supplied with an output of the first and second switching devices (Q1, Q11); • a first main terminal (1) whose surface is partially exposed by a first opening (OP1) provided on a rear side of the packaging (PKG), the rear side being a side that can be mounted on a printed circuit board (CB), the first potential being applied to the exposed part; and • a second main terminal (2) whose surface is partially exposed by a second opening (OP2) provided on the rear side, the second potential being applied to the exposed section. [4] Semiconductor module (100, 300) according to claim 3, further comprising: • a reference voltage connection (6) which is provided such that it protrudes from a side face of the first long side, and to which a reference voltage of the first driver circuit (11) is applied; and • a driver voltage connection (7) which is provided adjacent to the reference voltage connection (6) and to which a driver voltage of the first driver circuit (11) is applied. [5] Semiconductor module (200) according to claim 3, further comprising: • a driver voltage connection (7) which is provided such that it protrudes from a side surface of the second long side, and to which a driver voltage of the first driver circuit (11) is applied, wherein • the driver voltage connection (7) is located adjacent to the output connection (3, 4, 5). [6] Semiconductor module (300) according to claim 3, further comprising: • a reference voltage connection (6) which is provided such that it projects from a side face of a first short side of the first and second short sides of the packaging (PKG), and to which a reference voltage of the first driver circuit (11) is applied; and • a driver voltage connection (7) which is provided adjacent to the reference voltage connection (6) and to which a driver voltage of the first driver circuit (11) is applied. [7] Semiconductor module (600) comprising: • at least one pair of first and second switching devices (Q1, Q11) which are inserted in series between a first potential and a second potential which is lower than the first potential, and which operate in a complementary manner; • a first driver circuit (11) which controls the first switching device (Q1); and • a second driver circuit (12) which performs a control of the second switching device (Q11), wherein • that at least one pair of first and second switching devices (Q1, Q11) and the first and second driver circuits (11, 12) are sealed in a package (PKG) which has a rectangular shape in a top view, wherein the semiconductor module (600) further comprises: • a control connection (8) which is provided such that it protrudes from a side surface of a first long side of the first and second long sides of the packaging (PKG), and into which a control signal of the first and second driver circuits (11, 12) is fed; • a first main connection (1) which is provided such that it protrudes from a side surface of the second long side, and to which the first potential is applied; • a second main connection (2) which is provided such that it projects from a side face of the second long side, and to which the second potential is applied; and • an output terminal (3, 4, 5) whose surface is partially exposed by a third opening (OP3, OP4, OP5) provided on a rear side of the packaging (PKG), the rear side being a side that can be mounted on a printed circuit board (CB), with an output of the first and second switching devices (Q1, Q11) being located on the exposed part. [8] Semiconductor module (600) according to claim 7, further comprising a driver voltage connection (7) which is provided such that it protrudes from a side surface of the first long side and to which a driver voltage of the first driver circuit (11) is applied.

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