METROLOGY SYSTEM FOR ALL SURFACE LAYERS

Abstract

System comprehensive: a table (322) designed to hold a wafer (314); at least one light source (316) configured to direct at least one beam onto a front face, a rear face opposite the front face and an edge between the front face and the rear face of the wafer (314) located on the table (322); at least three detectors (328, 334) configured to receive the at least one beam reflected from the front face, the rear face and the edge and to generate image data; and a controller (336) that is electronically and communicatively connected to the at least three detectors (328, 334), wherein the controller (336) is configured to perform metrology on the front surface, the back surface and the edge using the image data, wherein the controller (336) comprises a processor (306) that is programmed to determine a layer thickness on the back surface of the wafer (314) by measuring a ratio of a grayscale image of the bright-field light emanating from the back surface of the wafer (314) and that of a reference wafer, using a hardware model, a first layer stack model and a second layer stack model, wherein the hardware model is mathematically expressed, comprises hardware parameters of a system and was created from grayscale data of measured samples,wherein the hardware parameters include an angle of incidence and / or wavelengths of the light and / or parameters of a conditioning element that sets a polarization, wherein the first layer stack model is mathematically expressed and corresponds to the reference wafer, and wherein the second layer stack model is mathematically expressed and corresponds to wafer (314), and wherein the first layer stack model and the second layer stack model include parameters that are used to calculate the thickness of the layer and the optical properties of the layer and wafer (314).

Description

Territory of Revelation

[0001] This revelation relates to wafer inspection and wafer metrology. Background of the invention

[0002] Wafer inspection and metrology systems help semiconductor manufacturers increase or maintain the yield of integrated circuits (ICs) by detecting defects that occur during the manufacturing process. One purpose of these systems is to monitor whether a manufacturing process meets specifications. If a manufacturing process deviates from established standards, these systems can identify the problem and / or its source, allowing the semiconductor manufacturer to address it.

[0003] The evolution of the semiconductor industry places ever-increasing demands on yield management, particularly on metrology and inspection systems. Critical dimensions are becoming smaller while wafer size is increasing. Economic pressures are driving the industry to reduce the time required to achieve high yield and high-quality production. Consequently, minimizing the overall time from identifying a yield problem to resolving it is crucial for semiconductor manufacturers to determine their return on investment.

[0004] Semiconductor wafers can consist of thin layers (films), such as oxides or nitrides, ranging in thickness from less than 1 nm to several micrometers. On a wafer, the thin layer can be located on the front face (which may contain additional layers or semiconductor devices), on the back face opposite the front face, or at an edge between the front and back faces. Chemical vapor deposition (CVD), physical vapor deposition (PVD), atomic layer deposition (ALD), and epitaxy are four techniques that can be used to form such a thin layer. Other techniques are also possible.

[0005] The thickness of these thin films can affect the performance of the devices or their yield. Semiconductor manufacturers typically want to inspect or measure the thin film and, in particular, determine its thickness and properties. However, determining the thickness and, for example, the optical properties can be difficult. This is especially true for thin films located on the edge or back face of a semiconductor wafer. Currently, there is no method to perform metrology on the back face of a wafer. This is particularly relevant when the front face is structured and cannot be placed on a wafer chuck. There is also no method that provides "metrology of all wafer surfaces" or ensures metrology on all surfaces of the wafer.In particular, no existing technique can provide metrology of a layer of a back surface in a manufacturing environment. Therefore, improved hardware techniques for metrology are needed.

[0006] JP 2015 - 141 176 A, JP 2012 - 251 816 A, US 5 293 214 A, US 2004 / 0 012 775 A1 concern further systems and methods for measuring wafer layer thicknesses. Brief description of the disclosed invention

[0007] A system according to the present invention comprises all the features of claim 1.

[0008] In a first embodiment, a system is provided. The system comprises a table configured to hold a wafer; at least one light source configured to direct at least one beam onto a front face, a rear face opposite the front face, and an edge formed between the front and rear faces of the wafer on the table; at least three detectors configured to receive the beam reflected from the front face, the rear face, and the edge; and a controller electronically and communicatively connected to the sensors. The controller is configured to perform metrology on the front face, the rear face, and the edge. The system may include three light sources. The light source may include at least one colored light-emitting diode.The control system can be configured to perform metrology based on the inspection results determined by the detectors.

[0009] The controller includes a processor, which is programmed to determine the layer thickness on the back face of the wafer by measuring the ratio of a grayscale image of the bright-field light emanating from the back face to that of a reference wafer, using a hardware model, a first layer stack model, and a second layer stack model. The hardware model comprises hardware parameters of a system. The first layer stack model corresponds to the reference wafer. The second layer stack model corresponds to the wafer.

[0010] A method according to the present invention comprises all the features of claim 7.

[0011] A method according to a second embodiment comprises calibrating a metrology system for metrology of a front face of a wafer, a back face of the wafer opposite the front face, and an edge located between the front and back faces of the wafer. Metrology is performed on the front face, the back face opposite the front face, and the edge located between the front and back faces of the wafer using the metrology system. The wafer can be illuminated with three light sources, such that one of the light sources is used for the front face, one for the back face, and one for the edge. The light can be received from the front face, the back face, and the edge using three detectors.Metrology can be performed using inspection results from the front surface, the back surface, and the edge.

[0012] In a third embodiment, a method is also provided.The method comprises providing a hardware model that includes hardware parameters of a system; providing at least one first layer stack model and one second layer stack model; illuminating the wafer with the layer on its back face; detecting a grayscale image of bright-field light emanating from the back face of the wafer with the layer using a sensor; forwarding (communicating) the grayscale image to a processor; and determining, using the processor, a thickness of the layer on the back face of the wafer by fitting a measured ratio of the grayscale image of the bright-field light emanating from the back face of the wafer, using the hardware model, to a simulated ratio of the grayscale image using the first layer stack model and the second layer stack model.The first layer stack model corresponds to a reference wafer, and the second layer stack model corresponds to a wafer with a single layer on a back face. The hardware parameters can include at least an angle of incidence, wavelengths of light, and / or parameters of a conditioning element that sets a polarization.

[0013] The system can be calibrated using a blank wafer or a wafer carrying a layer of known thickness.

[0014] The bright-field light can include light from a red light-emitting diode, a green light-emitting diode, and a blue light-emitting diode. The bright-field light can include light from one or more diode lasers.

[0015] The optical properties of the layer can be determined using the processor.

[0016] The layer material and optical properties of the layer can be known before determination. Description of the drawings

[0017] For a better understanding of the nature and tasks of the revelation of the description, reference should be made to the following detailed description in conjunction with the attached drawings, in which: Fig. 1 is a flowchart illustrating an embodiment of a method according to the present disclosure; Fig. 2 a series of example images of a grayscale ratio from a rear surface of an etched wafer from the perspective of the This is, which contains the data of the red, green and blue channels; Fig. 3 a series of example images of a grayscale ratio from a rear surface of an etched wafer from the viewpoint of the data, where the data includes red, green and blue channels; Fig. 4 is an example image of the thickness of the layer on the back surface of an etched wafer with an applied layer, calculated using an embodiment of the present disclosure from a greyscale ratio of red, green and blue channels, in top view of the wafer; Fig. 5 is an example image of the thickness of the layer on the back surface of an etched wafer with an applied layer in the die view, calculated using an embodiment of the present disclosure from a grayscale ratio of red, green and blue channels; Fig. 6 is a flowchart illustrating a second embodiment of a method according to the present disclosure; Fig. 7 is a block diagram of a system according to the present disclosure; Fig. 8 is a flowchart illustrating an embodiment of a layer stack model according to the present disclosure, wherein the data are shown in grey boxes and features of the algorithm are shown in white boxes; and Fig. 9 is a block diagram of another system according to the present disclosure. Detailed description of the revelation

[0018] The metrology hardware disclosed herein can be used to measure the thickness of thin layers on all surfaces of wafers. These surfaces include the front face, the bevel, the edge curvature, and the back face of a wafer. While the edge curvature and back face of the wafer are typically unpatterned (unstructured), the layer thickness on the front face and the top edge curvature can be patterned (structured) or unpatterned (unstructured).

[0019] High-density metrology across all surfaces is gaining increasing importance in the semiconductor industry. The thickness of a silicon-on-insulator (SOL) layer stack on the front face of a bare wafer is a critical dimension. A thickness variation of 5 angstroms can cause instrument time variations of up to 15%. Consequently, thicknesses must be measured at all spatial frequencies. The remaining thickness at the front face during chemical-mechanical polishing (CMP) is a critical parameter for device performance and product yield. Edge thickness is also gaining importance for understanding and improving edge yield, particularly in lithography steps.Furthermore, layers built up on the back face of a wafer can affect wafer yield, as these layers can influence the etch rate in plasma chambers, or they may not behave appropriately when the wafer is mounted on an electrostatic chuck, such as an ESD chuck. In another case, a layer on the back face of a wafer can lead to contamination due to particle generation during wafer handling.

[0020] In a first embodiment, the thicknesses of thin layers on the back surface of a wafer are measured. Fig. Figure 1 is a flowchart illustrating an embodiment of this method. A hardware model, which includes hardware parameters of a system, is provided. The hardware model can contain parameters that describe the properties of the hardware, such as the angle of incidence (AOI), the wavelengths of the light source illuminating the sample, parameters of the polarization-setting conditioning elements, etc. The following steps can be performed to create the hardware model. First, a mathematical model can be created to describe the system, in which the system parameters (e.g., AOI) are introduced. Second, these parameters can be determined by a calibration procedure. This calibration procedure can be carried out by passing known samples through the system to find the value of the system parameters (e.g., AOI). Third, measurements are performed.Gray level data is acquired from the samples to be measured, and a system model (which may include stored parameters) is applied to determine the sample parameters (e.g., layer thickness). The system parameters can be stored in the system computer after calibration and, if needed, read into the system model to calculate sample parameters. This hardware model can be used during a calibration process, such as calibration 200. Fig. 6, will be provided.

[0021] Reference will again be made to Fig. 1. At least one first layer stack model and one second layer stack model are provided. 101. The first layer stack model corresponds to a reference wafer, and the second layer stack model corresponds to a wafer with a layer on a back face to be determined or analyzed. For example, one of the layer stack models corresponds to a known reference wafer, such as a bare silicon wafer, or a wafer having a thin layer of known thickness. The second layer stack model corresponds to the wafer to be investigated. The layer stack models include parameters used to calculate the thicknesses of the layers and the optical properties of the layers and the substrate.The formulas that convert model parameters and physical sample properties, such as thickness or optical characteristics, are user-definable mathematical expressions that can be a linear function or a complex nonlinear relationship. Fig. Figure 8 shows an example of the process flow for the layer stack models. Although Fig. While 8 refers to an SOI wafer, the technique can also be used with other layers or wafer types.

[0022] Reference will again be made to Fig. 1. The wafer is illuminated. 102. Using a sensor, a grayscale image of a bright-field light emanating from the back face of the wafer is detected. 103. Any surface of a wafer can be measured. The area to be measured is illuminated, and reflected data is recorded as grayscale data. The wafer can be mounted on the front face, the edge, or the back face, depending on the measurement. The hardware configuration may include features of US patent US 7,782,452 B2. The grayscale image can be communicated to a processor. 104.

[0023] Using the processor, the thickness of the layer on the back face of the wafer is determined by measuring the ratio of the grayscale image of the bright-field light emanating from the back face of the wafer to be measured, using a second layer stack model, to the grayscale of a known wafer using the first layer stack model and the hardware model, the first layer stack model, and the second layer stack model. The ratio can be a digitized grayscale value.

[0024] Examples of grayscale ratios can be found in the Fig. 2 and Fig. 3 can be taken from this. Examples of calculated layer thicknesses are in Fig. 4 and Fig. 5 shown. Fig. 3 includes a small section of the Fig. 2, and Fig. 5 is an excerpt from Fig. 4. The ratio is the grayscale value on a pixel-by-pixel basis of the unknown sample to a known sample for three different illumination colors. The thickness in the Fig. 4 and Fig. 5 is an exemplary oxide layer on the top surface of silicon, and Fig. 4 and Fig. Figure 5 shows the calculated example thickness of the oxide layer.

[0025] An algorithm can be used to analyze the ratio signal to extract parameters of thin films, such as their thickness and / or optical properties. For example, the algorithm can continuously adjust the thickness of an unknown sample to find the best match between the simulated ratio signal and a measured ratio. In this example, the optical properties or the material of the thin film may be known.

[0026] The relative grayscale values ​​of the bright-field light emitted from the back face of a wafer are measured to determine the thickness of thin films. For example, this could be the ratio of grayscale values ​​from back faces of one or more wafers under investigation relative to a known wafer, such as a polished back face of a bare silicon wafer. The measurement of the two signals can be performed using the same hardware, such as a BSI module manufactured by KLA-Tencor Corporation of Milpitas, California. The ratio can be measured using any combination of wavelengths with a specific formula, such as red, green, and blue LED emitters.

[0027] A calibration process can be used to determine the parameters of the hardware model. The calibration process includes both on-tool and offline steps. The offline process can be performed at the component level, such as measuring the LED wavelengths with the tool's spectrometer. The on-tool calibration process is performed after the module is assembled. A typical procedure might involve measuring one or more known samples (using the reference tool or by a certified provider). Part of the algorithm may involve converting the calibration results into hardware model parameters. The hardware parameters are typically independent of the sample being measured.Therefore, no new calibration procedures are required when the system is used for a new type of application (for example, with a different layer stack).

[0028] A data extraction algorithm can be used to analyze the measured grayscale ratio of the wafer under investigation and output the desired parameters (related to the thickness and / or optical properties) of the layer, using the hardware model and calibration parameters mentioned herein. In one example, the optical properties can be determined if the layer thickness is known. In another example, the layer thickness can be determined if the optical properties are known. It can be difficult to determine more than three unknown parameters (for example, thickness or optical properties) with a single measurement. The optical property could be the refractive index, the absorption coefficient, or another property.

[0029] Fig. Figure 6 is a flowchart of a second embodiment of this method. In this embodiment, the configurable hardware provides metrology capabilities for any combination of the front, edge, and back faces of a wafer. The platform can be configured to provide inspection and metrology for all surfaces, with optional configuration enabling any desired combination of surfaces on the front, edge, and back faces of a wafer. In particular, inspection and metrology of the back face can be performed.

[0030] The inspection system is modified to enable simultaneous inspection and metrology of all surfaces and / or simultaneous metrology and inspection of the back surface. For example, one or more colored LEDs can be added to the system to cover a larger application area. The design specification of one or more modules can be configured to improve measurement performance, such as the light source and / or detector stability, and to reduce noise levels.

[0031] In the embodiment of the Fig. 6. The inspection system for metrology of the front, back, and edge surfaces has been calibrated. 200. Metrology is then performed on the front, back, and edge surfaces using a simultaneous metrology and inspection system. The system can include independent models, including one for front surface inspection, one for edge inspection, and another for back surface inspection. The inspection data can be reused for metrology purposes. Because the three modules are independent, the system can be configured to include any combination of the three modules to cover any combination of applications on the front, edge, and back surfaces.

[0032] The system, which enables simultaneous metrology and inspection of all surfaces, can be operated similarly to current inspection and review systems, although additional surfaces need to be inspected. For example, the metrology or inspection can be performed using techniques or components as taught in US Patents US 8,422,010 B2 or US Patents US 8,611,639 B2. In one example, the metrology is based on inspection results. Additional calibration procedures, as described in the Fig. The steps shown in point 1 can also be carried out.

[0033] The manipulated image data can vary. For inspection purposes, data can be processed strip by strip when using only one color. In metrospection mode, multi-colored images may be required to calculate the final parameters of the layer. The data buffer may be necessary to hold the middle images before data acquisition with all colors is complete.

[0034] A system may include the algorithms disclosed herein and may also provide a representation of the measurement results.

[0035] The embodiments described here can comprise a system or can be implemented by a system. One embodiment of such a system is described in Fig. Figure 7 shows that the system includes an output acquisition subsystem (output acquisition subsystem) comprising at least one energy source and one detector. The energy source is configured to generate energy directed at a wafer. The detector is configured to detect energy from the wafer and to generate an output in response to the detected energy.

[0036] In one embodiment, the energy directed at the wafer includes light, and the energy detected by the wafer includes light. For example, in the Fig. Figure 7 of the embodiment of the system discloses an output acquisition subsystem 310, which includes an illumination subsystem configured to direct light onto the wafer 314. The illumination subsystem includes at least one light source. For example, as shown in Fig. As shown in Figure 7, the lighting subsystem comprises a light source 316. In one embodiment, the lighting subsystem is configured to direct the light onto the wafer 314 at one or more angles of incidence, which may include one or more oblique angles and / or one or more perpendicular angles. For example, as ... Fig. As shown in Figure 7, light from the light source 316 is directed through an optical element 318 and then through a lens 320 onto a beam splitter 321, which directs the light onto the wafer 314 at a perpendicular angle of incidence. The angle of incidence can be any suitable angle, which can vary, for example, depending on the properties of the wafer.

[0037] As used herein, the term "wafer" generally refers to substrates formed from a semiconductor or non-semiconductor material. Examples of such semiconductor or non-semiconductor materials include, but are not limited to, monocrystalline silicon, gallium nitride, gallium arsenide, indium phosphide, sapphire, and glass. Such substrates can commonly be found and / or processed in semiconductor manufacturing facilities.

[0038] A wafer can comprise one or more layers formed on a substrate. For example, such layers can include, but are not limited to, photoresist, dielectric, conductive, and semiconducting materials. Many different types of such layers are known from the prior art, and the term wafer, as used herein, is intended to encompass a wafer comprising all such types of layers.

[0039] One or more layers formed on a wafer can be structured (patterned) or unstructured (unpatterned). For example, a wafer can comprise a multitude of dies, each exhibiting repeatable structured features or periodic structures. The formation and processing of such material layers can ultimately lead to finished devices. Many different types of devices can be formed on a wafer, and the term "wafer," as used herein, is intended to encompass any wafer on which any type of device known from the prior art is fabricated.

[0040] While the system shows a light source 316 and detectors 328, 334 using light reflected from the front surface of wafer 314, additional light sources and / or detectors can be used with light reflected from the edge and back surfaces. Thus, three sets of detectors can be present in the system with at least one light source. For example, there can be three sets of light sources and detectors in the system. Fig. Figure 9 shows an exemplary system with a wafer 314 held on a platform 322 and three modules 401, 402, 403. Each module 401, 402, 403 can include a light source and a detector, such as those described in relation to Fig. As described in section 1, module 401 illuminates a front surface of wafer 314 and detects light from that front surface. Module 402 illuminates an edge of wafer 314 and detects light from that edge. Module 403 illuminates a back surface of wafer 314 and detects light from that back surface. Each of modules 401, 402, and 403 can communicate with a controller.

[0041] Reference will again be made to Fig. 7. The illumination subsystem can be configured to direct the light onto the wafer at different times and at different angles of incidence. For example, the output acquisition subsystem can be configured to change or modify one or more properties of one or more elements of the illumination subsystem so that the light is directed at an angle of incidence that differs from the one in Fig. The angle of incidence shown in Figure 7 differs, allowing the light to be directed onto the wafer. In such an example, the output acquisition subsystem can be configured to move the light source 316, the optical element 318, and the lens 320 so that the light is directed onto the wafer 314 at a different angle of incidence.

[0042] In some cases, the output acquisition subsystem can be configured to direct light to the wafer at more than one angle of incidence simultaneously. For example, the illumination subsystem can include more than one illumination channel. One of the illumination channels can include the light source 316, the optical element 318, and the lens 320, as shown in Fig. Figure 7 shows the lighting channels, and another of the lighting channels (not shown) may include similar elements that may be configured differently or identically, or may include at least one light source and possibly one or more other components, such as those described further herein. If such light is directed onto the wafer simultaneously with the other light, one or more properties (for example, wavelength, polarization, etc.) of the light directed onto the wafer at different angles of incidence may differ, so that light resulting from the illumination of the wafer at the different angles of incidence can be distinguished from one another at the detector(s).

[0043] In another case, the lighting subsystem may only have one light source (for example, the one in Fig. (Source 316, shown in Figure 7), and light from the light source can be separated into different optical paths (for example, based on wavelength, polarization, etc.) by one or more optical elements (not shown) of the illumination subsystem. Light can then be directed onto the wafer in each of the different optical paths. Multiple illumination channels can be configured to direct light onto the wafer at the same time or at different times (for example, when different illumination channels are used to illuminate the wafer sequentially). In another example, the same illumination channel can be configured to direct light onto the wafer at different times with different properties.For example, in some cases the optical element 318 can be configured as a spectral filter, and the properties of the spectral filter can be modified in a variety of different ways (for example, by exchanging the spectral filter) such that different wavelengths of light are directed onto the wafer at different times. The illumination subsystem can have any other suitable configuration known from the prior art to direct light with different or the same properties onto the wafer sequentially or simultaneously at different or the same angles of incidence.

[0044] In one embodiment, the light source 316 can comprise a broadband plasma (BBP) light source. In this way, the light generated by the light source and directed onto the wafer can contain broadband light. However, the light source can also comprise any other suitable light source, such as a laser. The laser can comprise any suitable laser known from the prior art and can be configured to generate light at any suitable wavelength or wavelengths known from the prior art. In addition, the laser can be configured to generate light that is monochromatic or nearly monochromatic. In this way, the laser can be a narrowband laser. The light source can also comprise a polychromatic light source that generates light at several discrete wavelengths or wavebands.The light source 316 can be a broad-spectrum source, such as a white light source, or a narrower-spectrum source, such as a red, blue, or green light source. More than one light source can be used, allowing the system to advantageously utilize images with different modalities.

[0045] Light from the optical element 318 can be focused by the lens 320 onto the beam splitter 321. Although the lens 320 is in Fig. Figure 7 shows a single refractive optical element, but it should be understood that in practice, lens 320 can comprise a number of refractive and / or reflective optical elements which, in combination, focus the light from the optical element onto the wafer. This is shown in Figure 7. Fig. The illumination subsystem shown and described herein may include any other suitable optical elements (not shown). Examples of such optical elements include, but are not limited to, one or more polarizing components, one or more spectral filters, one or more spatial filters, one or more reflective optical elements, one or more apodizers, one or more beam splitters, one or more apertures, and the like, which may include any such suitable optical elements known from the prior art. Additionally, the system may be configured to modify or change one or more of the elements of the illumination subsystem based on the type of illumination to be used for output acquisition.

[0046] The output acquisition subsystem can also include a scanning subsystem configured to cause the light to scan across the wafer. For example, the output acquisition subsystem can include a table 322 on which the wafer 314 is positioned during output acquisition. The scanning subsystem can include any suitable mechanical and / or robotic arrangement (including the table 322) configured to move the wafer 314 so that it can be scanned with the light. Additionally or alternatively, the output acquisition subsystem can be configured to have one or more optical elements of the output acquisition subsystem perform scanning across the wafer 314 with the light. The light can be guided across the wafer for scanning in any suitable manner.

[0047] The output acquisition subsystem further comprises one or more detection channels. At least one of the one or more detection channels comprises a detector configured to detect light from wafer 314 due to illumination of wafer 314 by the output acquisition subsystem and to generate an output in response to the detected light. For example, the one in Fig. Figure 7 shows an output acquisition subsystem with two detection channels, one of which is formed by a collector 324, an element 326 and the detector 328, and the other detection channel is formed by a collector 330, an element 332 and the detector 334. As shown in Fig. As shown in Figure 7, the two detection channels are configured to collect and detect light at different collecting angles. In some cases, one detection channel is configured to detect specularly reflected light, and the other detection channel is configured to detect light that is not specularly reflected (e.g., scattered, diffracted, etc.) from the wafer. However, two or more of the detection channels can be configured to detect the same type of light from the wafer (e.g., specularly reflected light). Fig. Figure 7 shows an embodiment of the output acquisition subsystem comprising two acquisition channels; however, the output acquisition subsystem may include a different number of acquisition channels (for example, only one acquisition channel or two or more acquisition channels). Although each of the collectors in Fig. Since 7 are shown as individual optical refractive elements, it is obvious that each of the collectors can comprise one or more refractive optical elements and / or one or more reflective optical elements.

[0048] The one or more detection channels can comprise any suitable detectors known from the prior art. For example, the detectors can include photomultiplier tubes (PMTs), CMOS devices, charge carrier-coupled devices (CCDs), and time-delay integration (TDI) cameras. The detectors can also comprise any other suitable detectors known from the prior art. The detectors can also be non-imaging detectors or imaging detectors. In one case, the detectors can be configured as imaging detectors, configured to generate image signals or image data. Therefore, the system can be configured to generate the images described herein in a different number of ways.

[0049] It should be noted that Fig. Section 7 is provided herein to generally illustrate a configuration of an output capture subsystem that may be included in the embodiments of the system described herein. The output capture subsystem configuration described herein may be altered or modified to optimize system performance, as is normally done when designing a commercial system. Additionally, the systems described herein may be implemented using an existing output capture system (for example, by adding the functionality described herein to an existing output capture system), such as tools commercially available from KLA-Tencor Corporation in Milpitas, California.For some such systems, the procedures described herein can be provided as optional functionality of the output capture system (for example, in addition to other functions of the output capture system). Alternatively, the system described herein can be designed to provide an entirely new system.

[0050] A controller 336 of the system can be coupled to the detectors of the output acquisition subsystem in any suitable manner (for example, via one or more transmission media, which may include wired and / or wireless transmission media) so that the controller 336 can receive the output generated by the detectors during the scanning of the wafer 314. The controller 336 can be configured to perform a number of functions using the output of the detectors, as described herein, and any other functions further described herein. This controller can also be configured as described herein.

[0051] If the system includes an additional computer subsystem, the various computer subsystems can be interconnected so that images, data, information, instructions, etc., can be transmitted between them, as further described herein. For example, the Controller 336 can be connected to one or more other computer subsystems (not shown) by any suitable transmission media, which may include any suitable wired and / or wireless transmission media known from the prior art. Two or more such computer subsystems can also be effectively interconnected by a common computer-readable storage medium (not shown).

[0052] The controller 336 can include a processor 306, a storage device 307 in electronic communication with the processor 306, and a communication port 308 in electronic communication with the processor 306. It should be noted that in practice, the controller 336 can be implemented with any combination of hardware, software, and firmware. For example, the communication port 308 can be a network port, such as an Ethernet port or a wireless Ethernet port. In one instance, the communication port 308 can be a serial interface to the output acquisition subsystem 310. Furthermore, its functions described herein can be performed by a single unit or distributed among various components, each of which can be implemented by any combination of hardware, software, and firmware.Program code or instructions for the Controller 336 to implement the various procedures and functions described herein may be stored in a controller-readable storage medium, such as memory, inside the Controller 336, outside the Controller 336, or combinations thereof.

[0053] The 336 controller can perform metrology or determine thin-film thickness and / or optical properties. For example, the 336 controller can perform the steps of the Fig. 1, Fig. 6 or Fig. 8. The controller 336 can also perform other steps or techniques disclosed herein.

[0054] The controller 336 can be coupled to the detectors in any suitable manner (for example, via one or more transmission media, which may include wired and / or wireless transmission media) so that the controller 336 can receive the output generated by the output acquisition subsystem 310. The controller 336 can be configured to perform a number of functions using the output from the detectors. The inspection or metrology of the wafer 303 can be performed by the controller 336 by applying a certain process control or compliance algorithm and / or procedure to the output generated by the detectors. For example, layer thickness or optical properties can be determined.

[0055] The controller 336, another system or systems, or another subsystem or subsystems described herein may take various forms, including a personal computer system, an image computer, a mainframe computer system, a workstation, a network device, an internet application, or other device. In general, the term "controller" or "control system" may be defined in its broadest sense to include any device with one or more processors that execute instructions from a storage medium. The subsystem or subsystems, or the system or systems, may also include any suitable processor known from the prior art, such as a parallel processor.Additionally, the subsystem(s) or system(s) may include a platform with high-speed processing and software, either as a standalone tool or as a networked tool.

[0056] If the system contains more than one subsystem, the various subsystems can be interconnected so that images, data, information, instructions, etc., can be transmitted between them. For example, a subsystem can be interconnected with one or more additional subsystems by any suitable transmission medium, which may include any suitable wired and / or wireless transmission medium known from the prior art. Two or more such subsystems can also be effectively interconnected by a common computer-readable storage medium (not shown).

[0057] An additional embodiment relates to a non-transitory, computer-readable medium that stores program instructions executable on a controller for performing a computer-implemented method for identifying anomalies on a wafer or for detecting conformity or non-conformity, as disclosed herein. In particular, as described in Fig. As shown in Figure 7, the storage device 307 or other storage medium can contain a non-transitory, computer-readable medium containing program instructions that are executable on the controller 336. The computer-implemented method can comprise one or more of any steps described herein.

[0058] Program instructions implementing methods such as those described herein may be stored on a computer-readable medium, such as the storage device 307 or another storage medium. The computer-readable medium may be a storage medium such as a magnetic or optical disk, a magnetic tape, or any other suitable non-volatile computer-readable medium known from the prior art.

[0059] The program instructions can be implemented in any number of different ways, including, but not limited to, procedure-based, component-based, and / or object-oriented techniques. For example, the program instructions can be implemented using ActiveX controls, C++ objects, JavaBeans, Microsoft Foundation Classes (“MFC”), SSE (Streaming SIMD Extension), or other technologies or methodologies as desired.

[0060] The controller 336 can be configured according to any of the embodiments described herein. In one example, the processor 306 is programmed to execute each of the procedures described herein.

Claims

[1] System encompassing: a table (322) designed to hold a wafer (314); at least one light source (316) configured to direct at least one beam onto a front face, a rear face opposite the front face and an edge between the front face and the rear face of the wafer (314) located on the table (322); at least three detectors (328, 334) configured to receive the at least one beam reflected from the front face, the rear face and the edge and to generate image data; and a controller (336) that is electronically and communicatively connected to the at least three detectors (328, 334), wherein the controller (336) is configured to perform metrology on the front surface, the back surface and the edge using the image data, wherein the controller (336) comprises a processor (306) that is programmed to determine a layer thickness on the back surface of the wafer (314) by measuring a ratio of a grayscale image of the bright-field light emanating from the back surface of the wafer (314) and that of a reference wafer, using a hardware model, a first layer stack model and a second layer stack model, wherein the hardware model is mathematically expressed, comprises hardware parameters of a system and was created from grayscale data of measured samples,wherein the hardware parameters include an angle of incidence and / or wavelengths of the light and / or parameters of a conditioning element that sets a polarization, wherein the first layer stack model is mathematically expressed and corresponds to the reference wafer, and wherein the second layer stack model is mathematically expressed and corresponds to wafer (314), and wherein the first layer stack model and the second layer stack model include parameters that are used to calculate the thickness of the layer and the optical properties of the layer and wafer (314). [2] System according to claim 1, wherein the system comprises three light sources (316). [3] System according to claim 1, wherein the light source (316) comprises at least one colored light-emitting diode. [4] System according to claim 1, wherein the control (336) is configured to perform metrology based on inspection results determined by the at least three detectors (328, 334). [5] System according to claim 1, wherein each of the at least three detectors (328, 334) is a photomultiplier tube, a CMOS device, a CCD or a TDI camera. [6] System according to claim 1, wherein the control (336) is further configured to perform an inspection of the wafer (314) using the image data, wherein the inspection is performed simultaneously with the metrology. [7] Procedure encompassing: Providing a hardware model (100) that is mathematically expressed, includes hardware parameters of a system and was created from grayscale data of measured samples, wherein the hardware parameters include an angle of incidence and / or wavelengths of the light and / or parameters of a conditioning element that sets a polarization; Providing at least one first layer stack model and one second layer stack model (101), wherein the first layer stack model is mathematically expressed and corresponds to a reference wafer and the second layer stack model is mathematically expressed and corresponds to a wafer (314) with a layer on a back face, wherein the first layer stack model and the second layer stack model include parameters that are used to calculate the thickness of the layer and the optical properties of the layer and wafer (314); Illuminating the wafer (314) (102) with the layer on the back surface; Detecting a grayscale image of a brightfield light emanating from the rear surface of the wafer (314) with the layer (103) using a sensor; Communicating the grayscale image to a processor (306) (104); and Determine, using the processor (306), a thickness of the layer on the back face of the wafer (314) (105) by fitting a measured ratio of the grayscale image of the brightfield light emanating from the back face of the wafer (314) using the hardware model to a simulated ratio of the grayscale image using the first layer stack model and the second layer stack model. [8] Method according to claim 7, further comprising calibrating the system using a blank wafer (314). [9] Method according to claim 7, further comprising calibrating the system using a wafer (314) which carries a layer of a known thickness. [10] Method according to claim 7, wherein the bright-field light comprises light from a red light-emitting diode, a green light-emitting diode and a blue light-emitting diode. [11] Method according to claim 7, wherein the bright-field light comprises light from one or more diode lasers. [12] Method according to claim 7, further comprising determining optical properties of the layer using the processor (306). [13] Method according to claim 7, wherein a layer material and optical properties of the layer are known prior to determination. [14] Method according to claim 7, further comprising inspecting the wafer (314) using the processor (306) and simultaneously determining the thickness of the layer on the back surface of the wafer (314). [15] Method according to claim 7, further comprising performing metrology on the back surface, a front surface and an edge between the front surface and the back surface of the wafer (314). [16] Method according to claim 7, wherein the illumination (314) comprises directing a beam onto the rear surface, a front surface opposite the rear surface and onto an edge between the front surface and the rear surface of the wafer (314).

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