Semiconductor device and manufacturing process for a semiconductor device

Abstract

Semiconductor device comprising: a first conductor (203a); a second conductor (203b) above and in direct contact with the first conductor (203a); a third conductor (205); a first insulator (224) covering the second conductor (203b) and the third conductor (205); a first metal oxide (230a) above and in contact with a top surface of the first insulator (224); and a second metal oxide (230b) above the first metal oxide (230a), wherein an opening is provided in the first metal oxide (230a) and the first insulator (224), wherein the second metal oxide (230b) is provided in the opening, wherein the second metal oxide (230b) is electrically connected to the first conductor (203a) via the opening, wherein the third conductor (205) is configured to serve as the gate electrode of a transistor (200), wherein the third conductor (205) overlaps with the first metal oxide (230a) and the second metal oxide (230b) and does not overlap with the opening, and wherein the second metal oxide (230b) has a sub-region (231b) configured to serve as a first electrode of a capacitor (100) and overlapping the opening, wherein this sub-region (231b) does not overlap with the third conductor (205).

Description

Technical field

[0001] One embodiment of the present invention relates to a semiconductor device and a manufacturing method for a semiconductor device. Another embodiment of the present invention relates to a semiconductor wafer, a module, and an electronic device.

[0002] It should be noted that in this description and the like, a semiconductor device generally refers to a device that can operate by utilizing semiconductor properties. A semiconductor element, such as a transistor, a semiconductor circuit, an arithmetic device, and a storage device are each embodiments of a semiconductor device. In some cases, a display device (e.g., a liquid crystal display device and a light-emitting display device), a projection device, a lighting device, an electro-optical device, an energy storage device, a memory device, a semiconductor circuit, an imaging device, an electronic device, and the like may include a semiconductor device.

[0003] It should be noted that one embodiment of the present invention is not limited to the aforementioned technical field. One embodiment of the invention disclosed in this description and the like relates to an object, a process, or a manufacturing process. Another embodiment of the present invention relates to a process, a machine, a product, or a composition (composition of a material). State of the art

[0004] Integrated circuits (ICs) using semiconductor components have been developed. A CPU and memory have been designed and manufactured using LSI or ultra-LSI technology, which incorporates a more highly integrated IC. Such an IC has been mounted on a printed circuit board (PCB) and is used as a component in various electronic devices, including computers, information terminals, displays, vehicles, and the like. Furthermore, an artificial intelligence (AI) system using these ICs has been investigated.

[0005] Computers and information terminals include desktop computers, laptop computers, tablet computers, smartphones, mobile phones and the like.

[0006] A silicon-based semiconductor material is widely known as a semiconductor material used for semiconductor devices. Another material that has attracted attention is an oxide semiconductor.

[0007] It is known that a transistor using an oxide semiconductor exhibits a very low leakage current in a non-conducting state. For example, a low-power CPU is disclosed in which the low leakage current property of the transistor using an oxide semiconductor is utilized (see patent document 1).

[0008] Furthermore, in recent years there has been an increased demand for higher-density integrated circuits, resulting in smaller sizes and lighter weights of electronic devices. Additionally, there has been a need to improve the productivity of semiconductor devices that incorporate integrated circuits.

[0009] Here, oxide semiconductors include not only single-component metal oxides, such as indium oxide or zinc oxide, but also multi-component metal oxides. Among the multi-component metal oxides, In-Ga-Zn oxide (hereinafter also referred to as IGZO) has been particularly intensively studied.

[0010] Investigations of IGZO have revealed a c-axis aligned crystalline structure (CAAC structure) and a nanocrystalline (nc) structure in the oxide semiconductor, neither of which are single crystals nor amorphous (see Nonpatent Documents 1 to 3). Nonpatent Documents 1 and 2 disclose a technique for constructing a transistor using an oxide semiconductor with a CAAC structure. Furthermore, Nonpatent Documents 4 and 5 disclose that even an oxide semiconductor with lower crystallinity than those of the CAAC and nc structures exhibits a fine crystal.

[0011] Furthermore, a transistor incorporating IGZO as the active layer exhibits a very low reverse current (see Nonpatent Document 6), and an LSI and an indicator utilizing these properties have been reported (see Nonpatent Documents 7 and 8). Document US 2016 / 0233343A1 discloses a transistor comprising a first electrode, a second electrode, a third electrode, an oxide semiconductor layer, a first insulating layer, and a second insulating layer. The transistor includes a first region and a second region surrounded by the first region. In the first region, the first insulating layer, the second electrode, the oxide semiconductor layer, and the second insulating layer are stacked one above the other. In the second region, the first electrode, the oxide semiconductor layer, the second insulating layer, and the third electrode are stacked.Document US 2017 / 0012138A1 further discloses a semiconductor device comprising a transistor, a first electrode over a substrate, a first insulating layer adjacent to a side face of the first electrode, and a second insulating layer covering the first insulating layer and in contact with at least a portion of the surface of the first electrode. The surface of the first electrode is made of a conductive material that does not readily allow impurities to pass through. The second insulating layer is made of an insulating material that does not readily allow impurities to pass through. An oxide semiconductor layer with an intervening third insulating layer is formed over the first electrode. [References][Patent document]

[0012] [Patent Document 1] Japanese Patent Publication JP 2012 - 257 187 A [Non-patent documents] [Nichtpatentdokument 1] S. Yamazaki et al., „SID Symposium Digest of Technical Papers“, 2012, Vol. 43, Ausgabe 1, SS. 183-186 [Nichtpatentdokument 2] S. Yamazaki et al., „Japanese Journal of Applied Physics“, 2014, Vol. 53, Nummer 4S, SS. 04ED18-1-04ED18-10 [Nichtpatentdokument 3] S. Ito et al., „The Proceedings of AM-FPD'13 Digest of Technical Papers“, 2013, SS. 151-154 [Nichtpatentdokument 4] S. Yamazaki et al., „ECS Journal of Solid State Science and Technology“, 2014, Vol. 3, Ausgabe 9, SS. Q3012-Q3022 [Nichtpatentdokument 5] S. Yamazaki, „ECS Transactions“, 2014, Vol. 64, Ausgabe 10, SS. 155-164 [Nichtpatentdokument 6] K. Kato et al., „Japanese Journal of Applied Physics“, 2012, Vol. 51, SS. 021201-1-021201-7 [Nichtpatentdokument 7] S. Matsuda et al., „2015 Symposium on VLSI Technology Digest of Technical Papers“, 2015, SS. T216-T217 [Non-patent document 8] S. Amano et al., “SID Symposium Digest of Technical Papers”, 2010, Vol. 41, Issue 1, pp. 626-629 Summary of the invention Problem to be solved by the invention

[0013] One object of an embodiment of the present invention is to provide a semiconductor device with advantageous electrical properties and a manufacturing method for it. One object of an embodiment of the present invention is to provide a highly reliable semiconductor device and a manufacturing method for it. One object of an embodiment of the present invention is to provide a semiconductor device that can be miniaturized or highly integrated and a manufacturing method for it. One object of an embodiment of the present invention is to provide a semiconductor device with high productivity and a manufacturing method for it.

[0014] One object of an embodiment of the present invention is to provide a semiconductor device with stable electrical properties and improved reliability, preventing fluctuations in electrical properties. Another object of an embodiment of the present invention is to provide a semiconductor device suitable for long-term data retention. A further object of an embodiment of the present invention is to provide a semiconductor device suitable for high-speed data writing. A further object of an embodiment of the present invention is to provide a novel semiconductor device.

[0015] One object of an embodiment of the present invention is to provide a semiconductor device with high design flexibility. Another object of an embodiment of the present invention is to provide a semiconductor device whose power consumption can be reduced.

[0016] One object of an embodiment of the present invention is to provide a semiconductor device whose manufacturing process is simplified, and a manufacturing method for it. A further object of an embodiment of the present invention is to provide a semiconductor device whose surface area is reduced, and a manufacturing method for it.

[0017] It should be noted that the description of these problems does not preclude the existence of further problems. It should also be noted that an embodiment of the present invention does not necessarily fulfill all of these problems. Furthermore, it should be noted that problems other than those listed may become apparent from the explanations of the description, the drawings, the claims, and the like, and that these other problems may be derived from the explanations of the description, the drawings, the claims, and the like. Means to solve the problem

[0018] At least one of the aforementioned problems is solved by the subject matter of the independent claims. Advantageous embodiments are specified in the dependent claims. One embodiment of the present invention is a semiconductor device comprising a first conductor, a second conductor above the first conductor, a first insulator covering the second conductor, a first oxide above the first insulator, and a second oxide above the first oxide, wherein an opening overlapping at least a portion of the first conductor is provided in the first oxide and the first insulator, and the second oxide is electrically connected to the first conductor via the opening.

[0019] In the above, an end section of the second oxide is preferably substantially aligned with an end section of the first oxide.

[0020] In the foregoing, the semiconductor device may further comprise a third conductor, a fourth conductor above the third conductor, a third oxide above the second oxide, a second insulator above the third oxide, and a fifth conductor above the second insulator. It is preferred that the fourth conductor is covered by the first insulator and that the fifth conductor overlaps the third and fourth conductors, with the first insulator, the first oxide, the second oxide, the third oxide, and the second insulator interposed.

[0021] In the above, the first conductor and the third conductor are preferably made of the same material, and the second conductor and the fourth conductor are preferably made of the same material.

[0022] In the above, the second conductor preferably contains a metal nitride.

[0023] In the above, the metal nitride is preferably titanium nitride or tantalum nitride.

[0024] One embodiment of the present invention is a manufacturing method for a semiconductor device in which a first conductive film is formed over an insulating surface, a second conductive film is formed over the first conductive film, the second conductive film and the first conductive film are structured to form a first conductor and a second conductor over the first conductor, a first insulating film is formed such that it covers the first conductor and the second conductor, the first insulating film is processed such that the second conductor is exposed, forming the first insulator, a second insulator is formed over the first insulator and the second conductor, a first oxide film is formed over the second insulator, and an opening, overlapping with at least a part of the first conductor, is formed in the first oxide film and the second insulator.a second oxide film is formed over the first oxide film, the second oxide film and the first oxide film are structured to form a first oxide and a second oxide over the first oxide, and the second oxide is electrically connected to the first conductor via the opening.

[0025] In the foregoing, it is preferred that the second conducting film and the first conducting film are structured to further form a third conductor and a fourth conductor above the third conductor, a third oxide film is formed above the second oxide, a second insulating film is formed above the third oxide film, a third conducting film is formed above the second insulating film, the third conducting film is structured to form a fifth conductor, the second insulating film is structured to form a third insulator, the third oxide film is structured to form a third oxide, and the fifth conductor overlaps with the third conductor and the fourth conductor, with the second insulator, the first oxide, the second oxide, the third oxide, and the third insulator lying between them.

[0026] In the above, the second conductive film preferably contains a metal nitride.

[0027] In the above, the metal nitride is preferably titanium nitride or tantalum nitride.

[0028] One embodiment of the present invention is a semiconductor device comprising a first conductor, a first insulator over the first conductor, a first oxide over the first insulator, a second oxide over the first oxide, a third oxide over the second oxide, a second insulator over the third oxide, a second conductor over the second insulator, a third insulator provided on a side face of the second insulator and a side face of the second conductor, and a fourth insulator provided on a side face of the third insulator, wherein an opening overlapping with a part of the first conductor is provided in the first oxide and the first insulator, and the second oxide is electrically connected to the first conductor via the opening.

[0029] In the above, a side face of the second oxide and a side face of the third oxide preferably lie on the same plane as a side face of the first oxide.

[0030] In the foregoing, an end section of the second oxide and an end section of the third oxide are preferably substantially aligned with an end section of the first oxide.

[0031] In the foregoing, the semiconductor device can further include a third conductor and a fourth oxide. It is preferred that the fourth oxide is provided between the third oxide and the second insulator, and that the third conductor overlaps with the second conductor, with the first insulator, the first oxide, the second oxide, the third oxide, the fourth oxide, and the second insulator lying between them.

[0032] In the above, the first conductor and the third conductor preferably contain the same material.

[0033] One embodiment of the present invention is a manufacturing method for a semiconductor device, in which a first insulating film is formed over a first conductor and a second conductor, a first oxide film is formed over the first insulating film, an opening overlapping with at least a part of the first conductor is formed in the first oxide film and the first insulating film, a second oxide film is formed over the first oxide film and the first conductor, a third oxide film is formed over the second oxide film, the third oxide film, the second oxide film and the first oxide film are structured to form a first oxide, a second oxide over the first oxide and a third oxide over the second oxide, a second insulating film is formed such that it covers the first oxide, the second oxide and the third oxide, and a first conductive film is formed over the second insulating film.The first conductive film and the second insulating film are structured to form a third conductor and a first insulator; a third insulating film is formed such that it covers the third conductor and the first insulator; a fourth insulating film is formed over the third insulating film; and the fourth insulating film and the third insulating film are processed by etching such that a second insulator is formed on a side surface of the third conductor and a side surface of the first insulator, and a third insulator is formed on a side surface of the second insulator.

[0034] In the above, the third conductor preferably overlaps with the second conductor, with the first insulating film, the first oxide, the second oxide, the third oxide and the first insulator lying between them. Effect of the invention

[0035] According to one embodiment of the present invention, a semiconductor device with advantageous electrical properties and a manufacturing method for it can be provided. According to one embodiment of the present invention, a highly reliable semiconductor device and a manufacturing method for it can be provided. According to one embodiment of the present invention, a semiconductor device that can be miniaturized or highly integrated and a manufacturing method for it can be provided. According to one embodiment of the present invention, a semiconductor device with high productivity and a manufacturing method for it can be provided.

[0036] According to one embodiment of the present invention, a semiconductor device with stable electrical properties and improved reliability can be provided, preventing fluctuations in electrical properties. Alternatively, a semiconductor device suitable for long-term data retention can be provided. Alternatively, a semiconductor device suitable for high-speed data writing can be provided. Alternatively, a novel semiconductor device can be provided.

[0037] According to one embodiment of the present invention, a semiconductor device with high design flexibility can be provided. Alternatively, a semiconductor device with reduced power consumption can be provided.

[0038] According to one embodiment of the present invention, a semiconductor device with a simplified manufacturing process and a manufacturing method for it can be provided. According to another embodiment of the present invention, a semiconductor device with a reduced surface area and a manufacturing method for it can be provided.

[0039] It should be noted that the description of these effects does not preclude the existence of further effects. It should be noted that an embodiment of the present invention does not necessarily exhibit all of these effects. It should be noted that effects other than these may become apparent from the explanations of the description, the drawings, the claims, and the like, and that other effects other than these may be derived from the explanations of the description, the drawings, the claims, and the like. Brief description of the drawings [ Fig. 1] A top view and cross-sectional views representing a semiconductor device of an embodiment of the present invention. [ Fig. 2] A cross-sectional view showing a semiconductor device of an embodiment of the present invention. [ Fig. 3] A top view and cross-sectional views representing a semiconductor device of an embodiment of the present invention. [ Fig. 4] A top view and cross-sectional views showing a semiconductor device of an embodiment of the present invention. [ Fig. 5] A top view and cross-sectional views illustrating a manufacturing process for a semiconductor device of an embodiment of the present invention. [ Fig. 6] A top view and cross-sectional views illustrating a manufacturing process for a semiconductor device of an embodiment of the present invention. [ Fig. 7] A top view and cross-sectional views illustrating a manufacturing process for a semiconductor device of an embodiment of the present invention. [ Fig. 8] A top view and cross-sectional views illustrating a manufacturing process for a semiconductor device of an embodiment of the present invention. [ Fig. 9] A top view and cross-sectional views illustrating a manufacturing process for a semiconductor device of an embodiment of the present invention. [ Fig. 10] A top view and cross-sectional views illustrating a manufacturing process for a semiconductor device of an embodiment of the present invention. [ Fig. 11] A top view and cross-sectional views illustrating a manufacturing process for a semiconductor device of an embodiment of the present invention. [ Fig. 12] A top view and cross-sectional views illustrating a manufacturing process for a semiconductor device of an embodiment of the present invention. [ Fig. 13] A top view and cross-sectional views illustrating a manufacturing process for a semiconductor device of an embodiment of the present invention. [ Fig. 14] A top view and cross-sectional views illustrating a manufacturing process for a semiconductor device of an embodiment of the present invention. [ Fig. 15] A top view and cross-sectional views illustrating a manufacturing process for a semiconductor device of an embodiment of the present invention. [ Fig. 16] A top view and cross-sectional views illustrating a manufacturing process for a semiconductor device of an embodiment of the present invention. [ Fig. 17] A top view and cross-sectional views illustrating a manufacturing process for a semiconductor device of an embodiment of the present invention. [ Fig. 18] A top view and cross-sectional views illustrating a manufacturing process for a semiconductor device of an embodiment of the present invention. [ Fig. 19] A top view and cross-sectional views illustrating a manufacturing process for a semiconductor device of an embodiment of the present invention. [ Fig. 20] A top view and cross-sectional views illustrating a manufacturing process for a semiconductor device of an embodiment of the present invention. [ Fig. 21] A top view and cross-sectional views illustrating a manufacturing process for a semiconductor device of an embodiment of the present invention. [ Fig. 22] A top view and cross-sectional views illustrating a manufacturing process for a semiconductor device of an embodiment of the present invention. [ Fig. 23] A top view and cross-sectional views of a semiconductor device of an embodiment of the present invention. [ Fig. 24] A cross-sectional view of a semiconductor device of an embodiment of the present invention. [ Fig. 25] A top view and cross-sectional views of a semiconductor device of an embodiment of the present invention. [ Fig. 26] A top view and cross-sectional views of a semiconductor device of an embodiment of the present invention. [ Fig. 27] A circuit diagram of a semiconductor device of an embodiment of the present invention. [ Fig. 28] A circuit diagram and a cross-sectional view of a semiconductor device of an embodiment of the present invention. [ Fig. 29] A cross-sectional view of a semiconductor device of an embodiment of the present invention. [ Fig. 30] A top view and cross-sectional views illustrating a manufacturing process for a semiconductor device of an embodiment of the present invention. [ Fig. 31] A top view and cross-sectional views illustrating a manufacturing process for a semiconductor device of an embodiment of the present invention. [ Fig. 32] A top view and cross-sectional views illustrating a manufacturing process for a semiconductor device of an embodiment of the present invention. [ Fig. 33] A top view and cross-sectional views illustrating a manufacturing process for a semiconductor device of an embodiment of the present invention. [ Fig. 34] A top view and cross-sectional views illustrating a manufacturing process for a semiconductor device of an embodiment of the present invention. [ Fig. 35] A top view and cross-sectional views illustrating a manufacturing process for a semiconductor device of an embodiment of the present invention. [ Fig. 36] A top view and cross-sectional views illustrating a manufacturing process for a semiconductor device of an embodiment of the present invention. [ Fig. 37] A top view and cross-sectional views illustrating a manufacturing process for a semiconductor device of an embodiment of the present invention. [ Fig. 38] A top view and cross-sectional views illustrating a manufacturing process for a semiconductor device of an embodiment of the present invention. [ Fig. 39] A top view and cross-sectional views illustrating a manufacturing process for a semiconductor device of an embodiment of the present invention. [ Fig. 40] A top view and cross-sectional views illustrating a manufacturing process for a semiconductor device of an embodiment of the present invention. [ Fig. 41] A top view and cross-sectional views illustrating a manufacturing process for a semiconductor device of an embodiment of the present invention. [ Fig. 42] A top view and cross-sectional views illustrating a manufacturing process for a semiconductor device of an embodiment of the present invention. [ Fig. 43] A top view and cross-sectional views illustrating a manufacturing process for a semiconductor device of an embodiment of the present invention. [ Fig. 44] A top view and cross-sectional views illustrating a manufacturing process for a semiconductor device of an embodiment of the present invention. [ Fig. 45] A top view and cross-sectional views illustrating a manufacturing process for a semiconductor device of an embodiment of the present invention. [ Fig. 46] A top view and cross-sectional views illustrating a manufacturing process for a semiconductor device of an embodiment of the present invention. [ Fig. 47] A top view and cross-sectional views illustrating a manufacturing process for a semiconductor device of an embodiment of the present invention. [ Fig. 48] A top view and cross-sectional views illustrating a manufacturing process for a semiconductor device of an embodiment of the present invention. [ Fig. 49] A top view and cross-sectional views illustrating a manufacturing process for a semiconductor device of an embodiment of the present invention. [ Fig. 50] A top view and cross-sectional views illustrating a manufacturing process for a semiconductor device of an embodiment of the present invention. [ Fig. 51] A cross-sectional view showing the structure of a storage device of an embodiment of the present invention. [ Fig. 52] A cross-sectional view showing the structure of a storage device of an embodiment of the present invention. [ Fig. 53] Cross-sectional views showing the structure of a storage device of an embodiment of the present invention. [ Fig. 54] A cross-sectional view showing the structure of a storage device of an embodiment of the present invention. [ Fig. 55] A cross-sectional view showing the structure of a storage device of an embodiment of the present invention. [ Fig. 56] A circuit diagram showing a configuration of a storage device of an embodiment of the present invention. [ Fig. 57] A block diagram illustrating a structural example of a storage device of an embodiment of the present invention. [ Fig. 58] Circuit diagrams illustrating configuration examples of storage devices of embodiments of the present invention. [ Fig. 59] A circuit diagram showing a configuration example of a storage device of an embodiment of the present invention. [ Fig. 60] A cross-sectional view showing the structure of a storage device of an embodiment of the present invention. [ Fig. 61] A block diagram illustrating a configuration example of a storage device of an embodiment of the present invention. [ Fig. 62] A block diagram and a circuit diagram showing a configuration example of a storage device of an embodiment of the present invention. [ Fig. 63] Block diagrams illustrating a structural example of a semiconductor device of an embodiment of the present invention. [ Fig. 64] A block diagram and a circuit diagram showing a configuration example of a semiconductor device of an embodiment of the present invention, and a timing diagram showing an operating example of the semiconductor device. [ Fig. 65] A block diagram illustrating a structural example of a semiconductor device of an embodiment of the present invention. [ Fig. 66] A circuit diagram showing a configuration example of a semiconductor device of an embodiment of the present invention and a timing diagram showing an operating example of the semiconductor device. [ Fig. 67] A block diagram illustrating a structural example of an AI system of an embodiment of the present invention. [ Fig. 68] Block diagrams illustrating application examples of an AI system of an embodiment of the present invention. [ Fig. 69] A schematic perspective view showing a structural example of an IC comprising an AI system of an embodiment of the present invention. [ Fig. 70] Illustrations depicting electronic devices of embodiments of the present invention. Embodiments of the invention

[0040] The following are descriptions of embodiments with reference to the drawings. However, the embodiments can be implemented in many different ways, and it is readily apparent to those skilled in the art that the modes and details thereof can be modified in various ways without deviating from the concept and scope of protection. Therefore, the present invention should not be considered as limited to the description of the following embodiments.

[0041] In some cases, the size, layer thickness, or area is exaggerated in the drawings for clarity. Therefore, these are not necessarily limited to their actual size. It should be noted that the drawings are schematic views showing idealized examples, and shapes, values, or the like are not limited to those shown in the drawings. For example, in the actual manufacturing process, the size of a layer, photoresist mask, or the like might be unintentionally reduced by a treatment such as etching, which is omitted in some cases for ease of understanding. In some cases, the same sections or sections with similar functions are designated by the same reference symbols in different drawings, and their repeated descriptions are omitted.Furthermore, the same hatching pattern is used for sections with similar functions, and in some cases the sections are not specifically marked with reference symbols.

[0042] Furthermore, particularly in a top view (also referred to as a "plan view"), a perspective view, or the like, the depiction of some components could be omitted for easier understanding of the invention. Additionally, the depiction of some hidden lines and the like could be omitted.

[0043] Furthermore, the ordinal numbers, such as first and second, are used in this description and the like for convenience only, and they do not indicate the sequence of steps or the order of layers. Therefore, for example, an appropriate description may be given even if "first" is replaced by "second" or "third". Moreover, in some cases, the ordinal numbers in this description and the like do not correspond to the ordinal numbers used to specify an embodiment of the present invention.

[0044] In this description, terms such as "above" and "below" are used to describe the arrangement for convenience in order to describe a positional relationship between components based on drawings. Furthermore, the positional relationship between components changes appropriately according to the direction in which each component is described. Therefore, without limiting themselves to the terms in this description, the terms may be reformulated as appropriate depending on the situation.

[0045] In the case where, for example, there is an explicit description such as "X and Y are connected," then the case where X and Y are electrically connected, the case where X and Y are functionally connected, and the case where X and Y are directly connected are disclosed in that description. Therefore, without limiting one to a predetermined connection relationship, such as one depicted in drawings or text, a connection relationship other than the one depicted in the drawings or text is contained in the drawings or text.

[0046] Here, X and Y each represent an object (e.g., a device, an element, a circuit, a line, an electrode, a connection, a conductive film or a layer).

[0047] Examples of the case where X and Y are directly connected include the case where an element enabling an electrical connection between X and Y (e.g., a switch, transistor, capacitor, inductor, resistor, diode, indicator, light-emitting element, or load) is not connected between X and Y, and the case where X and Y are connected without an element enabling an electrical connection between X and Y (e.g., a switch, transistor, capacitor, inductor, resistor, diode, indicator, light-emitting element, or load) being provided between them.

[0048] In an example of the case where X and Y are electrically connected, one or more elements that enable an electrical connection between X and Y (e.g., a switch, transistor, capacitor, inductor, resistor, diode, indicator, light-emitting element, or load) may be connected between X and Y. Note that the switch is controlled to be turned on or off. That is, the switch has a function to be set to a conducting (on) or non-conducting (off) state to control whether or not a current flows. Alternatively, the switch has a function to select and switch a current path. Note that the case where X and Y are electrically connected includes the case where X and Y are directly connected.

[0049] In an example of the case where X and Y are functionally connected, one or more circuits that enable a functional connection between X and Y (e.g., a logic circuit (an inverter, a NAND gate, a NOR gate, or the like), a signal converter circuit (a DA converter circuit, an AD converter circuit, a gamma correction circuit, or the like), a potential level converter circuit (a power supply circuit (e.g., a DAC), a ...a step-up circuit, a step-down circuit, or the like; a level-shifting circuit for changing the potential level of a signal, or the like; a voltage source; a current source; a switching circuit; an amplifier circuit (a circuit capable of increasing the signal amplitude, current, or the like; an operational amplifier; a differential amplifier circuit; a source-followering circuit; a buffer circuit, or the like); a signal-generating circuit; a storage circuit; a control circuit, or the like) may be connected between X and Y. It should be noted that in the case where, for example, a signal output by X is transferred to Y, X and Y are considered to be functionally connected, with another circuit also placed between X and Y.It should be noted that the case in which X and Y are functionally connected includes the case in which X and Y are directly connected, and the case in which X and Y are electrically connected.

[0050] In this description and the like, a transistor is an element having at least three terminals: a gate, a drain, and a source. The transistor includes a channeling region between the drain (a drain terminal, drain region, or drain electrode) and the source (a source terminal, source region, or source electrode), and current can flow through the channeling region between the source and the drain. It should be noted that in this description and the like, a channeling region denotes a region through which current predominantly flows.

[0051] Furthermore, if, for example, transistors with different polarities are used or the current flow direction is changed during circuit operation, the functions of a source and a drain could be interchanged. Therefore, the terms "source" and "drain" can be used in this description and similar contexts to mean that they are interchangeable.

[0052] It should be noted that the channel length, for example, refers to the distance between a source (source region or source electrode) and a drain (drain region or drain electrode) in a region where, in a top view of a transistor, a semiconductor (or a section of a semiconductor through which current flows when a transistor is switched on) and a gate electrode overlap, or in a region where a channel is formed. It should be noted that, in a transistor, channel lengths do not necessarily have the same value in all regions. In other words, the channel length of a transistor is not limited to a single value in some cases. Therefore, in this description, the channel length refers to any value—the maximum, the minimum, or the average—within a region where a channel is formed.

[0053] Channel width refers, for example, to the length of a section where a source and a drain face each other in a region where, in a top view of a transistor, a semiconductor (or a section of a semiconductor in which current flows when a transistor is switched on) and a gate electrode overlap, or in a region where a channel is formed. It should be noted that channel widths in a transistor do not necessarily have the same value in all regions. In other words, the channel width of a transistor is not limited to a single value in some cases. Therefore, in this description, channel width refers to any value—the maximum, the minimum, or the average—within a region where a channel is formed.

[0054] It should be noted that in some cases, depending on the transistor structure, the channel width in an area where a channel is actually formed (hereinafter also referred to as the "effective channel width") differs from the channel width shown in a top view of a transistor (hereinafter also referred to as the "apparent channel width"). For example, in the case where a gate electrode covers a side face of a semiconductor, the effective channel width is greater than the apparent channel width, and in some cases, its influence cannot be ignored. For instance, in a miniaturized transistor with a gate electrode covering a side face of a semiconductor, the proportion of a channel-forming area formed on a side face of the semiconductor is increased in some cases. In this case, the effective channel width is greater than the apparent channel width.

[0055] In such cases, estimating the effective channel width by measurement can be difficult. For example, estimating an effective channel width from a design value requires assuming that the shape of a semiconductor is known. Therefore, if the shape of a semiconductor is not precisely known, accurately measuring the effective channel width is challenging.

[0056] In this description, an apparent channel width is therefore sometimes referred to as "surrounded channel width (SCW)." Furthermore, in this description, the term "channel width" may be used simply to refer to the width of a symmetrical channel or an apparent channel width. Alternatively, in this description, the term "channel width" may also refer to an effective channel width. It should be noted that the values ​​of a channel length, channel width, effective channel width, apparent channel width, symmetrical channel width, and the like can be determined by analyzing a cross-sectional TEM image or similar data.

[0057] It should be noted that, for example, an impurity in a semiconductor refers to elements that are different from the main components of the semiconductor. For instance, an element present at a concentration of less than 0.1 atomic percent can be considered an impurity. The presence of impurities can, for example, increase the density of states (DOS) in a semiconductor and / or decrease its crystallinity. In the case of an oxide semiconductor, examples of impurities that alter the semiconductor's properties include the elements of Group 1, Group 2, Group 13, Group 14, and Group 15, as well as transition metals that are different from the main components of the oxide semiconductor; for example, hydrogen, lithium, sodium, silicon, boron, phosphorus, carbon, and nitrogen.In the case of an oxide semiconductor, water also serves as an impurity in some cases. Oxygen defects in an oxide semiconductor can be formed, for example, by the ingress of impurities. In the case of silicon, further examples of impurities that alter the semiconductor's properties include oxygen, the elements of Group 1 (except hydrogen), the elements of Group 2, the elements of Group 13, and the elements of Group 15.

[0058] In this description and similar descriptions, a silicon oxynitride film contains more oxygen than nitrogen as its composition. For example, the silicon oxynitride film preferably contains oxygen, nitrogen, silicon, and hydrogen in concentration ranges of 55 atomic percent or higher and less than 65 atomic percent, 1 atomic percent or higher and less than 20 atomic percent, 25 atomic percent or higher and less than 35 atomic percent, and 0.1 atomic percent or higher and less than 10 atomic percent, respectively. Furthermore, a silicon nitride oxide film contains more nitrogen than oxygen as its composition.For example, the silicon nitride oxide film preferably contains nitrogen, oxygen, silicon and hydrogen in concentration ranges of higher than or equal to 55 atomic% and lower than or equal to 65 atomic%, higher than or equal to 1 atomic% and lower than or equal to 20 atomic%, higher than or equal to 25 atomic% and lower than or equal to 35 atomic%, respectively, higher than or equal to 0.1 atomic% and lower than or equal to 10 atomic%.

[0059] In this description and similar texts, the terms "film" and "layer" can be used interchangeably. For example, the term "conducting layer" can be replaced by the term "conducting film" in some cases. Similarly, the term "insulating film" can be replaced by the term "insulating layer" in some cases.

[0060] Furthermore, in this description and similar texts, the term "insulator" can also refer to insulating film or insulating layer. Similarly, the term "conductor" can also refer to conductive film or conductive layer. Furthermore, the term "semiconductor" can also refer to semiconductor film or semiconductor layer.

[0061] Furthermore, unless otherwise specified, transistors described in this description and the like are field-effect transistors. Additionally, unless otherwise specified, transistors described in this description and the like are n-channel transistors. Therefore, unless otherwise specified, the threshold voltage (also referred to as "Vth") is higher than 0 V.

[0062] In this description and similar contexts, "parallel" also refers to the state in which two straight lines intersect at an angle greater than or equal to -10° and less than or equal to 10°. Consequently, there is also a case in which the angle is greater than or equal to -5° and less than or equal to 5°. Furthermore, "essentially parallel" refers to the state in which two straight lines intersect at an angle greater than or equal to -30° and less than or equal to 30°. Additionally, "perpendicular" refers to the state in which two straight lines intersect at an angle greater than or equal to 80° and less than or equal to 100°. Consequently, there is also a case in which the angle is greater than or equal to 85° and less than or equal to 95°. Finally, "essentially perpendicular" refers to the state in which two straight lines intersect at an angle greater than or equal to 60° and less than or equal to 120°.

[0063] This description also includes a trigonal or rhombohedral crystal in a hexagonal crystal system.

[0064] It should be noted that in this description, a barrier film refers to a film that has the function of preventing the passage of impurities, such as hydrogen and oxygen. A barrier film that exhibits conductivity can be referred to as a conductive barrier film.

[0065] In this description and similar contexts, a metal oxide means an oxide of a metal in a broader sense. Metal oxides are classified into oxide insulators, oxide conductors (including transparent oxide conductors), oxide semiconductors (also simply called OS), and the like. For example, a metal oxide used in the active layer of a transistor is sometimes referred to as an oxide semiconductor. That is to say, an OS FET is a transistor that contains an oxide or an oxide semiconductor. (Version 1)<Strukturbeispiel 1 einer Halbleitervorrichtung>

[0066] Below is an example of a semiconductor device comprising a transistor 200 of an embodiment of the present invention.

[0067] It should be noted that this embodiment describes an example in which a capacitor 100 is provided in the same layer as the transistor 200. It also describes an example in which part of a structure of the transistor 200 is used as part of a structure of the capacitor 100.

[0068] In this case, part of capacitor 100 or the entire capacitor 100 can overlap with transistor 200, since the total area of ​​the projected area of ​​transistor 200 and the projected area of ​​capacitor 100 can be reduced, which is preferred.

[0069] However, this embodiment is not limited to this. The capacitor 100 and the transistor 200 can be provided in different layers, and, for example, the capacitor 100 can be provided over an insulator (interlayer film) that is provided in such a way that it covers the transistor 200. Furthermore, if the operation of the semiconductor device or the circuit configuration does not require a capacitor, the capacitor 100 is not necessarily provided.

[0070] Fig. 1(A), Fig. 1(B), Fig. 1(C) and Fig. Figure 1(D) shows a top view and cross-sectional views of transistor 200, capacitor 100, and the periphery of transistor 200 of an embodiment of the present invention. It should be noted that in this description, a semiconductor device comprising a capacitor and at least one transistor is referred to as a cell.

[0071] Fig. 1(A) is a top view of a cell 600 containing the transistor 200 and the capacitor 100. Fig. 1(B), Fig. 1(C) and Fig. 1(D) are cross-sectional views of cell 600. Here is Fig. 1(B) a cross-sectional view of a section defined by a dashed line AB in Fig. 1 (A) is marked, and is also a cross-sectional view of transistor 200 in the longitudinal direction of the channel. Fig. 1(C) is a cross-sectional view of a section defined by a dashed line CD in Fig. 1(A) is marked, and is also a cross-sectional view of transistor 200 in the channel transverse direction. Fig. 1(D) is a cross-sectional view of a section defined by a dashed line EF in Fig. 1(A) is marked, and is also a cross-sectional view of a connection section between an oxide 230 and a conductor 203, the capacitor 100, and the like. For the sake of simplicity of the drawing, some components are shown in the top view in Fig. 1(A) omitted. [Cell 600]

[0072] The semiconductor device of an embodiment of the present invention comprises the transistor 200, the capacitor 100, and an insulator 280, which serves as an interlayer film. Furthermore, a conductor 252 (a conductor 252a, a conductor 252b, a conductor 252c, and a conductor 252d), which is electrically connected to the transistor 200 and serves as a terminal plug, is included.

[0073] It should be noted that the conductor 252 is in contact with an inner wall of an opening in the insulator 280. Here, a top surface of the conductor 252 can be at substantially the same height as a top surface of the insulator 280. It should be noted that, although the conductor 252 in the transistor 200 has a two-layer structure, the present invention is not limited thereto. For example, the conductor 252 can be a single layer or have a multilayer structure consisting of three or more layers. [Transistor 200]

[0074] As in Fig. As shown in Figure 1, transistor 200 includes an insulator 208 placed over a substrate (not shown), an insulator 210, a conductor 203 (a conductor 203a and a conductor 203b) and a conductor 205 (a conductor 205a and a conductor 205b) placed over the insulator 210, an insulator 216 provided between and around the conductor 203 and the conductor 205, an insulator 220 placed over the insulator 216, the conductor 203 and the conductor 205, an insulator 222 placed over the insulator 220, an insulator 224 placed over the insulator 222, an oxide 230 (an oxide 230a, an oxide 230b and an oxide 230c), which is placed above the insulator 224, an insulator 250 which is placed above the oxide 230, a conductor 260 (a conductor 260a and a conductor 260b) which is placed above the insulator 250, an insulator 270 and an insulator 271 which are placed above the conductor 260,an insulator 272, which is placed in contact with at least side faces of the insulator 250 and the conductor 260, and an insulator 274, which is placed in contact with the oxide 230 and the insulator 272.

[0075] It should be noted that the insulator 216 can be formed by polishing an insulating film covering the conductor 203 and the conductor 205 using a CMP process or the like to expose the conductor 203 and the conductor 205. Therefore, the surfaces of the insulator 216, the conductor 203, and the conductor 205 exhibit a high degree of flatness.

[0076] Furthermore, insulator 220, insulator 222, insulator 224, and oxide 230a each have an opening. Oxide 230b is also electrically connected to conductor 203 via this opening. If oxide 230b is not connected to conductor 203 via oxide 230a, the series resistance and contact resistance can be reduced. With such a structure, a semiconductor device with advantageous electrical properties can be obtained. In particular, a transistor with increased forward current and a semiconductor device in which the transistor is used can be obtained.

[0077] Furthermore, conductor 203 and conductor 205 preferably have a multilayered structure. Additionally, a material that is less likely to oxidize than conductor 203a and conductor 205a, i.e., a material with high oxidation resistance, is preferably used for conductor 203b and conductor 205b. If a material that is less likely to oxidize is used for conductor 203b and conductor 205b, oxidation of conductor 203 and conductor 205 can be prevented at the time of formation of an insulating film that becomes insulator 216, at the time of formation of insulator 216, at the time of formation of insulator 220, at the time of formation of the opening provided in insulator 220, insulator 222, insulator 224 and oxide 230a, and at the time of formation of an oxide that becomes oxide 230b.Therefore, an increase in electrical resistance due to oxidation of conductor 203 and conductor 205 can be prevented. In particular, the contact between conductor 203 and oxide 230b is advantageous because it prevents oxidation of the top surface of conductor 203.

[0078] For conductor 203a and conductor 205a, a material with a lower resistance than conductor 203b and conductor 205b is preferably used. Conductor 203b and conductor 205b, which are made of a material with high oxidation resistance, are positioned above conductor 203a and conductor 205a, respectively. Therefore, an increase in electrical resistance due to oxidation of conductor 203a and conductor 205a, or similar processes during the manufacturing of transistor 200 or the like, can be prevented.

[0079] It should be noted that the transistor 200, as in Fig. Figure 1 shows a structure in which oxide 230a, oxide 230b, and oxide 230c are arranged one above the other; however, the present invention is not limited to this. For example, a two-layer structure consisting of oxide 230a and oxide 230b, or a multilayer structure consisting of four or more layers, can be used. Alternatively, a single layer consisting only of oxide 230b, or only oxide 230b and oxide 230c, can be provided. Although a structure in which conductor 260a and conductor 260b are arranged one above the other in transistor 200 is described, the present invention is not limited to this. For example, a single layer or a multilayer structure consisting of three or more layers can be used.

[0080] Here is an enlarged view of area 239 near a canal, defined by a dashed line in Fig. 1(B) is enclosed, in Fig. 2 shown.

[0081] As in Fig. 1(B) and Fig. As shown in Figure 2, oxide 230 comprises a region 232 (a region 232a and a region 232b) located between a region 234, which serves as the channeling region of transistor 200, and a region 231 (a region 231a and a region 231b), which serves as the source or drain region. The region 231, which serves as the source or drain region, is characterized by a high charge carrier density and reduced resistance. Furthermore, the region 234, which serves as the channeling region, has a lower charge carrier density than the region 231, which serves as the source or drain region. Furthermore, area 232 has a lower charge carrier density than area 231, which serves as a source or drain area, and a higher charge carrier density than area 234, which serves as a channeling area.This means that area 232 serves as a transition area between the channel formation area and the source area or the drain area.

[0082] When the transition region is provided, a high-impedance region is not formed between region 231, which serves as the source region or drain region, and region 234, which serves as the channeling region, thus increasing the forward current of the transistor.

[0083] Area 232 includes a region that overlaps with conductor 260, which serves as the gate electrode. In area 232, the region that overlaps with conductor 260, which serves as the gate electrode, in some cases serves as the so-called overlap region (also referred to as the Lov region).

[0084] The area 231 is preferably in contact with the insulator 274. Furthermore, the concentration of a metallic element, such as indium, and / or that of impurity elements, such as hydrogen and nitrogen, in the area 231 is preferably higher than that in each of the areas 232 and 234.

[0085] Region 232 comprises an area that overlaps with insulator 272. The concentration of a metallic element, such as indium, and / or that of impurity elements, such as hydrogen and nitrogen, in region 232 is preferably higher than that in region 234. Conversely, the concentration of a metallic element, such as indium, and / or that of impurity elements, such as hydrogen and nitrogen, is preferably lower than that in region 231.

[0086] Area 234 overlaps with conductor 260. Area 234 is located between area 232a and area 232b, and the concentration of a metallic element, such as indium, and / or that of impurity elements, such as hydrogen and nitrogen, in area 234 is preferably lower than that in each of area 231 and area 232.

[0087] Furthermore, in oxide 230, the boundaries between regions 231, 232, and 234 cannot always be clearly detected. The concentration of a metallic element, such as indium, and that of impurity elements, such as hydrogen and nitrogen, which are detected in each region, can change not only stepwise between regions but also gradually within each region (also referred to as gradation). This means that the region closer to region 234, from region 231 to region 232, preferably has a lower concentration of a metallic element, such as indium, and of impurity elements, such as hydrogen and nitrogen.

[0088] Furthermore, in Fig. 1(B) and Fig. 2. Region 234, region 231, and region 232 are formed in oxide 230b; however, the present invention is not limited to this, and these regions may, for example, be formed in oxide 230a or oxide 230c. Although the boundaries between the regions are shown in the drawings substantially perpendicular to the top surface of oxide 230, this embodiment is not limited to this. For example, region 232 may project near the surface of oxide 230b in the direction of conductor 260, and it may recede near a bottom surface of oxide 230b in the direction of conductor 252a or conductor 252b.

[0089] It should be noted that in transistor 200, a metal oxide serving as an oxide semiconductor (hereinafter also referred to as oxide semiconductor) is preferably used for oxide 230. A transistor using an oxide semiconductor exhibits a very low leakage current (reverse current) in a non-conducting state; thus, a low-power semiconductor device can be provided. Furthermore, an oxide semiconductor can be formed by a sputtering process or the like and can therefore be used for a transistor incorporated into a highly integrated semiconductor device.

[0090] On the other hand, the electrical properties of a transistor using an oxide semiconductor are likely to be altered by impurities and oxygen defects in the oxide semiconductor; as a result, reliability decreases in some cases. Hydrogen present in an oxide semiconductor reacts with oxygen bonded to a metal atom to form water, and therefore, in some cases, it creates an oxygen defect. The penetration of hydrogen into the oxygen defect sometimes generates an electron, which acts as a charge carrier. Therefore, a transistor using an oxide semiconductor containing oxygen defects in a channeling region is likely to exhibit self-conducting properties. Consequently, oxygen defects in the channeling region are preferably minimized as much as possible.

[0091] In particular, if oxygen defects are present at an interface between the region 234 of the oxide 230, in which a channel is formed, and the insulator 250, which serves as a gate insulating film, it is likely that a change in the electrical properties will occur, and the reliability will decrease in some cases.

[0092] In this respect, the insulator 250, which overlaps with region 234 of oxide 230, preferably contains a higher proportion of oxygen than the stoichiometric composition (also referred to as excess oxygen). This means that excess oxygen contained in the insulator 250 diffuses into region 234, thereby reducing oxygen deficiencies in region 234.

[0093] Furthermore, the insulator 272 is preferably provided in contact with the insulator 250. For example, the insulator 272 preferably has a function for preventing the diffusion of oxygen (e.g., oxygen atoms and / or oxygen molecules); that is, the aforementioned oxygen is less likely to pass through the insulator 272. If the insulator 272 has a function for preventing oxygen diffusion, oxygen in an oxygen-excess region does not diffuse towards the insulator 274 and is efficiently supplied to the region 234. Consequently, the formation of oxygen vacancies at the interface between the oxide 230 and the insulator 250 can be prevented, leading to an improvement in the reliability of the transistor 200.

[0094] Furthermore, transistor 202 is preferably covered with an insulator that has a blocking property and prevents the ingress of impurities, such as water or hydrogen. The blocking insulator is an insulator containing an insulating material with a function to prevent the diffusion of impurities such as a hydrogen atom, a hydrogen molecule, a water molecule, a nitrogen atom, a nitrogen molecule, a nitrogen oxide molecule (N₂O, NO, NO₂, and the like), and a copper atom—that is, an insulating material that makes it less likely for the aforementioned impurities to pass through. Additionally, an insulating material with a function to prevent the diffusion of oxygen (e.g., oxygen atoms and / or oxygen molecules) is preferably used—that is, an insulating material that makes it less likely for the aforementioned oxygen to pass through.

[0095] The structure of a semiconductor device comprising transistor 200 of an embodiment of the present invention is described in detail below.

[0096] In transistor 200, conductor 260 sometimes serves as the first gate electrode. Furthermore, conductor 205 sometimes serves as the second gate electrode. In this case, the threshold voltage of transistor 200 can be controlled by changing the potential applied to conductor 205 independently of, rather than synchronously with, the potential applied to conductor 260. In particular, by applying a negative potential to conductor 205, the threshold voltage of transistor 200 can be higher than 0 V, and the reverse current can be reduced. Consequently, the drain current can be reduced when a voltage of 0 V is applied to conductor 260.

[0097] The conductor 205, which serves as the second gate electrode, is positioned so that it overlaps with the oxide 230 and the conductor 260.

[0098] Here, the conductor 205 is preferably provided such that its length in the transverse direction of the channel is greater than that of region 234 of the oxide 230. Particularly preferably, the conductor 205 extends over an end section of region 234 in the oxide 230 that crosses the transverse direction of the channel. This means that the conductor 205 and the conductor 260 preferably overlap each other, with the insulator located between them on a side surface of the oxide 230 in the transverse direction of the channel.

[0099] Conductor 203 can be formed in the same process as conductor 205. Conductor 203 serves as an electrode or conductor which is electrically connected to region 231 of oxide 230.

[0100] The insulator 216 is formed between and around the conductor 203 and the conductor 205. Here, the top surfaces of the conductor 203 and the conductor 205 can be at essentially the same height as a top surface of the insulator 216.

[0101] Here, a conductive material that is less likely to oxidize than conductors 203a and 205a, i.e., a material with high oxidation resistance, is preferably used for conductors 203b and 205b. A metal nitride, such as tantalum nitride or titanium nitride, can be used as such a conductive material.

[0102] Using a material with high oxidation resistance for conductor 203b and conductor 205b prevents the conductivity of conductor 203 and conductor 205 from being reduced due to oxidation. Furthermore, oxidation of the top surface of conductor 203 is prevented, thus making the contact between oxide 230b and conductor 203 advantageous.

[0103] Furthermore, a conductive material containing tungsten, copper, or aluminum as its main component is preferably used for conductor 203a and conductor 205a. In this embodiment, tungsten is used for conductor 203a and conductor 205a.

[0104] As in Fig. As shown in Figure 3, a conductor 209, electrically connected to the conductor 205, can be provided. An insulator 212 is provided above the insulator 210, and the conductor 209 can be configured to be embedded in an opening provided in the insulator 212. In this case, the conductor 209 can have a multilayer structure consisting of a first conductor, which is in contact with a side face and a bottom surface of the opening provided in the insulator 212, and a second conductor, which is provided above the first conductor. In this case, the first conductor is preferably a conductive barrier. Alternatively, the conductor 209 can have a single-layer structure or a multilayer structure consisting of three or more layers. In the case where the conductor 209 has a multilayer structure consisting of three or more layers, two or more conductive barriers can be provided.As a conductive barrier, one or more barrier films may be provided, selected from a barrier film that prevents the passage of impurities such as hydrogen, water and nitrogen, a barrier film that prevents the passage of oxygen, and a barrier film that prevents the passage of a metal component.

[0105] Alternatively, the conductor 209 can be formed by a lithographic or etching process after a conductive film, formed from a single layer or two or more layers, has been provided over the insulator 210. Furthermore, an insulating film can be formed over the insulator 210 such that it covers the conductor 209, and the insulating film is processed by a CMP or etching process to form the insulator 212.

[0106] Conductor 209 can serve as an electrode or a conductor. If conductor 205 is used as the second gate electrode of transistor 200, a portion of conductor 209 can serve as a gate conductor. In this case, conductor 205 and conductor 252d can be electrically connected to each other via conductor 207, which includes conductor 207a and conductor 207b provided above conductor 207a, and conductor 209. Conductor 207 can be formed in the same process as conductor 203 and conductor 205.

[0107] Conductor 209 is electrically connected to oxide 230b via conductor 203 and can serve as the source or drain conductor of transistor 200. Conductor 209 can also be used as an electrode for electrical connection to an element or conductor located below insulator 210.

[0108] The insulator 210 preferably serves as an insulating barrier film to prevent impurities, such as water or hydrogen, from penetrating the transistor from the substrate side. Accordingly, the insulator 210 is preferably designed using an insulating material with a function to prevent the diffusion of impurities such as a hydrogen atom, a hydrogen molecule, a water molecule, a nitrogen atom, a nitrogen molecule, a nitrogen oxide molecule (e.g., N₂O, NO, and NO₂), and a copper atom—that is, an insulating material through which the aforementioned impurities are less likely to pass. Alternatively, an insulating material with a function to prevent the diffusion of oxygen (e.g., oxygen atoms and / or oxygen molecules) is preferably used—that is, a material through which the aforementioned oxygen is less likely to pass.

[0109] For example, aluminum oxide, silicon nitride, or the like is preferably used for the insulator 210. This prevents impurities, such as hydrogen and water, from diffusing from the insulator 210 towards the transistor 210. It also prevents oxygen contained in the insulator 224 and the like from diffusing from the insulator 210 towards the substrate.

[0110] Furthermore, the insulator 208, the insulator 216 and the insulator 280, which serve as interlayer films, preferably have a lower permittivity than the insulator 210. In the case where a material with a low permittivity is used for an interlayer film, the parasitic capacitance generated between conductors can be reduced.

[0111] For insulators 208, 216, and 280, which serve as interlayer films, a single layer or a layer arrangement of any insulator, such as silicon oxide, silicon oxynitride, silicon nitride oxide, aluminum oxide, hafnium oxide, tantalum oxide, zirconium oxide, lead zirconate titanate (PZT), strontium titanate (SrTiO3), and (Ba,Sr)TiO3 (BST), can be used. Alternatively, aluminum oxide, bismuth oxide, germanium oxide, niobium oxide, silicon oxide, titanium oxide, tungsten oxide, yttrium oxide, or zirconium oxide can be added to the insulator. The insulator can alternatively undergo a nitriding treatment. Silicon oxide, silicon oxynitride, or silicon nitride can be arranged over the aforementioned insulator.

[0112] The insulator 220, the insulator 222 and the insulator 224 each serve as a gate insulator.

[0113] The insulator 224, which is in contact with the oxide 230, is preferably an oxide insulator containing a higher proportion of oxygen than the stoichiometric composition. This means that an oxygen excess region is preferably formed in the insulator 224. When such an insulator containing excess oxygen is placed in contact with the oxide 230, oxygen defects in the oxide 230 can be reduced, leading to an improvement in reliability.

[0114] An oxide material that releases some of the oxygen upon heating is particularly preferred as the insulator encompassing the oxygen excess region. An oxide that releases oxygen upon heating is an oxide film whose amount of released oxygen, converted into oxygen atoms, is greater than or equal to 1.0 × 10⁻⁶. 18 atoms / cm² 3 preferably greater than or equal to 3.0 × 10 20 atoms / cm²3 in thermal desorption spectroscopy (TDS) analysis. It should be noted that the temperature of the film surface during TDS analysis is preferably higher than or equal to 100 °C and lower than or equal to 700 °C, or higher than or equal to 100 °C and lower than or equal to 400 °C.

[0115] In the case where the insulator 224 includes an oxygen excess region, the insulator 222 preferably has a function to prevent diffusion of oxygen (e.g. oxygen atoms and / or oxygen molecules), that is, the aforementioned oxygen is less likely to pass through the insulator 222.

[0116] If the insulator 222 has a function to prevent oxygen diffusion, oxygen in the oxygen excess region does not diffuse towards the insulator 220 and can therefore be efficiently supplied to the oxide 230. Furthermore, it can prevent the conductor 205 from reacting with oxygen in the oxygen excess region of the insulator 224.

[0117] For insulator 222, for example, a single layer or a layer array of an insulator containing a so-called high-k material, such as aluminum oxide, hafnium oxide, hafnium aluminate, tantalum oxide, zirconium oxide, lead zirconate titanate (PZT), strontium titanate (SrTiO3), or (Ba,Sr)TiO3 (BST), is preferably used. Using a high-k material for the gate insulator allows for miniaturization and high integration of the transistor. In particular, an insulating material with a function of preventing the diffusion of impurities, such as aluminum oxide, hafnium oxide, hafnium aluminate, oxygen, and the like, is preferably used—that is, an insulating material through which the aforementioned oxygen is less likely to pass.The insulator 222, which is formed from such a material, serves as a layer that prevents the release of oxygen from the oxide 230 and the penetration of impurities, such as hydrogen, from the environment of the transistor 200.

[0118] Alternatively, the insulator can be made with materials such as aluminum oxide, bismuth oxide, germanium oxide, niobium oxide, silicon oxide, titanium oxide, tungsten oxide, yttrium oxide, or zirconium oxide. The insulator can also be subjected to a nitriding treatment. Silicon oxide, silicon oxynitride, or silicon nitride can be placed over the aforementioned insulator.

[0119] The insulator 222 is preferably thermally stable. Since silicon oxide and silicon oxynitride exhibit thermal stability, a combination of silicon oxide or silicon oxynitride with an insulator that is a material with high k enables the multilayer structure to be thermally stable and exhibit high permittivity.

[0120] It should be noted that the insulator 220, the insulator 222, and the insulator 224 can each have a multilayer structure consisting of two or more layers. In this case, without being limited to a multilayer structure formed from the same materials, a multilayer structure formed from different materials will be used. The insulator 220, the insulator 222, and the insulator 224 are described as serving as gate insulators in the transistor 200; however, this embodiment is not limited to this. For example, two layers or one layer of the insulator 220, the insulator 222, and the insulator 224 can be provided as a gate insulator.

[0121] Oxide 230 comprises oxide 230a, oxide 230b above oxide 230a, and oxide 230c above oxide 230b. Oxide 230 also includes region 231, region 232, and region 234. It should be noted that at least a portion of region 231 is preferably in contact with the insulator 274. Furthermore, the concentration of a metallic element, such as indium, the hydrogen concentration, and / or the nitrogen concentration in at least a portion of region 231 is preferably higher than that in region 234.

[0122] When transistor 200 is switched on, area 231a or area 231b serves as the source or drain area. Conversely, at least part of area 234 serves as the area in which a channel is formed.

[0123] The insulator 220, the insulator 222, the insulator 224, and the oxide 230a each have an opening, and the region 231 of the oxide 230b is electrically connected to the conductor 203. This means that the source and drain of the transistor 200 are electrically connected to the conductor 203 via the opening provided in the insulator 220, the insulator 222, the insulator 224, and the oxide 230a, and that the conductor 203 can serve as a source electrode and a drain electrode, or as a source lead and a drain lead.

[0124] As in Fig. 1(A) and Fig. As shown in Figure 1(D), oxide 230a and oxide 230b are each preferably configured to have a greater width in the EF direction in the region overlapping the opening than the opening itself, in order to cover the opening formed in insulator 220, insulator 222, insulator 224, and oxide 230a. Therefore, the widths of oxide 230a and oxide 230b in the EF direction can be greater than the widths of oxide 230a and oxide 230b in the CD direction in a region where a channel is formed or in a region on the A-side. With such a structure, the contact between oxide 230b and conductor 203 can be reliable. Furthermore, the area of ​​capacitor 100 can be increased, and an increase in the capacitance of capacitor 100 can be expected.

[0125] As in Fig. As shown in Figure 2, the oxide 230 preferably comprises the region 232. With this structure, the transistor 200 can exhibit a high forward current and a low leakage current in a non-conducting state (reverse current).

[0126] If oxide 230b is placed above oxide 230a, it can prevent impurities from the components formed below oxide 230a from diffusing into oxide 230b. Similarly, if oxide 230b is placed below oxide 230c, it can prevent impurities from the components formed above oxide 230c from diffusing into oxide 230b.

[0127] The oxide 230 has a curved surface between the side face and the top surface. This means that an end section of the side face and an end section of the top surface are preferably curved (hereinafter also referred to as the rounded shape). The radius of curvature of the curved surface at an end section of the oxide 230b is, for example, greater than or equal to 3 nm and less than or equal to 10 nm, preferably greater than or equal to 5 nm and less than or equal to 6 nm.

[0128] Oxide 230 is preferably a metal oxide that serves as an oxide semiconductor (hereinafter also referred to as oxide semiconductor). For example, the metal oxide that becomes region 234 is preferably a metal oxide with an energy gap of 2 eV or more, preferably 2.5 eV or more. By using a metal oxide with such a large energy gap, the reverse current of the transistor can be reduced.

[0129] It should be noted that in this description and similar texts, a metal oxide containing nitrogen is sometimes referred to simply as a metal oxide. Alternatively, a metal oxide containing nitrogen may be called a metal oxynitride.

[0130] A transistor using an oxide semiconductor exhibits a very low leakage current in a non-conducting state; thus, a low-power semiconductor device can be provided. An oxide semiconductor can be formed by a sputtering process or the like and can therefore be used in a transistor incorporated into a highly integrated semiconductor device.

[0131] For example, a metal oxide such as an In-M-Zn oxide (where element M is one or more types selected from aluminum, gallium, yttrium, copper, vanadium, beryllium, boron, silicon, titanium, iron, nickel, germanium, zirconium, molybdenum, lanthanum, cerium, neodymium, hafnium, tantalum, tungsten, magnesium, and the like) can be used as oxide 230. An In-Ga oxide or an In-Zn oxide can also be used as oxide 230.

[0132] This section describes region 234 of oxide 230.

[0133] Region 234 preferably has a multilayer structure of oxides that differ from one another in the atomic ratio of metal elements. In particular, if region 234 has the multilayer structure of oxide 230a and oxide 230b, the atomic ratio of element M to constituents in the metal oxide used as oxide 230a is preferably greater than the atomic ratio of element M to constituents in the metal oxide used as oxide 230b. Furthermore, the atomic ratio of element M to In in the metal oxide used as oxide 230a is preferably greater than the atomic ratio of element M to In in the metal oxide used as oxide 230b. Additionally, the atomic ratio of In to element M in the metal oxide used as oxide 230b is preferably greater than the atomic ratio of In to element M in the metal oxide used as oxide 230a.Oxide 230c can be a metal oxide that can be used as oxide 230a or oxide 230b.

[0134] Oxide 230a can be, for example, a metal oxide with a composition of In:Ga:Zn = 1:3:4, In:Ga:Zn = 1:3:2, or In:Ga:Zn = 1:1:1. Oxide 230b can be, for example, a metal oxide with a composition of In:Ga:Zn = 4:2:3, In:Ga:Zn = 1:1:1, or In:Ga:Zn = 5:1:6. Oxide 230c can be, for example, a metal oxide with a composition of In:Ga:Zn = 1:3:4, In:Ga:Zn = 1:3:2, In:Ga:Zn = 4:2:3, or In:Ga:Zn = 1:1:1. It should be noted that the above composition represents the atomic ratio of an oxide formed over a substrate or the atomic ratio of a sputtering target.

[0135] In particular, a combination of a metal oxide with a composition of In:Ga:Zn = 1:3:4 as oxide 230a, a metal oxide with a composition of In:Ga:Zn = 4:2:3 as oxide 230b and a metal oxide with a composition of In:Ga:Zn = 1:3:4 as oxide 230c, or a combination of a metal oxide with a composition of In:Ga:Zn = 1:3:4 as oxide 230a, a metal oxide with a composition of In:Ga:Zn = 4:2:3 as oxide 230b and a metal oxide with a composition of In:Ga:Zn = 1:1:1 as oxide 230c, is preferred, since oxide 230b can be positioned between oxide 230a and oxide 230c, each of which has a larger energy gap. Here, oxide 230a and oxide 230d, which each have a large energy gap, are referred to as the large gap in some cases, and oxide 230b, with a relatively small energy gap, is referred to as the small gap in some cases.The large gap and the small gap are described in [Composition of a metal oxide].

[0136] The regions 231 and 232, which are contained in oxide 230, are then described.

[0137] Regions 231 and 232 are regions whose resistance is reduced by adding a metal atom, such as indium, or impurities to a metal oxide provided as oxide 230. It should be noted that each of these regions has a higher conductivity than at least oxide 230b in region 234. It should be noted that the addition of impurities to regions 231 and 232 can be achieved, for example, by adding a dopant consisting of a metallic element, such as indium, and / or impurities, by plasma treatment, an ion implantation process in which an ionized source gas undergoes mass separation and is then added, an ion doping process in which an ionized source gas is added without mass separation, a plasma immersion ion implantation process, or the like.

[0138] This means that if the proportion of a metal atom, such as indium, is increased in region 231 and region 232 of oxide 230, the electron mobility can be increased and the resistance can be reduced.

[0139] If the insulator 274, which contains impurity elements, is formed in contact with the oxide 230, impurities can also be added to area 231 and area 232.

[0140] This means that the resistance of region 231 and region 232 is reduced when an element forming an oxygen vacancy, or an element trapped by an oxygen vacancy, is added to region 231 and region 232. Typical examples of the element include hydrogen, boron, carbon, nitrogen, fluorine, phosphorus, sulfur, chlorine, titanium, and a noble gas. Typical examples of the noble gas element include helium, neon, argon, krypton, and xenon. Therefore, region 231 and region 232 are preferably configured to contain one or more of the aforementioned elements.

[0141] Alternatively, a film that extracts and absorbs oxygen contained in region 231 and region 232 can be used as insulator 274. When oxygen is extracted, oxygen vacancies are created in region 231 and region 232. Hydrogen, boron, carbon, nitrogen, fluorine, phosphorus, sulfur, chlorine, titanium, a noble gas, or the like are trapped by oxygen vacancies, thereby reducing the resistance of region 231 and region 232.

[0142] The insulator 274 can be formed from a single layer or have a multilayer structure consisting of two or more layers. The insulator 274 can be formed by a CVD process, an ALD process, a sputtering process, or the like. An ALD process is advantageous for depositing a step section formed by the oxide 230 or the conductor 260 because it exhibits excellent step coverage, excellent thickness uniformity, and excellent thickness controllability. An insulator with a thickness greater than or equal to 0.5 nm and less than or equal to 5.0 nm can be formed by an ALD process, and then an insulator with a thickness greater than or equal to 1.0 nm and less than or equal to 10.0 nm can be deposited over it by a plasma CVD process to form the insulator 274.For example, silicon nitride, silicon nitride oxide, silicon oxynitride, or silicon oxide formed by a plasma-CVD process can be layered over aluminum oxide, hafnium oxide, or an oxide containing aluminum and hafnium (hafnium aluminate) formed by an ALD process, so that the insulator 274 can be formed. Alternatively, an insulator with a thickness greater than or equal to 1.0 nm and less than or equal to 10.0 nm can be formed by a plasma-CVD process, so that the insulator 274 can be formed from a single layer. For example, silicon nitride, silicon nitride oxide, silicon oxynitride, or silicon oxide formed by a plasma-CVD process can be the insulator 274.

[0143] When region 232 is provided in transistor 200, a high-impedance region is not formed between region 231, which serves as the source or drain region, and region 234, where a channel is formed. This allows the forward current and mobility of the transistor to be increased. Because region 232 prevents the gate from overlapping with the source and drain regions in the longitudinal direction of the channel, the formation of unnecessary capacitance is prevented. Furthermore, region 232 reduces leakage current in a non-conducting state.

[0144] Therefore, by appropriately selecting the area of ​​region 232, a transistor with electrical properties required for circuit design can easily be provided.

[0145] The insulator 250 serves as a gate insulating film. The insulator 250 is preferably placed in contact with the top surface of the oxide 230c. The insulator 250 is preferably formed using an insulator from which oxygen is released by heating. The insulator 250 is an oxide film whose amount of released oxygen, converted into oxygen atoms, is, for example, greater than or equal to 1.0 × 10⁻⁶. 18 atoms / cm² 3 , preferably greater than or equal to 3.0 × 10 20 atoms / cm² 3 in thermal desorption spectroscopy (TDS) analysis. It should be noted that the temperature of the film surface during TDS analysis is preferably in the range of higher than or equal to 100 °C and lower than or equal to 700 °C, or higher than or equal to 100 °C and lower than or equal to 500 °C.

[0146] If an insulator 250, from which oxygen is released by heating, is provided in contact with the top surface of the oxide 230c, oxygen can be efficiently supplied to the region 234 of the oxide 230b. Furthermore, as with the insulator 224, the concentration of impurities, such as water or hydrogen, in the insulator 250 is preferably reduced. The thickness of the insulator 250 is preferably greater than or equal to 1 nm and less than or equal to 20 nm.

[0147] The conductor 260, which serves as the first gate electrode, includes the conductor 260a and the conductor 260b above the conductor 260a.

[0148] Titanium nitride or the like is preferably used for conductor 260a. Alternatively, a metal with high conductivity, such as tungsten, can be used for conductor 260b.

[0149] Alternatively, a conductor formed from a conductive oxide can be provided between the insulator 250 and the conductor 260a. For example, the metal oxide that can be used as oxide 230a or oxide 230b can be employed. In particular, an In-Ga-Zn-based oxide with a metal atom ratio of [In]:[Ga]:[Zn] = 4:2:3 to 4.1 or close to it, which exhibits high conductivity, is preferably used. If such a conductor is provided above the insulator 250, the penetration of oxygen into the conductor 260a and an increase in the electrical resistance of the conductor 260a due to oxidation can be prevented.

[0150] If the aforementioned conductive oxide is deposited by a sputtering process, oxygen can be added to the insulator 250, thus supplying oxygen to the oxide 230b. Therefore, oxygen defects in region 234 of the oxide 230 can be reduced.

[0151] The insulator 270, which serves as a barrier film, can be placed over the conductor 260c. Preferably, an insulating material is used for the insulator 270 that has a function of preventing the passage of impurities, such as water or hydrogen, and oxygen. For example, an insulator containing aluminum and / or hafnium oxide(s) can be used. Aluminum oxide, hafnium oxide, an oxide containing aluminum and hafnium (hafnium aluminate), or the like is preferably used for the insulator containing aluminum and / or hafnium oxide(s). Therefore, oxidation of the conductor 260 can be prevented. Furthermore, it can be prevented that impurities, such as water or hydrogen, penetrate the oxide 230 through the conductor 260 and the insulator 250.

[0152] Furthermore, the insulator 271, which serves as a hard mask, is preferably provided over the insulator 270. By providing the insulator 270, the conductor 260 can be processed such that the side face of the conductor 260 is substantially perpendicular. In particular, the angle formed by the side face of the conductor 260 and a surface of the substrate can be greater than or equal to 75° and less than or equal to 100°, preferably greater than or equal to 80° and less than or equal to 95°. When the conductor is processed into such a shape, the insulator 272, which is subsequently formed, can be shaped as desired.

[0153] The insulator 272, which serves as a barrier film, is provided in contact with the side surfaces of the insulator 250, the conductor 260 and the insulator 270.

[0154] Here, an insulating material is preferably used for the insulator 272 that has a function of preventing the passage of impurities, such as water or hydrogen, and oxygen. For example, an insulator containing oxide(s) of aluminum and / or hafnium can be used. Aluminum oxide, hafnium oxide, an oxide containing aluminum and hafnium (hafnium aluminate), or the like is preferably used for the insulator containing oxide(s) of aluminum and / or hafnium. Therefore, oxygen can be prevented from diffusing outwards in the insulator 250. Furthermore, impurities, such as hydrogen and water, can be prevented from penetrating the oxide 230 through the end section of the insulator 250 and the like.

[0155] By providing the insulator 272, the top and side surfaces of the conductor 260, as well as the side surface of the insulator 250, can be covered with an insulator that prevents the passage of impurities, such as water or hydrogen, and oxygen. This prevents impurities, such as water or hydrogen, from penetrating the oxide 230 through the conductor 260 and the insulator 250. Therefore, the insulator 272 acts as a side barrier to protect the side surfaces of the gate electrode and the gate insulating film.

[0156] In the case where the transistor is miniaturized and designed such that a channel length is approximately greater than or equal to 10 nm and less than or equal to 30 nm, impurity elements contained in the structural parts provided around the transistor 200 could diffuse, and area 231a and area 231b or area 232a and area 232b could be electrically connected to each other.

[0157] For these reasons, if the insulator 272 is designed as described in this embodiment, it can be prevented that impurities, such as hydrogen and water, penetrate the insulator 250 and the conductor 260, and that oxygen diffuses outwards from the insulator 250. Consequently, if the first gate voltage is 0 V, it can be prevented that the source region and the drain region are electrically connected to each other, either directly or via the region 232 or the like.

[0158] The insulator 274 is provided in such a way that it covers the insulator 271, the insulator 272, the oxide 230, the insulator 224 and the like.

[0159] Furthermore, an insulating material that has a function of preventing the passage of impurities, such as water or hydrogen, and oxygen, is preferably used for the insulator 274. For example, silicon nitride, silicon nitride oxide, silicon oxynitride, aluminum nitride, aluminum nitride oxide, or the like is preferably used for the insulator 274. Alternatively, the insulating material can be arranged over aluminum oxide, hafnium oxide, or an oxide containing aluminum and hafnium (hafnium aluminate) so that the insulator 274 can be formed. When such an insulator 274 is formed, it can prevent oxygen from penetrating the insulator 274 and supplying oxygen to the oxygen defects in region 231a and region 231b, thus reducing the charge carrier density. Furthermore, it can prevent impurities, such as...Water or hydrogen pass through insulator 274 and region 231a and region 231b expand excessively towards region 234.

[0160] It should be noted that when region 231 and region 232 are provided by forming the insulator 274, the insulator 274 preferably contains an element that forms an oxygen vacancy in the oxide 230 or an element that is trapped by the oxygen vacancy in the oxide 230. Typical examples of such an element include hydrogen, boron, carbon, nitrogen, fluorine, phosphorus, sulfur, chlorine, titanium, and a noble gas. Typical examples of the noble gas element include helium, neon, argon, krypton, and xenon. When an insulator containing such an element is used as the insulator 274, the element is added to the oxide 230 so that region 231 and region 232 can be formed in the oxide 230.

[0161] Alternatively, a film that extracts and absorbs oxygen contained in region 231 and region 232 can be used as insulator 274. When oxygen is extracted, oxygen vacancies are created in region 231 and region 232. Hydrogen, boron, carbon, nitrogen, fluorine, phosphorus, sulfur, chlorine, titanium, a noble gas, or the like are trapped by oxygen vacancies, thereby reducing the resistance of region 231 and region 232.

[0162] In the case where the capacitor 100 is provided in the same layer as the transistor 200, a conductor 130 is provided such that it overlaps with the area 231 of the oxide 230, which serves as an electrode of the capacitor, with the insulator 274 in between.

[0163] The insulator 280, which serves as an interlayer film, is preferably provided above the insulator 274, or above the insulator 274 and the conductor 130 if the conductor 130 is provided above the insulator 274. As with the insulator 224 or the like, the concentration of impurities, such as water or hydrogen, in the insulator 280 is preferably reduced. It should be noted that the insulator 280 can have a multilayer structure made up of similar insulators.

[0164] Next, conductor 252 (conductor 252a, conductor 252b, conductor 252c and conductor 252d) is provided, which is electrically connected to transistor 200. The conductor 252a, which is electrically connected to the oxide 230, is placed in an opening formed in the insulator 280 and the insulator 274; the conductor 252b, which is electrically connected to the conductor 130, is placed in the opening formed in the insulator 280; the conductor 252c, which is electrically connected to the conductor 260, which serves as the first gate, is placed in the opening formed in the insulator 280, the insulator 274, the insulator 271 and the insulator 270; and the conductor 252d, which is electrically connected to the conductor 205, which serves as the second gate, is placed in an opening formed in the insulator 280, the insulator 274, the insulator 224, the insulator 222 and the insulator 220.It should be noted that if conductor 130 is not provided, conductor 252b may be electrically connected to oxide 230 via the opening formed in insulator 280 and insulator 274. It should also be noted that the top surfaces of conductor 252a, conductor 252b, conductor 252c, and conductor 252d may be on the same plane as the top surface of insulator 280.

[0165] The opening provided by conductor 252b is preferably provided in such a way that it overlaps with at least a part of conductor 203 and at least a part of the opening provided in insulator 220, insulator 222, insulator 224 and oxide 230a, in which case miniaturization and high integration of the semiconductor device can be achieved.

[0166] It should be noted that the conductor 252 can be trained using a Damascene method.

[0167] Conductor 252a is in contact with area 231a, which serves as one of the source and drain regions of transistor 200. Conductor 203 is also in contact with area 231b, which serves as the other of the source and drain regions of transistor 200. Since the resistance of areas 231a and 231b is reduced, the contact resistance between conductor 252a and area 231a, as well as the contact resistance between conductor 203 and area 231b, is also reduced, resulting in a high forward current of transistor 200.

[0168] Here, the conductor 252a is in contact with at least the top surface of the oxide 230, and it is also preferably in contact with the side surface of the oxide 230. In particular, the conductor 252a is preferably in contact with one or both of the side surfaces on the C-side and the side surface on the D-side that intersect the transverse direction of the channel of the oxide 230. Furthermore, the conductor 252a can be in contact with the side surface on the A-side that intersects the longitudinal direction of the channel of the oxide 230. If, in this way, the conductor 252a is in contact not only with the top surface of the oxide 230, but also with the side surface of the oxide 230, the contact area of ​​the contact section between the conductor 252a and the oxide 230 can be increased without increasing the area of ​​a top surface of the contact section, thus reducing the contact resistance between the conductor 252a and the oxide 230.Consequently, miniaturization of the source electrode and the drain electrode of the transistor can be achieved, and furthermore, the forward current can be increased.

[0169] Fig. Figure 1(D) represents a cross-section of a connection between conductor 203 and oxide 230 and capacitor 100. Conductor 130 is preferably wider in the EF direction than oxide 230. Consequently, capacitance can be formed not only from the top surface of oxide 230 and conductor 130, but also from the side surface of oxide 230 and conductor 130, and therefore the capacitance can be increased.

[0170] The conductor 252 can be formed from a first conductor in contact with the inner wall of the opening and a second conductor further inside. Here, the top surfaces of the first and second conductors can be at substantially the same height as the top surface of the insulator 280. It should be noted that, although an example using a two-layer conductor as conductor 252 is described in this embodiment, the conductor is not limited to this. The conductor 252 can be formed using a single layer or a multilayer film of three or more layers.

[0171] Here, preferably for the first conductor used for conductor 252, a conductive material is used that has a function of preventing the diffusion of impurities such as a hydrogen atom, a hydrogen molecule, a water molecule, a nitrogen atom, a nitrogen molecule, a nitrogen oxide molecule (e.g., N₂O, NO, and NO₂), i.e., a conductive material through which the aforementioned impurities are less likely to pass. Alternatively, preferably a conductive material is used that has a function of preventing the diffusion of oxygen (e.g., oxygen atoms and / or oxygen molecules), i.e., a conductive material through which the aforementioned oxygen is less likely to pass.It should be noted that in this description, a function for preventing the diffusion of impurities or oxygen refers to a function for preventing the diffusion of the aforementioned impurities and / or oxygen. In this description, a conductor with such a function is in some cases referred to as a conductive barrier film.

[0172] If the first conductor used for conductor 252 has an oxygen diffusion-preventing function, it can prevent the second conductor used for conductor 252 from absorbing oxygen in the insulator 280 and reducing its conductivity due to oxidation. For example, titanium, titanium nitride, tantalum, tantalum nitride, ruthenium, or ruthenium oxide are preferably used for the conductive material with an oxygen diffusion-preventing function. Therefore, the first conductor used for conductor 252 can be a single layer or a layered arrangement of the aforementioned conductive materials. Furthermore, if the first conductor used for conductor 252 has a function to prevent the diffusion of impurities, such as hydrogen, water, and nitrogen, it can prevent impurities, such as...Hydrogen and water penetrate from above the insulator 280 via the conductor 252 into the transistor 200. In this embodiment, titanium nitride is used for the first conductor, which is used for the conductor 252.

[0173] Furthermore, a conductive material containing tungsten, copper, or aluminum as its main component is preferably used for the second conductor, which is used for conductor 252. In this embodiment, tungsten is used for the second conductor, which is used for conductor 252.

[0174] An insulator that prevents the passage of impurities, such as water or hydrogen, can be provided in contact with the inner wall of the opening in insulator 274 and insulator 280, in which conductor 252 is embedded. Preferably, such an insulator can be used as insulator 270 or insulator 272, such as aluminum oxide. This prevents impurities, such as hydrogen and water, from penetrating from insulator 280 or the like into the oxide 230 via conductor 252. Furthermore, the insulator can be formed with good coverage, for example, using an ALD process, a CVD process, or the like.

[0175] Furthermore, conductors 256, which serve as leads, can be placed in contact with the top surface of conductor 252. For the conductors 256, which serve as leads, a conductive material is preferably used which contains tungsten, copper, or aluminum as its main component. [Capacitor 100]

[0176] As in Fig. As shown in Figure 1, the capacitor 100 shares some components with the transistor 200. In this embodiment, an example of the capacitor 100 is shown in which at least a portion of the region 231b provided in the oxide 230 of the transistor 200 serves as an electrode of the capacitor 100.

[0177] The capacitor 100 includes at least a part of the region 231b of the oxide 230, the insulator 274 over the region 231, and the conductor 130 over the insulator 274. At least a part of the conductor 130 is preferably placed over the insulator 274 such that it overlaps with the region 231b.

[0178] At least part of region 231b of oxide 230 serves as one electrode of capacitor 100, and conductor 130 serves as the other electrode of capacitor 100. This means that region 231b serves both as a source and drain connection of transistor 200 and as an electrode of capacitor 100. The insulator 274 serves as the dielectric of capacitor 100.

[0179] The insulator 280 is preferably provided in such a way that it covers the insulator 274 and the conductor 130.

[0180] For conductor 130, a conductive material containing tungsten, copper, or aluminum as the main component is preferably used. Although not shown, conductor 130 can have a multilayer structure and can, for example, be a layered arrangement of titanium, titanium nitride, and the aforementioned conductive material.

[0181] Furthermore, conductor 252b is in contact with conductor 130, which is an electrode of capacitor 100. Conductor 252b can be formed simultaneously with conductor 252a, conductor 252c, and conductor 252d, thus shortening the process. <Material für eine Halbleitervorrichtung>

[0182] The following describes materials that can be used for a semiconductor device. < <substrat>>

[0183] The substrate on which the transistor 200 is formed can be, for example, an insulator substrate, a semiconductor substrate, or a conductor substrate. Examples of insulator substrates include a glass substrate, a quartz substrate, a sapphire substrate, a stabilized zirconia substrate (e.g., a yttrium-stabilized zirconia substrate), and a resin substrate. Examples of semiconductor substrates include a semiconductor substrate made of silicon, germanium, or the like, and a compound semiconductor substrate made of silicon carbide, silicon germanium, gallium arsenide, indium phosphide, zinc oxide, or gallium oxide. Also specified is a semiconductor substrate in which an insulator region is provided within the aforementioned semiconductor substrate, such as a silicon-on-insulator (SOI) substrate. Examples of the conductive substrate include a graphite substrate, a metal substrate, an alloy substrate, and a conductive resin substrate.Furthermore, a substrate containing a metal nitride, a substrate containing a metal oxide, or the like is specified. Additionally, a substrate that is an insulator provided with a conductor or a semiconductor, a substrate that is a semiconductor substrate provided with a conductor or an insulator, a substrate that is a conductor substrate provided with a semiconductor or an insulator, or the like is specified. Alternatively, any of these substrates, over which an element is provided, may be used. Examples of the element provided over the substrate include a capacitor, a resistor, a switching element, a light-emitting element, and a storage element.

[0184] Alternatively, a flexible substrate can be used. It should be noted that a method exists for providing a transistor over a flexible substrate in which the transistor is formed over a non-flexible substrate and then detached and transferred to the flexible substrate. In this case, a separating layer is preferably provided between the non-flexible substrate and the transistor. The substrate can exhibit elasticity. The substrate can have the property of returning to its original shape when bending or stretching is stopped. Alternatively, the substrate can have the property of not returning to its original shape.The substrate has a region with a thickness of, for example, greater than or equal to 5 µm and less than or equal to 700 µm, preferably greater than or equal to 10 µm and less than or equal to 500 µm, more preferably greater than or equal to 15 µm and less than or equal to 300 µm. If the substrate has a small thickness, the weight of the semiconductor device containing the transistor can be reduced. If the substrate has a small thickness, even if glass or the like is used, the substrate can exhibit elasticity or a property of returning to its original shape when bending or stretching is stopped. Therefore, an impact or the like, caused by dropping or the like, on the semiconductor device above the substrate can be mitigated. That is to say, a robust semiconductor device can be provided.

[0185] The substrate, which is flexible, can be, for example, a metal, alloy, resin, glass, or a fiber thereof. A plate, film, foil, or the like containing a fiber can also be used as the substrate. The flexible substrate preferably has a lower coefficient of linear expansion to prevent deformation due to environmental factors. For example, a material with a coefficient of linear expansion lower than or equal to 1 × 10⁻⁶ is used for the flexible substrate. -3 / K, less than or equal to 5 × 10 -5 / K or less than or equal to 1 × 10 -5 / K is. Examples of the resin include polyester, polyolefin, polyamide (e.g., nylon or aramid), polyimide, polycarbonate, and acrylic. In particular, aramid is advantageously used for the substrate, which is a flexible substrate, because of its low coefficient of linear expansion. < <isolator>>

[0186] Examples of an insulator include an insulating oxide, an insulating nitride, an insulating oxynitride, an insulating nitride oxide, an insulating metal oxide, an insulating metal oxynitride, and an insulating metal nitride oxide.

[0187] Here, miniaturization and high integration of the transistor can be achieved by using a material with a high k-value and high relative permittivity for the gate insulator. Conversely, using a material with a low relative permittivity for the interlayer film insulator can reduce the parasitic capacitance formed between the conductors. Therefore, the material is preferably selected according to the function of the insulator.

[0188] Furthermore, examples of the insulator with high relative permittivity include aluminum oxide, gallium oxide, hafnium oxide, zirconium oxide, an oxide containing aluminum and hafnium, an oxynitride containing aluminum and hafnium, an oxide containing silicon and hafnium, an oxynitride containing silicon and hafnium, and a nitride containing silicon and hafnium.

[0189] Furthermore, examples of the insulator with low relative permittivity include silicon oxide, silicon oxynitride, silicon nitride oxide, silicon nitride, silicon oxide with added fluorine, silicon oxide with added carbon, silicon oxide with added carbon and nitrogen, porous silicon oxide, and a resin.

[0190] Silicon oxide and silicon oxynitride, in particular, are thermally stable. Therefore, a multilayer structure that is thermally stable and exhibits low relative permittivity can be obtained, for example, by combining them with a resin. Examples of resins include polyester, polyolefin, polyamide (e.g., nylon or aramid), polyimide, polycarbonate, and acrylic. Furthermore, for example, combining silicon oxide or silicon oxynitride with an insulator having high relative permittivity allows the multilayer structure to be thermally stable and exhibit high relative permittivity.

[0191] Furthermore, if the transistor is enclosed by an oxide semiconductor and an insulator with a function to prevent the passage of impurities such as hydrogen and oxygen, the electrical properties of the transistor can be stabilized.

[0192] For example, a single layer or a layered arrangement of an insulator containing boron, carbon, nitrogen, oxygen, fluorine, magnesium, aluminum, silicon, phosphorus, chlorine, argon, gallium, germanium, yttrium, zirconium, lanthanum, neodymium, hafnium, or tantalum can be used as an insulator with a function of preventing the passage of impurities such as hydrogen and oxygen. In particular, a metal oxide, such as aluminum oxide, magnesium oxide, gallium oxide, germanium oxide, yttrium oxide, zirconium oxide, lanthanum oxide, neodymium oxide, hafnium oxide, tantalum oxide, silicon nitride oxide, silicon nitride, or the like, can be used as an insulator with a function of preventing the passage of impurities such as hydrogen and oxygen.

[0193] For example, an insulator with a function for preventing the passage of impurities, such as hydrogen and oxygen, can be used as either insulator 222 or insulator 210. It should be noted that an insulator containing oxide(s) of aluminum and / or hafnium can be used as insulator 222 or insulator 210. Aluminum oxide, hafnium oxide, an oxide containing aluminum and hafnium (hafnium aluminate), or the like is preferably used for the insulator containing oxide(s) of aluminum and / or hafnium.

[0194] Insulator 220, insulator 224, insulator 250 and insulator 271, for example, can be a single layer or a layer arrangement of an insulator containing boron, carbon, nitrogen, oxygen, fluorine, magnesium, aluminum, silicon, phosphorus, chlorine, argon, gallium, germanium, yttrium, zirconium, lanthanum, neodymium, hafnium or tantalum. In particular, the insulators preferably contain silicon oxide, silicon oxynitride or silicon nitride.

[0195] For example, if aluminum oxide, gallium oxide, hafnium aluminate, or hafnium oxide is in contact with oxide 230 in each of insulators 224 and 250, which serve as gate insulators, silicon contained in silicon oxide or silicon oxynitride can be prevented from penetrating oxide 230. Conversely, if silicon oxide or silicon oxynitride is in contact with oxide 230 in each of insulators 224 and 250, trapping centers could form at the interface between aluminum oxide, gallium oxide, hafnium aluminate, or hafnium oxide and silicon oxide or silicon oxynitride. In some cases, these trapping centers can shift the transistor's threshold voltage in a positive direction by trapping electrons.

[0196] For the insulator 274, which serves as the dielectric, silicon oxide, silicon oxynitride, silicon nitride oxide, silicon nitride, aluminum oxide, aluminum oxynitride, aluminum nitride oxide, aluminum nitride, hafnium oxide, hafnium oxynitride, hafnium nitride oxide, hafnium nitride, or hafnium aluminate are used, and the insulator is provided as a layered arrangement or a single layer. For example, a multilayer structure consisting of a material with a high k-value, such as aluminum oxide, and a material with a high dielectric strength, such as silicon oxynitride, is preferably used. In this structure, the capacitor 100 can exhibit sufficient capacitance thanks to the high k-value material and increased dielectric strength thanks to the high dielectric strength material. Thus, electrostatic breakdown of the capacitor 100 can be prevented, leading to an improvement in the reliability of the capacitor 100.

[0197] The insulators 208, 212, 216, and 280 preferably contain an insulator with a low relative permittivity. The insulators 208, 212, 216, and 280 preferably contain, for example, silicon dioxide, silicon oxynitride, silicon nitride oxide, silicon nitride, silicon dioxide with added fluorine, silicon dioxide with added carbon, silicon dioxide with added carbon and nitrogen, porous silicon dioxide, a resin, or the like. Alternatively, the insulator 208, the insulator 212, the insulator 216 and the insulator 280 each preferably have a multilayer structure made of a resin and one of the following materials: silicon oxide, silicon oxynitride, silicon nitride oxide, silicon nitride, silicon oxide to which fluorine has been added, silicon oxide to which carbon has been added, silicon oxide to which carbon and nitrogen have been added, and porous silicon oxide.When silicon dioxide and silicon oxynitride, which are thermally stable, are combined with a resin, the resulting multilayer structure can exhibit thermal stability and low relative permittivity. Examples of resins include polyester, polyolefin, polyamide (e.g., nylon or aramid), polyimide, polycarbonate, and acrylic.

[0198] Insulator 270 and insulator 272 can be insulators with a function of preventing the passage of impurities, such as hydrogen and oxygen. For insulator 270 and insulator 272, a metal oxide such as aluminum oxide, hafnium oxide, hafnium aluminate, magnesium oxide, gallium oxide, germanium oxide, yttrium oxide, zirconium oxide, lanthanum oxide, neodymium oxide, tantalum oxide, silicon nitride oxide, silicon nitride, or the like can be used, for example. < <leiter>>

[0199] The conductors can be made of a material containing one or more types of metallic elements, selected from aluminum, chromium, copper, silver, gold, platinum, tantalum, nickel, titanium, molybdenum, tungsten, hafnium, vanadium, niobium, manganese, magnesium, zirconium, beryllium, indium, ruthenium, and the like. Alternatively, a semiconductor with high electrical conductivity, typically polycrystalline silicon containing an impurity element, such as phosphorus, or a silicide, such as nickel silicide, can be used.

[0200] Furthermore, a layered arrangement consisting of a multitude of conductive layers formed from the aforementioned materials can be used. For example, a multilayer structure combining a material containing any of the metallic elements described above with an oxygen-containing conductive material can be used. Alternatively, a multilayer structure combining a material containing any of the metallic elements described above with a nitrogen-containing conductive material can also be used.

[0201] It should be noted that if an oxide is used for the channel-forming region of the transistor, preferably a multilayer structure is used in which a material containing any of the metallic elements described above is combined with an oxygen-containing conductive material for the conductor serving as the gate electrode. In this case, the oxygen-containing conductive material is preferably provided on the side of the channel-forming region. When the oxygen-containing conductive material is provided on the side of the channel-forming region, oxygen released by the conductive material is readily supplied to the channel-forming region.

[0202] In particular, a conductive material containing oxygen and a metallic element present in the metal oxide in which a channel is formed is preferably used for the conductor serving as the gate electrode. Alternatively, a conductive material containing any of the aforementioned metallic elements and nitrogen can be used. For example, a nitrogen-containing conductive material such as titanium nitride or tantalum nitride can be used. Indium tin oxide, indium oxide containing tungsten oxide, indium zinc oxide containing tungsten oxide, indium oxide containing titanium oxide, indium tin oxide containing titanium oxide, indium zinc oxide, or indium tin oxide to which silicon has been added can be used. Indium gallium zinc oxide containing nitrogen can also be used. With any of these materials, hydrogen present in the metal oxide in which a channel is formed can, in some cases, be trapped.Alternatively, hydrogen entering from an external insulator or the like can be captured in some cases.

[0203] For conductor 260, conductor 205, conductor 203, conductor 207, conductor 209, conductor 130, conductor 252, and conductor 256, a material containing one or more types of metallic elements selected from aluminum, chromium, copper, silver, gold, platinum, tantalum, nickel, titanium, molybdenum, tungsten, hafnium, vanadium, niobium, manganese, magnesium, zirconium, beryllium, indium, ruthenium, and the like may be used. Alternatively, a semiconductor with high electrical conductivity, typically polycrystalline silicon, containing an impurity element, such as phosphorus, or a silicide, such as nickel silicide, may be used. < <metalloxid>>

[0204] Preferably, a metal oxide is used as oxide 230, serving as an oxide semiconductor (hereinafter also referred to as the oxide semiconductor). A metal oxide that can be used as oxide 230 of the present invention is described below.

[0205] An oxide semiconductor preferably contains at least indium or zinc. In particular, it preferably contains indium and zinc. It also preferably contains aluminum, gallium, yttrium, tin, or the like. Furthermore, it may contain one or more types of boron, silicon, titanium, iron, nickel, germanium, zirconium, molybdenum, lanthanum, cerium, neodymium, hafnium, tantalum, tungsten, magnesium, and the like.

[0206] This section considers the case where the oxide semiconductor is an In-M-Zn oxide containing indium, element M, and zinc. It should be noted that element M could be aluminum, gallium, yttrium, tin, or the like. Other elements that could be used as element M include boron, silicon, titanium, iron, nickel, germanium, zirconium, molybdenum, lanthanum, cerium, neodymium, hafnium, tantalum, tungsten, magnesium, and the like. It should be noted that a variety of the elements described above could be combined to form element M.

[0207] It should be noted that in this description and similar texts, a metal oxide containing nitrogen is sometimes referred to simply as a metal oxide. Alternatively, a metal oxide containing nitrogen may be called a metal oxynitride.

[0208] Oxide semiconductors are classified into monocrystalline and non-monocrystalline oxide semiconductors. Examples of non-monocrystalline oxide semiconductors include polycrystalline oxide semiconductors and amorphous oxide semiconductors.

[0209] A thin film with high crystallinity is preferably used as the oxide semiconductor for a transistor. The thin film can improve the stability or reliability of the transistor. Examples of thin films include single-crystal oxide semiconductors and polycrystalline oxide semiconductors. However, forming a single-crystal oxide semiconductor or a polycrystalline oxide semiconductor thin film over a substrate requires a high-temperature or laser heating process. Therefore, the manufacturing process costs increase, and the yield decreases.

[0210] Nonpatent document 1 and nonpatent document 2 reported that in 2009 an InGa-Zn oxide with a CAAC structure (designated CAAC-IGZO) was discovered. It was reported that CAAC-IGZO exhibits orientation with respect to the c-axis, a grain boundary is not clearly observed, and CAAC-IGZO can form over a substrate at low temperature. It was also reported that a transistor using CAAC-IGZO exhibits excellent electrical properties and reliability.

[0211] Furthermore, in 2013 an In-Ga-Zn oxide with an nc structure (referred to as nc-IGZO) was discovered (see non-patent document 3). It was reported that nc-IGZO exhibits a regular atomic arrangement within a microscopic range (for example, a range with a size greater than or equal to 1 nm and less than or equal to 3 nm) and that there is no regularity in the crystal orientation between different regions.

[0212] Non-patent documents 4 and 5 demonstrate a change in the average crystal size following electron beam irradiation of thin films of CAAC-IGZO, nc-IGZO, and low-crystallinity IGZO. In the low-crystallinity IGZO thin film, crystalline IGZO with a thickness of approximately 1 nm was observed even before electron beam irradiation. Therefore, it was reported that a fully amorphous structure could not be observed in IGZO. Furthermore, it was shown that the thin films of CAAC-IGZO and nc-IGZO each exhibit higher stability against electron beam irradiation than the low-crystallinity IGZO thin film. Therefore, the thin film of CAAC-IGZO or the thin film of nc-IGZO is preferably used as the semiconductor for the transistor.

[0213] Non-patent document 6 discloses that a transistor using an oxide semiconductor exhibits a very low leakage current in a non-conducting state; in particular, the reverse current per micrometer of the channel width of the transistor is on the order of yA / µm (10 -24 A / µm). For example, a low-power CPU or the like has been disclosed in which a property of the low leakage current of the transistor in which an oxide semiconductor is used is utilized (see non-patent document 7).

[0214] Furthermore, the use of the transistor for the display device has been reported, where a property of the low leakage current of the transistor, in which an oxide semiconductor is used, is exploited (see non-patent document 8). In the display device, a displayed image is changed several tens of times per second. The frequency with which an image is changed per second is called the refresh rate. The refresh rate is also referred to as the operating frequency. Such a high-speed screen change, which is difficult for the human eye to perceive, is considered a cause of eye strain. Therefore, it has been proposed that the refresh rate of a display device be reduced to decrease the number of image rewrites. Moreover, operating at a lower refresh rate allows the power consumption of the display device to be reduced.Here, such an operating procedure is referred to as an Idling Stop (IDS) operation.

[0215] The discovery of the CAAC and nc structures contributes to improving the electrical properties and reliability of transistors using oxide semiconductors with either structure, reducing manufacturing costs, and increasing yield. Furthermore, investigations have been conducted into the transistor's applications in display devices and LSIs, where its low leakage current characteristic is utilized. [Composition of a metal oxide]

[0216] The composition of a cloud-aligned composite oxide semiconductor (CAC-OS) that can be used for a transistor disclosed in an embodiment of the present invention is described below.

[0217] It should be noted that in this description and similar texts, the terms "c-axis aligned crystal (CAAC)" and "cloud-aligned composite (CAC)" may be used. It should be noted that CAAC denotes an example of a crystal structure, while CAC denotes an example of a function or material composition.

[0218] A CAC oxide or CAC metal oxide exhibits conductive properties in one part of the material and insulating properties in another, thus functioning as a semiconductor overall. It should be noted that when the CAC oxide or CAC metal oxide is used in the active layer of a transistor, the conductive properties allow electrons (or holes) to flow as charge carriers, while the insulating properties prevent the flow of electrons. Due to the complementary action of the conductive and insulating properties, the CAC oxide or CAC metal oxide can also exhibit switching (on / off) functionality. Within the CAC oxide or CAC metal oxide, a separation of these properties can maximize each.

[0219] The CAC-OS, or CAC metal oxide, comprises conductive and insulating regions. The conductive regions exhibit the conductive function described above, and the insulating regions exhibit the insulating function described above. In some cases, the conductive and insulating regions are separated on the nanoparticle scale within the material. In other cases, the conductive and insulating regions are unevenly distributed. The conductive regions are sometimes observed to be cloud-coupled, with indistinct boundaries.

[0220] Furthermore, in some cases in the CAC-OS or the CAC metal oxide, the conductive regions and the insulating regions each have a size greater than or equal to 0.5 nm and less than or equal to 10 nm, preferably greater than or equal to 0.5 nm and less than or equal to 3 nm, and they are dispersed in the material.

[0221] The CAC oxide (CAC-OS) contains components with different band gaps. For example, the CAC oxide contains a component with a large band gap due to the insulating region and a component with a small band gap due to the conducting region. In such a composition, charge carriers flow predominantly in the component with the small band gap. The component with the small band gap complements the component with the large band gap, and charge carriers also flow in the component with the large band gap in conjunction with the component with the small band gap. Therefore, when the CAC oxide described above is used in a channel-forming region of a transistor, a high current-driving capability in the transistor's forward state can be obtained, i.e., a high forward current and high field-effect mobility.

[0222] In other words, CAC-OS or CAC metal oxide can be described as a matrix composite material or metal-matrix composite material. [Structure of a metal oxide]

[0223] Oxide semiconductors are classified into single-crystal oxide semiconductors and non-single-crystal oxide semiconductors. Examples of non-single-crystal oxide semiconductors include c-axis-aligned crystalline oxide semiconductors (CAAC-OS), polycrystalline oxide semiconductors, nanocrystalline oxide semiconductors (nc-OS), amorphous-like oxide semiconductors (a-like OS), and amorphous oxide semiconductors.

[0224] The CAAC-OS exhibits an orientation with respect to the c-axis, a multitude of nanocrystals are connected in the direction of the ab-plane, and the crystal structure exhibits distortion. It should be noted that distortion refers to a section where the orientation of a lattice arrangement changes between a region with a uniform lattice arrangement and another region with a uniform lattice arrangement within a region where the multitude of nanocrystals are connected.

[0225] The shape of the nanocrystal is generally hexagonal; however, the shape is not always restricted to a regular hexagon and is, in some cases, an irregular hexagon. Pentagonal, heptagonal, and similar lattice arrangements are sometimes present within the distortion. It should be noted that a distinct grain boundary cannot be observed in the CAAC-OS, even near the distortion. This means that the lattice arrangement is distorted in such a way that the formation of a grain boundary is prevented. This is likely because the CAAC-OS can tolerate distortion thanks to a low density of oxygen atoms arranged towards the ab plane, a change in the interatomic bond distance through substitution of a metallic element, and similar factors.

[0226] CAAC-OS tends to exhibit a layered crystal structure (also referred to as a layered structure) in which a layer containing indium and oxygen (hereinafter referred to as the In layer) and a layer containing the element M, zinc, and oxygen (hereinafter referred to as the (M,Zn) layer) are arranged one above the other. It should be noted that indium and the element M can be substituted for each other, and that if the element M of the (M,Zn) layer is replaced by indium, the layer can also be referred to as the (In,M,Zn) layer. Conversely, if the indium of the In layer is replaced by the element M, the layer can also be referred to as the (In,M) layer.

[0227] CAAC-OS is an oxide semiconductor with high crystallinity. Unlike conventional oxide semiconductors, CAAC-OS is less likely to experience a reduction in electron mobility due to grain boundaries, as a distinct grain boundary is not observed. Impurity intrusion, defect formation, or similar factors could reduce the crystallinity of an oxide semiconductor. This means that CAAC-OS exhibits low levels of impurities and defects (e.g., oxygen vacancies). Therefore, an oxide semiconductor containing CAAC-OS is physically stable. Consequently, an oxide semiconductor with CAAC-OS is heat-resistant and exhibits high reliability.

[0228] In the nc-OS, a microscopic region (for example, a region with a size greater than or equal to 1 nm and less than or equal to 10 nm, in particular a region with a size greater than or equal to 1 nm and less than or equal to 3 nm) exhibits a regular atomic arrangement. There is no regularity in the crystal orientation between different nanocrystals in the nc-OS. Therefore, no orientation of the entire film is observed. Consequently, in some cases, the nc-OS cannot be distinguished from an a-like OS or an amorphous oxide semiconductor, depending on the analytical method used.

[0229] The a-like oxide semiconductor (A-OS) is an oxide semiconductor with a structure intermediate between that of the non-crystalline oxide semiconductor (NC-OS) and the amorphous oxide semiconductor. The A-like OS contains a cavity or region of low density. This means that the A-like OS exhibits lower crystallinity compared to the NC-OS and the CAAC-OS.

[0230] An oxide semiconductor can have different structures that exhibit different properties. Two or more of the amorphous oxide semiconductor, the polycrystalline oxide semiconductor, the a-like oxide semiconductor, the nc-oxide semiconductor, and the CAAC-oxide semiconductor can be included in an oxide semiconductor of an embodiment of the present invention. [Transistor containing oxide semiconductor]

[0231] The case in which the aforementioned oxide semiconductor is used for a transistor is then described.

[0232] It should be noted that when the aforementioned oxide semiconductor is used for a transistor, the transistor can exhibit high field-effect mobility. Furthermore, a transistor with high reliability can be obtained.

[0233] Furthermore, a low-charge-carrying oxide semiconductor is preferably used for the transistor. In cases where the charge-carrying density of an oxide semiconductor film is reduced, the concentration of impurities in the oxide semiconductor film is also reduced, thus lowering the density of defect states. In this description and similar contexts, a state with a low concentration of impurities and a low density of defect states is referred to as a high-purity intrinsic or essentially high-purity intrinsic state. For example, the oxide semiconductor may have a charge-carrying density of less than 8 × 10⁻⁶. 11 / cm 3 , preferably lower than 1 × 10 11 / cm 3 , more strongly preferred lower than 1 × 10 10 / cm 3 , and higher than or equal to 1 × 10 -9 / cm 3 exhibit.

[0234] Furthermore, in some cases a high-purity intrinsic or substantially high-purity intrinsic oxide semiconductor film exhibits a low density of defect states and consequently a low density of capture states.

[0235] Furthermore, charges trapped by the trap states in the oxide semiconductor take a long time to disappear and can behave like fixed charges. Therefore, a transistor whose channel is formed in the oxide semiconductor with a high density of trap states may, in some cases, exhibit unstable electrical properties.

[0236] Therefore, reducing the concentration of impurities in the oxide semiconductor is effective in stabilizing the electrical properties of the transistor. Furthermore, to reduce the impurity concentration in the oxide semiconductor, it is also preferable to reduce the impurity concentration in an adjacent film. Examples of impurities include hydrogen, nitrogen, alkali metals, alkaline earth metals, iron, nickel, and silicon. [Pollution]

[0237] Now the influence of impurities in the oxide semiconductor will be described.

[0238] If silicon or carbon, which are elements of group 14, are present in the oxide semiconductor, defect states will form in the oxide semiconductor. Therefore, the silicon or carbon concentration in the oxide semiconductor and the silicon or carbon concentration (the concentration obtained by secondary ion mass spectrometry (SIMS)) near an interface with the oxide semiconductor are reduced to less than or equal to 2 × 10⁻⁶. 18 atoms / cm² 3 , preferably less than or equal to 2 × 10 17 atoms / cm² 3 set.

[0239] Furthermore, if the oxide semiconductor contains an alkali metal or an alkaline earth metal, defect states are formed and charge carriers are generated in some cases. Therefore, it is likely that a transistor using an oxide semiconductor containing an alkali metal or an alkaline earth metal will exhibit self-conducting properties. For this reason, the alkali metal or alkaline earth metal concentration in the oxide semiconductor is preferably reduced. In particular, the alkali metal or alkaline earth metal concentration in the oxide semiconductor obtained by SIMS is reduced to less than or equal to 1 × 10⁻⁶. 18 atoms / cm² 3 , preferably less than or equal to 2 × 10 18 atoms / cm² 3 set.

[0240] Furthermore, if the oxide semiconductor contains nitrogen, it readily becomes an n-type transistor through the generation of electrons that act as charge carriers, thus increasing the charge carrier density. Consequently, a transistor using a nitrogen-containing oxide semiconductor is likely to exhibit self-conducting properties. For this reason, the nitrogen content in the oxide semiconductor is preferably reduced as much as possible. For example, the nitrogen concentration obtained by SIMS in the oxide semiconductor is reduced to less than 5 × 10⁻⁶. 19 atoms / cm² 3 , preferably less than or equal to 5 × 10 18 atoms / cm² 3 , more strongly preferred, less than or equal to 1 × 10 18 atoms / cm² 3 and even more strongly preferred to be lower than or equal to 5 × 10 17 atoms / cm² 3 set.

[0241] Furthermore, hydrogen contained in the oxide semiconductor reacts with oxygen bonded to a metal atom to form water, thus creating an oxygen vacancy in some cases. As a result of hydrogen penetrating this vacancy, an electron, acting as a charge carrier, is generated in some instances. Additionally, the binding of some hydrogen to oxygen bonded to a metal atom also causes the generation of an electron, acting as a charge carrier. Consequently, a transistor using a hydrogen-containing oxide semiconductor is likely to exhibit self-conducting properties. For this reason, the hydrogen concentration in the oxide semiconductor is preferably reduced as much as possible. In particular, the hydrogen concentration obtained by SIMS in the oxide semiconductor is reduced to less than 1 × 10⁻⁶. 20 atoms / cm² 3 , preferably lower than 1 × 10 19 atoms / cm² 3 , more strongly preferred to be lower than 5 × 10 18 atoms / cm² 3 , even more strongly preferred to values ​​lower than 1 × 10 18 atoms / cm² 3 set.

[0242] If an oxide semiconductor in which impurities are sufficiently reduced is used for a channel-forming region of a transistor, the transistor can exhibit stable electrical properties. <Strukturbeispiel 2 einer Halbleitervorrichtung>

[0243] Below, an example of a semiconductor device of an embodiment of the present invention is described with reference to Fig. 4 described.

[0244] Fig. Figure 4(A) is a top view of a transistor 201. Furthermore, Fig. 4(B), Fig. 4(C) and Fig. 4(D) Cross-sectional views of transistor 201. Here is Fig. 4(B) a cross-sectional view of a section defined by a dashed line AB in Fig. 4(A) is marked, and is also a cross-sectional view of transistor 200 in the longitudinal direction of the channel. Fig. 4(C) is a cross-sectional view of a section defined by a dashed line CD in Fig. 4(A) is marked, and is also a cross-sectional view of transistor 200 in the channel transverse direction. Fig. 4(D) is a cross-sectional view of a section defined by a dashed line EF in Fig. 4(A) is marked, and is also a cross-sectional view showing a connection section between oxide 230 and conductor 203 and a connection section between conductor 252b and oxide 230. For the sake of simplicity of the drawing, some components are shown in the top view in Fig. 4(A) omitted.

[0245] It should be noted that in the Fig. 4 Semiconductor device components shown have the same functions as the components in the semiconductor device that are used in the<Strukturbeispiel 1 einer Halbleitervorrichtung> has been described, are contained, and are identified by the same reference symbols.

[0246] The following is a structure of transistor 201 based on... Fig. 4 described. It should be noted that in this section too, the materials that were described at<Strukturbeispiel 1 einer Halbleitervorrichtung> have been described in detail, as materials that can be used for transistor 201.

[0247] In transistor 201, a conductor 285, serving as a source or drain electrode, is provided above the oxide 230b. An insulator 286 is provided above the conductor 285. The conductor 285 may be made of a material similar to that used for conductor 203, conductor 205, or conductor 260. Tantalum nitride or tungsten is particularly preferred for the conductor 285. The insulator 286 may be made of a material similar to that used for insulator 270 or insulator 272. Providing the insulator 286 prevents oxidation of the conductor 285 and an increase in its electrical resistance. Aluminum oxide is particularly preferred for the insulator 286.Although the channel length of transistor 201 is determined as a function of the length between the conductors 285, a problem could also arise in that the channel length of transistor 201 becomes unintentionally long as a result of oxidation of the end sections of the conductors 285 facing each other. The insulator 286 is preferably provided to prevent such a defect.

[0248] As in Fig. As shown in Figure 4(B), a region of oxide 230b in contact with conductors 285, indicated by a dashed line, becomes a low-resistance n-type region. This is likely due to conductor 285 extracting oxygen from oxide 230b, creating an oxygen vacancy within the oxide. Impurities present inside or outside the oxide 230b are trapped by these oxygen vacancies, thus reducing the region's resistance.

[0249] The low-resistance region of oxide 230b is electrically connected to conductor 203 via the opening provided in insulator 220, insulator 222, insulator 224 and oxide 230a.

[0250] The oxide 230c, an oxide 230d, the insulator 250, the conductor 260, and the insulator 270 are provided such that they partially cover the oxide 230b, the conductor 285, and the insulator 286. It should be noted that, as in Fig. 4(A), Fig. 4(B) and Fig. As shown in Figure 4(C), the width in direction AB and the length in direction CD of conductor 260 are smaller than those of oxide 230c, oxide 230d, insulator 250, and insulator 270. Therefore, insulator 270 covers the top and side surfaces of insulator 250 and is in contact with insulator 250 outside of conductor 260. Since an oxygen-impermeable material is used for insulator 270, oxidation of conductor 260 is prevented by the insulator 270, thus preventing an increase in electrical resistance.

[0251] A material similar to that used for oxide 230b can be used for oxide 230c. A material similar to that used for oxide 230c can be used for oxide 230d. It should be noted that oxide 230c is not necessarily formed.

[0252] In transistor 201, a channel is formed in a region located between the pair of conductors 285 or the pair of low-resistance regions in oxide 230b and oxide 230c.

[0253] An insulator 287 and an insulator 288 are formed above the insulator 280. Preferably, an oxide insulator formed by a sputtering process is used for the insulator 287, and, for example, aluminum oxide, hafnium oxide, or hafnium aluminate is preferably used. With such an insulator 287, oxygen can be added to the insulator 280 through a surface of the insulator 280 that is in contact with the insulator 287, so that the insulator 280 can be brought into an oxygen-excess state. Oxygen supplied to the insulator 280 is supplied to the oxide 230.

[0254] Furthermore, if an insulating material that oxygen is less likely to pass through, such as aluminum oxide, hafnium oxide, or hafnium aluminate, is used for insulator 287, it can prevent oxygen added to insulator 224 and insulator 280 from diffusing upwards during formation. Consequently, oxygen can be added to insulator 280 more efficiently.

[0255] A material similar to that used for insulator 208, insulator 216 and insulator 280 can be used for insulator 288.

[0256] As in Fig. 4(B), Fig. 4(C) and Fig. As shown in Figure 4(D), an opening is provided in insulators, such as insulator 280, insulator 287, and insulator 288, and the conductor 252 (conductor 252a, conductor 252b, conductor 252c, and conductor 252d) is provided in the opening. An insulator 289 is provided between the conductor 252 and the insulators, such as insulator 280, insulator 287, and insulator 288. A material similar to that used for insulator 270 can be used for insulator 289, thereby preventing the ingress of contaminants from insulator 280 and any insulator or conductor above it into the oxide 230.

[0257] Here, the conductor 252a is preferably electrically connected to the oxide 230 by being in contact not only with the conductor 285 above the oxide 230, but also with the side face of the oxide 230. In particular, the conductor 252a is preferably in contact with one or both of the side faces on the C-side and the side face on the D-side that intersect the transverse direction of the channel of the oxide 230. Furthermore, the conductor 252a can be in contact with the side face on the A-side that intersects the longitudinal direction of the channel of the oxide 230. If, in this way, the conductor 252a is in contact with both the side surface of the oxide 230 and the conductor 285, the contact area of ​​the contact section of the conductor 252a and the oxide 230 can be increased without increasing the area of ​​the top of the contact section, so that the contact resistance between the conductor 252a and the oxide 230 can be reduced.Consequently, miniaturization of the source electrode and the drain electrode of the transistor can be achieved, and furthermore, the forward current can be increased.

[0258] Fig. Figure 4(D) shows a cross-section of a connection section between oxide 230 and conductor 203, and of a connection section between conductor 252b and oxide 230. Oxide 230b is electrically connected to conductor 203 via the opening provided in insulator 220, insulator 222, insulator 224, and oxide 230a. It should be noted that, like conductor 252a described above, conductor 252b can be in contact not only with a top surface of conductor 285, but also with a side surface of oxide 230.

[0259] As in Fig. 4(A) and Fig. As shown in Figure 4(D), oxide 230a and oxide 230b are each preferably configured to have a greater width in the EF direction in the region overlapping the opening than the opening itself, in order to cover the opening formed in insulator 220, insulator 222, insulator 224, and oxide 230a. Therefore, the widths of oxide 230a and oxide 230b in the EF direction can be greater than the widths of oxide 230a and oxide 230b in the CD direction in a region where a channel is formed or in a region on the A-side. With such a structure, the contact between oxide 230b and conductor 203 can be reliable. <Herstellungsverfahren des Transistors>

[0260] Next, a manufacturing process for a semiconductor device incorporating the transistor 200 of the present invention will be described using the following examples: Fig. 5 to Fig. 22 described. In Fig. 5 to Fig. 22. In (A) of each drawing, a top view is shown. In addition, (B) of each drawing is a cross-sectional view corresponding to a section marked by a dashed line AB in (A). Furthermore, (C) of each drawing is a cross-sectional view corresponding to a section marked by a dashed line CD in (A). Furthermore, (D) of each drawing is a cross-sectional view corresponding to a section marked by a dashed line EF in (A).

[0261] First, a substrate (not shown) is prepared, and the insulator 208 is formed over the substrate. The insulator 208 can be formed by a sputtering process, a chemical vapor deposition (CVD) process, a molecular beam epitaxy (MBE) process, a pulsed laser deposition (PLD) process, an atomic layer deposition (ALD) process, or the like.

[0262] It should be noted that CVD processes can be classified into plasma-enhanced CVD (PECVD) processes, which use plasma; thermal CVD (TCVD) processes, which use heat; photo-CVD processes, which use light; and so on. Furthermore, CVD processes can be classified according to the source gas used into metal CVD (MCVD) processes and metal-organic CVD (MOCVD) processes.

[0263] Using plasma-assisted CVD, a high-quality film can be formed at a relatively low temperature. Furthermore, thermal CVD does not use plasma and therefore causes less plasma damage to the device. For example, a conductor, electrode, element (such as a transistor or capacitor), or similar component in a semiconductor device could become charged by receiving charges from the plasma. In this case, the accumulated charges could damage the conductor, electrode, element, or similar component in the semiconductor device. In contrast, when a thermal CVD process, which does not use plasma, is employed, no such plasma damage occurs, and the yield of the semiconductor device can be increased.Since no plasma damage is caused during deposition using a thermal CVD process, a film with few defects can be obtained.

[0264] An ALD process is also a deposition method that can reduce plasma damage to an object. An ALD process does not cause plasma damage during deposition, so a film with few defects can be obtained.

[0265] Unlike a deposition process, where particles emitted from a target or the like are deposited, CVD and ALD processes are deposition methods in which a film is formed by a reaction on the surface of an object. Therefore, CVD and ALD processes are less likely to be affected by the shape of an object and offer advantageous step coverage. In particular, ALD processes provide excellent step coverage and thickness uniformity and can be advantageously used, for example, to cover the surface of a high-aspect-ratio aperture.In contrast, an ALD process has a relatively low deposition rate; therefore, in some cases it is preferable to combine an ALD process with another deposition process with a high deposition rate, such as a CVD process.

[0266] In CVD and ALD processes, the composition of a film being formed can be controlled by the ratio of the flow rates of the source gases. For example, a film with a specific composition can be formed using a CVD or ALD process depending on the flow rate ratio of the source gases. Furthermore, a film whose composition changes continuously can be formed using a CVD or ALD process by altering the flow rate ratio of the source gases during film formation.In cases where the film is formed while the flow rate of the source gases is changed, the film formation time can be reduced compared to cases where the film is formed using multiple deposition chambers, as the time required for pressure transfer and regulation is eliminated. Therefore, the productivity of a semiconductor device can be increased in some cases.

[0267] In this embodiment, silicon oxide 208 is deposited as an insulator by a CVD process.

[0268] Next, the insulator 210 is formed over the insulator 208. In this embodiment, aluminum oxide is deposited on the insulator 210 by a sputtering process. The insulator 210 can have a multilayer structure. For example, a structure in which an aluminum oxide layer is deposited by a sputtering process and another layer of aluminum oxide is deposited over the aluminum oxide layer by an aluminum oxide deposition (ALD) process can be used. Alternatively, a structure in which an aluminum oxide layer is deposited by an ALD process and another layer of aluminum oxide is deposited over the aluminum oxide layer by a sputtering process can be used.

[0269] Next, a conductive film 203A and a conductive film 203B are sequentially formed over the insulator 210. The conductive film 203A and the conductive film 203B can be formed by a sputtering process, a CVD process, an MBE process, a PLD process, an ALD process, or the like. In this embodiment, tungsten is deposited for the conductive film 203A by a sputtering process, and titanium nitride is deposited for the conductive film 203B by a sputtering process. It should be noted that a conductor such as aluminum or copper can be used in addition to tungsten for the conductive film 203A. A material that has a higher oxidation resistance (that is less likely to oxidize) than the conductive film 203A is preferably used for the conductive film 203B, and, for example, a metal nitride can be used. Besides titanium nitride, tantalum nitride or the like can be used as a metal nitride.

[0270] Next, masks 262 are formed using a lithography process over the guiding film 203B (see Fig. 5).

[0271] It should be noted that in the lithography process, a photoresist is first exposed through a mask. Next, an exposed area is removed using a developer solution, or it is left intact, thus forming a photoresist mask. An etching treatment is then performed through the photoresist mask, allowing a conductor, semiconductor, insulator, or the like to be shaped into a desired form. The photoresist mask can be formed by exposing the photoresist using, for example, KrF excimer laser light, ArF excimer laser light, extreme ultraviolet (EUV) light, or similar light sources. Alternatively, a liquid immersion technique can be used, in which a section between a substrate and a projection lens is filled with a liquid (e.g., water) to perform the exposure. Instead of the light described above, an electron beam or an ion beam can be used.It should be noted that no mask is necessary when using an electron beam or an ion beam. It should also be noted that to remove the photoresist mask, a dry etching treatment, such as ashing, or a wet etching treatment can be performed; wet etching can be performed after a dry etching treatment; or dry etching can be performed after a wet etching treatment.

[0272] A hard mask formed from an insulator or a conductor can be used instead of the photoresist mask. In the case where a hard mask is used, a hard mask of a desired shape can be formed by forming an insulating or conductive film, serving as the hard mask material, over conductive film 203B, forming a photoresist mask over it, and then etching the hard mask material.

[0273] Next, the guiding film 203A and the guiding film 203B are processed using masks 262 to form the conductor 203, which includes conductor 203a and conductor 203b above conductor 203a, and the conductor 205, which includes conductor 205a and conductor 205b above conductor 205a (see Fig. 6).

[0274] For processing, either a dry or a wet etching process can be used. A dry etching process is suitable for microstructuring.

[0275] A capacitively coupled plasma (CCP) etching system incorporating parallel plate electrodes can be used as a dry etching device. This CCP etching system can have a configuration where a high-frequency current is applied to one of the parallel plate electrodes. Alternatively, a configuration where different high-frequency currents are applied to one of the parallel plate electrodes can be used. Alternatively, a configuration where high-frequency currents of the same frequency are applied to the parallel plate electrodes can be used. Alternatively, a configuration where high-frequency currents of different frequencies are applied to the parallel plate electrodes can be used. Alternatively, a dry etching system incorporating a high-density plasma source can be used.For example, an inductively coupled plasma (ICP) etching system can be used as a dry etching system that includes a high-density plasma source.

[0276] In the case where a hard mask is used for etching conductive film 203A and conductive film 203B, the etching treatment can be performed after the photoresist mask used to form the hard mask has been removed, or the etching treatment can be performed while the photoresist mask remains in place. In the latter case, the photoresist mask can be removed during the etching process. The hard mask can be removed by etching after the aforementioned conductive film has been etched. Conversely, if the hard mask material does not affect the subsequent process or can be used in the subsequent process, the hard mask is not necessarily removed.

[0277] Next, an insulating film 216A is formed over the insulator 210, the conductor 203 and the conductor 205 (see Fig. 7) The insulating film 216A can be formed by a sputtering process, a CVD process, an MBE process, a PLD process, an ALD process, or the like. In this embodiment, silicon oxide is formed as the insulating film 216A by a CVD process.

[0278] Next, part of the insulating film 216A is removed by a CMP treatment, exposing conductors 203 and 205. As a result, the insulator 216 remains between and around conductors 203 and 205. In this way, the insulator 216, conductors 203, and conductors 205, whose top surfaces are flat, can be formed (see Fig. 8) It should be noted that in some cases, CMP treatment may result in the partial removal of conductor 203b and conductor 205b.

[0279] Next, the insulator 220 is formed above the insulator 216, the conductor 203, and the conductor 205. The insulator 220 can be formed by a sputtering process, a CVD process, an MBE process, a PLD process, an ALD process, or the like.

[0280] Next, the insulator 222 is formed over the insulator 220. The insulator 222 can be formed by a sputtering process, a CVD process, an MBE process, a PLD process, an ALD process, or the like.

[0281] In particular, an insulator containing aluminum and / or hafnium oxide(s) is preferably used as insulator 222. Aluminum oxide, hafnium oxide, an oxide containing aluminum and hafnium (hafnium aluminate), or the like is preferably used for the insulator containing aluminum and / or hafnium oxide(s). The insulator 222 is preferably formed by an ALD process. The insulator 222 formed by an ALD process exhibits a barrier property against oxygen, hydrogen, and water. If the insulator 222 exhibits a barrier property against hydrogen and water, hydrogen and water in the structural parts provided around the transistor 200 do not diffuse into the transistor 200, and the formation of oxygen defects in the oxide 230 can be prevented.

[0282] Next, the insulator 224 is formed over the insulator 222. The insulator 224 can be formed by a sputtering process, a CVD process, an MBE process, a PLD process, an ALD process, or the like (see Fig. 9).

[0283] Subsequently, a heat treatment is preferably carried out. The heat treatment can be carried out at a temperature higher than or equal to 250 °C and lower than or equal to 650 °C, preferably higher than or equal to 300 °C and lower than or equal to 500 °C, more preferably higher than or equal to 320 °C and lower than or equal to 450 °C. The first heat treatment is carried out in a nitrogen atmosphere, an inert gas atmosphere, or an atmosphere containing an oxidizing gas at a concentration of 10 ppm or more, 1% or more, or 10% or more. Alternatively, the first heat treatment can be carried out as follows: A heat treatment is carried out in a nitrogen atmosphere or an inert gas atmosphere, and then a further heat treatment is carried out in an atmosphere containing an oxidizing gas at a concentration of 10 ppm or more, 1% or more, or 10% or more to compensate for any oxygen released.

[0284] The above heat treatment can remove impurities, such as hydrogen and water, contained in the insulator 224.

[0285] Alternatively, a plasma treatment using oxygen at reduced pressure can be performed during heat treatment. The plasma treatment using oxygen is preferably carried out, for example, using a device that includes a power source for generating high-density plasma using microwaves. Alternatively, a power source can be provided for applying a radio frequency (RF) signal to the substrate side. The use of the high-density plasma enables the formation of high-density oxygen radicals, and the application of the RF signal to the substrate side enables the efficient delivery of oxygen radicals generated by the high-density plasma into the insulator 224.Alternatively, after plasma treatment using an inert gas has been performed with the device, plasma treatment using oxygen can be carried out to compensate for any oxygen released. It should be noted that the initial heat treatment is not necessarily required in some cases.

[0286] The heat treatment can also be carried out after the formation of insulator 220 and after the formation of insulator 222. Although the heat treatment can be carried out under the conditions described above, the heat treatment after the formation of insulator 220 is preferably carried out in a nitrogen-containing atmosphere.

[0287] In this embodiment, after the insulator 224 has been formed, a heat treatment is carried out for one hour in a nitrogen atmosphere at a temperature of 400 °C.

[0288] Next, an oxide film 230A, which becomes oxide 230a, is formed over the insulator 224.

[0289] The oxide film 230A can be formed by a sputtering process, a CVD process, an MBE process, a PLD process, an ALD process or the like.

[0290] In the case where the oxide film 230A is formed, for example, by a sputtering process, oxygen or a gas mixture of oxygen and a noble gas is used as the sputtering gas. Increasing the proportion of oxygen in the sputtering gas can increase the amount of excess oxygen in the oxide film being formed. In the case where the aforementioned oxide film is formed by a sputtering process, the target can be an In-M-Zn oxide.

[0291] In particular, during the formation of the oxide film 230A, some of the oxygen contained in the sputtering gas is supplied to the insulator 224 in certain cases. It should be noted that the proportion of oxygen in the sputtering gas for the oxide film 230A is 70% or higher, preferably 80% or higher, more preferably 100%.

[0292] In this embodiment, the oxide film 230A is formed by a sputtering process using a target of In:Ga:Zn = 1:3:4 [atomic ratio]. It should be noted that the oxide film is preferably formed by suitable selection of formation conditions and an atomic fraction to exhibit properties required for oxide 230.

[0293] Next, an opening extending to conductor 203 is formed in insulator 220, insulator 222, insulator 224, and oxide film 230A by a lithographic process. First, a mask 263 is formed over oxide film 230A (see Fig. 9) The mask 263, which is used to form the opening, can be a photoresist mask or a hard mask.

[0294] Next, the insulator 220, the insulator 222, the insulator 224 and the oxide film 230A are processed using the mask 263 to expose the surface of the conductor 203, so that the opening is formed (see Fig. 10) A dry etching process or a wet etching process can be used for processing. A dry etching process is suitable for microstructuring. It should be noted that the insulator 220, the insulator 222, and the insulator 224 are processed through the oxide film 230A. In particular, so that the surface of the conductor 203 is partially exposed, a mask, formed from a photoresist mask, a hard mask, or the like, is formed over the oxide film 230A, and then the insulator 220, the insulator 222, the insulator 224, and the oxide film 230A are processed. That is, the mask is not formed on a surface of the insulator (of the insulator 220, the insulator 222, and the insulator 224) that serves as the gate insulating film.Therefore, the mask does not adhere to the surface of the insulator, which serves as the gate insulating film. This prevents the gate insulating film from being contaminated and damaged by impurities in the photoresist mask, components in the hard mask, and components in the chemical solution and plasma used to remove the mask. Such a process enables a highly reliable manufacturing method for semiconductor devices.

[0295] Next, an oxide film 230B is formed over the oxide film 230A (see Fig. 11) The oxide film 230B is also formed in the protruding opening and is electrically connected to the conductor 203 via the opening. If the oxide 230b is connected to the conductor 203 without being connected via the oxide 230a, the series resistance and the contact resistance can be reduced. With such a structure, a semiconductor device with advantageous electrical properties can be obtained. In particular, a transistor with an increased forward current and a semiconductor device in which the transistor is used can be obtained.

[0296] The oxide film 230B can be formed by a sputtering process, a CVD process, an MBE process, a PLD process, an ALD process or the like.

[0297] In the case where the oxide film 230B is formed, for example, by a sputtering process, oxygen or a gas mixture of oxygen and a noble gas is used as the sputtering gas. Increasing the proportion of oxygen in the sputtering gas can increase the amount of excess oxygen in the oxide film to be formed. In the case where the aforementioned oxide film is formed by a sputtering process, the target can be an In-M-Zn oxide.

[0298] In the case where the oxide film 230B is formed by a sputtering process and the oxygen content in the sputtering gas during deposition is greater than or equal to 1% and less than or equal to 30%, preferably greater than or equal to 5% and less than or equal to 20%, an oxygen-deficient oxide semiconductor is formed. A transistor using an oxygen-deficient oxide semiconductor can exhibit a relatively high field-effect mobility.

[0299] In this embodiment, the oxide film 230B is formed by a sputtering process using a target of In:Ga:Zn = 4:2:4.1 [atomic ratio]. It should be noted that the oxide film is preferably formed by suitable selection of formation conditions and an atomic fraction to exhibit properties required for oxide 230.

[0300] Next, a heat treatment can be carried out. The heat treatment conditions described above can be used for this purpose. The heat treatment removes impurities, such as hydrogen and water, from oxide film 230A and oxide film 230B. In this embodiment, a treatment is carried out for one hour in a nitrogen atmosphere at a temperature of 400 °C, followed successively by a further treatment for one hour in an oxygen atmosphere at a temperature of 400 °C.

[0301] Next, oxide film 230A and oxide film 230B are processed into island forms to form oxide 230a and oxide 230b (see Fig. 12).

[0302] As in Fig. 12(A) and Fig. As shown in Figure 12(D), oxide 230a and oxide 230b are each preferably configured to have a greater width in the EF direction in the region overlapping the opening formed in insulator 220, insulator 222, insulator 224, and oxide 230a than the opening itself. Therefore, the widths of oxide 230a and oxide 230b in the EF direction can be greater than their widths in the CD direction in a region where a channel is formed or in a region on the A-side. With such a structure, contact between oxide 230b and conductor 203 can be reliable. Furthermore, the area of ​​capacitor 100 can be increased, and an increase in its capacitance can be expected.

[0303] It should be noted that in the preceding step, the insulator 224 can be processed into an island form. Furthermore, the insulator 224 can be subjected to a partial etching. If the insulator 224 is subjected to a partial etching, it will also remain under the oxide 230c, which is formed in a later step. It should be noted that the insulator 224 can be processed into an island form if an insulating film 272A is processed in a later step. In this case, the insulator 222 can be used as an etch-stopper film.

[0304] Here, oxide 230a and oxide 230b are configured to overlap at least partially with conductor 205. The side faces of oxide 230a and oxide 230b are preferably substantially perpendicular to insulator 222. When the side faces of oxide 230a and oxide 230b are substantially perpendicular to insulator 222, a plurality of transistors 200 can be provided to achieve a small area and high density. It should be noted that the angle formed by the side faces of oxide 230a and oxide 230b and a top view of insulator 222 can be acute. In this case, the angle formed by the side faces of oxide 230a and oxide 230b and the top view of insulator 222 is preferably larger.

[0305] There is a curved surface between the side faces of oxide 230a and oxide 230b and a top face of oxide 230b. This means that an end section of the side face and an end section of the top face are preferably curved (hereinafter also referred to as the rounded shape). The radius of curvature of the curved surface at the end sections of oxide 230a and oxide 230b is, for example, greater than or equal to 3 nm and less than or equal to 10 nm, preferably greater than or equal to 5 nm and less than or equal to 6 nm.

[0306] It should be noted that if the end sections are not square, the film coverage will be improved in a later film training process.

[0307] It should be noted that the oxide film is processed using a lithographic process. Either a dry or wet etching process can be used for this processing. A dry etching process is suitable for microstructuring.

[0308] It should be noted that in the lithography process, a photoresist is first exposed through a mask. Next, an exposed area is removed using a developer solution, or it is left intact, thus forming a photoresist mask. An etching treatment is then performed through the photoresist mask, allowing a conductor, semiconductor, insulator, or the like to be shaped into a desired form. The photoresist mask can be formed by exposing the photoresist using, for example, KrF excimer laser light, ArF excimer laser light, extreme ultraviolet (EUV) light, or similar light sources. Alternatively, a liquid immersion technique can be used, in which a section between a substrate and a projection lens is filled with a liquid (e.g., water) to perform the exposure. Instead of the light described above, an electron beam or an ion beam can be used.It should be noted that no mask is necessary when using an electron beam or an ion beam. It should also be noted that to remove the photoresist mask, a dry etching treatment, such as ashing, or a wet etching treatment can be performed; wet etching can be performed after a dry etching treatment; or dry etching can be performed after a wet etching treatment.

[0309] A hard mask formed from an insulator or a conductor can be used instead of the photoresist mask. In this case, a hard mask of a desired shape can be formed by forming an insulating or conductive film, serving as the hard mask material, over the oxide film 230B, forming a photoresist mask over it, and then etching the hard mask material. Etching of the oxide films 230A and 230B can be performed after the photoresist mask has been removed, or it can be performed while the photoresist mask remains in place. In the latter case, the photoresist mask can be removed during etching. The hard mask can be removed by etching after the aforementioned oxide film has been etched.In contrast, the hard mask is not necessarily removed if the material of the hard mask does not affect the following process or can be used in the following process.

[0310] A capacitively coupled plasma (CCP) etching system incorporating parallel plate electrodes can be used as a dry etching device. This CCP etching system can have a configuration where a high-frequency current is applied to one of the parallel plate electrodes. Alternatively, a configuration where different high-frequency currents are applied to one of the parallel plate electrodes can be used. Alternatively, a configuration where high-frequency currents of the same frequency are applied to the parallel plate electrodes can be used. Alternatively, a configuration where high-frequency currents of different frequencies are applied to the parallel plate electrodes can be used. Alternatively, a dry etching system incorporating a high-density plasma source can be used.For example, an inductively coupled plasma (ICP) etching system can be used as a dry etching system that includes a high-density plasma source.

[0311] In some cases, the treatment, such as dry etching, causes impurities to adhere to or diffuse into a surface or interior of oxide 230a, oxide 230b, or the like, due to an etching gas or the like. Examples of impurities include fluorine and chlorine.

[0312] To remove contaminants or similar substances, cleaning is carried out. Examples of cleaning methods include wet cleaning using a cleaning solution or similar, plasma treatment, and cleaning by heat treatment; any of these cleaning methods can be used in a suitable combination.

[0313] Wet cleaning can be carried out using an aqueous solution in which oxalic acid, phosphoric acid, hydrofluoric acid, or the like is diluted with carbonated or pure water. Alternatively, ultrasonic cleaning with pure or carbonated water can be performed. In this embodiment, ultrasonic cleaning with pure or carbonated water is used.

[0314] A heat treatment can then be carried out. The heat treatment conditions described above can be used.

[0315] Then an oxide film 230C, an insulating film 250A, a conductive film 260A, a conductive film 260B, an insulating film 270A and an insulating film 271A are successively formed over the insulator 224, the oxide 230a and the oxide 230b (see Fig. 13).

[0316] The oxide film 230C can be formed by a sputtering process, a CVD process, an MBE process, a PLD process, an ALD process, or the like. The oxide film 230C can be formed according to the properties required for the oxide 230C by a formation process similar to that of the oxide film 230A or the oxide film 230B. In this embodiment, the oxide film 230C is formed by a sputtering process using a target of In:Ga:Zn = 1:3:4 [atomic ratio].

[0317] The insulating film 250A can be formed by a sputtering process, a CVD process, an MBE process, a PLD process, an ALD process or the like.

[0318] It should be noted that oxygen is excited by microwaves to generate high-density oxygen plasma, and the insulating film 250A is exposed to the oxygen plasma, thereby supplying oxygen to the insulating film 250A, the oxide 230a, the oxide 230b and the oxide film 230C.

[0319] Furthermore, heat treatment can be carried out. The heat treatment conditions described above can be used for this purpose. Heat treatment can reduce the moisture and hydrogen concentrations in the 250A insulating film.

[0320] The conductive film 260A can be formed by a sputtering process, a CVD process, an MBE process, a PLD process, an ALD process, or the like. In this embodiment, titanium nitride is formed for the conductive film 260A by a sputtering process.

[0321] The conductive film 260B can be formed by a sputtering process, a CVD process, an MBE process, a PLD process, an ALD process, or the like. If a low-resistance metal film is used as the conductive film 260B, a low-voltage transistor can be provided. In this embodiment, tungsten is formed as the conductive film 260B by a sputtering process.

[0322] A conductor can be provided between the insulating film 250A and the conductive film 260A. The conductor can be formed by a sputtering process, a CVD process, an MBE process, a PLD process, an ALD process, or the like. For example, if an oxide semiconductor that can be used as oxide 230 is subjected to a treatment to reduce its resistance, the oxide semiconductor becomes a conductive oxide. Therefore, an oxide that can be used as oxide 230 can be formed, and the resistance of the oxide can be reduced in a subsequent step. It should be noted that if an oxide that can be used as oxide 230 is formed by a sputtering process in an oxygen-containing atmosphere over the insulating film 250A, oxygen can be added to the insulating film 250A.If oxygen is added to the insulating film 250A, the added oxygen can be supplied to the oxide 230 through the insulating film 250A.

[0323] A heat treatment can then be carried out. The heat treatment conditions described above can be used for this purpose. It should be noted that in some cases, the heat treatment is not necessarily carried out. In this embodiment, the treatment is carried out for one hour in a nitrogen atmosphere at a temperature of 400 °C.

[0324] The insulating film 270A can be formed by a sputtering process, a CVD process, an MBE process, a PLD process, an ALD process, or the like. Since the insulating film 270A serves as a barrier film, an insulating material with a function to prevent the passage of impurities, such as water or hydrogen, and oxygen, is used. For example, aluminum oxide, hafnium oxide, hafnium aluminate, or the like are preferably used. Therefore, oxidation of the conductor 260 can be prevented. Furthermore, the penetration of impurities, such as water or hydrogen, through the conductor 260 and the insulator 250 into the oxide 230 can be prevented.

[0325] The insulating film 271A can be formed by a sputtering process, a CVD process, an MBE process, a PLD process, an ALD process, or the like. Here, the thickness of the insulating film 271A is preferably greater than the thickness of the insulating film 272A, which is formed in a subsequent step. In this case, the insulator 271 can easily remain above the conductor 260 when the insulator 272 is formed in a later step.

[0326] The insulator 271 serves as a hard mask. The provision of the insulator 271 enables the side face of the insulator 250, a side face of the conductor 260a, a side face of the conductor 260b, a side face of the conductor 260c and the side face of the insulator 270 to be formed substantially perpendicular to the substrate.

[0327] Next, insulating film 271A is etched to form insulator 271. Subsequently, using insulator 271 as a mask, insulating film 250A, conductive film 260A, conductive film 260B, and insulating film 270A are etched to form insulator 250, conductor 260 (conductor 260a and conductor 260b), and insulator 270 (see Fig. 14) It should be noted that even after processing, the subsequent process can be carried out without removing the hard mask. The hard mask can also serve as a hard mask used for adding a dopant in the subsequent process.

[0328] The side face of the insulator 250, the side face of the conductor 260, and the side face of the insulator 270 are preferably located on the same surface. The surface shared by the side face of the insulator 250, the side face of the conductor 260, and the side face of the insulator 270 is preferably substantially perpendicular to the substrate. That is to say, in a cross-sectional shape, the angle between the top surface of the oxide 230 and the insulator 250, the conductor 260, and the insulator 270 is preferably an acute angle or larger. It should be noted that, in the cross-sectional shape, the angle formed by the top surface of the oxide 230 in contact with the insulator 250 and the side faces of the insulator 250, the conductor 260, and the insulator 270 can also be an acute angle.In this case, the angle formed by the top of the oxide 230, which is in contact with the insulator 250, and the side surfaces of the insulator 250, the conductor 260 and the insulator 270 is preferably as large as possible.

[0329] The insulator 250, the conductor 260 and the insulator 271 are designed such that they overlap at least partially with the conductor 205 and the oxide 230.

[0330] An upper section of the oxide film 230C in an area that does not overlap with the insulator 250 can be etched by the aforementioned etching. In this case, the thickness of the oxide film 230C in an area that overlaps with the insulator 250 can be greater than the thickness of the oxide film 230C in the area that does not overlap with the insulator 250.

[0331] Next, the insulating film 272A is formed such that it covers the oxide film 230C, the insulator 250, the conductor 260, the insulator 270 and the insulator 271 (see Fig. 15) The insulating film 272A is preferably formed by an ALD process, which provides good coverage. Using an ALD process, the insulating film 272A, which has a uniform thickness, can also be formed on the side faces of the insulator 250, the conductor 260, and the insulator 270 in a stepped section caused by the conductor 260 and the like.

[0332] Next, the insulating film 272A is subjected to anisotropic etching, which forms the insulator 272 in contact with the side faces of the insulator 250, the conductor 260 and the insulator 270 (see Fig. 16) An anisotropic etching treatment is preferably carried out as a dry etching treatment. In this way, the insulating film, which is formed on a plane that is substantially parallel to the surface of the substrate, can be removed so that the insulator 272 can be formed in a self-aligning manner.

[0333] Here, the insulator 271 is formed over the insulator 270, allowing the insulator 270 to remain even if sections of the insulating film 272A located over the insulator 270 are removed. The height of a structural part consisting of the insulator 250, the conductor 260, the insulator 270, and the insulator 271 is greater than the combined height of the oxide 230a, the oxide 230b, and the oxide film 230C, allowing the insulating film 272A to be removed from the side faces of the oxide 230a and the oxide 230b, with the oxide film 230C sandwiched between them. Furthermore, if the end sections of oxide 230a and oxide 230b each have a rounded shape, the time required to remove the insulating film 272A, which is formed on the side surfaces of oxide 230a and oxide 230b, with oxide film 230C in between, can be reduced, leading to easier formation of the insulator 272.

[0334] Next, the oxide film 230C is etched using the insulator 250, the conductor 260, the insulator 270, the insulator 271 and the insulator 272 as masks, and part of the oxide film 230C is removed so that the oxide 230c is formed (see Fig. 17) It should be noted that this process may partially remove the top and side surfaces of oxide 230b and the side surfaces of oxide 230a in some cases.

[0335] Regions 231, 232, and 234 can be formed in oxides 230a, 230b, and 230c, respectively. Regions 231 and 232 are regions whose resistance is reduced by adding a metal atom, such as indium, or impurities to a metal oxide provided as oxide 230a, 230b, or 230c. It should be noted that each of these regions has a higher conductivity than at least oxide 230b in region 234.

[0336] To reduce the resistance of region 231 and region 232, for example a dopant consisting of the metallic element, such as indium, and / or impurities can be added.

[0337] It should be noted that, as an adjunct to the doping process, an ion implantation method, in which an ionized source gas undergoes mass separation and is then added, an ion doping method, in which an ionized source gas is added without mass separation, a plasma immersion ion implantation method, or the like can be used. In the case where mass separation is performed, the ion species to be added and their concentration can be appropriately controlled. In the case where, on the other hand, no mass separation is performed, ions at high concentrations can be added in a short time. Alternatively, an ion doping method can also be used, in which atomic or molecular clusters are generated and ionized. Instead of the term "doping agent," the terms "ion," "donor," "acceptor," "impurity," "element," or the like can be used.

[0338] Alternatively, a dopant can be added by plasma treatment. In this case, the plasma treatment is carried out using a plasma CVD device, a dry etching device, or an ashing device, so that a dopant can be added to oxide 230a, oxide 230b, and oxide 2s30c.

[0339] Furthermore, if impurities are added as dopants, a film containing a dopant can be formed in contact with region 231. For example, the insulator 274, which contains hydrogen, boron, carbon, nitrogen, fluorine, phosphorus, or the like as a dopant, is formed in contact with region 231 of oxide 230 (see Fig. 18) Thanks to the formation of the insulator 274 and the heat treatment after formation, the resistance of region 231 is reduced, and region 232 is formed. It is assumed that the dopant contained in the insulator 274 diffuses into region 231 and region 232 to reduce the resistance of the region.

[0340] Increasing the indium content of oxides 230a, 230b, and 230c can increase the charge carrier density and reduce the resistance. Therefore, a metallic element that improves the charge carrier density of oxides 230a, 230b, and 230c, such as indium, can be used as a dopant.

[0341] This means that if the proportion of a metal atom, such as indium, in oxide 230a, oxide 230b and oxide 230c is increased in region 231 and region 232, the electron mobility can be increased and the resistance can be reduced.

[0342] Therefore, the atomic ratio of indium to element M is greater at least in region 231 than the atomic ratio of indium to element M in region 234.

[0343] The dopant can be the element that forms an oxygen vacancy, the element that is trapped by an oxygen vacancy, or the like. Typical examples of dopants include hydrogen, boron, carbon, nitrogen, fluorine, phosphorus, sulfur, chlorine, titanium, and a noble gas. Typical examples of noble gases include helium, neon, argon, krypton, and xenon.

[0344] When region 232 is provided in transistor 200, a high-impedance region is not formed between region 231, which serves as the source or drain region, and region 234, where a channel is formed. This allows the forward current and mobility of the transistor to be increased. Because region 232 prevents the gate from overlapping with the source and drain regions in the longitudinal direction of the channel, the formation of unnecessary capacitance is prevented. Furthermore, region 232 reduces leakage current in a non-conducting state.

[0345] Therefore, by appropriately selecting the areas of region 231a and region 231b, a transistor with electrical properties required for circuit design can be easily provided.

[0346] In this embodiment, the insulator 274 is designed such that it covers the insulator 224, the oxide 230, the insulator 271 and the insulator 272 (see Fig. 18).

[0347] For the insulator 274, for example, silicon nitride, silicon nitride oxide, or silicon oxynitride produced by a CVD process can be used. In this embodiment, silicon nitride oxide is used for the insulator 274. In the case where the insulator 274 is used as the dielectric of the capacitor 100, its thickness is greater than or equal to 1 nm and less than or equal to 20 nm, preferably greater than or equal to 3 nm and less than or equal to 10 nm.

[0348] When the insulator 274, containing an impurity such as nitrogen, comes into contact with the oxide 230, impurities such as hydrogen or nitrogen, present in a deposition atmosphere of the insulator 274, are added to region 231a and region 231b. Oxygen vacancies are formed due to the added impurities, and these impurities penetrate the oxygen vacancies primarily in a region of the oxide 230 in contact with the insulator 274, thereby increasing the charge carrier density and reducing the resistance. The impurities also diffuse into region 232, which is not in contact with the insulator 274, thus reducing the resistance of region 232.

[0349] Therefore, region 231a and region 231b may preferably have a higher hydrogen and / or nitrogen concentration than region 234. The hydrogen or nitrogen concentration can be measured by secondary ion mass spectrometry (SIMS) or the like. Here, the hydrogen or nitrogen concentration in the middle of the region of oxide 230b that overlaps with insulator 250 (e.g., in a section of oxide 230b equidistant from both side faces in the longitudinal direction of the channel of insulator 250) can be measured as the hydrogen or nitrogen concentration in region 234.

[0350] It should be noted that when an element forming an oxygen vacancy, or an element trapped by an oxygen vacancy, is added to region 231 and region 232, the resistance of these regions is reduced. Typical examples of the element include hydrogen, boron, carbon, nitrogen, fluorine, phosphorus, sulfur, chlorine, titanium, and a noble gas. Typical examples of the noble gas element include helium, neon, argon, krypton, and xenon. Therefore, region 231 and region 232 are preferably designed to contain one or more of the aforementioned elements.

[0351] Alternatively, a film that extracts and absorbs oxygen contained in region 231 and region 232 can be used as insulator 274. When oxygen is extracted, oxygen vacancies are created in region 231 and region 232. Hydrogen, boron, carbon, nitrogen, fluorine, phosphorus, sulfur, chlorine, titanium, a noble gas, or the like are trapped by oxygen vacancies, thereby reducing the resistance of region 231 and region 232.

[0352] In the case where the insulator 274 is formed as an insulator containing an element serving as an impurity, or as an insulator that extracts oxygen from the oxide 230, a sputtering process, a CVD process, an MBE process, a PLD process, an ALD process or the like may be used for the formation of the insulator 274.

[0353] The insulator 274, which contains an impurity, is preferably formed in an atmosphere containing nitrogen and / or hydrogen. By carrying out the formation in such an atmosphere, oxygen defects are formed mainly in the region of oxide 230b and oxide 230c that does not overlap with the insulator 250, and the oxygen defects and impurity elements, such as nitrogen and hydrogen, are bound together, leading to an increase in the charge carrier density. In this way, region 231a and region 231b can be formed with reduced resistance. For example, silicon nitride, silicon nitride oxide, or silicon oxynitride formed by a CVD process can be used for the insulator 274. In this embodiment, silicon nitride oxide is used for the insulator 274.

[0354] The insulator 274 can have a multilayer structure consisting of two or more layers. The insulator 274 can be formed by a CVD process, an ALD process, a sputtering process, or the like. An ALD process is advantageous for depositing a step section formed by the oxide 230 or the conductor 260 because it exhibits excellent step coverage, excellent thickness uniformity, and excellent thickness controllability. An insulator with a thickness greater than or equal to 0.5 nm and less than or equal to 5.0 nm can be formed by an ALD process, and then an insulator with a thickness greater than or equal to 1 nm and less than or equal to 20 nm, preferably greater than or equal to 3 nm and less than or equal to 10 nm, can be deposited over it by a plasma CVD process, so that the insulator 274 can be formed.For example, silicon nitride, silicon nitride oxide, silicon oxynitride, or silicon oxide formed by a plasma-CVD process can be arranged over aluminum oxide, hafnium oxide, and an oxide containing aluminum and hafnium (hafnium aluminate) formed by an ALD process, such that the insulator 274 can be formed. Alternatively, an insulator with a thickness greater than or equal to 1 nm and less than or equal to 20 nm, preferably greater than or equal to 3 nm and less than or equal to 10 nm, can be formed by a plasma-CVD process, such that the insulator 274 can be formed from a single layer. For example, silicon nitride, silicon nitride oxide, silicon oxynitride, or silicon oxide formed by a plasma-CVD process can be the insulator 274.

[0355] Consequently, a source region and a drain region can be formed in a self-aligning manner by the formation of insulator 274. Therefore, miniaturized or highly integrated semiconductor devices can also be fabricated in high yield.

[0356] Here, the top and side surfaces of conductor 260 and insulator 250 are covered by insulator 270 and insulator 272, thus preventing impurities, such as nitrogen and hydrogen, from penetrating conductor 260 and insulator 250. Therefore, it is prevented that impurities, such as nitrogen and hydrogen, penetrate through conductor 260 and insulator 250 into region 234, which serves as the channeling region of transistor 200. Consequently, transistor 200 can be provided with advantageous electrical properties.

[0357] It should be noted that, although in the foregoing region 231, region 232 and region 234 were formed by reducing the resistance of the oxide 230 through the formation of the insulator 274, this embodiment is not limited to this. For example, these regions can be formed by an additional treatment with a dopant or by plasma treatment, or a combination of these treatments.

[0358] For example, plasma treatment can be performed on oxide 230 using insulator 250, conductor 260, insulator 272, insulator 270, and insulator 271 as masks. The plasma treatment can be performed in an atmosphere containing the element described above that forms an oxygen vacancy, or the element described above that is trapped by an oxygen vacancy. For example, the plasma treatment can be performed using argon gas and nitrogen gas.

[0359] Subsequently, a heat treatment can be carried out. The conditions for the heat treatment described above can be used for this treatment. The heat treatment allows the added dopant to diffuse into region 232 of oxide 230, leading to an increase in the conductivity.

[0360] Next, a conductive film 130A is formed such that it covers the insulator 274 (see Fig. 19). The guiding film 130A can be formed by a sputtering process, a CVD process, an MBE process, a PLD process, an ALD process or the like.

[0361] Next, the conductive film 130A is processed using a lithographic process to form the conductor 130 (see Fig. 20) A dry etching process, a wet etching process, or a combination of these processes can be used to process the conductive film 130A. A dry etching process, which allows for anisotropic etching, is preferred because it allows for excellent microstructuring. In contrast, wet etching, which allows for isotropic etching, readily removes the conductive film 130A from the side faces of the oxide 230, the side faces of the insulator 250, and the side faces of the insulator 272. Therefore, a process combining dry and wet etching is preferred because it allows the conductor 130 to be formed with advantageous shapes.

[0362] In this embodiment, as in Fig. 20(B) and Fig. Figure 20(D) shows a portion of conductor 130, which is provided above oxide 230, such that it extends outwards from oxide 230. In particular, conductor 130 is in Fig. 20(B) provided such that it extends beyond the oxide 230 to the B-side, and the conductor 130 is in Fig. 20(D) provided in such a way that it extends beyond oxide 230 to the E-side and F-side.

[0363] Such a shape is preferable because the capacitor 100 can form a capacitance not only between the top surface of the oxide 230 and the conductor 130, but also between the side surface of the oxide 230 and the conductor 130. In contrast, if there is a limitation on the area occupied by the cell 600, the conductor 130 is designed to extend as little as possible beyond the oxide 230. Therefore, the cell 600 can be miniaturized, allowing for a high level of integration of the semiconductor device.

[0364] Then the insulator 280 is formed above the insulator 274 and the insulator 130 (see Fig. 21) The insulator 280 can be formed by a sputtering process, a CVD process, an MBE process, a PLD process, an ALD process, or the like. Alternatively, the insulator 280 can be formed by a rotary coating process, a dipping process, a droplet application process (such as an inkjet process), a printing process (such as screen printing or offset printing), a doctor knife process, a roller coating process, a curtain coating process, or the like. In this embodiment, silicon oxynitride is used for the insulating film.

[0365] It should be noted that the insulator 280 is preferably formed to have a flat top surface. For example, the insulator 280 can have a flat top surface immediately after the formation of the insulating film that becomes the insulator 280. Alternatively, the insulator 280 can be made flat, for example, by removing the insulator or the like from the top surface after formation such that the top surface is parallel to a reference surface, such as the back side of the substrate. Such a treatment is referred to as a planarization treatment. Examples of planarization treatments include CMP treatment and dry etching. In this embodiment, CMP treatment is used as the planarization treatment. It should be noted that the top surface of the insulator 280 does not necessarily have a flat surface.

[0366] Then, an opening extending to region 231 of oxide 230 is formed in insulator 280 and insulator 274; an opening extending to conductor 130 is formed in insulator 280; an opening extending to conductor 260 is formed in insulator 280, insulator 274, insulator 271, and insulator 270; and an opening extending to conductor 205 is formed in insulator 280, insulator 274, insulator 224, insulator 222, and insulator 220. The openings are formed by a lithographic process.

[0367] It should be noted that, in order to bring the conductor 252a into contact with a side surface of the oxide 230, the openings extending to the oxide 230 are designed such that the side surface of the oxide 230 is exposed in the opening.

[0368] Next, the leader 252 (the leader 252a, the leader 252b, the leader 252c and the leader 252d) will be trained (see Fig. 22). Furthermore, conductor 256, which is electrically connected to conductor 252, can be configured as required (see Fig. 22).

[0369] The semiconductor device, which includes transistor 200 and capacitor 100, can be manufactured using the above process. As shown in Fig. 5 to Fig. As shown in Figure 22, the transistor 200 and the capacitor 100 can be manufactured by using the manufacturing process of a semiconductor device described in this embodiment.

[0370] According to one embodiment of the present invention, a semiconductor device can be provided that can be miniaturized or highly integrated. According to another embodiment of the present invention, a semiconductor device with advantageous electrical properties can be provided. According to another embodiment of the present invention, a semiconductor device with low reverse current can be provided. According to another embodiment of the present invention, a transistor with high forward current can be provided. According to another embodiment of the present invention, a very reliable semiconductor device can be provided. According to another embodiment of the present invention, a semiconductor device with low power consumption can be provided.According to another embodiment of the present invention, a semiconductor device can be manufactured with high productivity.

[0371] As described above, the structures, methods and the like described in this embodiment can be used in a suitable combination with the structures, methods and the like described in the other embodiments. (Version 2)

[0372] Below is an example of a semiconductor device comprising a transistor 202 of an embodiment of the present invention.

[0373] In the semiconductor device of this embodiment, materials similar to those in embodiment 1 can be used for components with the same reference numerals as in the semiconductor device of embodiment 1. Unless otherwise specified, the components formed in this embodiment can have structural properties and effects similar to those of the components described in embodiment 1, and their description is omitted. <Strukturbeispiel 3 einer Halbleitervorrichtung>

[0374] Fig. 23(A), Fig. 23(B), Fig. 23(C) and Fig. Figures 23(D) are a top view and cross-sectional views of transistor 202 of an embodiment of the present invention.

[0375] Fig. Figure 23(A) is a top view of transistor 202. Furthermore, Fig. 23(B), Fig. 23(C) and Fig. 23(D) Cross-sectional views of transistor 202. Here is Fig. 23(B) a cross-sectional view of a section defined by a dashed line AB in Fig. 23(A) is marked, and is also a cross-sectional view in the longitudinal direction of the channel of transistor 202. Fig. 23(C) is a cross-sectional view of a section defined by a dashed line CD in Fig. 23(A) is marked, and is also a cross-sectional view in the channel transverse direction of transistor 202. Furthermore, Fig. 23(D) is a cross-sectional view of a section identified by a dashed-dotted line EF in 23(A). For the sake of simplicity, some components are shown in the top view in Fig. 23(A) omitted. [Transistor 202]

[0376] As in Fig. As shown in Figure 23, transistor 202 includes insulator 208, which is placed above the substrate (not shown), conductor 209 above insulator 210, which is placed above insulator 208, insulator 212, which is placed between conductors 209 for embedding, insulator 216, conductor 203 and conductor 205, which are placed within insulator 216 for embedding, insulator 220, insulator 222, insulator 224, insulator 222, oxide 230 (oxide 230a, the Oxide 230b, oxide 230c and oxide 230d), which is placed above insulator 224, insulator 250 (an insulator 250a and an insulator 250b) which is placed above oxide 230, conductor 260 (the conductor 260 and the conductor 260b) which is placed above insulator 250, insulator 270,which is placed above the conductor 260, the insulator 271, which is placed above the insulator 270, the insulator 272, which is placed in contact with at least the side face of the insulator 250 and the side face of the conductor 260, an insulator 273, which is placed in contact with part of the top and part of the side face of the insulator 272, and the insulator 274, which is placed such that it covers at least the oxide 230, the insulator 271, the insulator 272 and the insulator 273.

[0377] The insulator 280 is positioned so that it covers the transistor 202.

[0378] It should be noted that the insulator 212 can be formed by polishing an insulating film covering the conductor 209 using a CMP process or the like to expose the conductor 209. Therefore, the surfaces of the insulator 212 and the conductor 209 exhibit a high degree of flatness.

[0379] The conductor 203 and the conductor 205 are formed such that the conductors are embedded in the opening sections provided in the insulator 216. The conductors can be formed by polishing a conductive film, positioned to cover the insulator 216 and the opening sections, using a CMP process or the like to expose the insulator 216. Therefore, the insulator 216, the conductor 203, and the conductor 205 exhibit a high degree of flatness.

[0380] Furthermore, insulator 220, insulator 222, insulator 224, and oxide 230a each have an opening. Oxide 230b and oxide 230c are also electrically connected to conductor 203 via this opening. If oxide 230b and oxide 230c are not connected to conductor 203 via oxide 230a, the series resistance and contact resistance can be reduced. With such a structure, a semiconductor device with advantageous electrical properties can be obtained. In particular, a transistor with increased forward current and a semiconductor device in which the transistor is used can be obtained.

[0381] The conductor 209 can have a multilayer structure. In this case, a conductor with better oxidation resistance than a conductor in a lower layer is preferably placed above a conductor with higher conductivity than a conductor in an upper layer. If a material that is less likely to oxidize is used for the upper layer of the conductor 209, oxidation of the conductor 209 can be prevented at the time of formation of the insulator 216, at the time of formation of the opening section provided in the insulator 216, and at the time of formation of the conductor 205. Therefore, an increase in electrical resistance due to oxidation of the conductor 209 can be prevented. This means that the contact between the conductor 209 and the conductor 205 becomes advantageous.

[0382] It should be noted that transistor 202, as in Fig. Figure 23 shows a structure in which oxide 230a, oxide 230b, oxide 230c, and oxide 230d are arranged one above the other; however, the present invention is not limited thereto. For example, a two-layer structure of oxide 230a and oxide 230c, a two-layer structure of oxide 230b and oxide 230c, a three-layer structure of oxide 230a, oxide 230c, and oxide 230d, or a three-layer structure of oxide 230b, oxide 230c, and oxide 230d may be used. That is to say, one of oxide 230a and oxide 230b is not necessarily provided. Alternatively, oxide 230d is not necessarily provided. Alternatively, a multilayer structure of five or more layers may be used. Alternatively, a single layer can be provided using only oxide 230c, or only oxide 230c and oxide 230d can be provided.Although a structure in which conductor 260a and conductor 260b are arranged one above the other is described in the context of transistor 202, the present invention is not limited thereto. For example, a single layer or a multilayer structure consisting of three or more layers can be used.

[0383] Here is an enlarged view of area 239 near a canal, which is defined by a dashed line in Fig. 23(B) is enclosed, in Fig. 24 shown.

[0384] As in Fig. 23(B) and Fig. As shown in Figure 24, oxide 230 comprises region 232 (region 232a and region 232b) between region 234, which serves as the channeling region of transistor 202, and region 231 (region 231a and region 231b), which serves as the source or drain region. Region 231, which serves as the source or drain region, is a region exhibiting a high charge carrier density and reduced resistance. Furthermore, region 234, which serves as the channeling region, is a region exhibiting a lower charge carrier density than region 231, which serves as the source or drain region. Furthermore, area 232 has a lower charge carrier density than area 231, which serves as a source or drain area, and a higher charge carrier density than area 234, which serves as a channeling area.

[0385] Within region 231, a region 233, which is connected to conductor 252a, preferably has a higher charge carrier density and a lower resistance than region 231. Region 233 is provided within region 231 so that the contact resistance between oxide 230 and conductor 252a can be reduced, and transistor 202 can exhibit advantageous electrical properties. Region 233 can be referred to as the contact region.

[0386] Region 231, region 232, and region 233 can be provided by adding a noble gas, typically helium or argon, to oxide 230. The noble gas can be added using, for example, an ion implantation process in which an ionized source gas undergoes mass separation and is then added; an ion doping process in which an ionized source gas is added without mass separation; a plasma immersion ion implantation process; plasma treatment; or the like.

[0387] It can be assumed that when a noble gas is added to oxide 230, a bond between a metal element and an oxygen atom in the oxide 230 is broken, creating oxygen vacancies. When impurities, such as hydrogen, are trapped by these oxygen vacancies, charge carriers are generated, and the resistance of oxide 230, i.e., the resistance of regions 231, 232, and 233, is reduced. Impurities, such as hydrogen, are present in oxide 230 in some cases. In this case, the impurities can be present without being bonded to a metal element or an oxygen atom. The impurities can be introduced by an insulator placed in contact with oxide 230, for example, insulator 274.

[0388] Region 234 is a high-purity region where oxygen deficiencies and impurities, such as hydrogen, are reduced as much as possible. The high-purity oxide becomes an essentially intrinsic region, and region 234 can serve as a channeling region.

[0389] Although Fig. 23 and Fig. While section 24 represents a state in which the region 232 overlaps with the conductor 260, which serves as the gate electrode, this embodiment is not limited to this. Depending on the design method of region 231 and region 232, region 232 does not overlap with the conductor 260, which serves as the gate electrode, in some cases.

[0390] Region 232 can be a region with a lower charge carrier density than region 231, which serves as a source or drain region, and a higher charge carrier density than region 234, which serves as a channeling region. In this case, region 232 serves as a transition region between the channeling region and the source or drain region.

[0391] Providing the transition region is preferred because a high-impedance region is not formed between region 231, which serves as the source region or drain region, and region 234, which serves as the channeling region; which increases the forward current of the transistor.

[0392] Area 234 overlaps with conductor 260. Area 234 is located between area 232a and area 232b, and the concentration of a metallic element, such as indium, and / or that of impurity elements, such as hydrogen and nitrogen, in area 234 is preferably lower than that in each of area 231 and area 232.

[0393] Furthermore, in oxide 230, boundaries between regions 231, 232, 233, and 234 cannot always be clearly detected. The concentration of a metallic element, such as indium, and that of impurity elements, such as hydrogen and nitrogen, detected in each region, can change not only stepwise between regions but also gradually within each region (also referred to as gradation). This means that the region closer to region 234, from region 231 to region 232, preferably has a lower concentration of a metallic element, such as indium, and of impurity elements, such as hydrogen and nitrogen.

[0394] Furthermore, in Fig. 23(B) and Fig. 24. Region 234, region 231, region 232, and region 233 are formed in oxide 230a, oxide 230b, oxide 230c, and oxide 230d, respectively; however, the present invention is not limited to this, and these regions may be formed at least in oxide 230c. Alternatively, these regions may, for example, be formed only in oxide 230c and oxide 230d. Although these boundaries between the regions are shown in the drawings substantially perpendicular to the interface between insulator 224 and oxide 230, this embodiment is not limited to this. For example, region 232 may project near the surface of oxide 230c in the direction of region 234, and it may recede near a bottom surface of oxide 230c in the direction of region 231.

[0395] For example, if insulator 250 has a multilayered structure that includes insulator 250a and insulator 250b, and insulator 250b is formed in an oxygen-containing atmosphere above insulator 250a, a larger amount of oxygen, i.e., excess oxygen, may be contained in 250a.

[0396] Furthermore, the insulator 272 is preferably provided in contact with the side surface of the insulator 250.

[0397] Furthermore, the transistor 202 is preferably enclosed by an insulator which has a blocking property to prevent the ingress of impurities, such as water or hydrogen.

[0398] The structure of a semiconductor device comprising transistor 202 of an embodiment of the present invention is described in detail below.

[0399] In transistor 202, conductor 260 serves as the first gate electrode in some cases. Furthermore, conductor 205 serves as the second gate electrode in some cases. In this case, the threshold voltage of transistor 202 can be controlled by changing the potential applied to conductor 205 independently of, rather than synchronously with, the potential applied to conductor 260. In particular, by applying a negative potential to conductor 205, the threshold voltage of transistor 202 can be shifted primarily in the positive direction. Additionally, if the threshold voltage of transistor 202 is higher than 0 V, the reverse current can be reduced. Consequently, the drain current can be reduced when a voltage of 0 V is applied to conductor 260.

[0400] The conductor 205, which serves as the second gate electrode, is positioned so that it overlaps with the oxide 230 and the conductor 260.

[0401] This means that the channel formation region in area 234 can be electrically enclosed by the electric field of conductor 260, which serves as the first gate electrode, and the electric field of conductor 205, which serves as the second gate electrode. In this description, such a transistor structure, in which the channel formation region is electrically enclosed by the electric fields of the first and second gate electrodes, is referred to as a surrounded channel structure (or s-channel structure).

[0402] In conductor 205, a conductor 205a is formed in contact with an inner wall of an opening of insulator 214 and insulator 216, and a conductor 205b is formed even further inside conductor 205a. Here, the top surfaces of conductor 205a and conductor 205b can be located on essentially the same plane as the top surface of insulator 216. It should be noted that, although conductor 205a and conductor 205b are arranged one above the other in transistor 200, the structure of the present invention is not limited to this. For example, a structure can be used in which only conductor 205b is provided.

[0403] Here, a conductive material is preferably used for conductor 205a that has a function of preventing the diffusion of impurities such as a hydrogen atom, a hydrogen molecule, a water molecule, a nitrogen atom, a nitrogen molecule, a nitrogen oxide molecule (e.g., N₂O, NO, and NO₂), i.e., a conductive material through which the aforementioned impurities are less likely to pass. Alternatively, a conductive material with a function of preventing the diffusion of oxygen (e.g., oxygen atoms and / or oxygen molecules) is preferably used, i.e., a conductive material through which the aforementioned oxygen is less likely to pass.It should be noted that in this description, a function to prevent the diffusion of impurities or oxygen refers to a function to prevent the diffusion of the aforementioned impurities and / or oxygen.

[0404] If conductor 205a has an oxygen diffusion-preventing function, the conductivity of conductor 205b can be prevented from decreasing due to oxidation. For example, tantalum, tantalum nitride, ruthenium, ruthenium oxide, or the like are preferably used for the conductive material with an oxygen diffusion-preventing function. Therefore, conductor 205a can be a single layer or a layered arrangement of the aforementioned conductive materials. Consequently, impurities, such as hydrogen and water, can be prevented from diffusing from the substrate-facing side of the insulator 214 through conductor 205 towards transistor 200.

[0405] For conductor 205b, a conductive material containing tungsten, copper, or aluminum as its main component is preferably used. It should be noted that conductor 205b is a single layer in the drawing; however, it can have a multilayer structure, and, for example, a layer arrangement of titanium, titanium nitride, and any of the aforementioned conductive materials can be used.

[0406] Conductor 209 can serve as an electrode or a conductor. If conductor 205 is used as the second gate electrode of transistor 202, a portion of conductor 209 can serve as the gate conductor. In this case, conductor 205 and conductor 252d can be electrically connected to each other via conductor 207, which includes conductor 207a and conductor 207b, which is provided above conductor 207a, and conductor 209. Conductor 207 can be formed in the same process as conductor 203 and conductor 205.

[0407] Conductor 209 is electrically connected to oxide 230 via conductor 203 and can serve as the source or drain conductor of transistor 202. Conductor 209 can also be used as an electrode for electrical connection to the element or conductor located below insulator 210.

[0408] Conductor 203 and conductor 209 are positioned under oxide 230 in such a way that they overlap, allowing a connecting plug or electrode for connecting transistor 202 to the element or conductor located below insulator 210 to overlap with transistor 202. This allows the cell size to be reduced, which is preferable.

[0409] A material similar to that used for the insulator 210 described in embodiment 1 can be used for the insulator 210.

[0410] Furthermore, the insulator 212 and the insulator 216, which serve as interlayer films, preferably have a lower permittivity than the insulator 210. In the case where a material with a low permittivity is used for an interlayer film, the parasitic capacitance generated between conductors can be reduced. A material similar to that used for the insulator 208, the insulator 216, and the insulator 280 described in embodiment 1 can be used for the insulator 212 and the insulator 216, which serve as interlayer films.

[0411] The insulator 220, the insulator 222, and the insulator 224 each serve as a gate insulator. A material similar to that used for the insulator 220, the insulator 222, and the insulator 224 described in embodiment 1 can be used for the insulator 220, the insulator 222, and the insulator 224.

[0412] Oxide 230 comprises oxide 230a, oxide 230b above oxide 230a, oxide 230c above oxide 230b, and oxide 230d above oxide 230c. Oxide 230 also includes region 231, region 232, region 233, and region 234. It should be noted that at least a portion of region 231 is preferably in contact with the insulator 274. Furthermore, the concentration of a metallic element, such as indium, the hydrogen concentration, and / or the nitrogen concentration in at least a portion of region 231 is preferably higher than that in region 234.

[0413] When transistor 202 is switched on, region 231a or region 231b serves as the source or drain region. Conversely, at least part of region 234 serves as the area in which a channel is formed.

[0414] As in Fig. As shown in Figure 24, the oxide 230 preferably comprises region 232. If region 232 is a transition region, the let-through current can be increased and the leakage current (blocking current) can be reduced in a non-conducting state.

[0415] If oxide 230c is positioned above oxides 230a and 230b, it prevents impurities from the components formed below oxide 230a from diffusing into oxide 230b. Similarly, if oxide 230c is positioned below oxide 230d, it prevents impurities from the components formed above oxide 230d from diffusing into oxide 230c.

[0416] This means that the region 234, provided in oxide 230c, is enclosed by oxides 230a, 230b, and 230d, and the concentration of impurities, such as hydrogen and nitrogen, can be kept low in this region, while the oxygen concentration can be kept high. A semiconductor device using oxide 230 with such a structure exhibits advantageous electrical properties and high reliability.

[0417] The oxide 230 has a curved surface between the side face and the top surface. This means that an end section of the side face and an end section of the top surface are preferably curved (hereinafter also referred to as the rounded shape). The radius of curvature of the curved surface at an end section of the oxide 230c is, for example, greater than or equal to 3 nm and less than or equal to 10 nm, preferably greater than or equal to 5 nm and less than or equal to 6 nm.

[0418] A material similar to that used for oxide 230 as described in embodiment 1 can be used for oxide 230.

[0419] This section describes region 234 of oxide 230.

[0420] Region 234 preferably has a multilayer structure of oxides that differ from one another in the atomic ratio of metal elements. In particular, if region 234 has the multilayer structure of oxide 230a, oxide 230b, and oxide 230c, the atomic ratio of element M to constituents in the metal oxide used as oxide 230a is preferably greater than the atomic ratio of element M to constituents in the metal oxide used as oxide 230b. Furthermore, the atomic ratio of element M to constituents in the metal oxide used as oxide 230b is preferably greater than the atomic ratio of element M to constituents in the metal oxide used as oxide 230c.Furthermore, the atomic ratio of element M to In in the metal oxide used as oxide 230a is preferably greater than the atomic ratio of element M to In in the metal oxide used as oxide 230b. Furthermore, the atomic ratio of element M to In in the metal oxide used as oxide 230b is preferably greater than the atomic ratio of element M to In in the metal oxide used as oxide 230c. Furthermore, the atomic ratio of In to element M in the metal oxide used as oxide 230b is preferably greater than the atomic ratio of In to element M in the metal oxide used as oxide 230a. Furthermore, the atomic ratio of In to element M in the metal oxide used as oxide 230c is preferably greater than the atomic ratio of In to element M in the metal oxide used as oxide 230b.Oxide 230d can be a metal oxide that can be used as oxide 230a, oxide 230b or oxide 230c.

[0421] For example, oxides 230a and 230b can be metal oxides with a composition of In:Ga:Zn = 1:3:4, In:Ga:Zn = 1:3:2, or In:Ga:Zn = 1:1:1. Oxide 230c can be metal oxides with a composition of In:Ga:Zn = 4:2:3, In:Ga:Zn = 1:1:1, or In:Ga:Zn = 5:1:6. Oxide 230d can be metal oxides with a composition of In:Ga:Zn = 1:3:4, In:Ga:Zn = 1:3:2, In:Ga:Zn = 4:2:3, or In:Ga:Zn = 1:1:1. It should be noted that the above composition represents the atomic ratio of an oxide formed over a substrate or the atomic ratio of a sputtering target.

[0422] In particular, a combination of a metal oxide with a composition of In:Ga:Zn = 1:3:4 as oxide 230a, a metal oxide with a composition of In:Ga:Zn = 1:1:1 as oxide 230b, a metal oxide with a composition of In:Ga:Zn = 4:2:3 as oxide 230c, and a metal oxide with a composition of In:Ga:Zn = 1:1:1 as oxide 230d is preferred, since oxide 230c can be positioned between oxide 230a, oxide 230b, and oxide 230d, which has a larger energy gap. Here, oxide 230a, oxide 230b, and oxide 230d, each exhibiting a large energy gap, are in some cases referred to as the "large gap," and oxide 230c, with a relatively small energy gap, is in some cases referred to as the "small gap."

[0423] The region 231 of oxide 230 is then described.

[0424] Range 231 is a range whose resistance is reduced by adding a metal atom, such as indium, a noble gas, such as helium or argon, or impurities, such as hydrogen and nitrogen, to a metal oxide provided as oxide 230. It should be noted that each of these ranges has a higher conductivity than at least oxide 230c in range 234.It should be noted that for the addition of a metal atom, a noble gas or impurities to area 231, for example, a dopant consisting of a metal element, a noble gas and / or impurities may be added by plasma treatment, an ion implantation process by which an ionized source gas is subjected to mass separation and then added, an ion doping process by which an ionized source gas is added without mass separation, a plasma immersion ion implantation process, plasma treatment or the like.

[0425] This means that if the proportion of a metal atom, such as indium, in the region 231 of oxide 230 is increased, the electron mobility can be increased and the resistance can be reduced.

[0426] If the insulator 274, which contains impurity elements, is formed in contact with the oxide 230, impurities can also be added to the area 231.

[0427] This means that the resistance of region 231 is reduced when an element forming an oxygen vacancy, or an element trapped by an oxygen vacancy, is added to region 231. Typical examples of the element include hydrogen, boron, carbon, nitrogen, fluorine, phosphorus, sulfur, chlorine, titanium, and a noble gas. Typical examples of the noble gas element include helium, neon, argon, krypton, and xenon. Therefore, region 231 is preferably designed to contain one or more of the aforementioned elements.

[0428] Alternatively, a film that extracts and absorbs oxygen contained in region 231 can be used as insulator 274. When oxygen is extracted, oxygen vacancies are created in region 231. Hydrogen, boron, carbon, nitrogen, fluorine, phosphorus, sulfur, chlorine, titanium, a noble gas, or the like are trapped by oxygen vacancies, thereby reducing the resistance of region 231.

[0429] The width of the area 232 in the longitudinal direction of the channel can be controlled by the widths of the insulator 272 and the insulator 273.

[0430] Therefore, by appropriately selecting the area of ​​region 232, a transistor with electrical properties required for circuit design can easily be provided.

[0431] The insulator 250 serves as a gate insulating film. The insulator 250 is preferably placed in contact with the top surface of the oxide 230d. The insulator 250 is preferably formed using an insulator from which oxygen is released by heating. The insulator 250 is an oxide film whose amount of released oxygen, converted into oxygen atoms, is, for example, greater than or equal to 1.0 × 10⁻⁶. 18 atoms / cm² 3 , preferably greater than or equal to 3.0 × 10 20 atoms / cm² 3 in thermal desorption spectroscopy (TDS) analysis. It should be noted that the temperature of the film surface during TDS analysis is preferably in the range of higher than or equal to 100 °C and lower than or equal to 700 °C, or higher than or equal to 100 °C and lower than or equal to 500 °C.

[0432] For example, the insulator 250 can have a multilayer structure comprising the insulator 250a and the insulator 250b. If the insulator 250a is an insulator from which oxygen is released by heating and is provided in contact with the top surface of the oxide 230d, oxygen can be efficiently supplied to the region 234 of the oxide 230c. Furthermore, as with the insulator 224, the concentration of impurities, such as water or hydrogen, in the insulator 250a is preferably reduced. The thickness of the insulator 250a is greater than or equal to 1 nm and less than or equal to 20 nm, preferably greater than or equal to 5 nm and less than or equal to 10 nm.

[0433] The insulator 250b is preferably an insulator that can supply oxygen to the insulator 250a during or after its formation. Such an insulator can be formed in an oxygen-containing atmosphere or using a target containing oxygen. For example, aluminum oxide is formed by a sputtering process in an oxygen-containing atmosphere. The thickness of the insulator 250b is greater than or equal to 1 nm and less than or equal to 20 nm, preferably greater than or equal to 5 nm and less than or equal to 10 nm.

[0434] The insulator 250b is provided above the insulator 250a, which means that a larger amount of oxygen, i.e. excess oxygen, can be contained in the insulator 250a.

[0435] The conductor 260, which serves as the first gate electrode, includes conductor 260a and conductor 260b above conductor 260a. Titanium nitride or the like is preferably used for conductor 260a. Alternatively, a metal with high conductivity, such as tungsten, can be used for conductor 260b.

[0436] In the case where potentials are applied to conductor 260 and conductor 205, the channel formation area formed in the oxide 230 can be covered with an electric field generated by conductor 260 and an electric field generated by conductor 205.

[0437] This means that the channel formation area in region 234 can be electrically enclosed by the electric field of conductor 260, which serves as the first gate electrode, and the electric field of conductor 205, which serves as the second gate electrode.

[0438] The insulator 272, which serves as a barrier film, is positioned so that it is in contact with the side surface of the insulator 250 and the side surface of the conductor 260. The insulator 270, which also serves as a barrier film, is positioned over the conductor 260.

[0439] Here, a material similar to that used for the insulator 270 described in embodiment 1 and a material similar to that used for the insulator 272 described in embodiment 1 can be used for the insulator 270 and the insulator 272, respectively.

[0440] In the case where the transistor is miniaturized and designed such that a channel length is approximately greater than or equal to 10 nm and less than or equal to 30 nm, impurity elements contained in the structural parts provided around the transistor 202 could diffuse, and region 231a and region 231b or region 232a and region 232b could be electrically connected to each other.

[0441] For these reasons, if the insulator 272 and the insulator 273 are configured as described in this embodiment, it can be prevented that impurities, such as hydrogen and water, penetrate the insulator 250 and the conductor 260, and that oxygen diffuses outwards from the insulator 250. Consequently, if the first gate voltage is 0 V, it can be prevented that the source region and the drain region are electrically connected to each other, either directly or via the region 232 or the like.

[0442] The insulator 273 preferably has a lower permittivity than the insulator 272. Using a material with a lower permittivity for an interlayer film can reduce the parasitic capacitance generated between conductor 130 and conductor 260, which will be described later. A material similar to that used for insulator 212 and insulator 216 can be used for insulator 273.

[0443] The insulator 274 is provided in such a way that it covers at least the oxide 230, the insulator 271, the insulator 272 and the insulator 273.

[0444] Furthermore, an insulating material that prevents the passage of impurities, such as water or hydrogen, and oxygen is preferably used for the insulator 274. For example, silicon nitride, silicon nitride oxide, silicon oxynitride, aluminum nitride, aluminum nitride oxide, or the like is preferably used for the insulator 274. When such an insulator 274 is formed, oxygen can be prevented from penetrating the insulator 274 and supplying oxygen to the oxygen defects in region 231a and region 231b, thus reducing the charge carrier density. Furthermore, it can be prevented from passing through the insulator 274 and diffusing into region 234.

[0445] It should be noted that in the case where the region 231 is provided by forming the insulator 274, the insulator 274 preferably contains hydrogen and / or nitrogen. If an insulator containing impurities, such as hydrogen or nitrogen, is used as the insulator 274, impurities such as hydrogen or nitrogen are added to the oxide 230, so that the resistance of the region 231 in the oxide 230 can be reduced.

[0446] The insulator 280, which serves as an interlayer film, is preferably provided above the insulator 274. As with the insulator 224 or the like, the concentration of impurities, such as water or hydrogen, is preferably reduced in the insulator 280. It should be noted that the insulator 280 can have a multilayer structure made up of similar insulators. [Capacitor 101]

[0447] As in Fig. As shown in Figure 23, the capacitor 101 shares some components with the transistor 202. In this embodiment, an example of the capacitor 101 is shown in which part of the region 231b provided in the oxide 230 of the transistor 202 serves as an electrode of the capacitor 101.

[0448] The capacitor 101 includes a portion of the oxide 230 region 231b, the insulator 274, and the conductor 130 (a conductor 130a and a conductor 130b) above the insulator 274. Furthermore, at least a portion of the conductor 130 is preferably positioned such that it overlaps with a portion of the region 231b.

[0449] The portion of region 231b of oxide 230 serves as one electrode of capacitor 101, and conductor 130 serves as the other electrode of capacitor 101. This means that region 231b serves both as a source and drain connection of transistor 202 and as an electrode of capacitor 101. A portion of insulator 274 serves as the dielectric of capacitor 101.

[0450] Here, the side face of conductor 260, which serves as the first gate electrode of transistor 202, is provided with insulators 272 and 273. Since insulators 272 and 273 are provided between conductor 260 and conductor 130, the parasitic capacitance between conductor 260 and conductor 130 can be reduced.

[0451] The conductor 130 preferably has a multilayer structure comprising conductor 130a and conductor 130b, which is placed above conductor 130a. For example, a conductive material containing titanium, titanium nitride, tantalum, or tantalum nitride as a major component is preferably used for conductor 130a, and a conductive material containing tungsten, copper, or aluminum as a major component is preferably used for conductor 130b. The conductor 130 can have a single-layer structure or a multilayer structure consisting of three or more layers. [Cell 601]

[0452] The semiconductor device of an embodiment of the present invention comprises the transistor 202, the capacitor 101, and the insulator 280, which serves as an intermediate film. Furthermore, the conductor 252 (conductor 252a, conductor 252b, conductor 252c, and conductor 252d), which is electrically connected to the transistor 202 and the capacitor 101 and serves as a terminal plug, is included.

[0453] Conductor 252b can be provided as a terminal plug, electrically connected to conductor 130, which serves as an electrode for capacitor 101. Conductor 130 can serve as an electrode for capacitors 101 contained in a plurality of cells 601. Therefore, conductor 252b is not necessarily provided in every cell 601, and terminal plugs can be provided in a plurality of cells such that the number of terminal plugs is less than the number of cells. For example, in a cell array where the cells 601 are arranged in a matrix, a terminal plug can be provided in each row, or a terminal plug can be provided in each column.

[0454] It should be noted that the conductor 252 is in contact with an inner wall of an opening in the insulator 280. Here, the top surface of the conductor 252 can be at essentially the same height as the top surface of the insulator 280. It should be noted that, although the conductor 252 is in Fig. 23 has a two-layer structure, the present invention is not limited thereto. For example, the conductor 252 can be a single layer or have a multi-layer structure consisting of three or more layers.

[0455] The insulator 280 is preferably provided such that it covers the insulator 274 and the conductor 130. As with the insulator 224 or the like, the concentration of impurities, such as water or hydrogen, in the insulator 280 is preferably reduced. It should be noted that the insulator 280 can have a multilayer structure made up of similar insulators.

[0456] The insulator 280 preferably has a lower permittivity than the insulator 210. In the case where a material with low permittivity is used for an interlayer film, the parasitic capacitance generated between conductors can be reduced.

[0457] For the insulator 280, which serves as an interlayer film, a single layer or a layer arrangement of any insulator, such as silicon dioxide, silicon oxynitride, silicon nitride oxide, aluminum oxide, hafnium oxide, tantalum oxide, zirconium oxide, lead zirconate titanate (PZT), strontium titanate (SrTiO3), and (Ba,Sr)TiO3 (BST), can be used. Alternatively, aluminum oxide, bismuth oxide, germanium oxide, niobium oxide, silicon dioxide, titanium oxide, tungsten oxide, yttrium oxide, or zirconium oxide can be added to the insulator. The insulator can alternatively undergo a nitriding treatment. Silicon dioxide, silicon oxynitride, or silicon nitride can be arranged over the aforementioned insulator.

[0458] Furthermore, conductor 252a, conductor 252b, conductor 252c, and conductor 252d are placed in the openings formed in the insulator 280 and the like. It should be noted that the top surfaces of conductor 252a, conductor 252b, conductor 252c, and conductor 252d can be at essentially the same height as the top surface of the insulator 280.

[0459] Conductor 252a is in contact with area 233, which serves as the source or drain region of transistor 202, via the opening formed in insulators 280 and 274. Since the resistance of area 233 is reduced, the contact resistance between conductor 252a and area 233 can be reduced. Conductor 252b is in contact with conductor 130, an electrode of capacitor 101, via the opening formed in insulator 280. Conductor 252c is in contact with conductor 260, the first gate electrode of transistor 202, via the opening formed in insulators 280, 274, 271, and 270.The conductor 252d is in contact with the conductor 207 via the opening formed in the insulator 280, the insulator 274, the insulator 222 and the insulator 220, and is electrically connected via the conductor 209 to the conductor 205, which serves as the second gate electrode of the transistor 202.

[0460] Here, the conductor 252a is in contact with at least the top surface of the oxide 230, and it is also preferably in contact with the side surface of the oxide 230. In particular, the conductor 252a is preferably in contact with one or both of the side surfaces on the C-side and the side surface on the D-side that intersect the transverse direction of the channel of the oxide 230. Furthermore, the conductor 252a can be in contact with the side surface on the A-side that intersects the longitudinal direction of the channel of the oxide 230. If, in this way, the conductor 252a is in contact not only with the top surface of the oxide 230, but also with the side surface of the oxide 230, the contact area of ​​the contact section between the conductor 252a and the oxide 230 can be increased without increasing the area of ​​the top surface of the contact section, thus reducing the contact resistance between the conductor 252a and the oxide 230.Consequently, miniaturization of the source electrode and the drain electrode of the transistor can be achieved, and furthermore, the forward current can be increased.

[0461] For conductor 252, a conductive material is preferably used that contains tungsten, copper, or aluminum as the main component. Conductor 252 can have a multilayer structure, and, for example, a layered arrangement of titanium, titanium nitride, and any of the aforementioned conductive materials can be used.

[0462] In the case where the conductor 252 has a multilayer structure, a conductive material with a function for preventing the passage of impurities, such as water or hydrogen, as in conductor 205a or the like, is preferably used for a conductor in contact with the insulator 274 and the insulator 280. For example, tantalum, tantalum nitride, titanium, titanium nitride, ruthenium, ruthenium oxide, or the like is preferably used. The conductive material with a function for preventing the passage of impurities, such as water or hydrogen, can be a single layer or a layered arrangement. When the conductive material is used, it can prevent impurities, such as hydrogen and water, from penetrating from a layer above the insulator 280 through the conductor 252 into the oxide 230.

[0463] An insulator that prevents the passage of impurities, such as water or hydrogen, can be provided in contact with the inner wall of the opening in insulator 274 and insulator 280, in which conductor 252 is embedded. Preferably, such an insulator as insulator 210, such as aluminum oxide, is used. This prevents impurities, such as hydrogen and water, from penetrating from insulator 280 or the like into the oxide 230 via conductor 252. Furthermore, the insulator can be formed with good coverage, for example, using an ALD process, a CVD process, or the like.

[0464] Although not shown, conductors serving as leads can be placed in contact with the top surface of conductor 252. A conductive material containing tungsten, copper, or aluminum as its main component is preferably used for the conductors serving as leads. <Strukturbeispiel 4 einer Halbleitervorrichtung>

[0465] Fig. 25(A), Fig. 25(B), Fig. 25 (C) and Fig. Figures 25(D) are top and cross-sectional views of a transistor 204 of an embodiment of the present invention, a capacitor 102, and the periphery of the transistor 204. It should be noted that in this description, a semiconductor device comprising a capacitor and at least one transistor is referred to as a cell.

[0466] One in Fig. Cell 602, shown in Figure 25, contains transistor 204 and capacitor 102 and differs from transistor 202 described above in the structures of conductor 203 and conductor 205. Furthermore, the shapes of insulator 250, conductor 260, insulator 270, and insulator 271 differ from those of transistor 202.

[0467] The conductor 203 and the conductor 205 are provided above the conductor 209 and the insulator 212. The conductor 203 and the conductor 205 can be formed using a material and a process similar to those used for the conductor 209. However, in the event that a shape defect of the conductor 209 could occur during the processing of the conductor 203 and the conductor 205, a material different from that used for the conductor 209 is preferably used for the conductor 203 and the conductor 205. The insulator 216 can be formed using a material and a process similar to those used for the insulator 212.

[0468] The side faces of insulator 250, conductor 260, insulator 270, and insulator 271 are tapered. To ensure that the side faces of insulator 250 and conductor 260 are compatible with insulator 272 and insulator 273, at least the side faces of insulator 250 and conductor 260 are preferably perpendicular to the surface of the substrate and the surfaces of insulator 220 and insulator 222. In contrast, when an insulating film is formed that becomes insulator 272 and insulator 273, the side faces of insulator 250 and conductor 260 are preferably tapered to improve coverage. The angle of the side faces of insulator 250 and conductor 260 can be adjusted appropriately during the manufacturing process to facilitate ease of fabrication.

[0469] An example is shown in which the in Fig. 25 Cell 602 shown differs from transistor 202 by the structures of conductor 203 and conductor 205 and the shapes of insulator 250, conductor 260, insulator 270 and insulator 271, however, either the structures of conductor 203 and conductor 205 or the shapes of insulator 250, conductor 260, insulator 270 and insulator 271 may differ from those of transistor 202. <Strukturbeispiel 5 einer Halbleitervorrichtung>

[0470] Fig. 26(A), Fig. 26(B), Fig. 26(C) and Fig. Figures 26(D) are top and cross-sectional views of a transistor 206 of an embodiment of the present invention, a capacitor 103, and the periphery of the transistor 206. It should be noted that in this description, a semiconductor device comprising a capacitor and at least one transistor is referred to as a cell.

[0471] One in Fig. Cell 603 shown in Figure 26 contains the transistor 206 and the capacitor 103 and differs from the transistor 202 described above in that the oxide 230d is not etched over area 231 and area 233 and remains.

[0472] In this case, an end section of oxide 230c is covered with oxide 230d, so that the penetration of impurities into oxide 230, the release of oxygen from oxide 230, or the like can be prevented, which is preferable.

[0473] Alternatively, ladder 203 and ladder 205 can be used in Fig. 25 exhibit the structure shown. Alternatively, the insulator 250, the conductor 260, the insulator 270 and the insulator 271 can form a structure in Fig. 25 exhibit the depicted form. <Struktur eines Zellenarrays>

[0474] Here we present Fig. 27 and Fig. 28 examples of a cell array of this embodiment are shown. For example, cells 601, each containing transistor 202 and capacitor 101, are shown in Fig. 23 are shown, and transistors 300, which are electrically connected to the cells 601, are arranged in a matrix, thereby forming a cell array.

[0475] Fig. 27 is a circuit diagram showing an embodiment of a cell array in which the in Fig. The 23 cells 601 and the transistors 300, which are electrically connected to the cells 601, are arranged in a matrix. Fig. 28(A) is a circuit diagram of a 620 circuit, which is part of the cell array, and Fig. Figure 28(B) is a schematic cross-sectional view of cell 601 and transistor 300, which corresponds to the cell array.

[0476] A transistor provided on a semiconductor substrate can be used as a transistor 300. The semiconductor substrate preferably contains a semiconductor, such as a silicon-based semiconductor, and preferably single-crystal silicon. Alternatively, a semiconductor substrate containing Ge (germanium), SiGe (silicon germanium), GaAs (gallium arsenide), GaAlAs (gallium aluminum arsenide), or the like can be used. In this case, the transistor 300 is either a p-channel transistor or an n-channel transistor. Like the transistor 202, a transistor using an oxide semiconductor can also be used as a transistor 300.

[0477] In Fig. Terminal 27 is the source and drain of each of the transistors 202 located in adjacent cells 601, electrically connected to common lines (S01, S02, and S03). These lines are also connected to the source and drain of each of the transistors 202 located in cells arranged in the column. In contrast, the first gates of the transistors 202 located in adjacent cells 601 are electrically connected to different lines WL (WL01 to WL06). Furthermore, the second gates of the transistors 202 located in cells 601 can be electrically connected to a transistor 400. The threshold voltage of the transistor can be controlled by applying a potential to the second gate of the transistor 202 via the transistor 400.

[0478] A first electrode of capacitor 101, contained in cell 601, is electrically connected to the other terminal of the source and drain of transistor 202 and to a gate of transistor 300. In some cases, the first electrode of capacitor 101 is formed using a portion of the components of transistor 202. A second electrode of capacitor 101, also contained in cell 601, is electrically connected to a line PL. The potential of line PL, which is electrically connected to the second electrode of capacitor 101, can be the same or different across cells 601. For example, line PL can have a common potential in each column or a common potential in each row.

[0479] One terminal of the source and drain of transistor 300 is electrically connected to a line SL (SL01 to SL06), and the other terminal of the source and drain of transistor 300 is electrically connected to a line BL (BL01 to BL06).

[0480] As in Fig. As shown in Figure 28(B), a cell 601a contains a transistor 202a and a capacitor 101a and is electrically connected to a gate of a transistor 300a. A cell 601b contains a transistor 202b and a capacitor 101b and is electrically connected to a gate of a transistor 300b.

[0481] Both the source and drain terminals of transistor 202a and the source and drain terminals of transistor 202b are electrically connected to the S02.

[0482] The source and drain terminals of transistor 202 are electrically connected to the gate of transistor 300 and to the first electrode of capacitor 101a, allowing a desired potential to be applied to and maintained at the gate of transistor 300. Transistor 202, which incorporates an oxide semiconductor in a channeling region, exhibits a very low leakage current in a non-conducting state. Therefore, the potential applied to the gate electrode of transistor 300 can be maintained for a long time.

[0483] Such a cell array can be used for a storage device or an arithmetic circuit. [Transistor 400]

[0484] Fig. Figure 29 is a schematic cross-sectional view representing one embodiment of transistor 400. Transistor 400 may have a structure that differs from that of transistor 202.

[0485] Transistor 400 is preferably manufactured using the same material as that used for transistor 202.

[0486] A conductor 409 can be formed in the same step as conductor 209 using a material similar to that used for conductor 209. A conductor 403 and a conductor 405 can be formed in the same step as conductors 203 and 205 using a material similar to that used for conductors 203 and 205, respectively. Conductor 405 can serve as the second gate electrode of transistor 400.

[0487] An oxide 430a, an oxide 430b, an oxide 430c, and an oxide 430d can be formed using materials similar to those used for oxide 230a, oxide 230b, oxide 230c, and oxide 230d, respectively, in the same steps as these oxides. In transistor 400, a portion of oxide 430d serves as a channel-forming region, and oxide 430a, oxide 430b, oxide 430c, and oxide 430d each comprise, like oxide 230, a low-resistance region that serves as a source or drain region. Furthermore, a lower-resistance contact region is preferably provided in each of oxide 430a, oxide 430b, and oxide 430c.

[0488] An insulator 450a and an insulator 450b can be formed in the same step as insulators 250a and 250b using a material similar to that used for insulators 250a and 250b, and an insulator 450 comprising insulators 450a and 450b can serve as a gate insulating film. A conductor 460a and a conductor 460b can be formed in the same step as insulators 260a and 260b using a material similar to that used for conductors 260a and 260b, and a conductor 460 comprising conductors 460a and 460b can serve as a first gate electrode.

[0489] An insulator 470 can be formed using a material similar to that used for insulator 270, in the same step as insulator 270. An insulator 471 can be formed using a material similar to that used for insulator 271, in the same step as insulator 271. An insulator 472 can be formed using a material similar to that used for insulator 272, in the same step as insulator 272. An insulator 473 can be formed using a material similar to that used for insulator 273, in the same step as insulator 273.

[0490] Opening sections are provided in the insulator 280 and the insulator 274, and a conductor 452a and a conductor 452b, connected to the oxide 430, are placed.

[0491] In transistor 400, one source and one drain region are electrically connected to conductor 403 via an opening provided in oxide 430a, insulator 224, insulator 222, and insulator 220. Conductor 403 is electrically connected via conductor 409 to conductor 405, which serves as the second gate electrode. One source and one drain region are electrically connected via conductor 452b to conductor 460, which serves as the second gate electrode. In other words, one source and one drain region, the first gate electrode, and the second gate electrode are electrically connected to each other, thus forming a diode junction in transistor 400.

[0492] The source and drain terminals of transistor 400, configured as a diode, are electrically connected to the second gate electrode of transistor 202 via conductor 409, conductor 209, and the like. Therefore, the potential of the second gate electrode of transistor 202 can be controlled by transistor 400. A channeling region is provided in oxide 430d; thus, transistor 400 exhibits a very low leakage current in a non-conducting state. Therefore, if, for example, a negative potential is applied to the second gate electrode of transistor 202, the potential of the second gate electrode of transistor 202 can be maintained for a long time without current being supplied to transistor 400.

[0493] The transistor 400 is not necessarily provided in every cell 601, and the number of transistors 400 provided may be less than the number of cells. For example, in a cell array where the cells 601 are arranged in a matrix, one transistor 400 may be provided in the cell array, one transistor 400 may be provided in each row, or one transistor 400 may be provided in each column. <Herstellungsverfahren einer Halbleitervorrichtung>

[0494] Next, a manufacturing process for a semiconductor device incorporating the transistor 202 of the present invention will be described using the following examples: Fig. 30 to Fig. 50 described. In Fig. 30 to Fig. In section 50, (A) of each drawing represents a top view. Furthermore, (B) of each drawing represents a cross-sectional view corresponding to a section identified by a dashed line AB in (A). Additionally, (C) of each drawing represents a cross-sectional view corresponding to a section identified by a dashed line CD in (A). Finally, (D) of each drawing represents a cross-sectional view corresponding to a section identified by a dashed line EF in (A).

[0495] In the manufacturing process of the semiconductor device of this embodiment, a material, a manufacturing process, and a manufacturing apparatus similar to those of embodiment 1 may be used for components for which the same reference numerals are used as those of the components of the manufacturing process of the semiconductor device in embodiment 1. Unless otherwise specified, the components formed in this embodiment may have structural properties and effects similar to those of the components described in embodiment 1, and their description is omitted.

[0496] First, a substrate (not shown) is prepared, and the insulator 208 is formed over the substrate. The insulator 208 can be formed by a sputtering process, a CVD process, an MBE process, a PLD process, an ALD process, or the like.

[0497] In this embodiment, silicon oxide 208 is deposited as an insulator by a CVD process.

[0498] Next, the insulator 210 is formed over the insulator 208. In this embodiment, aluminum oxide is deposited on the insulator 210 by a sputtering process. The insulator 210 can have a multilayer structure. For example, a structure in which an aluminum oxide layer is deposited by a sputtering process and another layer of aluminum oxide is deposited over the aluminum oxide layer by an aluminum oxide deposition (ALD) process can be used. Alternatively, a structure in which an aluminum oxide layer is deposited by an ALD process and another layer of aluminum oxide is deposited over the aluminum oxide layer by a sputtering process can be used.

[0499] Next, a conductive film 209A is formed over the insulator 210. The conductive film 209A can be formed by a sputtering process, a CVD process, an MBE process, a PLD process, an ALD process, or the like. In this embodiment, tungsten is deposited for the conductive film 209A by a sputtering process. It should be noted that a conductor, such as aluminum or copper, can be used alongside tungsten for the conductive film 209A. The conductive film 209A can have a multilayer structure, and a conductor containing titanium or tantalum can be arranged over the conductor. For example, a metal nitride, such as titanium nitride or tantalum nitride, can be arranged over the conductor.

[0500] Next, the masks 262 are formed using a lithographic process over the guiding film 209A (see Fig. 30).

[0501] Then the guiding film 209A is processed using the masks 262, so that the conductor 209 is trained (see Fig. 31).

[0502] For processing, either a dry or a wet etching process can be used. A dry etching process is suitable for microstructuring.

[0503] A dry etching unit, such as a CCP etching unit or an ICP etching unit, can be used.

[0504] In the case where a hard mask is used for etching the conductive film 209A, the etching treatment can be performed after the photoresist mask used to form the hard mask has been removed, or the etching treatment can be performed while the photoresist mask remains in place. In the latter case, the photoresist mask can be removed during the etching process. The hard mask can be removed by etching after the aforementioned conductive film has been etched. Conversely, if the hard mask material does not affect the subsequent process or can be used in the subsequent process, the hard mask is not necessarily removed.

[0505] Next, an insulating film 212A is formed over the insulator 210 and the conductor 209 (see Fig. 32). The insulating film 212A can be formed by a sputtering process, a CVD process, an MBE process, a PLD process, an ALD process, or the like. In this embodiment, silicon oxide is formed as the insulating film 212A by a CVD process.

[0506] Next, part of the insulating film 212A is removed by a CMP treatment, exposing the conductor 209. As a result, the insulator 212 remains between and around the conductor 209. In this way, the insulator 212 and the conductor 209, whose top surfaces are flat, can be formed (see Fig. 33). It should be noted that in some cases, CMP treatment partially removes conductor 209.

[0507] Next, the insulator 216 is formed above the insulator 212 and the conductor 209. The insulator 216 can be formed by a sputtering process, a CVD process, an MBE process, a PLD process, an ALD process, or the like. In this embodiment, silicon oxide is deposited as the insulator 216 by a CVD process.

[0508] Next, openings are formed in the insulator 216. Examples of openings include grooves and slots. An area in which the opening is formed can be referred to as an opening section. Wet etching can be used to form the opening; however, dry etching is preferred for microstructuring. In the case where an opening is formed in the insulator 216, the conductor 209 can be used as an etch stop film when forming the groove by etching the insulator 216.

[0509] After the openings are formed, a conductive film, which becomes conductor 203a and conductor 205a, is formed. The conductive film preferably contains a conductor that has a function of preventing the passage of oxygen. For example, tantalum nitride, tungsten nitride, or titanium nitride can be used. Alternatively, a multilayer film containing tantalum, tungsten, titanium, molybdenum, aluminum, copper, or a molybdenum-tungsten alloy can be used. A conductor, which becomes conductor 203a and conductor 205a, can be formed by a sputtering process, a CVD process, an MBE process, a PLD process, an ALD process, or the like.

[0510] In this embodiment, the conductive film forming conductors 203a and 205a is tantalum nitride or a film in which titanium nitride is arranged over tantalum nitride, formed by a sputtering process. Even if a readily diffusing metal, such as copper, is used for conductors 203b and 205b, which are described later, the use of such a metal nitride as conductors 203a and 205a can prevent the metal from diffusing to the outside of conductors 203a and 205a.

[0511] Next, a conductive film, which becomes conductor 203b and conductor 205b, is formed over the conductive film, which becomes conductor 203a and conductor 205a. The conductive film can be formed by a sputtering process, a CVD process, an MBE process, a PLD process, an ALD process, or the like. In this embodiment, a low-resistance conductive material, such as tungsten and copper, is deposited as the conductive film, which becomes conductor 203b and conductor 205b.

[0512] Next, the conductive film that becomes conductor 203a and conductor 205a, and the conductive film that becomes conductor 203b and conductor 205b, are partially removed by a CMP treatment, exposing the insulator 216. As a result, the conductive film that becomes conductor 203a and conductor 205a, and the conductive film that becomes conductor 203b and conductor 205b, remain only in the opening sections. Therefore, conductor 203, which includes conductor 203a and conductor 203b (which has a flat top), and conductor 205, which includes conductor 205a and conductor 205b (which has a flat top), can be formed (see Fig. 34). It should be noted that in some cases, CMP treatment partially removes the insulator 216.

[0513] Next, the insulator 220, the insulator 222, and the insulator 224 are formed above the insulator 216, the conductor 203, and the conductor 205. The insulator 220, the insulator 222, and the insulator 224 can be formed using a method and a material similar to those in embodiment 1 (see Fig. 34).

[0514] Subsequently, a heat treatment is preferably carried out. The method described in embodiment 1 can be used for the heat treatment. The aforementioned heat treatment can remove impurities, such as hydrogen and water, contained in the insulator 224. It should be noted that the first heat treatment is not necessarily carried out in some cases.

[0515] The heat treatment can also be carried out after the formation of insulator 220 and after the formation of insulator 222. Although the heat treatment can be carried out under the conditions described above, the heat treatment after the formation of insulator 220 is preferably carried out in a nitrogen-containing atmosphere.

[0516] In this embodiment, after the insulator 224 has been formed, a heat treatment is carried out for one hour in a nitrogen atmosphere at a temperature of 400 °C.

[0517] Next, the oxide film 230A, which becomes oxide 230a, is formed over the insulator 224.

[0518] The oxide film 230A can be formed using a method and a material similar to those in embodiment 1.

[0519] Next, an opening extending to conductor 203 is formed in insulator 220, insulator 222, insulator 224, and oxide film 230A using a lithographic process. First, mask 263 is formed over oxide film 230A (see Fig. 34). The mask 263 used to form the opening can be a photoresist mask or a hard mask.

[0520] Next, the insulator 220, the insulator 222, the insulator 224 and the oxide film 230A are processed using the mask 263 to expose the surface of the conductor 203, so that an opening is formed (see Fig. 35) A dry etching process or a wet etching process can be used for processing. A dry etching process is suitable for microstructuring. It should be noted that the insulator 220, the insulator 222, and the insulator 224 are processed through the oxide film 230A. In particular, so that the surface of the conductor 203 is partially exposed, a mask, formed from a photoresist mask, a hard mask, or the like, is formed over the oxide film 230A, and then the insulator 220, the insulator 222, the insulator 224, and the oxide film 230A are processed. That is, the mask is not formed on a surface of the insulator (of the insulator 220, the insulator 222, and the insulator 224) that serves as the gate insulating film.Therefore, the mask does not adhere to the surface of the insulator, which serves as the gate insulating film. This prevents the gate insulating film from being contaminated and damaged by impurities in the photoresist mask, components in the hard mask, and components in the chemical solution and plasma used to remove the mask. Such a process enables a highly reliable manufacturing method for semiconductor devices.

[0521] Next, oxide film 230B and oxide film 230C are formed over oxide film 230A (see Fig. 36) In this process, the oxide film 230B and the oxide film 230C are also formed in the protruding opening and are electrically connected to the conductor 203 via the opening. If the oxide 230b and the oxide 230c are connected to the conductor 203 without being connected via the oxide 230a, the series resistance and the contact resistance can be reduced. With such a structure, a semiconductor device with advantageous electrical properties can be obtained. In particular, a transistor with an increased forward current and a semiconductor device in which the transistor is used can be obtained.

[0522] The oxide film 230B and the oxide film 230C can be formed by a sputtering process, a CVD process, an MBE process, a PLD process, an ALD process or the like.

[0523] After the formation of oxide film 230B, oxide film 230C is preferably formed successively without exposure to an atmospheric atmosphere. If a multi-chamber deposition device is used for the formation of oxide film 230B and oxide film 230C, oxide film 230C can be formed over oxide film 230B without exposing the surface of oxide film 230B to an atmospheric atmosphere. By performing the successive formation of oxide film 230B and oxide film 230C, contamination of the interface between the two oxide films can be prevented, and the semiconductor device in which these oxide films are used can exhibit advantageous properties and high reliability.

[0524] In the case where oxide film 230B and oxide film 230C are formed, for example, by a sputtering process, oxygen or a gas mixture of oxygen and a noble gas is used as the sputtering gas. Increasing the proportion of oxygen in the sputtering gas can increase the amount of excess oxygen in the oxide film being formed. In the case where the aforementioned oxide film is formed by a sputtering process, the target can be an In-M-Zn oxide.

[0525] In the case where oxide film 230B and oxide film 230C are formed by a sputtering process and the oxygen content in the sputtering gas during deposition is greater than or equal to 1% and less than or equal to 30%, preferably greater than or equal to 5% and less than or equal to 20%, an oxygen-deficient oxide semiconductor is formed. A transistor using an oxygen-deficient oxide semiconductor can exhibit a relatively high field-effect mobility.

[0526] In this embodiment, oxide film 230B is formed by a sputtering process using a target of In:Ga:Zn = 1:1:1 [atomic ratio], and oxide film 230C is formed by a sputtering process using a target of In:Ga:Zn = 4:2:4.1 [atomic ratio]. Oxide film 230B and oxide film 230C are formed successively using a multi-chamber sputtering device without exposure to an atmospheric environment. It should be noted that the oxide film is preferably formed by appropriate selection of formation conditions and an atomic fraction to exhibit properties required for oxide 230.

[0527] Next, a heat treatment can be carried out. The heat treatment conditions described above can be used. The heat treatment removes impurities, such as hydrogen and water, from oxide film 230A, oxide film 230B, and oxide film 230C. In this embodiment, a treatment is carried out for one hour in a nitrogen atmosphere at a temperature of 400 °C, followed successively by a further treatment for one hour in an oxygen atmosphere at a temperature of 400 °C.

[0528] Next, oxide film 230A, oxide film 230B, and oxide film 230C are processed into island forms to form oxide 230a, oxide 230b, and oxide 230c (see Fig. 37).

[0529] As in Fig. 37(A) and Fig. As shown in Figure 37(D), oxide 230a, oxide 230b, and oxide 230c are each preferably configured such that they have a greater width in the EF direction in the region overlapping the opening formed in insulator 222, insulator 224, and oxide 230a than the opening itself. Therefore, the widths of oxide 230a, oxide 230b, and oxide 230c in the EF direction can be greater than the widths of oxide 230a, oxide 230b, and oxide 230c in the CD direction in a region where a channel is formed or in a region on the A-side. With such a structure, the contact between oxide 230b and oxide 230c and conductor 203 can be reliable. Furthermore, the area of ​​capacitor 101 can be increased, and an increase in the capacitance of capacitor 101 can be expected.

[0530] It should be noted that in the preceding step, the insulator 224 can be processed into an island form. Furthermore, the insulator 224 can be subjected to a partial etching. If the insulator 224 is subjected to a partial etching, it will also remain under the oxide 230d, which is formed in a later step. It should be noted that the insulator 224 can be processed into an island form if the conductive film 260A and the conductive film 260B or the insulating film 272A are processed in a later step. In this case, the insulator 222 can be used as an etch stop film.

[0531] Here, oxide 230a, oxide 230b, and oxide 230c are configured such that they overlap at least partially with conductor 205. Preferably, the side face of oxide 230b and the side face of oxide 230c each have the same plane as the side face of oxide 230a. Preferably, the side faces of oxide 230a, oxide 230b, and oxide 230c are also substantially perpendicular to the insulator 222. The end sections of oxide 230b and oxide 230c are substantially aligned with an end section of oxide 230a. If the side faces of oxide 230a, oxide 230b and oxide 230c are substantially perpendicular to the insulator 222, a large number of transistors 202 can be provided to have a small area and high density.It should be noted that the angle formed by the side faces of oxide 230a, oxide 230b, and oxide 230c and the top view of insulator 222 can be an acute angle. In this case, the angle formed by the side faces of oxide 230a, oxide 230b, and oxide 230c and the top view of insulator 222 is preferably larger.

[0532] There is a curved surface between the side faces of oxide 230a, oxide 230b, and oxide 230c and the top face of oxide 230c. This means that an end section of the side face and an end section of the top face are preferably curved (hereinafter also referred to as the rounded shape). The radius of curvature of the curved surface at the end sections of oxide 230a, oxide 230b, and oxide 230c is, for example, greater than or equal to 3 nm and less than or equal to 10 nm, preferably greater than or equal to 5 nm and less than or equal to 6 nm.

[0533] It should be noted that if the end sections are not square, the film coverage will be improved in a later film training process.

[0534] It should be noted that processing of the oxide films and cleaning to remove impurities adhering at the time of processing can be carried out by the methods described in embodiment 1.

[0535] A heat treatment can then be carried out. The heat treatment conditions described above can be used.

[0536] Next, an oxide film 230D, which becomes oxide 230d, is formed over the insulator 224, oxide 230a, oxide 230b and oxide 230c (see Fig. 38).

[0537] The oxide film 230D can be formed by a sputtering process, a CVD process, an MBE process, a PLD process, an ALD process, or the like. The oxide film 230D can be formed with properties required for the oxide 230d by a formation process similar to that of the oxide film 230A, the oxide film 230B, or the oxide film 230C. In this embodiment, the oxide film 230D is formed by a sputtering process using a target of In:Ga:Zn = 1:3:4 [atomic ratio].

[0538] The oxide film 230D can, as in Fig. Figure 39 shows that the oxide film 230D can be processed into an island shape. If the oxide film 230D is processed before the formation of the insulator 250 and the conductor 260, a portion of the oxide film 230D located beneath the insulator 250 and the conductor 260, which are formed in a subsequent process, can be removed. Therefore, the oxide film 230D is separated for adjacent cells 601, and leakage through the oxide film 230D between the cells 601 can be prevented, which is preferable.

[0539] Oxide film 230D can be processed by dry etching or wet etching. The process used for processing oxide films 230A, 230B, and 230C can also be used.

[0540] Then the insulating film 250A, an insulating film 250B, the conductive film 260A, the conductive film 260B, the insulating film 270A and the insulating film 271A are successively formed over the insulator 224 and the oxide film 230D (see Fig. 40).

[0541] The insulating film 250A and the insulating film 250B can be formed by a sputtering process, a CVD process, an MBE process, a PLD process, an ALD process or the like.

[0542] In this embodiment, the insulating film 250A is formed from silicon oxynitride by a CVD process, and the insulating film 250B is formed from aluminum oxide by a sputtering process. The thickness of the insulating film 250A is greater than or equal to 1 nm and less than or equal to 20 nm, preferably greater than or equal to 5 nm and less than or equal to 10 nm. The thickness of the insulating film 250B is greater than or equal to 1 nm and less than or equal to 20 nm, preferably greater than or equal to 5 nm and less than or equal to 10 nm. If the insulating film 250B is formed by a sputtering process in an oxygen-containing atmosphere, a larger amount of oxygen, i.e., excess oxygen, can be contained in the insulating film 250A, which is preferable.

[0543] Furthermore, heat treatment can be carried out. The heat treatment conditions described above can be used for this purpose. Heat treatment can reduce the moisture and hydrogen concentrations in insulating film 250A and insulating film 250B.

[0544] The conductive film 260A can be formed by a sputtering process, a CVD process, an MBE process, a PLD process, an ALD process, or the like. In this embodiment, titanium nitride is formed for the conductive film 260A by a sputtering process.

[0545] The conductive film 260B can be formed by a sputtering process, a CVD process, an MBE process, a PLD process, an ALD process, or the like. If a low-resistance metal film is used as the conductive film 260B, a low-voltage transistor can be provided. In this embodiment, tungsten is formed as the conductive film 260B by a sputtering process.

[0546] A heat treatment can then be carried out. The heat treatment conditions described above can be used for this purpose. It should be noted that in some cases, the heat treatment is not necessarily carried out. In this embodiment, the treatment is carried out for one hour in a nitrogen atmosphere at a temperature of 400 °C.

[0547] The insulating film 270A and the insulating film 271A can be formed using a method and a material similar to those in embodiment 1.

[0548] The insulator 271 serves as a hard mask. The provision of the insulator 271 enables the side surface of the insulator 250, the side surface of the insulator 250b, the side surface of the conductor 260a, the side surface of the conductor 260b and the side surface of the insulator 270 to be formed substantially perpendicular to the substrate.

[0549] Next, insulating film 271A is etched to form insulator 271. Subsequently, using insulator 271 as a mask, insulating film 250A, insulating film 250B, conductive film 260A, conductive film 260B, and insulating film 270A are etched to form insulator 250 (insulator 250a and insulator 250b), conductor 260 (conductor 260a and conductor 260b), and insulator 270 (see Fig. 41) It should be noted that even after processing, the subsequent process can be carried out without removing the hard mask. The hard mask can also serve as a hard mask used for adding a dopant in the subsequent process.

[0550] An upper section of the oxide film 230D in an area that does not overlap with the insulator 250 can be etched by the aforementioned etching. In this case, the thickness of the oxide film 230D in an area that overlaps with the insulator 250 can be greater than the thickness of the oxide film 230D in the area that does not overlap with the insulator 250.

[0551] An area of ​​the insulator 224 that does not overlap with the oxide film 230D can be etched by the preceding etching. In this case, the insulator 222 is exposed in an area that does not overlap with the oxide film 230D and the conductor 260.

[0552] A heat treatment can then be carried out. The heat treatment conditions described above can be used for this purpose. It should be noted that in some cases, the heat treatment is not necessarily carried out. In this embodiment, the treatment is carried out for one hour in a nitrogen atmosphere at a temperature of 400 °C.

[0553] Next, the insulating film 272A is formed such that it covers the oxide film 230D, the insulator 250, the conductor 260, the insulator 270 and the insulator 271 (see Fig. 42).

[0554] Next, using insulator 250, conductor 260, insulator 270, and insulator 271, which are covered with insulating film 272A, as masks, a noble gas is added to oxide 230. For the addition of the noble gas, for example, an ion implantation method, in which an ionized source gas undergoes mass separation and is then added, an ion doping method, in which an ionized source gas is added without mass separation, a plasma immersion ion implantation method, plasma treatment, or the like can be used. By adding a noble gas, regions 234 and 232 are provided in oxide 232 (see Fig. 42).

[0555] Next, an insulating film 273A is formed such that it covers the insulating film 272A (see Fig. 43). For the insulating film 273A, a material with low permittivity is preferably used, and a material similar to that used for the insulator 212 and the insulator 216 may be used.

[0556] Next, the insulating film 273A and the insulating film 272A are subjected to an anisotropic etching treatment, whereby the insulator 272, which serves as a barrier, and the insulator 273, which serves as a side wall, are formed in contact with the side surfaces of the insulator 250, the conductor 260 and the insulator 270 (see Fig. 44). An anisotropic etching treatment is preferably carried out using dry etching. In this way, the insulator 272 and the insulator 273 can be formed in a self-aligning manner.

[0557] Here, the insulator 271 is formed over the insulator 270, allowing the insulator 270 to remain even if sections of the insulating film 273A and the insulating film 272A located over the insulator 270 are removed. The height of a structural part consisting of the insulator 250, the conductor 260, the insulator 270, and the insulator 271 is greater than the combined height of the oxide 230a, the oxide 230b, the oxide 230c, and the oxide film 230D, thus allowing the insulating film 273A and the insulating film 272A to be removed from the side faces of the oxide 230a, the oxide 230b, and the oxide 230c, with the oxide film 230D sandwiched between them.Furthermore, if the end sections of oxide 230a, oxide 230b and oxide 230c each have a rounded shape, the time required to remove the insulating film 273A and the insulating film 272A, which are formed on the side surfaces of oxide 230a, oxide 230b and oxide 230c, with oxide film 230D in between, can be reduced, leading to easier formation of insulator 272 and insulator 273.

[0558] Next, the oxide film 230D is etched using the insulator 250, the conductor 260, the insulator 270, the insulator 271, the insulator 272 and the insulator 273 as masks, and part of the oxide film 230D is removed so that the oxide 230d is formed (see Fig. 45). It should be noted that this process removes the top and side surfaces of oxide 230c and, in some cases, part of the side surfaces of oxide 230a and oxide 230b.

[0559] Region 231 can be formed in oxides 230a, 230b, 230c, and 230d. Region 231 is a region whose resistance is reduced by adding a metal atom, such as indium, or impurities to a metal oxide provided as oxide 230a, 230b, 230c, or 230d. It should be noted that each of these regions has a higher conductivity than at least oxide 230b in region 234.

[0560] To reduce the resistance of region 231 and region 232, for example a dopant consisting of a metal atom, such as indium, a noble gas, such as helium or argon, and / or impurities, such as hydrogen and nitrogen, can be added.

[0561] It should be noted that a dopant and a method for adding it, similar to those in embodiment 1, can be used for the addition of a dopant.

[0562] Alternatively, a dopant can be added by plasma treatment. In this case, the plasma treatment is carried out using a plasma CVD device, a dry etching device, or an ashing device, so that a dopant can be added to oxide 230a, oxide 230b, oxide 230c, and oxide 230d.

[0563] Furthermore, if impurities are added as dopants, a film containing a dopant can be formed in contact with the oxide 230. For example, the insulator 274, containing hydrogen, boron, carbon, nitrogen, fluorine, phosphorus, or the like as a dopant, is formed in contact with the oxide 230, which is positioned on the outside of the oxide 230d, the insulator 272, and the insulator 273, thereby forming the region 231 (see Fig. 46) Thanks to the formation of the insulator 274 and the heat treatment after formation, the resistance of region 231 is reduced. It is assumed that the dopant contained in the insulator 274 diffuses into region 231 to reduce the resistance of that region. The dopant in the insulator 274 may also diffuse into region 232, and the resistance of region 232 may be lower than the resistance reduced by the noble gas addition described above.

[0564] Increasing the proportion of indium in oxides 230a, 230b, 230c, and 230d can increase the charge carrier density and decrease the resistance. Therefore, a metallic element that improves the charge carrier density of oxides 230a, 230b, 230c, and 230d, such as indium, can be used as a dopant.

[0565] This means that if the proportion of a metal atom, such as indium, in oxide 230a, oxide 230b, oxide 230c and oxide 230d, in region 231 and region 232 is increased, the electron mobility can be increased and the resistance can be reduced.

[0566] In this case, the atomic ratio of indium to element M is greater at least in region 231 than the atomic ratio of indium to element M in region 234.

[0567] When region 232 is provided in transistor 202, high-impedance regions are not formed between region 231, which serves as the source or drain region, and region 234, where a channel is formed. This allows the forward current and mobility of the transistor to be increased. Because region 232 prevents the gate from overlapping with the source and drain regions in the longitudinal direction of the channel, the formation of unnecessary capacitance is prevented. Furthermore, region 232 reduces leakage current in a non-conducting state.

[0568] Therefore, by appropriately selecting the areas of region 231a and region 231b, a transistor with electrical properties required for circuit design can be easily provided.

[0569] In this embodiment, the insulator 274 is designed such that it covers the insulator 224, the oxide 230, the insulator 271, the insulator 272 and the insulator 273 (see Fig. 46).

[0570] The insulator 274 can be formed using a method and material similar to those of embodiment 1. Accordingly, oxygen defects are formed mainly in the region of oxide 230c and oxide 230d that does not overlap with the insulator 250, and the oxygen defects and impurity elements, such as nitrogen or hydrogen, are bound together, leading to an increase in charge carrier density. In this way, region 231a and region 231b can be formed with reduced resistance.

[0571] As described in embodiment 1, the insulator 274 can have a single-layer structure or a multi-layer structure consisting of two or more insulators.

[0572] Consequently, a source region and a drain region can be formed in a self-aligning manner by the formation of insulator 274. Therefore, miniaturized or highly integrated semiconductor devices can also be fabricated in high yield.

[0573] Here, the top and side surfaces of conductor 260 and insulator 250 are covered by insulator 270 and insulator 272, thus preventing impurities, such as nitrogen or hydrogen, from penetrating conductor 260 and insulator 250. Therefore, it is prevented that impurities, such as nitrogen or hydrogen, penetrate through conductor 260 and insulator 250 into region 234, which serves as the channeling region of transistor 202. Consequently, transistor 202 can be provided with advantageous electrical properties.

[0574] It should be noted that, although in the foregoing the region 231 is formed by reducing the resistance of the oxide 230 through the formation of the insulator 274, this embodiment is not limited to this. For example, these regions can be formed by an additional treatment with a dopant or by plasma treatment, or a combination of these treatments.

[0575] For example, plasma treatment can be performed on oxide 230 using insulator 250, conductor 260, insulator 272, insulator 273, insulator 270, and insulator 271 as masks. The plasma treatment can be performed in an atmosphere containing the element described above, which forms an oxygen vacancy, or the element described above, which is trapped by an oxygen vacancy. For example, the plasma treatment can be performed using argon gas and nitrogen gas.

[0576] Subsequently, a heat treatment can be performed. The heat treatment conditions described above can be used. The heat treatment allows the added dopant to diffuse into region 231 of oxide 230, leading to an increase in the flow rate. Furthermore, the added dopant could diffuse into region 232 as a result of this heat treatment.

[0577] Next, the guiding film 130A and a guiding film 130B are formed to cover the insulator 274 (see Fig. 46) The conductive film 130A and the conductive film 130B can be formed by a sputtering process, a CVD process, an MBE process, a PLD process, an ALD process, or the like. In this embodiment, titanium nitride is formed as conductive film 130A by a sputtering process, and tungsten is formed as conductive film 130B by a sputtering process.

[0578] Next, the guide film 130A and the guide film 130B are processed by a lithographic process to form the conductor 130 (the conductor 130a and the conductor 130b) (see Fig. 47). For the processing of the conductive film 130A and the conductive film 130B, a method similar to that used for the processing of the conductive film 130A described in embodiment 1 may be used.

[0579] In this embodiment, as in Fig. 47(B) and Fig. Figure 47(D) shows a portion of the conductor 130, which is provided above the oxide 230, such that it extends outwards from the oxide 230. In particular, the conductor 130 is in Fig. 47(D) provided in such a way that it extends beyond oxide 230 to the E-side and F-side.

[0580] Such a shape is preferable because the capacitor 101 can form a capacitance not only between the top surface of the oxide 230 and the conductor 130, but also between the side surface of the oxide 230 and the conductor 130. Therefore, the conductor 130 is in Fig. 47(B) is provided such that it extends beyond the oxide 230 to the B-side. In contrast, if there is a limitation regarding the area occupied by the cell 601, the conductor 130 is designed to extend beyond the oxide 230 as little as possible. Therefore, the cell 601 can be miniaturized, allowing for a high level of integration of the semiconductor device.

[0581] The conductor 130 can be configured to be connected to the conductor 130 of the adjacent cell 601.

[0582] Then the insulator 280 is formed above the insulator 274 and the insulator 130 (see Fig. 48). The insulator 280 can be formed using a method and a material similar to those in embodiment 1.

[0583] Next, an opening extending to region 231 of oxide 230 is formed in insulator 280 and insulator 274; an opening extending to conductor 130 is formed in insulator 280; an opening extending to conductor 260 is formed in insulator 280, insulator 274, insulator 271, and insulator 270; and an opening extending to conductor 205 is formed in insulator 280, insulator 274, insulator 222, and insulator 220. The openings are formed by a lithographic process.

[0584] It should be noted that, in order to bring the conductor 252a into contact with the side surface of the oxide 230, the openings extending to the oxide 230 are designed such that the side surface of the oxide 230 is exposed in the opening.

[0585] Next, a noble gas is added to the oxide 230, which is exposed by the formation of the opening. As described above, the noble gas can be added using, for example, an ion implantation process in which an ionized source gas undergoes mass separation and is then added, an ion doping process in which an ionized source gas is added without mass separation, a plasma immersion ion implantation process, plasma treatment, or the like. The addition of a noble gas provides region 233 within region 231 of oxide 230 (see Fig. 49).

[0586] Next, the leader 252 (the leader 252a, the leader 252b, the leader 252c and the leader 252d) will be trained (see Fig. 50). Furthermore, the conductor that is electrically connected to the conductor 252 can be designed as required.

[0587] The semiconductor device, which includes transistor 202 and capacitor 101, can be manufactured using the above process. As shown in Fig. 30 to Fig. As shown in Figure 50, the transistor 202 and the capacitor 101 can be manufactured by using the semiconductor device manufacturing process described in this embodiment.

[0588] According to one embodiment of the present invention, a semiconductor device can be provided that can be miniaturized or highly integrated. According to another embodiment of the present invention, a semiconductor device with advantageous electrical properties can be provided. According to another embodiment of the present invention, a semiconductor device with low reverse current can be provided. According to another embodiment of the present invention, a transistor with high forward current can be provided. According to another embodiment of the present invention, a very reliable semiconductor device can be provided. According to another embodiment of the present invention, a semiconductor device with low power consumption can be provided.According to another embodiment of the present invention, a semiconductor device can be manufactured with high productivity.

[0589] As described above, the structures, methods and the like described in this embodiment can be used in a suitable combination with the structures, methods and the like described in the other embodiments. (Version 3)

[0590] In this embodiment, embodiments of a semiconductor device are based on Fig. 51 and Fig. 52 described. [Storage device 1]

[0591] One in Fig. The storage device shown in Figure 51 includes the transistor 200, the capacitor 100 and the transistor 300.

[0592] The transistor 200 is a transistor in which a channel is formed in a semiconductor layer containing an oxide semiconductor. Because the reverse current of the transistor 200 is low, a storage device using it can retain stored data for a long time. In other words, since an update process is either unnecessary or the update frequency is very low, the power consumption of the storage device can be significantly reduced.

[0593] In the Fig. In the storage device shown in Figure 51, a line 3001 is electrically connected to a source of transistor 300, and a line 3002 is electrically connected to a drain of transistor 300. A line 3003 is electrically connected to a terminal of the source and drain of transistor 200, a line 3004 is electrically connected to the first gate of transistor 200, and a line 3006 is electrically connected to the second gate of transistor 200. The other terminal of the source and drain of transistor 200 serves as an electrode of capacitor 100 and is electrically connected to the gate of transistor 300 via an opening formed in insulator 220, insulator 222, insulator 224, and oxide 230a. A line 3005 is electrically connected to the other electrode of capacitor 100.

[0594] The in Fig. The storage device shown in Figure 51 has a feature that the potential of the gate of transistor 300 can be held, and thus data can be written, held and read as follows.

[0595] The writing and holding of data are described. First, the potential of the fourth line 3004 is set to a potential at which transistor 200 is switched on, thus putting transistor 200 into a conducting state. Subsequently, the potential of the third line 3003 is applied to node SN, in which the gate of transistor 300 and an electrode of capacitor 100 are electrically connected. This means that a predetermined charge is applied to the gate of transistor 300 (writing). Here, one of two types of charge is applied, which provide different potential levels (hereinafter referred to as low charge and high charge). After that, the potential of the fourth line 3004 is set to a potential at which transistor 200 is put into a non-conducting state, thus putting transistor 200 into a non-conducting state; the charge is then held in node SN (holding).

[0596] In the case where the reverse current of transistor 200 is low, the charge of node SN is held for a long time.

[0597] Next, the data reading process is described. A suitable potential (a read potential) is applied to the fifth line 3005, while a predetermined potential (a constant potential) is applied to the first line 3001, causing the potential of the second line 3002 to vary depending on the amount of charge held at node SN. This is because, if transistor 300 is the n-channel type, an apparent threshold voltage V is present. th_H at the time when the high charge is supplied to the gate of transistor 300, is lower than an apparent threshold voltage V th_L at the moment when the low charge is applied to the gate of transistor 300. Here, an apparent threshold voltage denotes the potential of the fifth line 3005, which is necessary to bring transistor 300 into a "conducting state". Therefore, the potential of the fifth line 3005 is set to a potential V0 between V th_H and V th_L This setting determines the charge supplied to node SN. For example, in the case where the high charge is supplied to node SN during writing and the potential of the fifth line 3005 is set to V0 (> V th_H If the voltage drops below the threshold value, transistor 300 is switched to the "conducting state". Conversely, if the low charge is supplied to node SN, transistor 300 remains in the "non-conducting state", even if the potential of the fifth line 3005 is at V0 (< V). th_L ). Therefore, the data held in node SN can be read by determining the potential of the second line 3002. <Struktur der Speichervorrichtung 1>

[0598] The storage device of an embodiment of the present invention includes the transistor 300, the transistor 200 and the capacitor 100, as shown in Fig. Figure 51 shows the transistor 200 being provided above transistor 300, and capacitor 100 being provided in the same layer as transistor 200.

[0599] The transistor 300 is provided on a substrate 311 and includes a conductor 316, an insulator 315, a semiconductor area 313 which is part of the substrate 311, and a low-resistance area 314a and a low-resistance area 314b which serve as the source area and drain area.

[0600] The transistor 300 can be of the p-channel type or the n-channel type.

[0601] Preferably, a region of the semiconductor region 313 in which a channel is formed, a region near it, the low-resistance region 314a and the low-resistance region 314b, which serve as the source region and drain region, and the like, comprise a semiconductor, such as a silicon-based semiconductor, preferably single-crystal silicon. Alternatively, the regions can be formed using a material containing Ge (germanium), SiGe (silicon germanium), GaAs (gallium arsenide), GaAlAs (gallium aluminum arsenide), or the like. Silicon can be used whose effective mass is controlled by applying a mechanical stress to the crystal lattice, thereby changing the lattice spacing. Alternatively, the transistor 300 can be a high-electron-mobility transistor (HEMT) made of GaAs and GaAlAs or the like.

[0602] The low-resistance region 314a and the low-resistance region 314b contain, in addition to a semiconductor material used for the semiconductor region 313, an n-type conductivity-imparting element, such as arsenic or phosphorus, or a p-type conductivity-imparting element, such as boron.

[0603] The insulator 315 serves as the gate insulating film for the transistor 300.

[0604] For the conductor 316, which serves as the gate electrode, a semiconductor material such as silicon containing the n-type conductivity-imparting element such as arsenic or phosphorus, or the p-type conductivity-imparting element such as boron, or a conductive material such as a metal material, an alloy material, or a metal oxide material can be used.

[0605] It should be noted that the operating function is determined by the conductor material, which allows the threshold voltage to be adjusted. In particular, it is preferable to use a material such as titanium nitride or tantalum nitride as the conductor. To ensure conductivity and embedding properties, it is also preferable to use a layered arrangement of metallic materials, such as tungsten and aluminum, as the conductor. Tungsten is especially preferred due to its heat resistance.

[0606] It should be noted that the in Fig. The transistor 300 shown in Figure 51 is only an example and the structure is not limited to it; a suitable transistor can be used according to a circuit configuration or a control method.

[0607] An insulator 320, an insulator 322, an insulator 324 and an insulator 326 are arranged sequentially on top of each other in such a way that they cover the transistor 300.

[0608] For insulator 320, insulator 322, insulator 324 and insulator 326, for example silicon oxide, silicon oxynitride, silicon nitride oxide, silicon nitride, aluminum oxide, aluminum oxynitride, aluminum nitride oxide, aluminum nitride or the like can be used.

[0609] The insulator 322 can serve as a planarizing film to eliminate a level difference caused by the transistor 300 or the like provided below the insulator 322. For example, the top surface of the insulator 322 can be flattened by a planarizing treatment using a chemical-mechanical polishing (CMP) process or the like to increase the degree of flatness.

[0610] For the insulator 324, a film with a blocking property is preferably used which prevents hydrogen or impurities from diffusing from the substrate 311, the transistor 300 or the like into an area in which the transistor 200 is provided.

[0611] Silicon nitride formed by a CVD process can be used as an example of a film exhibiting a hydrogen barrier property. The diffusion of hydrogen into a semiconductor element containing an oxide semiconductor, such as transistor 200, degrades the properties of the semiconductor element in some cases. Therefore, a film that prevents hydrogen diffusion is preferably provided between transistor 200 and transistor 300. Specifically, the hydrogen diffusion barrier film is one that releases a small amount of hydrogen.

[0612] The amount of hydrogen released can be analyzed, for example, by thermal desorption spectroscopy (TDS) or similar methods. The amount of hydrogen released by insulator 324, converted into hydrogen atoms per unit area of ​​insulator 324, is, for example, less than or equal to 10 × 10 15 atoms / cm² 2 preferably less than or equal to 5 × 10 15 atoms / cm² 2 TDS analysis is performed at a film surface temperature in the range of 50 °C to 500 °C.

[0613] It should be noted that the permittivity of insulator 326 is preferably lower than that of insulator 324. For example, the relative permittivity of insulator 326 is preferably lower than 4, more preferably lower than 3. For example, the relative permittivity of insulator 326 is preferably 0.7 times or less than the relative permittivity of insulator 324, more preferably 0.6 times or less. In the case where a material with low permittivity is used for an interlayer film, the parasitic capacitance between conductors can be reduced.

[0614] A conductor 328, a conductor 330, and the like, which are electrically connected to the capacitor 100 or the transistor 200, are embedded in the insulator 320, the insulator 322, the insulator 324, and the insulator 326, respectively. It should be noted that the conductor 3328 and the conductor 3330 each serve as a terminal plug or conductor. A multitude of conductor structures serving as terminal plugs or conductors are, in some cases, collectively designated with the same reference numeral. Furthermore, in this description and the like, a conductor and a terminal plug electrically connected to the conductor may constitute a single component. That is to say, in some cases, part of a conductor serves as a conductor, and in other cases, part of the conductor serves as a terminal plug.

[0615] The material for the respective terminal plugs and conductors (e.g., conductor 328 and conductor 330) can be a single layer or a layered arrangement of a conductive material, such as a metal, an alloy, a metal nitride, or a metal oxide. It is preferred to use a high-melting-point material that exhibits both heat resistance and conductivity, such as tungsten or molybdenum, and tungsten is particularly preferred. Alternatively, a low-resistance conductive material, such as aluminum or copper, is preferably used. The use of a low-resistance conductive material can reduce the conductor resistance.

[0616] A conduction layer can be provided above the insulator 326 and the conductor 330. For example, in Fig. Figure 51 shows an insulator 350, an insulator 352, and an insulator 354 arranged sequentially one above the other. Furthermore, a conductor 356 is formed within the insulator 350, the insulator 352, and the insulator 354. The conductor 356 serves as a terminal plug or conductor. It should be noted that the conductor 356 can be provided using a material similar to that used for the conductor 328 and the conductor 330.

[0617] It should be noted that, for example, an insulator such as insulator 324, which has a hydrogen blocking property, is preferably used as insulator 350. Furthermore, conductor 356 preferably comprises a conductor which has a hydrogen blocking property. The conductor which has a hydrogen blocking property is formed, in particular, in an opening of insulator 350, which has a hydrogen blocking property. In such a structure, transistor 300 and transistor 200 can be separated by a barrier layer, so that the diffusion of hydrogen from transistor 300 into transistor 200 can be prevented.

[0618] It should be noted that a conductor exhibiting hydrogen blocking properties, such as tantalum nitride or the like, is preferably used. By layering tantalum nitride and tungsten, which has high conductivity, the diffusion of hydrogen from transistor 300 can be prevented while ensuring the conductivity of the conductor. In this case, a tantalum nitride layer exhibiting hydrogen blocking properties is preferably in contact with the insulator 350, which also exhibits hydrogen blocking properties.

[0619] A conduction layer can be provided above the insulator 354 and the conductor 356. For example, in Fig. 51 An insulator 360, an insulator 362, and an insulator 364 are arranged sequentially one above the other. Furthermore, a conductor 366 is formed within the insulator 360, the insulator 362, and the insulator 364. The conductor 366 serves as a connecting plug or conductor. It should be noted that the conductor 366 can be provided using a material similar to that used for the conductor 328 and the conductor 330.

[0620] It should be noted that, for example, insulator 360 is preferably an insulator that, like insulator 324, has a blocking property against hydrogen. Furthermore, conductor 366 preferably comprises a conductor that has a blocking property against hydrogen. The conductor that has a blocking property against hydrogen is formed, in particular, in an opening of insulator 360, which has a blocking property against hydrogen. In such a structure, transistor 300 and transistor 200 can be separated by a barrier layer, so that the diffusion of hydrogen from transistor 300 into transistor 200 can be prevented.

[0621] A conduction layer can be provided above the insulator 364 and the conductor 366. For example, in Fig. 51 An insulator 370, an insulator 372, and an insulator 374 are arranged sequentially one above the other. Furthermore, a conductor 376 is formed within the insulator 370, the insulator 372, and the insulator 374. The conductor 376 serves as a connecting plug or conductor. It should be noted that the conductor 376 can be provided using a material similar to that used for the conductor 328 and the conductor 330.

[0622] It should be noted that, for example, insulator 370 is preferably an insulator that, like insulator 324, has a blocking property against hydrogen. Furthermore, conductor 376 preferably comprises a conductor that has a blocking property against hydrogen. The conductor that has a blocking property against hydrogen is formed, in particular, in an opening of insulator 370, which has a blocking property against hydrogen. In such a structure, transistor 300 and transistor 200 can be separated by a barrier layer, so that the diffusion of hydrogen from transistor 300 into transistor 200 can be prevented.

[0623] A conduction layer can be...

Claims

[1] Semiconductor device comprising: a first conductor (203a); a second conductor (203b) above and in direct contact with the first conductor (203a); a third conductor (205); a first insulator (224) covering the second conductor (203b) and the third conductor (205); a first metal oxide (230a) above and in contact with a top surface of the first insulator (224); and a second metal oxide (230b) above the first metal oxide (230a), wherein an opening is provided in the first metal oxide (230a) and the first insulator (224), wherein the second metal oxide (230b) is provided in the opening, wherein the second metal oxide (230b) is electrically connected to the first conductor (203a) via the opening, wherein the third conductor (205) is configured to serve as the gate electrode of a transistor (200), wherein the third conductor (205) overlaps with the first metal oxide (230a) and the second metal oxide (230b) and does not overlap with the opening, and wherein the second metal oxide (230b) has a sub-region (231b) configured to serve as a first electrode of a capacitor (100) and overlapping the opening, wherein this sub-region (231b) does not overlap with the third conductor (205). [2] Semiconductor device comprising: a first conductor (203a); a second conductor (203b) above and in direct contact with the first conductor (203a); a third conductor (205); a first insulator (224) covering the second conductor (203b) and the third conductor (205); a first oxide (230a) over the first insulator (224); a second oxide (230b) above the first oxide (230a); and a fourth conductor (252) in contact with a top side of the second oxide (230b), wherein an opening which overlaps with at least part of the first conductor (203a) is provided in the first oxide (230a) and the first insulator (224), wherein the second oxide (230b) in the opening is in contact with a side surface of the first oxide (230a), wherein the second oxide (230b) is electrically connected to the first conductor (203a) via the opening, wherein one underside of the first oxide (230a) is in contact with the first insulator (224), wherein the third conductor (205) is configured to serve as the gate electrode of a transistor (200), wherein the third conductor (205) overlaps with the first oxide (230a) and the second oxide (230b) and does not overlap with the opening, and wherein the second metal oxide (230b) has a sub-region (231b) configured to serve as a first electrode of a capacitor (100) and overlapping the opening, wherein this sub-region (231b) does not overlap with the third conductor (205). [3] Semiconductor device comprising: a first conductor (203a); a second conductor (203b) above and in direct contact with the first conductor (203a); a third conductor (205) configured to serve as the gate electrode of a transistor (200); a first insulator (224) covering the second conductor (203b) and the third conductor (205); a first metal oxide (230a) above and in contact with a top surface of the first insulator (224); and a second metal oxide (230b) above the first metal oxide (230a), wherein the second metal oxide (230b) has a first region (231a) configured to serve as one of a source electrode and one of a drain electrode of the transistor (200), a second region (231b) configured to serve as the other of the source electrode and drain electrode of the transistor (200), and a third region (234) between the first region (231a) and the second region (231b) configured to serve as a channeling region, wherein an opening is provided in the first metal oxide (230a) and the first insulator (224), wherein the second metal oxide (230b) is provided in the opening; wherein the second metal oxide (230b) is electrically connected to the first conductor (203a) via the opening, wherein the opening overlaps with one of the first region (231a) and the second region (231b) of the second metal oxide (230b) and does not overlap with the third region (234) of the second metal oxide (230b), and wherein the second metal oxide (230b) has a sub-region (231b) configured to serve as a first electrode of a capacitor (100) and overlaps with the opening, wherein this sub-region (231b) does not overlap with the third conductor (205). [4] Semiconductor device comprising: a first conductor (203a); a second conductor (203b) above and in direct contact with the first conductor (203a); a third conductor (205a); a fourth conductor (205b) above the third conductor (205a); a first insulator (224) covering the second conductor (203b) and the fourth conductor (205b); a first metal oxide (230a) above and in contact with a top surface of the first insulator (224); a second metal oxide (230b) above the first metal oxide (230a), a third metal oxide (230c) above the second metal oxide (230b); a second insulator (250) over the third metal oxide (230c); and a fifth conductor (260a) above the second insulator (250), wherein an opening is provided in the first metal oxide (230a) and the first insulator (224), wherein the second metal oxide (230b) is provided in the opening, wherein the second metal oxide (230b) is electrically connected to the first conductor (203a) via the opening, wherein the fifth conductor (260a) overlaps with the third conductor (205a) and the fourth conductor (205b), with the first insulator (224), the first metal oxide (230a), the second metal oxide (230b), the third metal oxide (230c) and the second insulator (250) lying in between, and wherein the second metal oxide (230b) has a sub-region (231b) configured to serve as a first electrode of a capacitor (100) and overlapping the opening, wherein this sub-region (231b) does not overlap with the third conductor (205). [5] Semiconductor device comprising: a first conductor (203a); a second conductor (203b) above and in direct contact with the first conductor (203a); a third conductor (205) configured to serve as the first gate electrode of a transistor (200); a first insulator (224) covering the second conductor (203b) and the third conductor (205); a first metal oxide (230a) above and in contact with a top side of the first insulator (224); a second metal oxide (230b) above the first metal oxide (230a); a second insulator (250) over the second metal oxide (230b); a fifth conductor (260) above the second insulator (250), wherein the fifth conductor (260) is configured to serve as a second gate electrode of the transistor (200); a third insulator (271) over the fourth conductor (260); and a sixth conductor (130) above the third insulator (271), wherein the second metal oxide (230b) has a first region (231a) configured to serve as one of a source electrode and one of a drain electrode of the transistor (200), a second region (231b) configured to serve as the other of the source electrode and drain electrode of the transistor (200), and a third region (234) between the first region (231a) and the second region (231b) configured to serve as a channeling region, wherein an opening is provided in the first metal oxide (230a) and the first insulator (224), wherein the second metal oxide (230b) is provided in the opening; wherein the second metal oxide (230b) is electrically connected to the first conductor (203a) via the opening, wherein the opening overlaps with one of the first region (231a) and the second region (231b) of the second metal oxide (230b) and does not overlap with the third region (234) of the second metal oxide (230b), the sixth conductor (130) overlaps the opening, and wherein the second metal oxide (230b) has a sub-region (231b) configured to serve as a first electrode of a capacitor (100) and overlapping the opening, wherein this sub-region (231b) does not overlap with the third conductor (205). [6] Manufacturing process of a semiconductor device comprising the following steps: Forming a first insulating film over a first conductor (203a) and a second conductor (205a); Formation of a first oxide film over the first insulating film; Forming an opening that overlaps with at least part of the first conductor (203a) in the first oxide film and the first insulating film; Formation of a second oxide film over the first oxide film and the first conductor (203a); Formation of a third oxide film over the second oxide film; Structuring the third oxide film, the second oxide film and the first oxide film to form a first oxide (230a), a second oxide (230b) over the first oxide (230a) and a third oxide (230c) over the second oxide (230b); Forming a second insulating film such that it covers the first oxide (230a), the second oxide (230b) and the third oxide (230c); Forming a first guiding film over the second insulating film; Structuring the first conducting film and the second insulating film to form a third conductor (260a) and a first insulator (250); Forming a third insulating film such that it covers the third conductor (260a) and the first insulator (250); Forming a fourth insulating film over the third insulating film; and Processing the fourth insulating film and the third insulating film by etching to form a second insulator (272) on a side face of the third conductor (260a) and a side face of the first insulator (250) and to form a third insulator (273) on a side face of the second insulator (272). [7] Manufacturing method of a semiconductor device according to claim 6 wherein the third conductor (260a) overlaps with the second conductor (205a), wherein the first insulating film, the first oxide (230a), the second oxide (230b), the third oxide (230c) and the first insulator (250) lie in between.

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