LIGHT RECEIVING ELEMENT, DISTANCE MEASURING MODULE AND ELECTRONIC DEVICE

Abstract

Light receiving element (1) comprising a pixel (10) containing at least: a first charge holding unit (FD1) and a second charge holding unit (FD2), each holding an electric charge generated by a photodiode (PD); a first transfer transistor (TRG1) which transfers the electrical charge to the first charge holding unit (FD1); and a second transfer transistor (TRG2) which transfers the electrical charge to the second charge holding unit (FD2), wherein the first and second transfer transistors (TRG1, TRG2) each include a vertical transistor having a vertical gate electrode region (42V).

Description

TECHNICAL FIELD

[0001] The present technology relates to a light receiving element, a distance measuring module, and an electronic device, and more particularly to a light receiving element, a distance measuring module, and an electronic device capable of reducing signal degradation during charge transfer. BACKGROUND TECHNOLOGY

[0002] A semiconductor detection element that measures the distance to an object using a time-of-flight (ToF) method is known. In a semiconductor detection element using the ToF method, the light emitted by a light source is incident on an object and reflected, and the reflected light is photoelectrically converted by a photodiode. A signal charge generated by the photoelectric conversion is distributed between two floating diffusions (FDs) by a pair of alternately driven gate electrodes (see, for example, Patent Document 1). CITATION LISTPATENT DOCUMENT

[0003] Patent Document 1: Japanese Patent Application National Publication (Laid-Open) JP 2007-526448 A Further distance measuring sensors are known, for example, from the documents US 2012 / 0 012 899 A1 and US 2015 / 0 130 902 A1. SUMMARY OF THE INVENTION PROBLEMS TO BE SOLVED BY THE INVENTION

[0004] In a semiconductor detection element using the gate electrode pair structure described above, it is necessary to reduce the signal degradation due to the return of the signal charge to the photodiode during transmission when one of the turned-on gate electrodes is turned off.

[0005] The present technology was developed with such a situation in mind and is intended to make it possible to reduce signal degradation during charge transfer. PROBLEM SOLVING

[0006] A light receiving element of a first aspect of the present technology includes a pixel comprising at least: a first charge holding unit and a second charge holding unit, each holding an electric charge generated by a photodiode; a first transfer transistor that transfers the electric charge to the first charge holding unit; and a second transfer transistor that transfers the electric charge to the second charge holding unit, wherein the first and second transfer transistors each comprise a vertical transistor having a vertical gate electrode region.

[0007] A distance measurement module of a second aspect of the present technology comprises: a light receiving element having a pixel, including at least a first charge holding unit and a second charge holding unit, each holding an electric charge generated by a photodiode, a first transfer transistor that transfers the electric charge to the first charge holding unit, and a second transfer transistor that transfers the electric charge to the second charge holding unit, wherein the first and second transfer transistors each include a vertical transistor having a vertical gate electrode region; a light source that emits irradiation light whose brightness fluctuates periodically; and a light emission control unit that controls an irradiation time of the irradiation light.

[0008] An electronic device of a third aspect of the present technology includes a light-receiving element having a pixel, comprising at least: a first charge holding unit and a second charge holding unit, each holding an electric charge generated by a photodiode; a first transfer transistor that transfers the electric charge to the first charge holding unit; and a second transfer transistor that transfers the electric charge to the second charge holding unit, wherein the first and second transfer transistors each comprise a vertical transistor having a vertical gate electrode region.

[0009] In the first to third aspects of the present technology, the pixel is provided with at least: the first charge holding unit and the second charge holding unit, each holding the electric charge generated by the photodiode; the first transfer transistor that transfers the electric charge to the first charge holding unit; and the second transfer transistor that transfers the electric charge to the second charge holding unit, wherein the first and second transfer transistors each include the vertical transistor having a vertical gate electrode region.

[0010] The light receiving element, the distance measuring module and the electronic device may be an independent device or a module built into another device. EFFECTS OF THE INVENTION

[0011] According to the first to third aspects of the present technology, it is possible to reduce signal deterioration during charge transfer.

[0012] Note that the effect described here is not necessarily limited and may be any effect described in the present disclosure. BRIEF DESCRIPTION OF THE DRAWINGS Fig. 1 is a block diagram showing a schematic configuration example of a light receiving element to which the present technology is applied. Fig. Figure 2 is a diagram illustrating an equivalent circuit of a pixel. Fig. 3 is a top view of the pixel. Fig. Figure 4 is a cross-sectional view of the pixel. Fig. Figure 5 is a diagram explaining an effect of the pixel to which the present technology is applied. Fig. is a diagram that explains an effect of the pixel to which the present technology is applied. Fig. is a diagram that explains an effect of the pixel to which the present technology is applied. Fig. 8 is a plan view for explaining a planar shape of a vertical gate electrode region. Fig. 9 is a diagram explaining an example of the arrangement of a pixel in a pixel array unit. Fig. 10 is a diagram for explaining the driving of a transfer transistor. Fig. 11 is a diagram explaining the control of the transfer transistor. Fig. 12 is a plan view illustrating an arrangement example of a multilayer wiring layer. Fig. 13 is a plan view illustrating a modification of the pixel. Fig. Figure 14 is a cross-sectional view illustrating the modification of the pixel. Fig. is a top view of a pixel with four taps. Fig. is a diagram explaining how to control the pixel with four taps. Fig. is a diagram explaining the application to an electric field controlled light receiving element. Fig. is a block diagram showing a configuration example of a distance measurement module to which the present technology is applied. Fig. 19 is a block diagram illustrating a configuration example of a smartphone as an electronic device to which the present technology is applied. Fig. is a diagram showing an example of a schematic configuration of an endoscopic surgical system. Fig. Figure 21 is a block diagram illustrating an example of a functional configuration of a camera head and a CCU. Fig. is a block diagram showing an example of a schematic configuration of a vehicle control system. Fig. 23 is an explanatory diagram illustrating an example of installation positions of a vehicle exterior information acquisition unit and an imaging unit. EMBODIMENT OF THE INVENTION

[0013] The following describes a mode for implementing the present technology (hereinafter referred to as the "embodiment"). Note that the description is performed in the following order. 1. Configuration example of the light receiving element 2. Equivalent circuit of the pixel 3. Top view of the pixel 4. Cross-sectional view of the pixel 5. Effect of the vertical transistor 6. Planar shape of the vertical gate electrode region 7. Arrangement example for multiple pixels 8. Controlling the transfer transistor 9. Example arrangement of the wiring level 10. Modification of the pixel 11. Arrangement example of a pixel with four taps 12. Application to light-receiving element with electric field control 13. Configuration example for distance measurement module 14. Configuration example of an electronic device 15. Application example for endoscopic surgery system 16. Application example for a mobile body <1. Configuration example of a light-receiving element>

[0014] Fig. 1 is a block diagram showing a schematic configuration example of a light receiving element to which the present technology is applied.

[0015] In the Fig. The light receiving element 1 shown in Figure 1 is an element that outputs distance measurement information using an indirect ToF method.

[0016] The light-receiving element 1 receives light (reflected light) obtained by light (irradiation light) emitted from a predetermined light source being incident on an object and reflected by the object, and outputs a depth image in which distance information to the object is stored as a depth value. Note that the irradiation light emitted from the light source is, for example, infrared light with a wavelength in the range of 780 nm to 1000 nm, and is pulsed light whose on / off is repeated at a predetermined period.

[0017] The light-receiving element 1 includes a pixel array unit 21 formed on a semiconductor substrate (not shown), and a peripheral circuit unit integrated on the same semiconductor substrate as the pixel array unit 21. The peripheral circuit unit includes, for example, a vertical drive unit 22, a column processing unit 23, a horizontal drive unit 24, a system control unit 25, and the like.

[0018] The light-receiving element 1 is further provided with a signal processing unit 26 and a data storage unit 27. Note that the signal processing unit 26 and the data storage unit 27 may be mounted on the same substrate on which the light-receiving element 1 is mounted, or may be arranged on a substrate in an imaging device other than the light-receiving element 1.

[0019] The pixel array unit 21 has a configuration in which the pixels 10 are arranged two-dimensionally in a matrix in a row direction and a column direction, each pixel generating an electric charge corresponding to an amount of received light and outputting a signal corresponding to the electric charge. In other words, the pixel array unit 21 includes a plurality of pixels 10, each of which performs photoelectric conversion of incident light and outputs the signal corresponding to the electric charge obtained as a result of the photoelectric conversion. Details of the pixels 10 will be described later in Fig. 2 or later.

[0020] Here, the row direction refers to the horizontal arrangement direction of the pixels 10, and the column direction refers to the vertical arrangement direction of the pixels 10. The row direction is the transverse direction in the figure, and the column direction is the longitudinal direction in the figure.

[0021] In the pixel array unit 21, with respect to a matrix-like pixel arrangement, a pixel drive line 28 is wired along the row direction for each of the pixel rows, and two vertical signal lines 29 are wired along the column direction for each of the pixel columns. The pixel drive line 28 transmits, for example, a drive signal for performing the drive during the reading of a signal from each of the pixels 10. Note that in Fig. 1, the pixel drive line 28 is illustrated as a wiring line, but the wiring line is not limited to a wiring line. One end of the pixel drive line 28 is connected to an output end corresponding to each row of the vertical drive unit 22.

[0022] The vertical drive unit 22 includes a shift register, an address decoder, and the like, and drives each pixel 10 of the pixel array unit 21 at the same time for all pixels or on a column basis, or the like. In other words, the vertical drive unit 22, together with the system control unit 25, which controls the vertical drive unit 22, forms a drive unit that controls the operation of each pixel 10 of the pixel array unit 21.

[0023] A detection signal output from each pixel 10 of the pixel rows in response to the drive by the vertical drive unit 22 is input to the column processing unit 23 via the vertical signal line 29. The column processing unit 23 performs predetermined signal processing on the detection signal output from each pixel 10 via the vertical signal line 29 and temporarily holds the detection signal after the signal processing. Specifically, the column processing unit 23 performs noise removal processing, analog-to-digital (AD) conversion processing, and the like as signal processing.

[0024] The horizontal drive unit 24 includes a shift register, an address decoder, and the like, and sequentially selects unit circuits corresponding to the pixel columns of the column processing unit 23. Through selective scanning by the horizontal drive unit 24, the detection signal is sequentially output, which is subjected to signal processing for each unit circuit in the column processing unit 23.

[0025] The system control unit 25 includes a timer that generates various timing signals and the like, and performs the driving of the vertical driving unit 22, the column processing unit 23, the horizontal driving unit 24, and the like based on the various timing signals generated by the timer.

[0026] The signal processing unit 26 has at least one arithmetic processing function and performs various types of signal processing, such as arithmetic processing, based on the detection signal output from the column processing unit 23. The data storage unit 27 temporarily stores data required for signal processing in the signal processing unit 26.

[0027] The light receiving element 1 configured as described above outputs the depth image in which the distance information to the object is stored as a depth value in the pixel value. The light receiving element 1 can be mounted, for example, on a vehicle-mounted system that measures a distance to an object outside the vehicle, a gesture recognition device that measures a distance to an object such as a user's hand and recognizes a user's gesture based on the measurement result, and the like. <2. Equivalent circuit of the pixel>

[0028] Fig. 2 shows an equivalent circuit of the pixel 10 arranged two-dimensionally in the pixel array unit 21.

[0029] Pixel 10 includes a photodiode PD as a photoelectric conversion element. Furthermore, pixel 10 contains two transfer transistors TRG, two floating diffusion regions FD, two additional capacitors FDL, two switching transistors FDG, two reset transistors RST, two amplification transistors AMP, and two selection transistors SEL.

[0030] Here, the two transfer transistors TRG, the two floating diffusion regions FD, the two additional capacitances FDL, the two switching transistors FDG, the two reset transistors RST, the two amplifying transistors AMP and the two selecting transistors SEL provided in the pixel 10 are referred to as transfer transistors TRG1 and TRG2, as floating diffusion regions FD1 and FD2, as additional capacitances FDL1 and FDL2, as switching transistors FDG1 and FDG2, as reset transistors RST1 and RST2, as amplifying transistors AMP1 and AMP2 and as selecting transistors SEL1 and SEL2 in a case where two are distinguished at a time, as in Fig. 2.

[0031] The transfer transistors TRG, the switching transistors FDG, the reset transistors RST, the amplification transistors AMP and the selection transistors SEL each comprise, for example, an N-type MOS transistor.

[0032] When a transfer drive signal TRG1g supplied to the gate electrode of the transfer transistor TRG1 is in an active state, the transfer transistor TRG1 is in a conductive state in response to the transfer drive signal TRG1g, thereby transferring an electric charge stored in the photodiode PD to the floating diffusion region FD1. When a transfer drive signal TRG2g supplied to the gate electrode of the transfer transistor TRG2 is in an active state, the transfer transistor TRG2 is in a conductive state in response to the transfer drive signal TRG2g, thereby transferring the electric charge stored in the photodiode PD to the floating diffusion region FD2.

[0033] The floating diffusion regions FD1 and FD2 are each a charge holding unit that temporarily holds the electrical charge transferred by the photodiode PD.

[0034] When an FD drive signal FDG1g applied to the gate electrode of the switching transistor FDG1 is in an active state, the switching transistor FDG1 is in a conductive state in response to the FD drive signal FDG1g, thereby connecting the additional capacitance FDL1 to the floating diffusion region FD1. When an FD drive signal FDG2g applied to the gate electrode of the switching transistor FDG2 is in an active state, the switching transistor FDG2 is in a conductive state in response to the FD drive signal FDG2g, thereby connecting the additional capacitance FDL2 to the floating diffusion region FD2.

[0035] For example, in a high illuminance case where the amount of incident light is high, the vertical drive unit 22 causes the switching transistors FDG1 and FDG2 to be in the active states, connects the floating diffusion region FD1 to the additional capacitance FDL1, and connects the floating diffusion region FD2 to the additional capacitance FDL2. This allows more electric charge to be stored in the high illuminance case.

[0036] On the other hand, in the case of low illuminance where the amount of incident light is small, the vertical drive unit 22 causes the switching transistors FDG1 and FDG2 to be inactive states and separates the additional capacitances FDL1 and FDL2 from the floating diffusion regions FD1 and FD2, respectively. This can increase the conversion efficiency.

[0037] When a reset drive signal RST1g supplied to the gate electrode of the reset transistor RST1 is in an active state, the reset transistor RST1 is in a conductive state in response to the reset drive signal RST1g, thereby resetting a potential of the floating diffusion region FD1 to a predetermined level (supply voltage VDD). When a reset drive signal RST2g supplied to the gate electrode of the reset transistor RST2 is in an active state, the reset transistor RST2 is in a conductive state in response to the reset drive signal RST2g, thereby resetting a potential of the floating diffusion region FD2 to the predetermined level (supply voltage VDD). Note that when the reset transistors RST1 and RST2 are brought into the active states, the switching transistors FDG1 and FDG2 are also brought into the active states at the same time.

[0038] The source electrode of the amplification transistor AMP1 is connected to a vertical signal line 29A via the selection transistor SEL1, and the amplification transistor AMP1 is connected to a constant current source (not shown) to form a source follower circuit. The source electrode of the amplification transistor AMP2 is connected to a vertical signal line 29B via the selection transistor SEL2, thereby connecting the amplification transistor AMP2 to a constant current source (not shown) to form a source follower circuit.

[0039] The selection transistor SEL1 is connected between the source electrode of the amplification transistor AMP1 and the vertical signal line 29A. When a selection signal SEL1g supplied to the gate electrode of the selection transistor SEL1 is in an active state, the selection transistor SEL1 is in a conductive state in response to the selection signal SEL1g and outputs a detection signal VSL1 output from the amplification transistor AMP1 to the vertical signal line 29A.

[0040] The selection transistor SEL2 is connected between the source electrode of the amplification transistor AMP2 and the vertical signal line 29B. When a selection signal SEL2g supplied to the gate electrode of the selection transistor SEL2 is in an active state, the selection transistor SEL2 is in a conductive state in response to the selection signal SEL2g and outputs a detection signal VSL2, which is output from the amplification transistor AMP2 to the vertical signal line 29B.

[0041] The transfer transistors TRG1 and TRG2, the switching transistors FDG1 and FDG2, the reset transistors RST1 and RST2, the amplification transistors AMP1 and AMP2 and the selection transistors SEL1 and SEL2 of the pixel 10 are controlled by the vertical control unit 22.

[0042] In the equivalent circuit of Fig. 2, the additional capacitances FDL1 and FDL2 and the switching transistors FDG1 and FDG2 that control their connections can be omitted, but by providing the additional capacitances FDL and using them properly depending on the amount of incident light, a high dynamic range can be ensured.

[0043] Let’s briefly describe how the Pixel 10 works.

[0044] First, before light reception begins, a reset operation is performed on all pixels to reset the electric charge of pixel 10. In other words, the reset transistors RST1 and RST1, the switching transistors FDG1 and FDG2, and the transfer transistors TRG1 and TRG2 are turned on, and stored electric charges of the photodiode PD, the floating diffusion regions FD1 and FD2, and the auxiliary capacitors FDL1 and FDL2 are discharged to a constant voltage source VDD, and the electric charge is reset.

[0045] After the stored electrical charges are discharged, light reception starts in all pixels.

[0046] During a light-receiving period, the transfer transistors TRG1 and TRG2 are alternately driven. In other words, in a first period, the transfer transistor TRG1 is controlled to turn on, and the transfer transistor TRG2 is controlled to turn off. In the first period, the electric charge generated by the photodiode PD is transferred to the floating diffusion region FD1. In a second period following the first period, the transfer transistor TRG1 is controlled to turn off, and the transfer transistor TRG2 is controlled to turn on. In the second period, the electric charge generated by the photodiode PD is transferred to the floating diffusion region FD2. As a result, the electric charge generated by the photodiode PD is distributed and stored among the floating diffusion regions FD1 and FD2.

[0047] Then, when the light-receiving period ends, each pixel 10 of the pixel array unit 21 is selected in row order. In the selected pixel 10, the selection transistors SEL1 and SEL2 are turned on. As a result, the electric charge stored in the floating diffusion region FD1 is output as the detection signal VSL1 to the column processing unit 23 via the vertical signal line 29A. The electric charge stored in the floating diffusion region FD2 is output as the detection signal VSL2 to the column processing unit 23 via the vertical signal line 29B.

[0048] This completes one light receiving operation and the next light receiving operation, starting with the reset operation, is executed.

[0049] The reflected light received by pixel 10 is delayed compared to the time of irradiation by the light source, depending on the distance to the object. Since the distribution ratio between the electrical charges stored in the two diffusion regions FD1 and FD2 changes depending on the delay time, the distance to the object can be determined from the distribution ratio between the electrical charges stored in the two diffusion regions FD1 and FD2. <3. Top view of a pixel>

[0050] Fig. Figure 3 is a top view of the pixel 10 showing the arrangement of the Fig. 2 shows the pixel circuit.

[0051] The X-direction in Fig. 3 corresponds to the row direction (horizontal direction) in Fig. 1, and the Y direction corresponds to the column direction (vertical direction) in Fig. 1.

[0052] As in Fig. 3, the photodiode PD in a central area of ​​the rectangular pixel 10 includes an N-type semiconductor region 41, and the transfer transistors TRG1 and TRG2 are arranged to oppose the photodiode PD in the X direction.

[0053] In addition, with an intermediate line (not shown) between the transfer transistors TRG1 and TRG2 arranged to face each other as a reference, the floating diffusion region FD1, the switching transistor FDG1, the additional capacitance FDL1, the reset transistor RST1, the amplification transistor AMP1 and the selection transistor SEL1 are arranged mirror-symmetrically with respect to the floating diffusion region FD2, the switching transistor FDG2, the additional capacitance FDL2, the reset transistor RST2, the amplification transistor AMP2 and the selection transistor SEL2.

[0054] The transfer transistor TRG1 includes a gate electrode 421, an N-type semiconductor region 41 as a source region, and an N-type semiconductor region 431 as a drain region. The N-type semiconductor region 41 as a source region is also used as a photodiode PD, and the N-type semiconductor region 431 as a drain region is also used as a floating diffusion region FD1.

[0055] The switching transistor FDG1 includes a gate electrode 441, the N-type semiconductor region 431 as the source region, and an N-type semiconductor region 451 as the drain region. The N-type semiconductor region 431 as the source region is also used as the floating diffusion region FD1, and the N-type semiconductor region 451 as the drain region is also used as the additional capacitance FDL1.

[0056] The reset transistor RST1 includes a gate electrode 461, the N-type semiconductor region 451 as a source region and an N-type semiconductor region 471 as a drain region.

[0057] The amplification transistor AMP1 includes a gate electrode 481, the N-type semiconductor region 471 as a drain region, and an N-type semiconductor region 491 as a source region. The N-type semiconductor region 471 as a drain region is also used as the drain region of the reset transistor RST1.

[0058] The selection transistor SEL1 includes a gate electrode 501, the N-type semiconductor region 491 as a drain region, and an N-type semiconductor region 511 as a source region. The N-type semiconductor region 491 as a drain region is also used as the source region of the amplification transistor AMP1.

[0059] The reset transistor RST1, the amplification transistor AMP1 and the selection transistor SEL1 are arranged side by side in this order in the Y direction, and the transfer transistor TRG1 and the switching transistor FDG1 are arranged side by side in the X direction.

[0060] The gate electrode, drain region, and source region of the transfer transistor TRG2, the switching transistor FDG2, the reset transistor RST2, the amplification transistor AMP2, and the selection transistor SEL2 are each denoted by a subscript 2. In the pixel, the only difference is that they are arranged mirror-symmetrically in the X direction with respect to the transfer transistor TRG1, the switching transistor FDG1, the reset transistor RST1, the amplification transistor AMP1, and the selection transistor SEL1. Therefore, descriptions of these are omitted. Regarding the transfer transistors TRG, note that in a case where it is not necessary to distinguish the gate electrodes, drain regions, and source regions of the transfer transistors TRG1 and TRG2, the subscripts are omitted.

[0061] The outside of the N-type semiconductor region forming the drain region and source region of each pixel transistor in the pixel 10 includes a P-type semiconductor region 52.

[0062] The photodiode PD and the floating diffusion regions FD1 and FD2 each comprise a rectangular region that is longer in the Y direction than in the X direction. The gate electrodes 421 and 422 of the transfer transistors TRG1 and TRG2 are formed longer in the Y direction, which is a longitudinal direction, than the photodiode PD and the floating diffusion regions FD1 and FD2. In other words, a gate width 61 of the gate electrodes 421 and 422 of the transfer transistors TRG1 and TRG2 is larger than a region width in the Y direction of the photodiode PD and the floating diffusion regions FD1 and FD2.

[0063] Furthermore, a distance 62 between the gate electrodes 421 and 422 of the transfer transistors TRG1 and TRG2 is shorter than the gate width 61 of the gate electrodes 421 and 422 of the transfer transistors TRG1 and TRG2. Because the distance 62 between the gate electrodes 42 of the two transfer transistors TRG is shorter than the gate width 61 of the transfer transistors TRG, an electric field can be easily applied in the charge transfer direction. <4. Cross-sectional view of a pixel>

[0064] Fig. Figure 4 shows a cross-sectional view of pixel 10.

[0065] A of Fig. 4 is a cross-sectional view of the pixel 10 on a line a1-a2 of Fig. 3, and B of Fig. 4 is a cross-sectional view of the pixel 10 on a line b1-b2 of Fig. 3. The Z-axis in Fig. The longitudinal direction indicated in 4 corresponds to a substrate depth direction.

[0066] As in B of Fig. As shown in Figure 4, transfer transistors TRG1 and TRG2 each include a vertical transistor including gate electrode 42 extending in the substrate depth direction. Specifically, gate electrode 421 of transfer transistor TRG1 includes a planar gate electrode portion 42T1 formed on the upper surface of a semiconductor substrate 70 including P-type semiconductor region 52, and a vertical gate electrode portion 42V1 extending in the substrate depth direction. A gate electrode 422 of transfer transistor TRG2 also includes a planar gate electrode portion 42T2 formed on the upper surface of semiconductor substrate 70 including P-type semiconductor region 52, and a vertical gate electrode portion 42V2 extending in the substrate depth direction.

[0067] In Fig. 4, the upper surface of the semiconductor substrate 70, on which the transfer transistors TRG1 and TRG2 are formed, is the front surface side of the semiconductor substrate 70, and a gate insulating film 71 is formed at a substrate interface. Furthermore, a multilayer wiring layer is formed on the front surface side of the semiconductor substrate 70, which will be described later with reference to FIG. Fig. 12 is described.

[0068] Between the P-type semiconductor region 52 and the vertical gate electrode region 42V, the gate insulating layer 71 and a P-type semiconductor region 72 are formed. An impurity concentration in the P-type semiconductor region 72 is set to be higher than an impurity concentration in the P-type semiconductor region 52, and the P-type semiconductor region 72 functions as a pinning region that suppresses the generation of a dark current.

[0069] The rear surface side of the semiconductor substrate 70, which is the lower side in B of Fig. 4 is an incident surface on which the reflected light is incident, and an on-chip lens and the like (not shown) are formed.

[0070] The N-type semiconductor region 41 constituting the photodiode PD includes an N-type semiconductor region 41A on the bottom surface (back surface side of the semiconductor substrate) as the vertical gate electrode region 42V of the transfer transistor TRG, and an N-type semiconductor region 41B and an N-type semiconductor region 41C formed between the vertical gate electrode regions 42 of the two transfer transistors TRG. The impurity concentrations in the N-type semiconductor region 41A to the N-type semiconductor region 41C increase in the order of the N-type semiconductor region 41A, the N-type semiconductor region 41B, and the N-type semiconductor region 41C. Note that in the drawings, an impurity concentration in the N-type semiconductor region is described as “N++”, “N+”, “N” or “N-”, and it means that the impurity concentration of “N++” is the highest, and the impurity concentration decreases in the order of “N++”, “N+”, “N” and “N-”.

[0071] The vertical transfer transistor TRG can be formed by forming a trench (vertical hole) from the front surface side of the substrate by dry etching and forming the gate insulating film 71 and then embedding polysilicon or the like serving as a gate electrode.

[0072] With the gate electrode 42 of the vertical transfer transistor TRG as the center, the N-type semiconductor regions 431 and 432 are formed as the floating diffusion regions FD1 and FD2 on opposite sides of the N-type semiconductor region 41, which form the photodiode PD.

[0073] As in A of Fig. As shown in Figure 4, the transfer transistor TRG includes a plurality of vertical gate electrode regions 42V at predetermined intervals to have a comb-tooth shape in a cross-sectional view in the Y direction, which is a direction of the gate width 61. The gate insulating film 71 and the P-type semiconductor region 72 are formed at an outer peripheral portion of the plurality of vertical gate electrode regions 42V of the transfer transistor TRG, and a region between the P-type semiconductor regions 72 formed at the outer peripheral portion of the vertical gate electrode region 42V includes the P-type semiconductor region 52 having a concentration lower than that of the P-type semiconductor region 72.

[0074] As described above, the two transfer transistors TRG1 and TRG2 of the pixel 10 each include the vertical transistor having the plurality of vertical gate electrode regions 42V in the gate width direction. <5. Effect of the vertical transistor>

[0075] Next, with reference to Fig. 5, a comparison is made between a case where the two transfer transistors TRG1 and TRG2 of the pixel 10 comprise the vertical transistor and a case where the two transfer transistors TRG1 and TRG2 comprise a normal planar transistor.

[0076] A of Fig. 5 illustrates a b1-b2 line-sectional view of a pixel 10X in a case where the transfer transistors TRG1 and TRG2 each comprise the normal planar transistor.

[0077] B of Fig. 5 is a b1-b2 line section view of pixel 10 similar to B of Fig. 4.

[0078] It should be noted that to facilitate comparison, the Pixel 10X from A also has the Fig. 5 the same reference numerals as those of pixel 10 are given for portions corresponding to those of pixel 10.

[0079] For example, consider a state in which the transfer transistor TRG1 is controlled to be turned on, and an electron (electric charge) 80 generated in the N-type semiconductor region 41 constituting the photodiode PD is transferred to the N-type semiconductor region 431 as the floating diffusion region FD.

[0080] As in A of Fig. 5, in the pixel 10X in which the two transfer transistors TRG1 and TRG2 each include the planar transistor including only the planar gate electrode region 42T, the electron 80 generated in the N-type semiconductor region 41 is transferred to the N-type semiconductor region 431 through a channel formed in a region below the planar gate electrode region 42T1. Since the channel between the N-type semiconductor region 41 and the N-type semiconductor region 431 is only the substrate interface below the planar gate electrode region 42T1, a transfer path of the electron 80 is long, and a transfer time is also long. For this reason, the N-type semiconductor region 41 of the photodiode PD cannot be formed deep in the substrate. For example, the N-type semiconductor region 41 of the pixel 10 includes only the N-type semiconductor regions 41B and 41C, as shown in A of Fig. 5, and the N-type semiconductor region 41A closest to the back of the substrate is not formed. In order to transfer the electron 80 generated at a deep position in the substrate, it is also necessary to form a depth 81 of the N-type semiconductor region 41C with a high impurity concentration deeper than the depth 81 of the pixel 10 of B of the Fig. 5 to design.

[0081] On the other hand, as in B of Fig. 5, in the pixel 10 in which the two transfer transistors TRG1 and TRG2 each include the vertical transistor with the vertical gate electrode region 42V, the electron 80 generated in the N-type semiconductor region 41 is transferred to the N-type semiconductor region 431 through a channel formed between the plurality of comb-tooth-shaped vertical gate electrode regions 42V in addition to the region under the planar gate electrode region 42T1. In this case, the electron 80 can move linearly to the N-type semiconductor region 431, as indicated by an arrow in B of Fig. As shown in Figure 5, the transfer path can be shortened. As a result, the transfer time is reduced.

[0082] In addition, a plurality of vertical gate electrode regions 42V are provided, whereby even the electron 80 generated at the deep position in the substrate can be transferred at high speed, so that the N-type semiconductor region 41A can be formed in a region near the back of the substrate, and the depth 81 of the N-type semiconductor region 41C having the high impurity concentration can be shallower than the depth 81 of the pixel 10X of A in Fig. 5 can be made.

[0083] Fig. Figure 6 is a graph illustrating the potentials and transfer paths in a case where the planar transistor of A is Fig. 5 is used as a transfer transistor, and in a case where the vertical transistor of B is Fig. 5 is used as a transfer transistor.

[0084] The vertical axis of the graph of Fig. 6 represents the potential, and the horizontal axis represents the transfer path of the electron from the photodiode PD to the floating diffusion region FD.

[0085] A solid line 101 in the graph of Fig. Figure 6 illustrates a potential gradient of pixel 10X using the planar transistor of A from Fig. 5.

[0086] A dashed line 102 in the graph of Fig. Fig. 6 illustrates a potential gradient in a case where the transfer transistor of pixel 10X of A is Fig. 5 is changed from the planar transistor to the same vertical transistor as the transfer transistor TRG. In the dashed line 102, the N-type semiconductor region 41 is shown as a photodiode PD similar to that of the pixel 10X of A from Fig. 5.

[0087] A solid line 103 in the diagram of Fig. Figure 6 illustrates a potential gradient of pixel 10 of B from Fig. 5. In other words, the solid line 103 illustrates a potential gradient in a case where the transfer transistor of the pixel 10X is from A Fig. 5 is changed from a planar transistor to a vertical transistor and in the N-type semiconductor region 41 as a photodiode PD, as in B from Fig. 5, the depth 81 of the N-type semiconductor region 41C is made shallower with the high impurity concentration and the N-type semiconductor region 41A is formed near the back side of the substrate.

[0088] As in Fig. As shown in Figure 6, the transmission distance can be shortened by changing the transmission transistor TRG from a planar transistor to a vertical transistor. Furthermore, the potential of the deep part of the photodiode PD can be deepened and the potential near the transmission transistor TRG can be shallowed by shallowing the depth 81 of the N-type semiconductor region 41C with the high impurity concentration and forming the N-type semiconductor region 41A near the back of the substrate.

[0089] By forming the N-type semiconductor region 41A near the back surface side of the substrate, a photoelectric conversion region can be expanded and a saturated amount of electric charge can be increased.

[0090] By making the potential near the transfer transistor TRG flatter, it is possible to further reduce the operation in which the signal charge returns to the photodiode during transfer when the gate electrode of the transfer transistor TRG is turned off, that is, the signal degradation due to the so-called signal return.

[0091] Fig. Figure 7 shows the potential distributions corresponding to the solid line 101, the dashed line 102 and the solid line 103 in Fig. 6.

[0092] A of Fig. Figure 7 illustrates a b1-b2 line-section view (upper row) and a potential distribution (lower row) of pixel 10X using the planar transistor as a transfer transistor. A of Fig. 7 corresponds to the solid line 101 in Fig. 6.

[0093] B of Fig. Figure 7 shows a b1-b2 line-section view (upper row) and a potential distribution (lower row) of pixel 10X using the vertical transistor as a transfer transistor. B of Fig. 7 corresponds to the dashed line 102 in Fig. 6.

[0094] C the Fig. Fig. 7 shows a b1-b2 line section view (upper row) and a potential distribution (lower row) of the pixel 10 of the light receiving element 1. C of Fig. 7 corresponds to the solid line 103 in Fig. 6.

[0095] Note that the potential distributions A to C of the Fig. 7 all represent the potential distribution in a state where the transfer transistor TRG1 is controlled to be turned on. In addition, in the pixels 10X of A and B of Fig. 7, the same reference marks as those of pixel 10 are indicated for the portions corresponding to those of pixel 10, similar to Fig. 5.

[0096] As can be seen from the comparison of the potential distributions of the regions 111 to 113 near the substrate front interface of the transfer transistor TRG1 in each of A to C of Fig. 7, the potential near the transfer transistor TRG1 in A and B is Fig. 7 low (high), while the potential near the transfer transistor TRG1 in C of Fig. 7 is flat (low). With this potential structure, a sensor can be achieved that is resistant to transmission degradation due to signal feedback.

[0097] In addition, the Pixel 10 from C has the Fig. 7, the N-type semiconductor region 41A is formed in the region near the back side of the substrate, so that a depletion layer is extended to the vicinity of the back side of the substrate, as shown in the region 114, compared to those in the pixels 10X of A and B of the Fig. 7. With this possible structure, high sensitivity can be achieved. <6. Planar shape of the vertical gate electrode region>

[0098] Fig. 8 is a plan view explaining a planar shape of the vertical gate electrode region 42V.

[0099] The planar shape of the vertical gate electrode region 42V may be, for example, a round shape as shown in A of Fig. 8. However, in a case where the planar shape of the vertical gate electrode region 42V is a round shape, an area of ​​the vertical gate electrode region 42V increases with respect to the XY plane, and the electron may collide with the vertical gate electrode region 42V, which may cause a reduction in the transfer speed.

[0100] Thus, the planar shape of the vertical gate electrode region 42V may be formed in an elongated shape having a width in the direction (X direction) orthogonal to the direction of the gate width 61 that is larger than a width in the direction of the gate width 61 (Y direction), as shown in B of FIG. Fig. 8. Furthermore, the planar shape of the vertical gate electrode region 42V in the elongated shape can be convexly formed on the photodiode PD side. As a result, the electron is less likely to collide with the vertical gate electrode region 42V, and the decrease in the transmission rate can be suppressed. <7. Example of an arrangement of multiple pixels>

[0101] Fig. 9 shows an example of the arrangement of pixels in the pixel array unit 21.

[0102] In the pixel array unit 21, the Fig. 3 are arranged two-dimensionally in row and column directions, as shown in Fig. 9. Note that Fig. 9 shows, for reasons of space, only an array of 16 (4×4) pixels, in which the pixels 10 are arranged so that 4 pixels are arranged in the row direction and 4 pixels in the column direction, but the number of pixels is not limited to this. In Fig. 9, the reference numbers are also omitted for reasons of space. <8. Controlling the transfer transistor>

[0103] Next, the control of the transfer transistor TRG is described with reference to the Fig. 10 and Fig. 11 described.

[0104] Fig. 10 is a diagram showing an applied voltage when the transfer transistor TRG is driven.

[0105] As described above, the pixel 10 of the light receiving element 1 distributes the electric charge to the floating diffusion regions FD1 and FD2 by alternately controlling the turning on of one of the two transfer transistors TRG1 and TRG2 and the turning off of the other.

[0106] When first driving pixel 10, vertical drive unit 22 may perform control to set the voltage applied to one transfer transistor TRG to be turned on (e.g., transfer transistor TRG1) to a positive predetermined voltage VA, and the voltage applied to the other transfer transistor TRG to be turned off (e.g., transfer transistor TRG2) to a negative predetermined voltage VB (first negative bias voltage VB). Here, the first negative bias voltage VB is a negative bias voltage for pinning to suppress white spot and dark current.

[0107] Furthermore, the vertical drive unit 22 may perform, as a second drive of the pixel 10, a control in which the voltage applied to one transfer transistor TRG to be turned on (e.g., the transfer transistor TRG1) is set to a positive predetermined voltage VA and the voltage applied to the other transfer transistor TRG to be turned off (e.g., the transfer transistor TRG2) is set to a negative predetermined voltage VC (second negative bias voltage VC), as shown in Fig. 10. The second negative bias voltage VC is a negative bias voltage that is greater than the first negative bias voltage VB for pinning.

[0108] Fig. shows a potential between the two transfer transistors TRG1 and TRG2 in a case where the second driving is performed.

[0109] A solid line in the diagram of Fig. 11 indicates a potential between the two transfer transistors TRG1 and TRG2 in a case where the second driving is performed, and a dashed line indicates a potential in a case where the transfer transistors TRG1 and TRG2 are turned off by the first negative bias voltage VB.

[0110] As shown by the solid line in Fig. As indicated in Figure 11, the second negative bias voltage VC, which is greater than the first negative bias voltage VB for pinning, is applied to the transfer transistor TRG on a side to be turned off, thereby increasing an electric field gradient and assisting charge transfer. Thus, the electric charge transfer characteristics can be improved by the second drive. <9. Layout example of a wiring layer>

[0111] Fig. 12 shows an arrangement example of the multilayer wiring layer of the light receiving element 1 formed on the front surface side of the semiconductor substrate 70.

[0112] It should be noted that in Fig. 12 the same reference numbers are given for the sections corresponding to those in Fig. 3, but some of the reference numerals are omitted.

[0113] The light-receiving element 1 includes, for example, a multilayer wiring layer comprising four wiring layers from a first wiring layer M1 to a fourth wiring layer M4 and an insulating layer therebetween. The four wiring layers are arranged in the order of the first wiring layer M1, the second wiring layer M2, the third wiring layer M3, and the fourth wiring layer M4 from a side closest to the semiconductor substrate 70.

[0114] A of Fig. 12 is a plan view showing the arrangement of the gate electrodes and N-type semiconductor regions of the pixel transistors formed on the front surface side of the semiconductor substrate 70, the first wiring layer M1, and the contacts between the gate electrodes of the pixel transistors and the first wiring layer M1.

[0115] As in A of Fig. As shown in Figure 12, the first wiring layer M1 is formed at least at a boundary portion of the pixel 10 and connected to GND. Furthermore, the first wiring layer M1 is connected to the gate electrodes of the pixel transistors via the contacts. The N-type semiconductor region 431, which functions as the floating diffusion region FD1, is connected to the gate electrode 481 of the amplification transistor AMP1 via a wiring line 1511, and the N-type semiconductor region 432, which functions as the floating diffusion region FD2, is connected to the gate electrode 482 of the amplification transistor AMP2 via a wiring line 1512.

[0116] B of Fig. 12 is a plan view showing the arrangement of the first wiring layer M1, the second wiring layer M2, and vias connecting the first wiring layer M1 and the second wiring layer M2.

[0117] In the second wiring layer M2, wiring lines are arranged for forwarding to the third wiring layer M3 and the fourth wiring layer M4.

[0118] C in Fig. 12 is a plan view showing the arrangement of the second wiring layer M2, the third wiring layer M3, and the vias connecting the second wiring layer M2 and the third wiring layer M3.

[0119] In the third wiring layer M3, a control line that transmits the pixel array unit 21 in the horizontal direction and a power supply line are arranged.

[0120] Specifically, the third wiring layer M3 is formed with wiring lines 1611 and 1612 that transmit the transfer drive signals TRG1 and TRG2 applied to the gate electrodes of the transfer transistors TRG1g and TRG2g, wiring lines 1621 and 1622 that transmit the FD drive signals FDG1g and FDG2g applied to the gate electrodes of the switching transistors FDG1 and FDG2, wiring lines 1631 and 1632 that transmit the reset drive signals RST1g and RST2g applied to the gate electrodes of the reset transistors RST1 and RST2, wiring lines 1641 and 1642 that transmit the selection signals SEL1g and SEL2g applied to the gate electrodes of the selection transistors SEL1 and SRL2, and a wiring line 165, which transmits the power supply voltage VDD.

[0121] The line widths 1711 and 1712 of the wiring lines 1611 and 1612 that transmit the transfer drive signals TRG1g and TRG2g are formed thicker than the wiring lines 1621, 1622, 1631, 1632, 1641, and 1642 of other pixel transistors in order to improve the settling.

[0122] D in Fig. 12 is a plan view showing the arrangement of the third wiring layer M3, the fourth wiring layer M4, and the vias connecting the third wiring layer M3 and the fourth wiring layer M4.

[0123] In the fourth wiring layer M4, the vertical signal lines 29A and 29B for transmitting the pixel array unit 21 in the vertical direction and a power supply line are arranged. <10. Modification of the pixel>

[0124] Fig. 13 and Fig. 14 are diagrams showing a modification of the pixel 10.

[0125] Fig. 13 is a plan view of the modification of the pixel 10, and Fig. 14 is a cross-sectional view of the modification of the pixel 10. The top view of Fig. 13 corresponds to the Fig. 3 shown top view of the pixel 10, and the cross-sectional view of Fig. 14 corresponds to the Fig. 4 shows a cross-sectional view of pixel 10.

[0126] The Fig. 13 and Fig. The modification shown in Figure 14 shows a pixel structure in a case where the capacitances of the floating diffusion regions FD1 and FD2 are reduced to increase the conversion efficiency. The circuit configuration of the pixel 10 is the same as that of the Fig. 2 shown equivalent circuit.

[0127] As shown in the top view of Fig. 13, the areas (volumes) of the N-type semiconductor regions 431 and 432 as the floating diffusion regions FD1 and FD2 are smaller than in Fig. 3. A gate width 201 of the gate electrodes 421 and 422 of the transfer transistors TRG1 and TRG2 is also smaller than the gate width 61 of the pixel 10 in Fig. 3.

[0128] The arrangement of the pixel transistors of the transfer transistor TRG, the switching transistor FDG, the reset transistor RST, the amplification transistor AMP, and the selection transistor SEL is changed by changing the area size of the N-type semiconductor regions 431 and 432 as the floating diffusion regions FD1 and FD2. For example, the N-type semiconductor region 511 is formed as the source region of the selection transistors SEL1 and SEL2 in a vertically adjacent region of the pixel 10.

[0129] In Fig. 13, the N-type semiconductor region 431 functioning as the floating diffusion region FD1 is connected to the gate electrode 481 of the amplification transistor AMP1 via the wiring line 1511, and the N-type semiconductor region 432 functioning as the floating diffusion region FD2 is connected to the gate electrode 482 of the amplification transistor AMP2 via the wiring line 1512.

[0130] A of Fig. 14 is a cross-sectional view of the pixel 10 on a line a1-a2 of Fig. 13, and B of Fig. 14 is a cross-sectional view of the pixel 10 on a line b1-b2 of Fig. 13.

[0131] Note that the cross-sectional view on the line b1-b2 of the one shown in B of Fig. 14 shown modification of pixel 10 of the cross-sectional view of B in Fig. 4, and the description of it is omitted.

[0132] In the modification of the pixel 10, the area (volume) of the N-type semiconductor region 43 as the floating diffusion region FD is smaller than in Fig. 3, and the gate width 201 of the gate electrode 42 of the transfer transistor TRG is also shorter, so that the number of vertical gate electrode regions 42V is also smaller than in Fig. 3. In particular, the gate electrode 422 of the transfer transistor TRG2, as shown in A of Fig. 14, the planar gate electrode region 42T2 and a vertical gate electrode region 42V2.

[0133] It should be noted that the number of vertical gate electrode sections 42V may be a plurality, such as two or three, depending on the gate width 201 of the gate electrode 42 of the transfer transistor TRG. <11. Configuration example of a pixel with four taps>>

[0134] Fig. 15 is a plan view showing another modification of the pixel 10.

[0135] The Fig. 3 and Fig. The pixel 10 shown in Figure 13 has a two-tap pixel structure in which two transfer transistors TRG1 and TRG2 and two floating diffusion regions FD1 and FD2 are included for a photodiode PD, and the electrical charge generated by the photodiode PD is distributed between the two floating diffusion regions FD1 and FD2.

[0136] The Fig. 15, on the other hand, has a four-tap pixel structure in which four transfer transistors TRG1 to TRG4 and four floating diffusion regions FD1 to FD4 are included for one photodiode PD, and the electric charge generated by the photodiode PD is distributed among the four floating diffusion regions FD1 to FD4.

[0137] The pixel 10 comprises four transfer transistors TRG, four floating diffusion regions FD, four additional capacitors FDL, four switching transistors FDG, four reset transistors RST, four amplification transistors AMP and four selection transistors SEL.

[0138] The arrangement of a set with a combination of the transfer transistor TRG, the floating diffusion region FD, the additional capacitance FDL, the switching transistor FDG, the reset transistor RST, the amplification transistor AMP and the selection transistor SEL is similar to that in Fig. 3.

[0139] In the Fig. 3, the combination (one set) of the transfer transistor TRG, the floating diffusion region FD, the additional capacitance FDL, the switching transistor FDG, the reset transistor RST, the amplifying transistor AMP and the selecting transistor SEL is arranged only in the two facing sides of a rectangular pixel area, while in the pixel with four taps in Fig. 15 the combination is arranged in each side.

[0140] In the pixel with four taps in Fig. 15, each set of the transfer transistor TRG, the floating diffusion region FD, the additional capacitance FDL, the switching transistor FDG, the reset transistor RST, the amplification transistor AMP, and the selection transistor SEL is appended with an arbitrary index from 1 to 4 to distinguish the set.

[0141] The cross-sectional view of pixel 10 on a line a1-a2 of Fig. 15 is similar to that in A of Fig. 4, and all transfer transistors TRG include vertical transistors. Note that the number of vertical gate electrode regions 42V of the transfer transistor TRG can, of course, be different than in the case of the two-tap pixel.

[0142] For the Pixel 10 with four taps, as in Fig. 15, a distance 222 between the gate electrodes 42 of the two transfer transistors TRG that are opposed to each other is approximately equal to a gate width 221 of the gate electrode 42 of the transfer transistor TRG; however, the modulation capability is increased by using a vertical transistor as the transfer transistor TRG, and the second driving of applying the second negative bias voltage VC, which is larger than the first negative bias voltage VB, for pinning is performed on the transfer transistor TRG on the side to be turned off, thereby enabling high-speed transfer of electric charge.

[0143] Fig. is a timing diagram to explain the second control in pixel 10 with four taps.

[0144] In a case where the second drive is performed in the four-tap pixel 10, the vertical drive unit 22 performs the control of setting the second negative bias voltage VC for the transfer transistor TRG opposite to the predetermined one transfer transistor TRG controlled to be turned on, and the setting of the first negative bias voltage VB for the remaining two orthogonal transfer transistors TRG.

[0145] In the example of Fig. 16, the vertical drive unit 22 turns on the transfer transistor TRG1 in a period T1 and controls the setting of the second negative bias voltage VC for the transfer transistor TRG3 and controls the setting of the first negative bias voltage VB for the transfer transistors TRG2 and TRG4.

[0146] In a period T2 following the period T1, the vertical drive unit 22 turns on the transfer transistor TRG2 and controls the setting of the second negative bias voltage VC for the transfer transistor TRG4 and controls the setting of the first negative bias voltage VB for the transfer transistors TRG1 and TRG3.

[0147] In a period T3 following the period T2, the vertical drive unit 22 turns on the transfer transistor TRG3 and controls the setting of the second negative bias voltage VC for the transfer transistor TRG1 and controls the setting of the first negative bias voltage VB for the transfer transistors TRG2 and TRG4.

[0148] In a period T4 following the period T3, the vertical drive unit 22 turns on the transfer transistor TRG4 and controls the setting of the second negative bias voltage VC for the transfer transistor TRG2 and performs the setting of the first negative bias voltage VB for the transfer transistors TRG1 and TRG3. <12. Application to electric field control type light receiving element>

[0149] The above-described structure of the vertical transistor of the light receiving element 1 can also be applied to an electric field control type light receiving element as shown in Fig. 17 shown.

[0150] A of Fig. 17 is a plan view of a pixel of the electric field control type light receiving element, and B of Fig. 17 is a cross-sectional view and a potential diagram of the pixel of the electric field control type light receiving element.

[0151] In a pixel 300 of the electric field control type light receiving element, mutually different electric field control voltages are applied to a pair of first electric field control electrodes 311a and 311b and a pair of second electric field control electrodes 312a and 312b adjacent to the pair of first electric field control electrodes 311a and 311b, respectively, thereby distributing an electric charge generated in an N-type semiconductor region 301, which is a photoelectric conversion region, to two charge storage regions 313a and 313b. Electric charges stored in the two charge storage regions 313a and 313b are transferred to the charge read regions 314a and 314b through transfer transistors TRGa and TRGb, respectively.

[0152] Light passing through a rectangular opening area of ​​a lamp with a diameter of Fig. 17, strikes the N-type semiconductor region 301, which is the photoelectric conversion region. The light reflected from the photoelectric conversion region A of Fig. The pair of first electric field control electrodes 311a and 311b shown in FIG. 17 and the pair of second electric field control electrodes 312a and 312b adjacent to the pair of first electric field control electrodes 311a and 311b are disposed between the light-shielding plate 302 and an insulating layer 303. A P-type semiconductor region 304 between the N-type semiconductor region 301 and the insulating layer 303 is a pinning layer.

[0153] For example, in a case where a voltage of -2 V is applied to the pair of first electric field control electrodes 311a and 311b and a voltage of 1 V is applied to the pair of second electric field control electrodes 312a and 312b adjacent to the pair of first electric field control electrodes 311a and 311b, the electric charge generated by the photoelectric conversion is transferred to the charge storage region 313b on the right side.

[0154] On the other hand, in a case where a voltage of 1 V is applied to the pair of first electric field control electrodes 311a and 311b, and a voltage of -2 V is applied to the pair of second electric field control electrodes 312a and 312b adjacent to the pair of first electric field control electrodes 311a and 311b, the electric charge generated by photoelectric conversion is transferred to the charge storage region 313a on the left side.

[0155] Instead of the first electric field control electrodes 311a and 311b and the second electric field control electrodes 312a and 312b of the pixel 300 of the electric field control type light receiving element as described above, it is possible to adopt the above-described configuration of the transfer transistors TRG1 and TRG2, that is, a configuration of the vertical transistor with the comb-tooth-shaped vertical gate electrode region 42V. As a result, the modulation capability is improved and an electric field can be easily applied, so that the transfer characteristics can be improved. <13. Configuration example of a distance measurement module>

[0156] Fig. 18 is a block diagram showing a configuration example of a distance measurement module that outputs distance measurement information using the light receiving element 1 described above.

[0157] A distance measuring module 500 includes a light emitting unit 511, a light emission control unit 512, and a light receiving unit 513.

[0158] The light-emitting unit 511 includes a light source that emits light with a predetermined wavelength and emits irradiation light whose brightness fluctuates periodically to irradiate an object. For example, the light-emitting unit 511 includes a light-emitting diode that emits infrared light with a wavelength in a range of 780 nm to 1000 nm as a light source and generates the irradiation light in synchronization with a rectangular-wave light emission control signal CLKp supplied from the light emission control unit 512.

[0159] Note that the light emission control signal CLKp is not limited to a square wave, as long as it is a periodic signal. For example, the light emission control signal CLKp can be a sine wave.

[0160] The light emission control unit 512 supplies the light emission control signal CLKp to the light-emitting unit 511 and the light-receiving unit 513 and controls the irradiation timing of the irradiated light. The frequency of the light emission control signal CLKp is, for example, 20 megahertz (MHz). Note that the frequency of the light emission control signal CLKp is not limited to 20 megahertz (MHz) and may be 5 megahertz (MHz) or the like.

[0161] The light receiving unit 513 receives light reflected from the object, calculates distance information for each pixel depending on a light receiving result, and generates and outputs a depth image in which a distance to the object is represented by a gradation value for each pixel.

[0162] As the light receiving unit 513, the light receiving element 1 is made of Fig. 1. The light receiving element 1, as the light receiving unit 513, alternately controls the plurality of transfer transistors TRG of each pixel 10 of the pixel array unit 21 based, for example, on the light emission control signal CLKp, and transfers an electric charge generated by the photodiode PD to a plurality of charge storage units (floating diffusion region FD). The light receiving element 1 calculates distance information for each pixel from the signal intensities detected in the plurality of charge storage units.

[0163] As described above, the above-described light-receiving element 1 can be used as the light-receiving unit 513 of the distance measurement module 500, which obtains and outputs distance information to a subject using the indirect ToF method. As a result, the distance measurement characteristics of the distance measurement module 500 can be improved. <14. Configuration example of an electronic device>

[0164] Note that the light receiving element 1 is not only applicable to the distance measuring module as described above, but also can be applied to various electronic devices, for example, an imaging device such as a digital still camera or a digital video camera having a distance measuring function and a smartphone having a distance measuring function.

[0165] Fig. 19 is a block diagram showing a configuration example of a smartphone as an electronic device to which the present technology is applied.

[0166] As in Fig. As shown in Figure 19, a smartphone 601 includes a distance measurement module 602, an imaging device 603, a display 604, a speaker 605, a microphone 606, a communication module 607, a sensor unit 608, a touch panel 609, and a control unit 610, which are connected to each other via a bus 611. Furthermore, the control unit 610 functions as an application processing unit 621 and an operating system processing unit 622 by executing a program through a CPU.

[0167] The distance measurement module 500 from Fig. 18 is applied to the distance measurement module 602. The distance measurement module 602 is arranged, for example, in front of the smartphone 601 and performs distance measurement for a user of the smartphone 601, and is capable of outputting depth values ​​of the surface shapes of the user's face, hand, fingers, and the like as distance measurement results.

[0168] The imaging device 603 is arranged in front of the smartphone 601 and performs imaging of the user of the smartphone 601 as a subject, thereby capturing an image of the user. Note that, although not shown, the imaging device 603 may also be arranged on the back of the smartphone 601.

[0169] The display 604 displays an operation screen for performing processing by the application processing unit 621 and the operating system processing unit 622, an image captured by the imaging device 603, and the like. The speaker 605 and the microphone 606 output the voice of the other party and record the user's voice when, for example, a call is made with the smartphone 601.

[0170] The communication module 607 performs network communication via a communication network such as the Internet, a public telephone network, a wide-area communication network for wireless mobile radio such as 3G lines and 4G lines, a wide area network (WAN) and a local area network (LAN), short-range wireless communication such as Bluetooth (registered trademark) and Near Field Communication (NFC), and the like. The sensor unit 608 detects speed, acceleration, proximity, and the like, and the touch panel 609 detects a user's touch operation on the operation screen displayed on the display 604.

[0171] The application processing unit 621 performs processing for providing various services through the smartphone 601. For example, the application processing unit 621 may perform processing for generating a face through computer graphics that virtually reproduces the user's facial expression based on the depth value supplied by the distance measurement module 602, and displaying the face on the display 604. Furthermore, the application processing unit 621 may perform processing for generating, for example, three-dimensional shape data of an arbitrary three-dimensional object based on the depth value supplied by the distance measurement module 602.

[0172] The operating system processing unit 622 performs processing for implementing basic functions and operations of the smartphone 601. For example, the operating system processing unit 622 may perform processing for authenticating the user's face and unlocking the smartphone 601 based on the depth value provided by the distance measurement module 602. Furthermore, the operating system processing unit 622 may, for example, perform processing for recognizing the user's gesture based on the depth value provided by the distance measurement module 602 and perform processing for inputting various operations corresponding to the gesture.

[0173] In the smartphone 601 configured as described above, by applying the above-described distance measurement module 500 as the distance measurement module 602, for example, it is possible to measure and display a distance to a predetermined object, perform processing for generating and displaying three-dimensional shape data of a predetermined object, or the like. <Beispiel einer praktischen Anwendung für ein System für endoskopische Chirurgie>

[0174] The technology according to an embodiment of the present disclosure (present technology) can be used for various products. For example, the technology according to an embodiment of the present disclosure can be used for a system for endoscopic surgery.

[0175] Fig. 20 is a view illustrating an example of a schematic configuration of an endoscopic surgery system to which the technology according to an embodiment of the present disclosure (present technology) can be applied.

[0176] In Fig. 20 illustrates a state in which a surgeon (doctor) 11131 is using an endoscopic surgery system 11000 to perform a surgical procedure on a patient 11132 on a patient bed 11133. As shown, the endoscopic surgery system 11000 includes an endoscope 11100, other surgical instruments 11110 such as a pneumoperitoneum tube 11111 and an energy treatment device 11112, a support arm device 11120 supporting the endoscope 11100 thereon, and a trolley 11200 on which various endoscopic surgery devices are mounted.

[0177] The endoscope 11100 includes a lens tube 11101 having a predetermined length portion from its distal end to be inserted into a body cavity of the patient 11132, and a camera head 11102 connected to a proximal end of the lens tube 11101. In the illustrated example, the endoscope 11100 is shown as including a rigid endoscope with the hard-type lens tube 11101, but the endoscope 11100 may otherwise be incorporated as a flexible endoscope with the flexible-type lens tube 11101.

[0178] At its distal end, the lens tube 11101 has an opening into which an object lens is fitted. A light source device 11203 is connected to the endoscope 11100 such that light generated by the light source device 11203 is introduced into a distal end of the lens tube 11101 through a light guide extending within the lens tube 11101 and irradiated toward an observation target in a body cavity of the patient 11132 through the object lens. It is noted that the endoscope 11100 may be a straight-view endoscope, an oblique-view endoscope, or a side-view endoscope.

[0179] An optical system and an image pickup element are provided within the camera head 11102 such that reflected light (observation light) from the observation target is converged or collected by the optical system onto the image pickup element. The observation light is photoelectrically converted by the image pickup element to generate an electrical signal corresponding to the observation light, namely, an image signal corresponding to an observation image. The image signal is transmitted as raw data to a CCU 11201.

[0180] The CCU 11201 includes a central processing unit (CPU), a graphics processing unit (GPU), or the like, and integrally controls an operation of the endoscope 11100 and a display device 11202. Further, the CCU 11201 receives an image signal from the camera head 11102 and performs various image processes for displaying an image based on the image signal, such as, for example, a development process (demosaicing process).

[0181] The display device 11202 displays thereon an image based on an image signal for which the image processes have been performed by the CCU 11201, under a control of the CCU 11201.

[0182] The light source device 11203 includes a light source, such as a light-emitting diode (LED), and supplies irradiation light to the endoscope 11100 when imaging a surgical area.

[0183] An input device 11204 is an input interface for the endoscopic surgery system 11000. A user can input various types of information or instructions to the endoscopic surgery system 11000 via the input device 11204. For example, the user inputs an instruction or the like to change an image acquisition condition (a type of irradiation light, a magnification, a focal length, or the like) by the endoscope 11100.

[0184] A treatment instrument control device 11205 controls the operation of the energy treatment device 11112 for cauterizing or cutting tissue, closing a blood vessel, or the like. To ensure the field of view of the endoscope 11100 and to ensure the working space for the surgeon, a pneumoperitoneum device 11206 introduces gas into a body cavity of the patient 11132 through the pneumoperitoneum tube 11111 to expand the body cavity. A recording device 11207 is a device that can record various types of information related to a surgical procedure. A printer 11208 is a device that can print various types of information related to a surgical procedure in various forms such as text, images, or graphics.

[0185] It is particularly noteworthy that the light source device 11203, which supplies irradiation light to the endoscope 11100 when imaging a surgical area, may include a white light source, for example, an LED, a laser light source, or a combination thereof. When a white light source includes a combination of red, green, and blue (RGB) laser light sources, since the output intensity and output timing for each color (each wavelength) can be controlled with a high degree of accuracy, adjustment of the white balance of an acquired image from the light source device 11203 can be performed. Furthermore, in this case, if laser beams from the respective RGB laser light sources are irradiated onto an observation target in a time-division multiplex manner, control of the image pickup elements of the camera head 11102 is controlled in synchronization with the irradiation timing.Then, images corresponding individually to the R, G, and B colors can also be recorded in a time-division multiplexed manner. This method makes it possible to obtain a color image even if no color filters are provided for the image pickup element.

[0186] Furthermore, the light source device 11203 can be controlled to change the intensity of emitted light every predetermined time. By controlling the drive of the image pickup element of the camera head 11102 in synchronization with the timing of the change in light intensity to capture images in a time-division multiplexed manner, and combining or synthesizing the images, a high-dynamic-range image can be generated without underdeveloped, blocked shadows and overexposed highlights.

[0187] Furthermore, the light source device 11203 may be configured to provide light of a predetermined wavelength band suitable for special light observation. In special light observation, for example, by utilizing the wavelength dependence of light absorption in body tissue to irradiate light of a narrow band compared with irradiation light in ordinary observation (namely, white light), narrow-band observation (narrow-band imaging) is performed to image a predetermined tissue, such as a blood vessel or a surface region of the mucosal membrane, with high contrast. Alternatively, in special light observation, fluorescence observation may be performed to obtain an image from fluorescent light generated by irradiation with excitation light.In fluorescence observation, it is possible to perform observation of fluorescent light from a body tissue by irradiating excitation light onto the body tissue (autofluorescence observation), or to obtain a fluorescent light image by locally injecting a reagent such as indocyanine green (ICG) into a body tissue and irradiating excitation light corresponding to a fluorescence wavelength of the reagent onto the body tissue. The light source device 11203 can be configured to provide such narrow-band light and / or excitation light suitable for special light observation as described above.

[0188] Fig. 21 is a block diagram showing an example of a functional configuration of the camera head 11102 and the CCU 11201 used in Fig. 20 are shown.

[0189] The camera head 11102 includes a lens unit 11401, an image pickup unit 11402, a drive unit 11403, a communication unit 11404, and a camera head control unit 11405. The CCU 11201 includes a communication unit 11411, an image processing unit 11412, and a control unit 11413. The camera head 11102 and the CCU 11201 are connected to each other for communication by a transmission cable 11400.

[0190] The lens unit 11401 is an optical system provided at a junction with the lens barrel 11101. Observation light received from a distal end of the lens barrel 11101 is guided to the camera head 11102 and inserted into the lens unit 11401. The lens unit 11401 includes a combination of a plurality of lenses, including a zoom lens and a focus lens.

[0191] The image pickup unit 11402 includes an image pickup element. The image pickup element constituting the image pickup unit 11402 may be one (so-called single-chip) element or a plurality of (so-called multi-chip) elements. For example, in a case where the image pickup unit 11402 comprises the multi-chip type, image signals corresponding to R, G, and B are generated from the respective image pickup elements, and the image signals are synthesized, whereby a color image can be obtained. Alternatively, the image pickup unit 11402 may include a pair of image pickup elements for acquiring image signals for the right and left eyes corresponding to a three-dimensional (3D) representation. The 3D representation is performed, whereby the surgeon 11131 can more accurately grasp the depth of the living tissue in a surgical section.Note that in a case where the image pickup unit 11402 comprises the multi-chip type, a plurality of systems of the lens units 11401 may be provided corresponding to the respective image pickup elements.

[0192] Furthermore, the image pickup unit 11402 does not necessarily have to be provided on the camera head 11102. For example, the image pickup unit 11402 may be provided immediately behind the objective lens within the lens barrel 11101.

[0193] The control unit 11403 includes an actuator and, under the control of the camera head control unit 11405, moves the zoom lens and the focus lens of the lens unit 11401 by a predetermined distance along an optical axis. Consequently, the magnification and focus of a captured image can be appropriately adjusted by the image capture unit 11402.

[0194] The communication unit 11404 includes a communication device for transmitting and receiving various types of information to and from the CCU 11201. The communication unit 11404 transmits an image signal obtained from the image acquisition unit 11402 to the CCU 11201 as raw data via the transmission cable 11400.

[0195] In addition, the communication unit 11404 receives a control signal for controlling a drive of the camera head 11102 from the CCU 11201 and provides the control signal to the camera head control unit 11405. The control signal contains information related to image capture conditions, such as, for example, information that a frame rate of a captured image is determined, information that an exposure value is determined during image capture, and / or information that a magnification and focus of a captured image are determined, and / or other information.

[0196] It is particularly noteworthy that image acquisition conditions such as frame rate, exposure value, magnification, or focus can be specified by the user or automatically adjusted by the control unit 11413 of the CCU 11201 based on the acquired image signal. In the latter case, the endoscope 11100 integrates an automatic exposure (AE) function, an autofocus (AF) function, and an automatic white balance (AWB) function.

[0197] The camera head control unit 11405 controls a control of the camera head 11102 based on a control signal received from the CCU 11201 via the communication unit 11404.

[0198] The communication unit 11411 contains a communication device for transmitting and receiving various types of information to and from the camera head 11102. The communication unit 11411 receives an image signal transmitted from the camera head 11102 to the camera head via the transmission cable 11400.

[0199] In addition, the communication unit 11411 transmits a control signal for controlling a drive of the camera head 11102 to the camera head 11102. The image signal and the control signal may be transmitted by means of electrical communication, optical communication, or the like.

[0200] The image processing unit 11412 performs various image processes for an image signal in the form of raw data transmitted thereto from the camera head 11102.

[0201] The control unit 11413 performs various types of control regarding image acquisition of a surgical area or the like by the endoscope 11100 and display of a captured image obtained by image acquisition of the surgical area or the like. For example, the control unit 11413 generates a control signal to control the drive of the camera head 11102.

[0202] Furthermore, based on an image signal for which image processing has been performed by the image processing unit 11412, the control unit 11413 controls the display device 11202 to display a captured image in which the area of ​​a surgical operation or the like is depicted. Then, the control unit 11413 can recognize various objects in the captured image using various image recognition technologies. For example, the control unit 11413 can recognize a surgical instrument such as forceps, a specific area of ​​a living body, bleeding, haze when the energy treatment device 11112 is used, and so on by detecting the shape, color, and so on of edges of objects included in a captured image.The control unit 11413, when controlling the display device 11202 to display a captured image, can cause various types of surgical support information to be displayed in an overlapping manner with an image of the surgical area using a recognition result. When the surgical support information is displayed in an overlapping manner and presented to the surgeon 11131, the burden on the surgeon 11131 can be reduced, and the surgeon 11131 can continue the surgical operation safely.

[0203] The transmission cable 11400 connecting the camera head 11102 and the CCU 11201 is an electrical signal cable suitable for communication of electrical signals, an optical fiber suitable for optical communication, or a composite cable suitable for both electrical and optical communication.

[0204] While in the illustrated example communication is carried out by means of wired communication using the transmission cable 11400, here the communication between the camera head 11102 and the CCU 11201 can be carried out by means of wireless communication.

[0205] An example of an endoscopic surgery system for which the technology according to an embodiment of the present disclosure can be applied has been described above. The technology according to an embodiment of the present disclosure can be applied to the image pickup unit 11402 of the configurations described above. In particular, the light-receiving element 1 having the pixels 10 can be used as part of the configuration of the image pickup unit 11402. By applying the present technology as part of the configuration of the image pickup unit 11402, a distance to a surgical area can be measured with high accuracy, and a clearer image of the surgical area can be obtained.

[0206] It is particularly noted that, although the system for endoscopic surgery has been described herein as an example, the technology according to an embodiment of the present disclosure may also be used differently, for example, for a system for microscopic surgery and the like. <16. Example of a practical application for a moving body >

[0207] The technology according to the present disclosure (the present technology) can be applied to various products. For example, the technology according to the present disclosure can be implemented in the form of a device to be mounted on any type of moving body, such as, for example, an automobile, an electric vehicle, a hybrid electric vehicle, a motorcycle, a bicycle, any personal mobility device, an aircraft, an unmanned aerial vehicle (drone), a ship, a robot, or the like.

[0208] Fig. 22 is a block diagram illustrating an example of a schematic configuration of a vehicle control system as an example of a moving body control system to which the technology according to the present disclosure can be applied.

[0209] The vehicle control system 12000 comprises a plurality of electronic control units that are interconnected via a communication network 12001. In the Fig. 22, the vehicle control system 12000 includes a drive system control unit 12010, a body system control unit 12020, an external vehicle information detection unit 12030, an in-vehicle information detection unit 12040, and an integrated control unit 12050. In addition, as a functional configuration of the integrated control unit 12050, a microcomputer 12051, a sound / image output section 12052, and an interface (I / F) 12053 of the vehicle-mounted network are illustrated.

[0210] The drive system control unit 12010 controls the operation of devices related to the drive system of the vehicle according to various types of programs. For example, the drive system control unit 12010 serves as a control device for a driving force generating device for generating a driving force of the vehicle, such as an internal combustion engine, a drive motor, or the like, a driving force transmitting mechanism for transmitting the driving force to wheels, a steering mechanism for adjusting the steering angle of the vehicle, a braking device for generating the braking force of the vehicle, and the like.

[0211] The body system control unit 12020 controls the operation of various types of devices provided on a vehicle body according to various types of programs. For example, the body system control unit 12020 serves as a control device for a keyless entry system, a smart key system, an automatic window device, or various types of lights such as a headlight, a taillight, a brake light, a turn signal, a fog light, or the like. In this case, radio waves transmitted from a mobile device as an alternative to a key or signals from various types of switches can be input to the body system control unit 12020.The body system control unit 12020 receives these input radio waves or signals and controls a door locking device, the automatic window device, the lights or the like of the vehicle.

[0212] The vehicle-external information detection unit 12030 detects information about the external environment of the vehicle including the vehicle control system 12000. For example, the vehicle-external information detection unit 12030 is connected to an imaging section 12031. The vehicle-external information detection unit 12030 causes the imaging section 12031 to capture an image of the vehicle's external environment and receives the captured image. The vehicle-external information detection unit 12030 can perform processing for detecting an object such as a person, a car, an obstacle, a traffic sign, a sign on a road surface, or the like, or processing for detecting a distance thereto based on the received image.

[0213] The imaging section 12031 is an optical sensor that receives light and outputs an electrical signal according to the amount of light received. The imaging section 12031 can also output the electrical signal as an image or can output the electrical signal as information about a measured distance. Furthermore, the light received by the imaging section 12031 can be visible light or invisible light such as infrared rays or the like.

[0214] The in-vehicle information detection unit 12040 detects information about or from the interior of the vehicle. The in-vehicle information detection unit 12040 is connected, for example, to a driver condition detection section 12041 that detects the condition of a driver. The driver condition detection section 12041 includes, for example, a camera that records the driver. The in-vehicle information detection unit 12040 can calculate a driver's fatigue level or a driver's concentration level, or can determine whether the driver is dozing, based on detection information input from the driver condition detection section 12041.

[0215] The microcomputer 12051 may calculate a control target value for the driving force generating device, the steering mechanism, or the braking device based on the information about the interior or exterior of the vehicle obtained by the outside-vehicle information detecting unit 12030 or the in-vehicle information detecting unit 12040, and may output a control command to the drive system control unit 12010.For example, the microcomputer 12051 may perform cooperative control intended to realize functions of an advanced driver assistance system (ADAS) whose functions include collision avoidance or impact mitigation for the vehicle, following travel based on a following distance, constant speed travel, collision warning of the vehicle, lane deviation warning of the vehicle, or the like.

[0216] In addition, the microcomputer 12051 can perform cooperative control intended for automatic driving, which makes the vehicle drive autonomously without depending on driver intervention or the like, by controlling the driving force generating device, the steering mechanism, the braking device, or the like based on the information about the external environment or the interior of the vehicle, which information is obtained by the outside-vehicle information detecting unit 12030 or the inside-vehicle information detecting unit 12040.

[0217] The microcomputer 12051 can also output a control command to the body system control unit 12020 based on the information about the external environment of the vehicle obtained by the external information detection unit 12030. For example, the microcomputer 12051 can execute cooperative control intended to prevent glare by controlling the headlight to switch from high beam to low beam according to the position of a preceding vehicle or an oncoming vehicle detected by the external information detection unit 12030.

[0218] The sound / image output section 12052 transmits an output signal of a sound and / or an image to an output device that can optically or acoustically convey information to an occupant of the vehicle or the external environment of the vehicle. In the example of Fig. 22, a speaker 12061, a display section 12062, and an instrument panel 12063 are indicated as the output device. The display section 12062 may include, for example, an in-vehicle display and / or a head-up display.

[0219] Fig. 23 is a diagram illustrating an example of an installation position of the imaging section 12031.

[0220] In Fig. 23, a vehicle 12100 comprises imaging sections 12101, 12102, 12103, 12104 and 12105.

[0221] The imaging sections 12101, 12102, 12103, 12104, and 12105 are arranged at positions on, for example, a front end, side mirrors, a rear bumper, and a rear door of the vehicle 12100, as well as a position on an upper part of a windshield inside the vehicle. The imaging section 12101 provided at the front end and the imaging section 12105 provided at the upper part of the windshield inside the vehicle predominantly obtain an image from the front of the vehicle 12100. The imaging sections 12102 and 12103 provided at the side mirrors predominantly obtain an image from the sides of the vehicle 12100. The imaging section 12104 provided at the rear bumper or rear door predominantly obtains an image from the rear of the vehicle 12100.The front side images acquired by the imaging sections 12101 and 12105 are mainly used to detect a preceding vehicle, a pedestrian, an obstacle, a traffic light, a traffic sign, a lane, or the like.

[0222] Furthermore, Fig.23 illustrates an example of imaging ranges of the imaging sections 12101 to 12104. An imaging range 12111 represents the imaging range of the imaging section 12101 provided at the front end, imaging ranges 12112 and 12113 represent the imaging ranges of the imaging sections 12102 and 12103 provided at the side mirrors, respectively, and an imaging range 12114 represents the imaging range of the imaging section 12104 provided at the rear bumper or the rear door. For example, a bird's-eye view image of the vehicle 12100 as seen from above is obtained by superimposing image data imaged by the imaging sections 12101 to 12104, for example.

[0223] At least one of the imaging sections 12101 to 12104 may have a function for obtaining distance information. For example, at least one of the imaging sections 12101 to 12104 may be a stereo camera composed of a plurality of imaging elements, or may be an imaging element that includes pixels for detecting phase differences.

[0224] For example, the microcomputer 12051 may determine a distance to each three-dimensional object within the imaging areas 12111 to 12114 and a temporal change of the distance (relative speed with respect to the vehicle 12100) on the basis of the distance information obtained from the imaging sections 12101 to 12104, and thereby extract, in particular, as a preceding vehicle, a nearest three-dimensional object that is located on a travel path of the vehicle 12100 and that travels at a predetermined speed (for example, equal to 0 km / h or higher) in substantially the same direction as the vehicle 12100.Furthermore, the microcomputer 12051 can predetermine a following distance to be maintained from a preceding vehicle and perform automatic braking control (including follow-up stop control), automatic acceleration control (including follow-up start control), or the like. Consequently, it is possible to perform cooperative control for automatic driving, which allows the vehicle to drive autonomously without depending on the driver's intervention or the like.

[0225] For example, the microcomputer 12051 can classify three-dimensional object data about three-dimensional objects into three-dimensional object data of a two-wheeled vehicle, a standard-sized vehicle, a large vehicle, a pedestrian, a telephone pole, and other three-dimensional objects based on the distance information obtained from the imaging sections 12101 to 12104, extract the classified three-dimensional object data, and use the extracted three-dimensional objects to automatically avoid an obstacle. For example, the microcomputer 12051 identifies obstacles around the vehicle 12100 as obstacles that the driver of the vehicle 12100 can visually recognize and obstacles that are difficult for the driver of the vehicle 12100 to visually recognize. The microcomputer 12051 then determines a collision risk that indicates a risk of collision with each obstacle.In a situation where the collision risk is equal to or higher than a set value, and thus a possibility of a collision exists, the microcomputer 12051 issues a warning to the driver via the speaker 12061 and the display section 12062, or performs forced deceleration or evasive steering via the drive system control unit 12010. The microcomputer 12051 can thus assist driving to avoid a collision.

[0226] At least one of the imaging sections 12101 to 12104 may be an infrared camera that detects infrared rays. For example, the microcomputer 12051 may detect a pedestrian by determining whether or not there is a pedestrian in captured images from the imaging sections 12101 to 12104. Such detection of a pedestrian is performed, for example, by a procedure for extracting characteristic points in the captured images from the imaging sections 12101 to 12104 as infrared cameras and a procedure for determining whether or not it is the pedestrian by performing pattern matching processing on a series of characteristic points indicating the contour of the object.When the microcomputer 12051 determines that there is a pedestrian in the captured images of the imaging sections 12101 to 12104 and thus detects the pedestrian, the audio / video output section 12052 controls the display section 12062 to display a quadrangular contour line for highlighting, superimposed on the detected pedestrian. The audio / video output section 12052 can also control the display section 12062 to display an icon or the like representing the pedestrian at a desired position.

[0227] The above describes an example of a vehicle control system to which the present technology can be applied. The technology according to the present disclosure can be applied to the vehicle exterior information detection unit 12030 and the image pickup unit 12031 under the configurations described above. Specifically, the light receiving element 1 or the distance measurement module 500 can be applied to a distance detection processing block of the vehicle exterior information detection unit 12030 and the image pickup unit 12031.By applying the technology according to the present disclosure to the vehicle exterior information detection unit 12030 and the image pickup unit 12031, it is possible to measure a distance to an object such as a person, a car, an obstacle, a sign, or a character on a road surface with high accuracy, and by using the obtained distance information, it is possible to reduce driver fatigue and improve the safety level of the driver and the vehicle.

[0228] The embodiment of the present technology is not limited to the embodiments described above, and various modifications are possible without departing from the basic idea of ​​the present technology.

[0229] Furthermore, in the above-described light-receiving element 1, an example was described in which an electron is used as a signal carrier; however, a hole generated by photoelectric conversion may also be used as a signal carrier. In such a case, it is sufficient that the photoelectric conversion region includes the P-type semiconductor region, the semiconductor substrate 70 includes the N-type semiconductor region, and a hole is detected as a signal carrier in the photoelectric conversion region.

[0230] In the light receiving element 1 described above, the electric charge transferred from the photodiode PD is held in the floating diffusion regions FD1 and FD2; however, a storage unit may be formed as a charge holding unit for holding the electric charge.

[0231] In the light receiving element 1 described above, for example, a mode in which some or all of the embodiments are combined may be adopted.

[0232] The above-described light receiving element 1 may be configured as a single chip alone, or it may be configured in any form such as a module or a distance measuring device packaged with a light source, an optical system, a signal processing circuit, and the like.

[0233] Note that the effects described in this specification are merely examples and are not limited, and may have different effects than those described in this specification.

[0234] Please note that this technology can also be configured as described below. (1) Light receiving element comprising a pixel that contains at least: a first charge holding unit and a second charge holding unit, each holding an electric charge generated by a photodiode; a first transfer transistor that transfers the electric charge to the first charge holding unit; and a second transfer transistor that transfers the electrical charge to the second charge holding unit, wherein the first and second transfer transistors each include a vertical transistor having a vertical gate electrode region. (2) The light receiving element according to (1), wherein the first charge holding unit and the second charge holding unit are arranged to oppose each other with the photodiode arranged therebetween. (3) The light receiving element according to (1) or (2), wherein a distance between the first transfer transistor and the second transfer transistor is shorter than a gate width of the first or second transfer transistor. (4) A light receiving element according to any one of (1) to (3), wherein Gate widths of the first and second transfer transistors are larger than a width of the photodiode in a direction identical to a direction of the gate widths. (5) A light receiving element according to any one of (1) to (4), wherein the first and second transfer transistors each have a plurality of vertical gate electrode regions. (6) Light receiving element according to (5), wherein the first and second transfer transistors are each formed in a combtooth shape in a cross-sectional view. (7) A light receiving element according to any one of (1) to (6), wherein a planar shape of the vertical gate electrode region is formed in an elongated shape having a second width in a direction orthogonal to a gate width direction that is longer than a first width in the gate width direction. (8) Light receiving element according to (7), wherein the planar shape of the vertical gate electrode region in the elongated shape is convex on the side of the photodiode. (9) The light receiving element according to any one of (1) to (8), wherein an N-type or P-type semiconductor region constituting a photoelectric conversion region of the photodiode is formed between the vertical gate electrode regions of the first and second transfer transistors and in a region below the vertical gate electrode region, and a depletion layer is extended to the vicinity of a substrate interface on a side opposite to a formation surface of the first and second transfer transistors. (10) The light receiving element according to any one of (1) to (9), wherein the pixel also contains: a first additional capacity that stores the electrical charge a first connecting transistor connecting the first additional capacitance to the first charge holding unit; a second additional capacity that stores the electrical charge; and a second connecting transistor connecting the second additional capacitance to the second charge holding unit. (11) The light receiving element according to any one of (1) to (10), wherein the pixel further includes: a third charge holding unit that holds the electric charge; a third transfer transistor that transfers the electric charge to the third charge holding unit; a fourth charge holding unit that holds the electric charge; and a fourth transfer transistor that transfers the electrical charge to the fourth charge holding unit, and the third and fourth transfer transistors each include a vertical transistor having a vertical gate electrode region. (12) A light receiving element according to any one of (1) to (11), wherein when the first transfer transistor is turned on and the electric charge is transferred to the first charge holding unit, a second negative bias voltage greater than a first negative bias voltage is applied to the second transfer transistor opposite to the first transfer transistor, and the first negative bias voltage is applied to the third transfer transistor and the fourth transfer transistor. (13) A light receiving element according to any one of (1) to (10), wherein when the first transfer transistor is turned on and the electric charge is transferred to the first charge holding unit, a negative bias voltage is applied to the second transfer transistor. (14) Light receiving element according to (13), wherein the negative bias is a negative bias that is greater than a negative bias for pinning. (15) A distance measurement module comprising: a light receiving element having a pixel comprising at least a first charge holding unit and a second charge holding unit, each holding an electrical charge generated by a photodiode a first transfer transistor that transfers the electrical charge to the first charge holding unit, and a second transfer transistor that transfers the electrical charge to the second charge holding unit, wherein the first and second transfer transistors each include a vertical transistor having a vertical gate electrode region; a light source that emits irradiation light whose brightness fluctuates periodically; and a light emission control unit that controls an irradiation timing of the irradiation light. (16) An electronic device comprising a light receiving element with a pixel that contains at least a first charge holding unit and a second charge holding unit, each holding an electrical charge generated by a photodiode a first transfer transistor that transfers the electric charge to the first charge holding unit; and a second transfer transistor that transfers the electrical charge to the second charge holding unit, wherein the first and second transfer transistors each include a vertical transistor having a vertical gate electrode region. LIST OF REFERENCE SYMBOLS 1 light receiving element 10 pixels 21 pixel array unit FD1, FD2 floating diffusion region FDG1, FDG2 switching transistor FDL1, FDL2 additional capacity PD photodiode RST1, RST2 reset transistor SEL1, SEL2 selection transistor TRG1, TRG2 transfer transistor 42 Gate electrode 42T planar gate electrode area 42V vertical gate electrode area 61 Gate width 500 distance measurement module 511 light-emitting unit 512 Light emission control unit 513 light-receiving unit 601 smartphones 602 Distance measurement module

Claims

[1] A light receiving element (1) comprising a pixel (10) containing at least: a first charge holding unit (FD1) and a second charge holding unit (FD2), each holding an electric charge generated by a photodiode (PD); a first transfer transistor (TRG1) which transfers the electrical charge to the first charge holding unit (FD1); and a second transfer transistor (TRG2) which transfers the electrical charge to the second charge holding unit (FD2), wherein the first and second transfer transistors (TRG1, TRG2) each include a vertical transistor having a vertical gate electrode region (42V). [2] The light receiving element (1) according to claim 1, wherein the first charge holding unit (FD1) and the second charge holding unit (FD2) are arranged to oppose each other with the photodiode (PD) interposed therebetween. [3] The light receiving element (1) according to claim 1 or 2, wherein a distance between the first transfer transistor (TRG1) and the second transfer transistor (TRG2) is shorter than a gate width (61) of the first or second transfer transistor (TRG1, TRG2). [4] A light receiving element (1) according to any one of the preceding claims, wherein gate widths (61) of the first and second transfer transistors (TRG1, TRG2) are larger than a width of the photodiode (PD) in a direction identical to a direction of the gate widths (61). [5] A light receiving element (1) according to any one of the preceding claims, wherein the first and second transfer transistors (TRG1, TRG2) each have a plurality of vertical gate electrode regions (42V). [6] The light receiving element (1) according to claim 5, wherein the first and second transfer transistors (TRG1, TRG2) are each formed in a comb-tooth shape in a cross-sectional view. [7] The light receiving element (1) according to any one of the preceding claims, wherein a planar shape of the vertical gate electrode region (42V) is formed in an elongated shape having a second width in a direction orthogonal to a gate width direction that is longer than a first width in the gate width direction. [8] The light receiving element (1) according to claim 7, wherein the planar shape of the vertical gate electrode region (42V) in the elongated shape is convex on the side of the photodiode (PD). [9] The light receiving element (1) according to any one of the preceding claims, wherein an N-type or P-type semiconductor region (41) constituting a photoelectric conversion region of the photodiode (PD) is formed between the vertical gate electrode regions (42V) of the first and second transfer transistors (TRG1, TRG2) and in a region below the vertical gate electrode region (42V), and a depletion layer is extended to the vicinity of a substrate interface on a side opposite to a formation surface of the first and second transfer transistors (TRG1, TRG2). [10] The light receiving element (1) according to any one of the preceding claims, wherein the pixel (10) further includes: a first additional capacity (FDL1) that stores the electrical charge a first connecting transistor (FDG1) connecting the first additional capacitance (FDL1) to the first charge holding unit (FD1); a second additional capacity (FDL2) that stores the electrical charge; and a second connecting transistor (FDG2) connecting the second additional capacitance (FDL2) to the second charge holding unit (FD2). [11] Light receiving element (1) according to one of the preceding claims, wherein the pixel (10) further comprises: a third charge holding unit (FD3) that holds the electric charge; a third transfer transistor (TRG3) that transfers the electric charge to the third charge holding unit (FD3); a fourth charge holding unit (FD4) that holds the electric charge; and a fourth transfer transistor (TRG4) which transfers the electrical charge to the fourth charge holding unit (FD4), and the third and fourth transfer transistors (TRG3, TRG4) each include a vertical transistor having a vertical gate electrode region (42V). [12] A driving method for a light receiving element (1) according to any one of the preceding claims, wherein when the first transfer transistor (TRG1) is turned on and the electric charge is transferred to the first charge holding unit (FD1), a second negative bias voltage greater than a first negative bias voltage is applied to the second transfer transistor (TRG2) opposite to the first transfer transistor (TRG1), and the first negative bias voltage is applied to the third transfer transistor (TRG3) and the fourth transfer transistor (TRG4). [13] A driving method for a light receiving element (1) according to any one of claims 1 to 10, wherein when the first transfer transistor (TRG1) is turned on and the electric charge is transferred to the first charge holding unit (FD1), a negative bias voltage is applied to the second transfer transistor (TRG1). [14] The driving method according to claim 13, wherein the negative bias voltage is a negative bias voltage greater than a negative bias voltage for pinning. [15] A distance measuring module (602) comprising: a light receiving element (1) according to one of claims 1 to 11; a light source that emits irradiation light whose brightness fluctuates periodically; and a light emission control unit that controls an irradiation timing of the irradiation light. [16] An electronic device comprising a light receiving element (1) according to any one of claims 1 to 11.

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