Semiconductor device, semiconductor system, movable body and method for manufacturing a semiconductor device

Abstract

Semiconductor device (11), comprising: - a laminated body (101), - which shows: - a first conductor layer (131), - a first insulating layer (132), - a second conductor layer (133), - a second insulating layer (134) and - a third conductor layer (135), which are laminated, - wherein the first insulating layer (132) is arranged between the first conductive layer (131) and the second conductive layer (133) and electrically insulates the first conductive layer (131) from the second conductive layer (133) and - wherein the second insulating layer (134) is arranged between the second conductor layer (133) and the third conductor layer (135) and electrically insulates the third conductor layer (135) from the second conductor layer (133); - a semiconductor element (102) mounted on the first conductor layer (131); and - a cooler (104) connected to the third conductor layer (135), where: - the semiconductor device (11) has a conduction path through which a main current flows, - the second conductor layer (133) is electrically isolated from the conductor path, - a signal connection (113, 114) is formed and is electrically connected to the second conductor layer (133).

Description

Technical field

[0001] The present invention relates to a semiconductor device, a semiconductor system, a moving or movable body and a method for manufacturing the semiconductor device. Background technology

[0002] Moving bodies such as electric vehicles and trains are equipped with a motor and an inverter to drive the motor. A power module is integrated into the inverter. This power module contains a semiconductor element that emits a significant amount of heat. Therefore, the inverter has a heat sink that dissipates the heat generated by the semiconductor element. The power module also includes an insulator that electrically isolates the semiconductor element from the heat sink. The insulator transfers the heat emitted by the semiconductor element to the heat sink.

[0003] In the technique described in patent document 1, a current flowing through a power transistor is monitored, and when the current reaches a certain value, the power transistor is switched off (paragraph 0056). This protects the power transistor from an overcurrent condition (paragraph 0056). A voltage between the gate and the source of the power transistor is also monitored, and the power transistor is switched off when an overvoltage is applied to it (paragraph 0057). This protects the power transistor from an overvoltage condition (paragraph 0057). State-of-the-art documents, patent documents

[0004] [Patent document 1] Published Japanese patent application JP 2017 - 5125 A

[0005] Further prior art is the Japanese patent application JP 2015 - 225 918 A. Summary Problem to be solved by the invention

[0006] If the insulator that electrically isolates the semiconductor element from the heat sink deteriorates and breaks, the semiconductor element becomes electrically short-circuited to the heat sink, resulting in a problem such as a ground fault in the semiconductor element. To prevent problems like a ground fault in the semiconductor element, it is therefore necessary to constantly monitor whether the insulator has deteriorated. However, checking for insulator deterioration requires a procedure involving removing the power module from the inverter housed in the moving body and measuring the partial discharge voltage of the insulator located in the removed power module. Therefore, continuous monitoring of insulator deterioration is difficult. Consequently, in many cases, a problem such as a ground fault in the semiconductor element occurs suddenly.

[0007] The power module controls a high current and a high voltage. Therefore, if a problem occurs, such as a short circuit in the semiconductor element, other electronic devices located within the moving body can be destroyed, or a person sitting on the moving body can receive an electric shock. For this reason, a defect in which the semiconductor element is electrically short-circuited to the heat sink is fatal.

[0008] The insulator is made of ceramic materials, a resin, a resin mixed with a filler, or the like. The filler consists of aluminum oxide or the like and is added to increase the thermal conductivity of the insulator. However, if the insulator is made of ceramic materials, initial defects such as minute cracks leading to insulator failure may be inherent in the insulator. Furthermore, if the insulator is made of a resin or a resin mixed with a filler, initial defects such as voids leading to insulator failure may be inherent in the insulator. Additionally, if the insulator is made of a resin mixed with a filler, initial defects such as filler aggregation leading to insulator failure may be inherent in the insulator.

[0009] The technique for protecting a semiconductor element, represented by the technique described in patent document 1, enables the suppression of a short circuit in a conductor path through which a main current flows, but does not allow the suppression of a ground fault of the semiconductor element.

[0010] For these reasons, the insulator thickness is increased sufficiently to provide adequate insulation. For example, if the power module is integrated into an inverter with a 600 V supply voltage, the insulator thickness is increased to achieve a dielectric strength of 6000 V or higher, which is 10 times the 600 V supply voltage. However, if the insulation thickness is increased to provide adequate insulation, and if initial defects inherent in the insulator cannot be detected before the power module is shipped, the insulator may be damaged, leading to a problem such as a ground fault in the semiconductor element.

[0011] On the other hand, the design of the power module must incorporate heat dissipation characteristics that are appropriate for the operating conditions of the semiconductor element. Thermal resistance is used as an index of heat dissipation properties in this design, with lower thermal resistance resulting in higher heat dissipation. Furthermore, the contribution of an insulator with low thermal conductivity is dominant with respect to thermal resistance, and reducing the insulator thickness effectively reduces thermal resistance. However, if the insulator thickness is increased to such an extent that its insulating properties have sufficient margin, the insulator's thermal resistance will become high.If the thermal resistance of the insulator becomes high, sufficient transfer of the heat emitted by the semiconductor element to the heat sink becomes difficult, and dissipation of the heat emitted by the semiconductor element to the external environment of the power module becomes difficult. As a result, the temperature of the semiconductor element rises so high that failure of the semiconductor element, failure of the aluminum wires arranged in the power module, and similar issues can occur.

[0012] These problems also occur in semiconductor devices other than the power modules integrated into inverters that drive motors.

[0013] The present invention was made with regard to the problems described above. The object of the present invention is to provide a semiconductor device in which the electrical short-circuiting of a semiconductor element with a cooler is prevented or suppressed, and heat emitted by the semiconductor element is efficiently dissipated. Means to solve the problem

[0014] The present invention relates to a semiconductor device.

[0015] The semiconductor device comprises a laminated body, a semiconductor element, and a cooler.

[0016] The laminated body has a first conductor layer, a first insulator layer, a second conductor layer, a second insulator layer and a third conductor layer.

[0017] The first conductor layer, the first insulator layer, the second conductor layer, the second insulator layer, and the third conductor layer are laminated. The first insulator layer is positioned between the first and second conductor layers and electrically isolates the first conductor layer from the second conductor layer. The second insulator layer is positioned between the second and third conductor layers and electrically isolates the third conductor layer from the second conductor layer.

[0018] The semiconductor element is mounted on the first conductor layer.

[0019] The cooler is connected to the third conductor layer. Effects of the invention

[0020] According to the present invention, the first conductor layer and the third conductor layer are electrically isolated from the second conductor layer, which is arranged between the first and third conductor layers. Therefore, if either the first or third conductor layer is electrically short-circuited with the second conductor layer, the first conductor layer is not electrically short-circuited with the third conductor layer. This prevents an electrical short circuit between the semiconductor element mounted on the first conductor layer and the cooler connected to the third conductor layer.

[0021] According to the present invention, even if the insulator properties of the first and second insulating layers are reduced, the electrical short circuit between the semiconductor element and the cooler can be suppressed. Therefore, the overall thickness of the first and second insulating layers can be reduced. Consequently, the thermal resistance of the laminated body can be reduced. As a result, the heat dissipated by the semiconductor element is released efficiently.

[0022] The tasks, features, aspects and advantages of the present invention will become more apparent from the following detailed description and the accompanying drawings. Brief description of the drawings [ Fig. 1] A diagram schematically illustrating a semiconductor system of the first embodiment. [ Fig. 2] A diagram schematically illustrating the semiconductor system of the first embodiment. [ Fig. 3] Cross-sectional views illustrating a method for manufacturing a semiconductor device arranged in the semiconductor system of the first embodiment. [ Fig. 4] A cross-sectional view schematically representing a cross-section of a power module of the first reference example. [ Fig. 5] A top view schematically showing the upper surface of the power module from which a molding resin has been removed from the power module of the first reference example. [ Fig. 6] A diagram schematically illustrating a semiconductor system of the second embodiment. [ Fig. 7] A diagram schematically illustrating a semiconductor system of the third embodiment. [ Fig. 8] Cross-sectional views illustrating a method for manufacturing a semiconductor device arranged in the semiconductor system of the third embodiment. [ Fig. 9] A cross-sectional view schematically representing a cross-section of a semiconductor device of the second reference example. [ Fig. 10] A diagram schematically illustrating a semiconductor system of the fourth embodiment. [ Fig. 11] A diagram schematically illustrating a movable body of the fifth embodiment. Description of the embodiment(s) 1. First embodiment 1.1 Heat radiation and insulation

[0023] Fig. 1 and Fig. Figure 2 shows diagrams that schematically illustrate a semiconductor system of the first embodiment. Fig. Figure 1 contains a cross-sectional view that schematically represents a cross-section of a semiconductor device arranged in the semiconductor system of the first embodiment. Fig. Figure 2 contains a top view schematically illustrating the upper surface of the semiconductor device, from which a molding resin is removed from the semiconductor device arranged in the semiconductor system of the first embodiment.

[0024] One in which in Fig. 1 and Fig. The semiconductor device 11 arranged in the semiconductor system 1 of the first embodiment, as illustrated in Figure 2, comprises a laminated body 101, a semiconductor element 102, a solder metal 103, a cooler 104 and a thermal or thermal conductivity paste 105.

[0025] The semiconductor element 102 and the solder 103 are arranged on a first main surface 101a of the laminated body 101. The solder 103 is positioned between the semiconductor element 102 and the laminated body 101. The solder 103 is a bonding material that bonds the semiconductor element 102 to the laminated body 101. The solder 103 can be replaced by other types of bonding material. For example, the solder 103 can be replaced by a brazing filler metal or brazing alloy. The solder 103 can be omitted, and the semiconductor element 102 can be bonded directly to the laminated body 101.

[0026] The cooler 104 and the thermal paste 105 are arranged on a second main surface 101b of the laminated body 101. The second main surface 101b of the laminated body 101 is located on the side opposite the side on which the first main surface 101a of the laminated body 101 is located. The thermal paste 105 is located between the cooler 104 and the laminated body 101. The thermal paste 105 fills the gap between the cooler 104 and the laminated body 101. The thermal paste 105 is a heat-dissipating material that promotes heat transfer from the laminated body 101 to the cooler 104. The thermal paste 105 can be replaced by another type of heat-dissipating material. For example, the thermal paste 105 can be replaced by a heat-dissipating film. The thermal paste 105 can be omitted, and heat can be transferred directly from the laminated body 101 to the cooler 104.

[0027] The laminated body 101 is positioned between the semiconductor element 102 and the cooler 104. The laminated body 101 separates the semiconductor element 102 from the cooler 104. Accordingly, the laminated body 101 electrically insulates the semiconductor element 102 from the cooler 104. The laminated body 101 forms a substrate.

[0028] The heat emitted by the semiconductor element 102 is transferred sequentially to the cooler 104 via the solder 103, the laminated body 101, and the thermal paste 105. The heat transferred to the cooler 104 is then dissipated by the cooler 104 to the external environment of the semiconductor device 11. 1.2 Electrical connection

[0029] As in Fig. 1 and Fig. As shown in Figure 2, the semiconductor device 11 has a first main terminal 111, a second main terminal 112, a first signal terminal 113, a first conductor wire 115, a second conductor wire 116, and a third conductor wire 117. As shown in Fig. 1 and Fig. As shown in Figure 2, the semiconductor element 102 comprises a semiconductor substrate 121, a first main electrode 122, a second main electrode 123, and a signal electrode 124. The laminated body 101 has a first conductor layer 131, as shown in Figure 2. Fig. 1 and Fig. 2 is shown.

[0030] The first main electrode 122 and the signal electrode 124 are arranged on a first main surface 121a of the semiconductor substrate 121. The second main electrode 123 is arranged on a second main surface 121b of the semiconductor substrate 121. The second main surface 121b of the semiconductor substrate 121 is located on the side opposite the side on which the first main surface 121a of the semiconductor substrate 121 is located.

[0031] The first conductor layer 131 is exposed to the first main surface 101a of the laminated body 101.

[0032] One end of the first conductor wire 115 is connected to the first main electrode 122. The other end of the first conductor wire 115 is connected to the first main terminal 111. Accordingly, the first conductor wire 115 electrically connects the first main terminal 111 to the first main electrode 122.

[0033] The upper surface of the solder 103 is connected to the second main electrode 123. The lower surface of the solder 103 is connected to the first conductor layer 131. One end of the second conductor wire 116 is connected to the first conductor layer 131. The other end of the second conductor wire 116 is connected to the second main terminal 112. Accordingly, the second conductor wire 116, the first conductor layer 131, and the solder 103 electrically connect the second main terminal 112 to the second main electrode 123.

[0034] One end of the third conductor wire 117 is connected to the signal electrode 124. The other end of the third conductor wire 117 is connected to the first signal terminal 113. Accordingly, the third conductor wire 117 connects the first signal terminal 113 to the signal electrode 124.

[0035] The second main electrode 123, the semiconductor substrate 121, and the first main electrode 122 form a conduction path through which the main current flows. Therefore, the semiconductor element 102 has the conduction path through which the main current flows.

[0036] The semiconductor element 102 switches the main current flowing from the second main electrode 123 via the semiconductor substrate 121 to the first main electrode 122 in response to a signal fed into the signal electrode 124 to control the main current. According to the signal fed into the first signal terminal 113 to control the main current, the semiconductor device 11 therefore switches the main current, which flows sequentially from the second main terminal 112 via the second conductor wire 116, the first conductor layer 131, the solder 103, the second main electrode 123, the semiconductor substrate 121, the first main electrode 122, and the first conductor wire 115 to the first main terminal 111.

[0037] The semiconductor element 102 emits heat when the main current flows from the second main electrode 123 via the semiconductor substrate 121 to the first main electrode 122 and when the main current is switched.

[0038] In the first embodiment, the semiconductor element 102 is an insulated-gate bipolar transistor (IGBT). If the semiconductor element 102 is an IGBT, the first main electrode 122 is an emitter, the second main electrode 123 is a collector, the signal electrode 124 is a gate, and the signal for controlling the main current is a gate signal. The semiconductor element 102 can be a different type of semiconductor element. For example, the semiconductor element 102 can be a metal-oxide-semiconductor field-effect transistor (MOSFET), a thyristor, or a diode. If the semiconductor element 102 is a MOSFET, the first main electrode 122 is a source, the second main electrode 123 is a drain, the signal electrode 124 is a gate, and the signal for controlling the main current is a gate signal.If the semiconductor element 102 is a thyristor, the first main electrode 122 is a cathode, the second main electrode 123 is an anode, the signal electrode 124 is a gate, and the signal for controlling the main current is a gate signal. If the semiconductor element 102 is a diode, the first main electrode 122 is a cathode, the second main electrode 123 is an anode, the semiconductor element 102 is not provided with a signal electrode 124, and the semiconductor device 11 is not provided with the first signal terminal 113 and the third conductor wire 117.

[0039] The first conductor wire 115, the second conductor wire 116 and the third conductor wire 117 consist of a conductor, preferably aluminium.

[0040] The first main terminal 111, the second main terminal 112 and the first signal terminal 113 are electrically connected to the external environment of the semiconductor device 11. 1.3 Structure of the laminated body

[0041] As in Fig. 1 and Fig. As shown in Figure 2, the laminated body 101 has the first conductor layer 131, a first insulator layer 132, a second conductor layer 133, a second insulator layer 134 and a third conductor layer 135.

[0042] The first conductor layer 131, the first insulator layer 132, the second conductor layer 133, the second insulator layer 134, and the third conductor layer 135 are laminated. The first conductor layer 131, the first insulator layer 132, the second conductor layer 133, the second insulator layer 134, and the third conductor layer 135 are laminated such that the conductor layers and the insulator layers alternate. The two adjacent layers in the first conductor layer 131, the first insulator layer 132, the second conductor layer 133, the second insulator layer 134, and the third conductor layer 135 are bonded together.

[0043] The first insulating layer 132 is arranged between the first conductor layer 131 and the second conductor layer 133. The first insulating layer 132 separates the first conductor layer 131 from the second conductor layer 133. Accordingly, the first insulating layer 132 electrically insulates the first conductor layer 131 from the second conductor layer 133. The second insulating layer 134 is arranged between the second conductor layer 133 and the third conductor layer 135. The second insulating layer 134 separates the third conductor layer 135 from the second conductor layer 133. Accordingly, the second insulating layer 134 electrically insulates the third conductor layer 135 from the second conductor layer 133.

[0044] The semiconductor element 102 is bonded to the first conductor layer 131 by the solder metal 103. As a result, the semiconductor element 102 is mounted on the first conductor layer 131.

[0045] The cooler 104 contacts the third conductor layer 135, with the thermal paste 105 positioned between them. As a result, the cooler 104 is connected to the third conductor layer 135.

[0046] The second conductor layer 133 is electrically isolated from the conduction path provided in the semiconductor element 102.

[0047] The first conductor layer 131, the second conductor layer 133, and the third conductor layer 135 consist of a conductor, preferably metal. The first insulator layer 132 and the second insulator layer 134 consist of an insulator, preferably a resin.

[0048] The first insulator layer 132 preferably has a planar shape that is smaller than the planar shape of the second insulator layer 134. As a result, the occurrence of a creep discharge along the lateral surfaces of the first insulator layer 132 is suppressed. 1.4 Detection of a fracture in the insulating layer

[0049] As in Fig. 1 and Fig. As shown in Figure 2, the semiconductor system 1 comprises a semiconductor device 11, a monitoring circuit 12, and a power supply circuit 13. The semiconductor device 11 has a second signal terminal 114 and a fourth conductor wire 118.

[0050] One end of the fourth conductor wire 118 is connected to the second conductor layer 133. The other end of the fourth conductor wire 118 is connected to the second signal terminal 114. Accordingly, the fourth conductor wire 118 connects the second signal terminal 114 to the second conductor layer 133. This allows for the simple extraction of a signal from the semiconductor device 11 indicating that at least one of the insulating layers of the first insulating layer 132 and the second insulating layer 134 is broken. The fourth conductor wire 118 can be omitted, and the second signal terminal 114 can be directly electrically connected to the second conductor layer 133.

[0051] The fourth conductor wire 118 consists of a conductor, preferably aluminium.

[0052] The second signal terminal 114 is electrically connected to the external environment of the semiconductor device 11.

[0053] The monitoring circuit 12 is electrically connected to the second signal terminal 114. Consequently, the monitoring circuit 12 is connected to the second conductor layer 133. The monitoring circuit 12 detects the voltage of the second conductor layer 133. The monitoring circuit 12 receives a signal indicating that at least one of the insulating layers of the first insulating layer 132 and the second insulating layer 134 is broken. Based on the received signal, the monitoring circuit 12 detects that at least one of the conductor layers of the first conductor layer 131 and the third conductor layer 135 is electrically short-circuited to the second conductor layer 133. When it is detected that at least one of the conductor layers of the first conductor layer 131 and the third conductor layer 135 is electrically short-circuited to the second conductor layer 133, the monitoring circuit 12 sends a signal to the power supply circuit 13.

[0054] The power supply circuit 13 is electrically connected to one of the first main terminals 111 and the second main terminal 112. Accordingly, the power supply circuit 13 is electrically connected to the first main electrode 122 or the first conductor layer 131. The power supply circuit 13 allows the main current to flow through the semiconductor device 11. The power supply circuit 13 limits the flow of the main current when a signal is received from the monitoring circuit 12. Accordingly, the power supply circuit 13 limits the flow of the main current when it is detected that at least one of the conductor layers of the first conductor layer 131 and the third conductor layer 135 is electrically short-circuited with the second conductor layer 133. In the first embodiment, limiting the flow of the main current is equivalent to stopping the flow of the main current.As a result, the device containing the semiconductor device 11 can be safely stopped. 1.5 Fixing and sealing

[0055] As in Fig. 1 and Fig. As shown in Figure 2, the semiconductor device 11 has a housing 106 and a molded resin 107.

[0056] The laminated body 101 is fixed to the housing 106 with an adhesive (not shown). The first main surface 101a of the laminated body 101 fixed to the housing 106 faces towards the interior 106i of the housing 106. The first main terminal 111, the second main terminal 112, the first signal terminal 113, and the second signal terminal 114 are fixed to the housing 106.

[0057] The molding resin 107 is filled into the interior 106i of the housing 106. The molding resin 107 is applied to the first main surface of the laminated body 101, covering the semiconductor element 102, the solder 103, the first conductor wire 115, the second conductor wire 116, the third conductor wire 117, and the fourth conductor wire 118. The molding resin 107 seals the semiconductor element 102, the solder 103, the first conductor wire 115, the second conductor wire 116, the third conductor wire 117, and the fourth conductor wire 118.

[0058] The housing 106 consists of an insulator, preferably a resin. 1.6 Power Module

[0059] The laminated body 101, the semiconductor element 102, the solder metal 103, the housing 106, the molded resin 107, the first conductor wire 115, the second conductor wire 116, the third conductor wire 117 and the fourth conductor wire 118 form a power module 141. The power module 141 is mounted on the cooler 104, with the thermal paste 105 positioned between them.

[0060] In the first embodiment, the semiconductor system 1 comprises one power module 141. However, the semiconductor system 1 can have two or more power modules 141. In the first embodiment, the power module 141 also comprises one semiconductor element 102. However, the power module 141 can contain two or more semiconductor elements 102. For example, the power module 141 can contain two semiconductor elements 102, and the two semiconductor elements 102 can be integrated. Or the power module 141 can contain six semiconductor elements 102, and the six semiconductor elements 102 can be integrated. Two or more semiconductor elements 102 can comprise two or more types of semiconductor elements. For example, two or more semiconductor elements 102 can comprise switching elements such as IGBTs and MOSFETs and freewheeling diodes.

[0061] If the power module 141 has two or more semiconductor elements 102, a structuring of conductor layers is carried out so that the power module 141 has two or more sub-areas or sections of the first conductor layer 131, on which two or more semiconductor elements 102 are mounted. 1.7 Method for manufacturing a semiconductor device

[0062] Fig. Figure 3 shows cross-sectional views illustrating a method for manufacturing the semiconductor device arranged in the semiconductor system of the first embodiment.

[0063] When the semiconductor device 11 is manufactured, it is carried out as described in Fig. Figure 3(a) shows the laminated body with the semiconductor element 151. The laminated body with the semiconductor element 151 comprises the laminated body 101, the semiconductor element 102, and the solder 103. The semiconductor element 102 is bonded to the first conductor layer 131 by the solder 103. As a result, the semiconductor element 102 is mounted on the first conductor layer 131.

[0064] Then, as in Fig. Figure 3(b) shows a housing with terminals 152. The housing with terminals 152 comprises the first main terminal 111, the second main terminal 112, the first signal terminal 113, the second signal terminal 114, and the housing 106. The first main terminal 111, the second main terminal 112, the first signal terminal 113, and the second signal terminal 114 are fixed to the housing 106. Furthermore, after the housing with terminals 152 has been manufactured, the laminated body 101 is fixed to the housing 106.

[0065] Then, as in Fig. Figure 3(c) illustrates that one end of the first conductor wire 115 is connected to the first main electrode 122, and the other end of the first conductor wire 115 is connected to the first main terminal 111. Furthermore, one end of the second conductor wire 116 is connected to the first conductor layer 131, and the other end of the second conductor wire 116 is connected to the second main terminal 112. Next, one end of the third conductor wire 117 is connected to the signal electrode 124, and the other end of the third conductor wire 117 is connected to the first signal terminal 113. Finally, one end of the fourth conductor wire 118 is connected to the second conductor layer 133, and the other end of the fourth conductor wire 118 is connected to the second signal terminal 114.

[0066] Then, as in Fig. Figure 3(d) shows the molding resin 107 being filled into the interior 106i of the housing 106. At this point, the pre-cured fluid of the molding resin 107 is injected into the interior 106i and the injected pre-cured fluid is cured and converted into the molding resin 107.

[0067] Then, as in Fig. Figure 1 illustrates the cooler 104 connected to the third conductor layer 135. At this point, the cooler 104 is brought into contact with the laminated body 101, with the thermal paste 105 positioned between them. 1.8 Comparison between a first reference example and the first embodiment

[0068] Fig. Figure 4 is a cross-sectional view that schematically represents a cross-section of a power module of the first reference example. Fig. Figure 5 is a top view schematically illustrating the upper surface of the power module from which a molding resin has been removed from the power module of the first reference example.

[0069] As in Fig. 4 and Fig. As shown in Figure 5, in a power module 841 of the first reference example, the laminated body 801 has a first conductive layer 831, an insulating layer 832, and a second conductive layer 833. The insulating layer 832 electrically isolates the first conductive layer 831 from the second conductive layer 833. The semiconductor element 102 is mounted on the first conductive layer 831. The heat sink 104 is connected to the second conductive layer 833.

[0070] In the power module 841, if an initial defect is formed in the insulating layer 832 when the laminated body 801 is manufactured, and the power module 841 is integrated into the device without the formed initial defect being detected, the semiconductor element 102 is immediately electrically short-circuited with the cooler 104, resulting in a malfunction such as a ground fault of the semiconductor element 102 due to voltage, heat, humidity, vibration, and the like, if the insulating layer 832 is dielectrically broken due to the initial defect.

[0071] However, the following points out in the Fig. 1 and Fig. Figure 2 illustrates power module 141, which has a laminated body 101 comprising the first conductor layer 131, the first insulator layer 132, the second conductor layer 133, the second insulator layer 134, and the third conductor layer 135. The first insulator layer 132 electrically isolates the first conductor layer 131 from the second conductor layer 133. The second insulator layer 134 electrically isolates the third conductor layer 135 from the second conductor layer 133. The semiconductor element 102 is mounted on the first conductor layer 131. The heat sink 104 is connected to the third conductor layer 135.

[0072] In the power module 141, if an initial defect is formed in the first insulating layer 132 or the second insulating layer 134 when the laminated body 101 is manufactured, and the power module 141 is integrated into the device without the formed initial defect being detected, the semiconductor element 102 is not immediately electrically short-circuited with the cooler 104, and no malfunction such as a ground fault of the semiconductor element 102 is generated as a result of voltage, heat, humidity, vibration, and the like, when the first insulating layer 132 or the second insulating layer 134 is dielectrically broken due to the initial defect. 1.9 Effect of the invention of the first embodiment

[0073] According to the invention of the first embodiment, the first conductor layer 131 and the third conductor layer 135 are electrically isolated from the second conductor layer 133 arranged between the first conductor layer 131 and the third conductor layer 135. Therefore, if the first conductor layer 131 or the third conductor layer 135 is electrically short-circuited with the second conductor layer 133, no short circuit occurs between the first conductor layer 131 and the third conductor layer 135. This prevents the electrical short circuit between the semiconductor element 102 mounted on the first conductor layer 131 and the cooler 104 connected to the third conductor layer 135.

[0074] According to the invention of the first embodiment, even if the insulator properties of the first insulating layer 132 and the second insulating layer 134 are reduced, the electrical short circuit of the semiconductor element 102 with the cooler 104 can be suppressed. Therefore, the overall thickness of the first insulating layer 132 and the second insulating layer 134 can be reduced. While, for example, in the power module 841 the thickness of the insulating layer 832 must be determined such that the insulating layer 832 has a dielectric strength of approximately 10 times the supply voltage, in the power module 141 the thicknesses of the first insulating layer 132 and the second insulating layer 134 are determined such that the first insulating layer 132 and the second insulating layer 134 have a dielectric strength of approximately twice the supply voltage.Consequently, the thermal resistance of the laminated body 101 can be reduced. As a result, the heat emitted by the semiconductor element 102 can be dissipated efficiently. 2. Second embodiment 2.1 Main differences between the first embodiment and the second embodiment

[0075] Fig. Figure 6 is a diagram that schematically illustrates a semiconductor system of the second embodiment. Fig. Figure 6 contains a cross-sectional view that schematically represents a cross-section of a semiconductor device arranged in the semiconductor system of the second embodiment.

[0076] The semiconductor system 2 of the second embodiment, which is in Fig. 6 is illustrated, differs from the semiconductor system 1 of the first embodiment, which is shown in Fig. 1 and Fig. 2 is illustrated, primarily in the following points. With the exception of the points described below, the same configuration as that adopted in semiconductor system 1 is adopted in semiconductor system 2.

[0077] As in Fig. As shown in Figure 6, the semiconductor system 2 has a warning indicator circuit 14.

[0078] If it is detected that at least one of the conductor layers of the first conductor layer 131 and the third conductor layer 135 is electrically short-circuited with the second conductor layer 133, the monitoring circuit 12 sends a signal to the warning indicator circuit 14.

[0079] When the warning indicator circuit 14 receives a signal from the monitoring circuit 12, the warning indicator circuit 14 issues a warning by displaying a warning. Accordingly, the warning indicator circuit 14 issues a warning by displaying a warning when it detects that at least one of the conductor layers of the first conductor layer 131 and the third conductor layer 135 is electrically short-circuited to the second conductor layer 133. The warning indicator circuit 14 is a warning device that issues a warning by displaying the warning. The warning indicator circuit 14 can be replaced by a warning device that issues a warning in a manner other than by displaying the warning. The warning indicator circuit 14 can be replaced by a circuit for generating a warning tone, which issues a warning by means of a warning tone.

[0080] Furthermore, in semiconductor system 2, limiting the flow of the main current means reducing the output voltage of the power supply circuit 13 without stopping the flow of the main current. 2.2 Effect of the invention of the second embodiment

[0081] The invention of the second embodiment has the same effect as that of the invention of the first embodiment.

[0082] Furthermore, according to the invention of the second embodiment, a user of a device in which the power module 141 is integrated can recognize, by means of a warning, that the conductor layer of the first conductor layer 131 and / or the third conductor layer 135 is electrically short-circuited with the conductor layer 133. Consequently, the power module 141 can be replaced by a new power module at a stage in which one of the first conductor layer 131 and the third conductor layer 135 is electrically short-circuited with the second conductor layer 133, and the other of the first conductor layer 131 and the third conductor layer 135 is not short-circuited, and the semiconductor element 102 is not electrically short-circuited with the cooler 104.

[0083] According to the invention of the second embodiment, the output voltage of the power supply circuit 13 is further reduced without stopping the main current flow until the power module 141 is replaced by a new power module 141. As a result, the occurrence of a malfunction such as a ground fault of the semiconductor element 2 is suppressed, in which, after one of the first insulating layer 132 and the second insulating layer 134 has broken, the other of the first insulating layer 132 and the second insulating layer 134 has also broken. Furthermore, the occurrence of a malfunction caused by an abrupt stop of the device is suppressed, in which the power module 141 integrated therein stops abruptly after one of the first insulating layer 132 and the second insulating layer 134 has broken. 3. Third embodiment 3.1 Main differences between the first embodiment and the third embodiment

[0084] Fig. Figure 7 is a diagram that schematically illustrates a semiconductor system of the third embodiment. Fig. Figure 7 contains a cross-sectional view that schematically represents a cross-section of a semiconductor device arranged in the semiconductor system of the third embodiment.

[0085] The semiconductor system 3 of the third embodiment, which is in Fig. 7 is illustrated, differs from the semiconductor system 1 of the first embodiment, which is shown in Fig. 1 and Fig. Figure 2 illustrates this, primarily in the following points. With the exception of the points described below, the same configuration as that adopted in semiconductor system 1 is adopted in semiconductor system 3.

[0086] In the semiconductor system 3, the semiconductor device 11 does not have the housing 106 to which the first main terminal 111, the second main terminal 112 and the first signal terminal 113 are fixed.

[0087] Furthermore, in the semiconductor system 3, the semiconductor device 11 does not have the first conductor wire 115, which electrically connects the first main terminal 111 to the main electrode 122. Instead, the semiconductor device 111 has a solder metal 108 that bonds the first main terminal 111 to the main electrode 122 in order to electrically connect the first main terminal 111 to the main electrode 122.

[0088] In semiconductor system 3, the semiconductor device 11 also lacks the second signal terminal 114 and the fourth conductor wire 118. Instead, the semiconductor device 11 has a lead wire 109. One end of the lead wire 109 is connected to the second conductor layer 133. The other end of the lead wire 109 is connected to the monitoring circuit 12. Consequently, the monitoring circuit 12 is electrically connected to the second conductor layer 133.

[0089] In the semiconductor system 3, the first conductor layer 131 is a metal plate and the solder metal 103 bonds the second main electrode 123 to the first conductor layer 131 in order to electrically connect the second main electrode 123 to the conductor layer 131.

[0090] Furthermore, in the semiconductor system 3, the first insulating layer 132 and the second conductive layer 133 form a first integrated component 161. And the second insulating layer 134 and the third conductive layer 135 form a second integrated component 162.

[0091] In semiconductor system 3, the semiconductor element 102, the first conductor layer 131, and the first integrated component 161 are arranged on the first main surface 162a of the second integrated component 162. Furthermore, from the side of the first main surface 162a of the second integrated component 162, the resin 107 covers part of the first main terminal 111, part of the second main terminal 112, part of the first signal terminal 113, the semiconductor element 102, the first conductor layer 131, the first integrated component 161, and the second integrated component 162. However, the resin 107 does not cover the second main surface 162b of the second integrated component 162. The first main surface 162a of the second integrated component 162 is located on the side where the second insulating layer 134 is arranged.The second main surface 162b of the second integrated component 162 is located on the side where the third conductor layer 135 is arranged. This allows the resin 107 to be shaped using the transfer molding process. This makes it easy to manufacture the semiconductor device 11. 3.2 Method for manufacturing the semiconductor device

[0092] Fig. Figure 8 shows cross-sectional views illustrating a method for manufacturing the semiconductor device arranged in the semiconductor system of the third embodiment.

[0093] When the semiconductor device 11 is manufactured, it is carried out as described in Fig. Figure 8(a) shows the semiconductor element 102 mounted on the first conductor layer 131. At this point, the semiconductor element 102 is bonded to the first conductor layer 131 by the solder metal 103.

[0094] Then, as in Fig. Figure 8(b) shows a conductor frame 171 bonded to the semiconductor element 102. At this point, the first main electrode 122 is bonded by the solder metal 108 to the first main terminal 111 arranged in the conductor frame 171. The conductor frame 171 is formed by machining a sheet metal plate. The conductor frame 171 has the first main terminal 111, the second main terminal 112, and the first signal terminal 113.

[0095] Furthermore, as in Fig. Figure 8(c) illustrates that one end of the third conductor wire 117 is connected to the signal electrode 124 and the other end of the third conductor wire 117 is connected to the first signal terminal 113 arranged in the conductor frame 171. Furthermore, one end of the second conductor wire 116 is connected to the first conductor layer 131 and the other end of the second conductor wire 116 is connected to the second main terminal 112 arranged in the conductor frame 171.

[0096] Then, as in Fig. Figure 8(d) illustrates the fabrication of the first integrated component 161, which comprises the laminated first insulator layer 132 and the second conductor layer 133. At this point, a pre-cured insulating fluid is applied to the second conductor layer 133, and the applied pre-cured fluid is partially cured and transformed into the first insulator layer 132. The first integrated component 161 has the first main surface 161a on the side where the first insulator layer 132 is located, and the second main surface 161b on the side where the second conductor layer 133 is located.

[0097] The second integrated component 162, comprising the laminated second insulator layer 134 and the third conductor layer 135, is also manufactured. At this point, the pre-cured insulating resin fluid is applied to the third conductor layer 135, and the applied pre-cured fluid is partially cured and transformed into the second insulator layer 134. The second integrated component 162 has the first main surface 162a on the side where the second insulator layer 134 is located, and the second main surface 162b on the side where the third conductor layer 135 is located.

[0098] Then the semiconductor element 102, the first conductor layer 131, the first integrated component 161, and the second integrated component 162 are placed in a lower mold 173 such that the semiconductor element 102, the first conductor layer 131, and the first integrated component 161 are arranged on the first main surface 162a of the second integrated component 162. At this point, the first main surface 161a of the first integrated component 161 and the first main surface 162a of the second integrated component 162 are positioned facing upwards.

[0099] Then, as in Fig. Figure 8(e) shows the resin 107 being cast or shaped using the transfer molding process. From the side of the first main surface 162a of the second integrated component 162, the resin 107 covers part of the conductor frame 171, the solder 108, the semiconductor element 102, the solder 103, the first conductor layer 131, and the first integrated component 161 and the second integrated component 162, but does not cover the second main surface 162b of the second integrated component 162. When the resin 107 is being formed, the lower mold 173 is closed by an upper mold 174. Furthermore, the pre-cured fluid of the molding resin 107 is injected into a mold 175, which includes the lower mold 173 and the upper mold 174, which closes the lower mold 173, and the injected pre-cured fluid is cured and converted into the molding resin 107.As a result, the part of the conductor frame 171, the solder metal 108, the semiconductor element 102, the solder metal 103, the first conductor layer 131 and the first integrated component 161 are sealed with the molding resin 107.

[0100] The pre-cured fluid of the molding resin 107 consists of a thermosetting resin. Therefore, the pre-cured fluid of the molding resin 107 is cured by being placed inside the mold 175 under high temperature and high pressure. When the pre-cured fluid of the molding resin 107 is cured, the partially cured first insulator layer 132 and the second insulator layer 134 are also fully cured, the first insulator layer 132 adheres to the first conductor layer 131 and the second conductor layer 133, and the second insulator layer 134 adheres to the second conductor layer 133 and the third conductor layer 135.

[0101] It should be particularly noted that one end of the supply line 109 is connected to the second conductor layer 133 before the second conductor layer 133 is placed in the lower mold 173. When the second conductor layer 133 is placed in the lower mold 173, the other end of the supply line 109 is positioned so that it is not embedded in the mold resin 107.

[0102] Then, as in Fig. Figure 8(f) shows the laminated body with the semiconductor element 151, comprising the conductor frame 171, the solder 108, the semiconductor element 102, the solder 103, the laminated body 101, and the molding resin 107, removed from the interior of the mold 175. The removed laminated body with the semiconductor element 151 is then processed. At this point, unnecessary parts, such as connecting webs and the conductor frame section arranged in the conductor frame 171, are removed, leaving the first main terminal 111, the second main terminal 112, and the first signal terminal 113, which are arranged in the conductor frame 171. The remaining first main terminal 111, the second main terminal 112, and the first signal terminal 113 are then formed, and the appropriate external shape is given to the first main terminal 111, the second main terminal 112, and the first signal terminal 113.

[0103] Then, as in Fig. Figure 7 illustrates the cooler 104 being connected to the third conductor layer 135. At this point, the cooler 104 is brought into contact with the laminated body 101, with the thermal paste 105 positioned between them. 3.3 Comparison between a second reference example and the third embodiment

[0104] Fig. Figure 9 is a cross-sectional view that schematically represents a cross-section of a semiconductor device of the second reference example.

[0105] In a semiconductor device 91 of the second reference example, which is located in Fig. As illustrated in Figure 9, a laminated body 901 has a first conductive layer 931, an insulating layer 932, and a second conductive layer 933. The insulating layer 932 electrically isolates the first conductive layer 931 from the second conductive layer 933. The semiconductor element 102 is mounted on the first conductive layer 931. The heat sink 104 is connected to the second conductive layer 933.

[0106] In the semiconductor device 91, if an initial defect forms in the insulating layer 932 when the laminated body 901 is manufactured and the power module 941 is integrated into the device without the initial defect being detected, the semiconductor element 102 is directly electrically short-circuited with the cooler 104, resulting in a malfunction such as a ground fault of the semiconductor element 102 due to voltage, heat, humidity, vibration, and the like, if the insulating layer 932 is dielectrically broken due to the initial defect.

[0107] However, the in Fig. Figure 7 illustrates a semiconductor device 11 in which the laminated body 101 comprises the first conductive layer 131, the first insulating layer 132, the second conductive layer 133, the second insulating layer 134, and the third conductive layer 135. The first insulating layer 132 electrically isolates the first conductive layer 131 from the second conductive layer 133. The second insulating layer 134 electrically isolates the third conductive layer 135 from the second conductive layer 133. The semiconductor element 102 is mounted on the first conductive layer 131. The heat sink 104 is mounted on the third conductive layer 135.

[0108] In the semiconductor device 11, if an initial defect forms in the first insulating layer 132 or the second insulating layer 134 when the laminated body 101 is manufactured and the power module 141 is integrated into the device without the initial defect being detected, the semiconductor element 102 is not immediately electrically short-circuited with the cooler 104 and no malfunction of the semiconductor element 102, such as a ground fault due to voltage, heat, humidity, vibration, and the like, is immediately generated when the first insulating layer 132 or the second insulating layer 134 is broken due to the initial defect. 3.4 Effect of the invention of the third embodiment

[0109] The invention of the third embodiment has the same effect as that of the invention of the first embodiment.

[0110] Furthermore, according to the third embodiment, the molding resin 107 is shaped using the transfer molding process. This allows the semiconductor device 11 to be easily manufactured. 4. Fourth embodiment 4.1 Main differences between the third embodiment and the fourth embodiment

[0111] Fig. Figure 10 is a diagram that schematically illustrates a semiconductor system of the fourth embodiment. Fig. Figure 10 contains a cross-sectional view that schematically represents a cross-section of a semiconductor device arranged in the semiconductor system of the fourth embodiment.

[0112] The semiconductor system 4 of the fourth embodiment, which is in Fig. 10 is illustrated, differs from the semiconductor system 3 of the third embodiment, which is shown in Fig. Figure 7 illustrates this, primarily in the following points. With the exception of the points described below, the same configuration as that adopted in semiconductor system 3 is adopted in semiconductor system 4.

[0113] In the semiconductor system 4, the second conductor layer 133 has a greater thickness than that of the third conductor layer 135. 4.2 Effect of the invention of the fourth embodiment

[0114] The invention of the fourth embodiment has the same effect as that of the invention of the third embodiment.

[0115] Furthermore, according to the invention of the fourth embodiment, a break in the second insulating layer 134 caused by heat, shock or the like, which is generated when the first insulating layer 132 breaks, is suppressed.

[0116] The second conductor layer 133 arranged in the first integrated component 161 is often a thin film with a thickness of about 0.1 mm. The effect of suppressing the fracture of the second insulator layer 134, as described above, is particularly noticeable when the thickness of the second conductor layer 133 is thin, as described above. 5. Fifth embodiment

[0117] Fig. Figure 11 is a diagram that schematically illustrates a movable body of the fifth embodiment.

[0118] A movable body 5 of the fifth embodiment, which is in Fig. Figure 11 illustrates an electric vehicle, train, electric locomotive, electric motorcycle, electric-powered ship, electric aircraft, electrically assisted bicycle, electric wheelchair, or the like.

[0119] The movable body 5 comprises a housing 51, a power supply circuit 13, a three-phase inverter circuit 52, a control circuit 53, a monitoring circuit 12, a warning indicator circuit 14, and a motor 54. The power supply circuit 13 includes a battery 501. The three-phase inverter circuit 52 comprises six power modules 141. The six power modules 141, the monitoring circuit 12, the power supply circuit 13, and the warning indicator circuit 14 form the semiconductor system 2 of the second embodiment. The six power modules 141, the monitoring circuit 12, and the power supply circuit 13 can form the semiconductor system 1 of the first embodiment, the semiconductor system 3 of the third embodiment, or the semiconductor system 4 of the fourth embodiment.

[0120] The power supply circuit 13 provides direct current (DC) to the three-phase inverter circuit 52. The DC provided is the DC discharged by the battery 501. The three-phase inverter circuit 52 converts the DC provided into three-phase alternating current (AC) and supplies the AC to the motor 54. As the three-phase inverter circuit 52 converts DC to AC, the six semiconductor elements 102, arranged in each of the six power modules 141, switch the DC provided. The motor 54 rotates according to the three-phase AC provided. The rotation of the motor 54 is controlled by the frequency at which the six power modules 141 switch DC.

[0121] One of the first main terminals 111 and the second main terminal 112 is electrically connected to the power supply circuit 13. The other of the first main terminal 111 and the second main terminal 112 is electrically connected to the motor 54. The first signal terminal 113 is electrically connected to the control circuit 53. The control circuit 53 outputs signals that are fed into the power modules 141. The signals output by the power modules 141 are also fed into the control circuit 53.

[0122] The monitoring circuit 12 can monitor the voltage between the second conductor layer 133 and the body 51. In such a case, the monitoring circuit 12 detects, based on the monitoring result, that the third conductor layer 135 is electrically short-circuited with the second conductor layer 133.

[0123] According to the invention of the fifth embodiment, a driver of the mobile body 5 can recognize by the warning that the conductor layer of at least one of the first conductor layer 131 and the third conductor layer 135 is electrically short-circuited with the conductor layer 133. Consequently, if the mobile body 5 is taken to a dealer, a repair shop, or the like, the power module 141 can be replaced with a new power module in the state in which one of the first conductor layer 131 and the third conductor layer 135 is electrically short-circuited with the second conductor layer 133, and the other of the first conductor layer 131 and the third conductor layer 135 is not short-circuited, and the semiconductor element 102 is not electrically short-circuited with the cooler 104.

[0124] According to the invention of the fifth embodiment, the output voltage of the power supply circuit 13 is further reduced without stopping the main current flow until the power module 141 is replaced by a new power module 141. As a result, the failure of one of the first insulating layers 132 and the second insulating layer 134, and thus the failure of the other of the first insulating layer 132 and the second insulating layer 134, is prevented. Furthermore, the occurrence of a risk arising from an abrupt stop of the moving body 5, in which the integrated power modules 141 stop abruptly after one of the first insulating layers 132 and the second insulating layer 134 has failed, is prevented. For example, if the moving body 5 is an electric vehicle, the risk of the moving body 5 stalling due to an abrupt stop while traveling on a highway is reliably prevented.

[0125] The power modules 141 can be integrated into a device other than the three-phase inverter circuit 52. For example, the power modules 141 can be integrated into a converter that converts renewable energy into direct current.

[0126] In the present invention, the embodiments can be combined, suitably modified or omitted.

[0127] Although the invention has been presented and described in detail, the preceding description is illustrative in all aspects and not limiting. It is understood that numerous other modifications, not described here, could be conceived. Explanation of reference symbols

[0128] 1, 2, 3, 4 Semiconductor system, 11 Semiconductor device, 12 Monitoring circuit, 13 Power supply circuit, 14 Warning indicator circuit, 101 Laminated body, 102 Semiconductor element, 104 Cooler, 111 First main terminal, 112 Second main terminal, 113 First signal terminal, 114 Second signal terminal, 115 First conductor wire, 116 Second conductor wire, 117 Third conductor wire, 118 Fourth conductor wire, 122 First main electrode, 123 Second main electrode, 124 Signal electrode, 131 First conductor layer, 132 First insulator layer, 133 Second conductor layer, 134 Second insulator layer, 135 Third conductor layer, 151 Laminated body with semiconductor element, 161 First integrated component, 162 Second integrated component, 171 Conductor frame, 172 Laminated body with semiconductor element, 5 movable body, 51 body, 52 three-phase inverter circuit, 53 control circuit, 54 motor.

Claims

[1] Semiconductor device (11) comprising: - a laminated body (101), - which shows: - a first conductor layer (131), - a first insulating layer (132), - a second conductor layer (133), - a second insulating layer (134) and - a third conductor layer (135), which are laminated, - wherein the first insulating layer (132) is arranged between the first conductive layer (131) and the second conductive layer (133) and electrically insulates the first conductive layer (131) from the second conductive layer (133) and - wherein the second insulating layer (134) is arranged between the second conductor layer (133) and the third conductor layer (135) and electrically insulates the third conductor layer (135) from the second conductor layer (133); - a semiconductor element (102) mounted on the first conductor layer (131); and - a cooler (104) connected to the third conductor layer (135), where: - the semiconductor device (11) has a conduction path through which a main current flows, - the second conductor layer (133) is electrically isolated from the conductor path, - a signal connection (113, 114) is formed and is electrically connected to the second conductor layer (133). [2] Semiconductor device (11) according to claim 1, further comprising a conductor wire (118) which electrically connects the second conductor layer (133) to the signal connection (113, 114). [3] Semiconductor device (11) according to one of the preceding claims, wherein the first insulating layer (132) has a smaller planar shape than the planar shape of the second insulating layer (134). [4] Semiconductor device (11) according to one of the preceding claims, wherein the second conductor layer (133) has a greater thickness than that of the third conductor layer (135). [5] Semiconductor device (11) according to any one of the preceding claims, wherein: - the first insulating layer (132) and the second conductive layer (133) form a first integrated component (161), - the second insulating layer (134) and the third conductive layer (135) form a second integrated component (162), - the second integrated component (162) has a first main surface on one side on which the second insulating layer (134) is arranged, and a second main surface on one side on which the third conductive layer (135) is arranged, - the semiconductor element (102) has a main electrode (122, 123) and a signal electrode (124), - the semiconductor element (102), the first conductor layer (131) and the first integrated component (161) are arranged on the first main surface, - the signal terminal (113, 114) is electrically connected to the signal electrode (124) and - the semiconductor device (11) further comprises: - has a main terminal (111, 112) which is electrically connected to the main electrode (122, 123), - a molding resin (107), - which covers from one side of the first main surface a part of the main terminal (111, 112), a part of the signal terminal (113), the semiconductor element (102), the first conductor layer (131), the first integrated component (161) and the second integrated component (162) and - that does not cover the second main surface. [6] Semiconductor system (1, 2, 3, 4) comprising: - a semiconductor device (11) which comprises: - a laminated body (101), - which shows: - a first conductor layer (131), - a first insulating layer (132), - a second conductor layer (133), - a second insulating layer (134) and - a third conductor layer (135) which are laminated, - wherein the first insulating layer (132) is arranged between the first conductive layer (131) and the second conductive layer (133) and electrically insulates the first conductive layer (131) from the second conductive layer (133) and - wherein the second insulating layer (134) is arranged between the second conductor layer (133) and the third conductor layer (135) and electrically insulates the third conductor layer (135) from the second conductor layer (133); - a semiconductor element (102) mounted on the first conductor layer (131); and - a cooler (104) connected to the third conductor layer (135), - a monitoring circuit (12) which is electrically connected to the second conductor layer (133) and detects that at least one of the conductor layers of the first conductor layer (131) and the third conductor layer (135) is electrically short-circuited with the second conductor layer (133); and - a power supply circuit (13) that allows a main current to flow through the semiconductor device and, when it is detected that at least one of the conductor layers is electrically short-circuited with the second conductor layer (133), limits the flow of the main current. [7] Semiconductor system (1, 2, 3, 4) according to claim 6, wherein limiting the flow of the main current includes stopping the flow of the main current. [8] Semiconductor system (1, 2, 3, 4) according to claim 6 or 7, wherein limiting the flow of the main current includes reducing an output voltage of the power supply circuit (13) without stopping the flow of the main current. [9] Semiconductor system (1, 2, 3, 4) according to any one of claims 6 to 8, further comprising a warning device (14) configured to issue a warning when it is detected that at least one of the conductor layers is electrically short-circuited with the second conductor layer (133). [10] Semiconductor system (1, 2, 3, 4) comprising: - a semiconductor device (11) which comprises: - a laminated body (101), - which shows: - a first conductor layer (131), - a first insulating layer (132), - a second conductor layer (133), - a second insulating layer (134) and - a third conductor layer (135) which are laminated, - wherein the first insulating layer (132) is arranged between the first conductive layer (131) and the second conductive layer (133) and electrically insulates the first conductive layer (131) from the second conductive layer (133) and - wherein the second insulating layer (134) is arranged between the second conductor layer (133) and the third conductor layer (135) and electrically insulates the third conductor layer (135) from the second conductor layer (133); - a semiconductor element (102) mounted on the first conductor layer (131); and - a cooler (104) connected to the third conductor layer (135), - a monitoring circuit (12): - which is electrically connected to the second conductor layer (133) and - detected that at least one of the conductor layers of the first conductor layer (131) and the third conductor layer (135) is electrically short-circuited with the second conductor layer (133); and - a warning device (14) configured to issue a warning when it is detected that at least one of the conductor layers is electrically short-circuited with the second conductor layer (133). [11] Movable body (5) comprising a semiconductor system (1, 2, 3, 4) according to any one of claims 6 to 10. [12] Movable body (5) according to claim 11, wherein: - which includes at least one of the conductor layers, the third conductor layer (135), - the movable body furthermore has a corpus (51) and - the monitoring circuit (12): - performs a monitoring of the voltage between the second conductor layer (133) and the body (51) and - based on a result of the monitoring, it was detected that the third conductor layer (135) is short-circuited with the second conductor layer (133). [13] Method for manufacturing a semiconductor device (11) which is configured according to any one of claims 1 to 5, comprising the steps: a) Manufacturing a laminated body (10) with a semiconductor element (151) comprising a laminated body comprising a first conductive layer (131), a first insulating layer (132), a second conductive layer (133), a second insulating layer (134) and a third conductive layer (135), which are laminated, wherein the first insulating layer (132) is arranged between the first conductive layer (131) and the second conductive layer (133) and the second conductive layer (133) is electrically insulated from the first conductive layer (131), and the second insulating layer (134) is arranged between the second conductive layer (133) and the third conductive layer (135) and the third conductive layer (135) is electrically insulated from the second conductive layer (133), and a semiconductor element (102) is mounted on the first conductive layer (131); and b) Connecting a cooler (104) to the third conductor layer (135). [14] The method of claim 13, wherein step a) comprises the steps: a-1) Mounting the semiconductor element (102) on the first conductor layer (131), a-2) Bonding a conductor frame (171) to the semiconductor element (102), a-3) Manufacturing a first integrated component (161) comprising the first insulator layer (132) and the second conductor layer (133), wherein the first insulator layer (132) and the second conductor layer (133) are laminated together; manufacturing a second integrated component (162) comprising the second insulator layer (134) and the third conductor layer (135), wherein the second insulator layer (134) and the third conductor layer (135) are laminated together, the second integrated component (162) having a first main surface on one side on which the second insulator layer (134) is arranged and a second main surface on one side on which the third conductor layer (135) is arranged; and arranging the semiconductor element (102), the first conductor layer (131) and the first integrated component (161) on the first main surface; and a-4) Forming a molding resin (107): - which covers from one side of the first main surface part of the conductor frame (171), the semiconductor element (102), the first conductor layer (131), the first integrated component (161) and the second integrated component (162) and - that does not cover the second main surface.

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