Managing a recently unused data cache with a persistent main body

Abstract

A computer-implemented method for managing a data cache (624), the method comprising: Storing a cache management list having a plurality of entries, the cache management list comprising: a final part (103) stored in a first memory, which documents a plurality of recently accessed data elements stored in a data cache (624), a body (102) stored in a second memory that documents a plurality of less recently accessed data items stored in the data cache (624), and a header (101) stored in the first memory and documenting a first plurality of least recently accessed data elements stored in the data cache (624), in at least one cache management iteration of a plurality of cache management iterations, further comprising: Identifying (321) a second plurality of entries that have not been accessed for the longest time in the body (102), Documenting a second plurality of least recently accessed data items stored in the data cache (624); and Copying (322) the second plurality of entries that have not been accessed for the longest time from the body (102) to the header (101); in each cache management iteration of a plurality of cache management iterations: Receiving (301) a first data access request; Documenting (302) the first data access request in the end part (103); Identifying (311) a plurality of duplicate entries associated with the first data access request and contained in the body and tail (103); and Removing (312) each duplicate entry of the plurality of duplicate entries from the body (102) according to a physical organization of the plurality of duplicate entries in the second memory.

Description

BACKGROUND

[0001] Some embodiments described in the present disclosure relate to managing a data cache, and in particular, but not exclusively, to managing a data cache using fast access memory.

[0002] In computing, a data cache is a component that temporarily stores data so that future requests for that data can be processed more quickly than the initial request. A data cache can be hardware, software, or both. The data stored in a data cache can be the result of a previous computation or a copy of data stored elsewhere.

[0003] For the sake of brevity, the term “cache” is used for “data cache” below, and the terms are used interchangeably.

[0004] A cache client is an entity that accesses cached data, such as a processing unit or an application. In some systems, a cache is local to a cache client and separate from any mass storage where the data is stored, so the cache client can access a copy of the cached data faster than accessing the data in mass storage. For example, if data is stored on a hard disk drive (HDD), some data may be stored in a cache located in random access memory (RAM). Accessing RAM is significantly faster than accessing an HDD, so data stored in a RAM cache can be served more quickly than other data stored on an HDD.Another example is implementing a cache that uses fast memory, which is more expensive than another memory with lower access time used to store the data. Another example is storing data in network-attached storage. A cache client can store a copy of a portion of the data in local storage, which can be volatile or non-volatile. In this example, accessing data in local storage doesn't require transferring data over a network, so access can be faster.

[0005] A cache must not store copies of all the data stored in storage. Some caches are used to store recently or frequently accessed data by the cache client to improve the performance of the cache client by serving such requests more quickly than if they were served from storage. If a cache stores copies of only a portion of the data stored in storage, it must be determined whether a data access request from the cache client can be served from the cache or whether the data's mass storage must be accessed. The term "cache metadata" refers to information that documents a plurality of data items stored in the cache, e.g., one copy of each data item stored in storage, and that is used to manage the cache.This information may include a time of access to a copy of the data item and a source of the data item in permanent storage, e.g., a memory address or a file name.

[0006] Over time, a cache client may frequently access a new data item that it hasn't accessed before, and it may need to add a copy of the new data item to the cache. If the cache's capacity is limited, it may be necessary to evict a copy of another data item from the cache to create a copy of the new data item in the cache. A least-recently-used (LRU) cache is a cache in which, when a data item needs to be evicted from the cache, the least-recently-used data item is evicted first.

[0007] In this context, the published document US 10 078 598 B1 already exists. This document describes the maintenance of a separate LRU linked list for each thread for multi-threaded access. The maintained linked lists of elements correspond to a plurality of threads accessing a plurality of cache entries. Each element of each linked list corresponds to a cache entry. The document also describes new entries and deletions from the linked lists in detail.

[0008] Despite this progress already achieved, further improved procedures (and corresponding systems) are needed to address the problem area described in the second to last paragraph. SUMMARY

[0009] This object is achieved by the independent patent claims. Further embodiments emerge from the independent and respective dependent patent claims. According to one aspect of the present invention, there is provided a method, a computer program product and / or a system for managing a data cache, wherein the following operations (not necessarily in the following order) are performed: (i) storing a cache management list having a plurality of entries, the cache management list comprising: (a) a tail portion stored in a first memory and documenting a plurality of recently accessed data items stored in a data cache, and (b) a body portion stored in a second memory and documenting a plurality of less recently accessed data items stored in the data cache;(ii) in each cache management iteration of a plurality of cache management iterations: (a) receiving a first data access request; (b) documenting the first data access request in the tail portion; (c) identifying a plurality of duplicate entries included in the body portion and the tail portion associated with the first data access request; and (d) removing each of the plurality of duplicate entries from the body portion according to a physical organization of the plurality of duplicate entries in the second memory. BRIEF DESCRIPTION OF THE DRAWINGS

[0010] Some embodiments are described herein by way of example only, with reference to the accompanying drawings. Referring now to the drawings in detail, it should be understood that the details shown are exemplary and serve to describe embodiments by way of illustration. In this context, the description, together with the drawings, will show those skilled in the art how the embodiments may be put into practice. Fig. 1 is a block diagram of a cache management list according to at least one embodiment of the present invention; Fig. 2 is a schematic block diagram of a system according to at least one embodiment of the present invention; Fig. 3 is a flowchart schematically illustrating an optional flow of operations for managing a cache according to at least one embodiment of the present invention; Fig. 4 is a flowchart schematically illustrating an optional flow of operations for a cache miss according to at least one embodiment of the present invention; Fig. 5 is a flowchart schematically illustrating an optional sequence of operations for managing access to a plurality of data elements; and Fig. 6 is a block diagram of a possible hardware and software environment for software and / or methods according to at least one embodiment of the present invention. DETAILED DESCRIPTION

[0011] The following description refers to using a cache management list that has a plurality of entries, and in particular to managing a least recently used (LRU) cache. However, the following description can also be applied to cache replacement policy schemes other than LRU, where additional text can be applied to distinguish between multiple parts of the cache management list, e.g., most recently used, first-in-first-out, and last-in-last-out.

[0012] A cache hit is an event in which the cache client accesses a data item that is present in the cache. A cache miss is an event in which the cache client requests access to a data item that is not present in the cache (a missing data item). When a cache miss occurs, mass storage must be accessed to access the missing data item. Furthermore, it may be necessary to add a copy of the missing data item to the cache.

[0013] Some embodiments of the present disclosure describe a system and method for managing a memory cache, wherein an amount of metadata documenting a plurality of data items of the cache exceeds a size of a first memory available for the metadata. In these embodiments, the metadata is partitioned between the first memory documenting a plurality of recently accessed data items and a second memory documenting a plurality of less recently accessed data items. Optionally, the metadata in the first and second memories is synchronized in each of a plurality of cache management iterations.

[0014] The above and other objects are implemented by the features of the independent claims. Further implementation forms emerge from the dependent claims, the description, and the figures.

[0015] According to a first aspect of the invention, a method for managing a data cache comprises storing a cache management list having a plurality of entries and having a tail portion stored in a first memory and documenting a plurality of recently accessed data items stored in the data cache, and a body portion stored in a second memory and documenting a plurality of less recently accessed data items stored in the data cache.Optionally, the method comprises, in each of a plurality of cache management iterations, receiving at least one data access request, documenting the at least one data access request in the tail portion, identifying a plurality of duplicate entries contained in the main portion and the tail portion, and removing each of the plurality of duplicate entries from the main portion in the second memory according to a physical organization of the plurality of duplicate entries in the second memory. Documenting the data accesses in the tail portion when the tail portion is located in the first memory enables increasing the throughput of managing the cache compared to the case where the first memory is not large enough to store the entire cache management list and the entire cache management list is located in the second memory, e.g., when access to the first memory is faster than access to the second memory.Removing each of the plurality of duplicate entries from the main body according to the physical organization of the plurality of duplicate entries in the second memory reduces the time required to update the main body compared to removing the plurality of duplicate entries in a random order.

[0016] According to a second aspect of the invention, a system for managing a data cache comprises at least one hardware processor configured to store a cache management list having a plurality of entries and comprising: a tail portion stored in a first memory coupled to the at least one hardware processor and documenting a plurality of recently accessed data items stored in the data cache, and a body portion stored in a second memory coupled to the at least one hardware processor and documenting a plurality of less recently accessed data items stored in the data cache; and in each of a plurality of cache management iterations: receiving at least one data access request; documenting the at least one data access request in the tail portion;Identifying a plurality of duplicate entries contained in the main part and the tail part; and removing each of the plurality of duplicate entries from the main part in the second memory according to a physical organization of the plurality of duplicate entries in the second memory.

[0017] According to a third aspect of the invention, a system for managing access to a plurality of data items comprises: a data cache storing at least some of the plurality of data items; and at least one hardware processor coupled to the data cache and configured to manage the data cache by: storing a cache management list having a plurality of entries and having a tail portion stored in a first memory and documenting a plurality of recently accessed data items stored in the data cache, and a body portion stored in a second memory and documenting a plurality of less recently accessed data items stored in the data cache; and in each of a plurality of cache management iterations: receiving at least one data access request;Documenting the at least one data access request in the tail portion; identifying a plurality of duplicate entries contained in the body portion and the tail portion; and removing each of the plurality of duplicate entries from the body portion in the second memory according to a physical organization of the plurality of duplicate entries in the second memory. Managing the data cache as described above enables increasing the throughput of the system for managing access to the plurality of data items.

[0018] In one implementation of the first and second aspects, the cache management list further comprises a header stored in the first memory and documenting a plurality of least recently accessed data items stored in the data cache. Optionally, the method further comprises, in at least some of the plurality of cache management iterations, identifying a new plurality of least recently accessed entries in the body, documenting a new plurality of least recently accessed data items stored in the data cache, and copying the new plurality of least recently accessed entries from the body in the second memory to the header in the first memory.Storing the header in the first memory allows increasing the throughput of managing the cache compared to storing the entire cache management list in the second memory when the first memory is not large enough to store the entire cache management list, e.g., when access to the first memory is faster than access to the second memory.

[0019] In another implementation of the first and second aspects, the method further comprises copying the tail portion to the second memory. The body portion is optionally stored in the second memory in a plurality of files. Copying the tail portion to the second memory optionally comprises adding a file comprising the tail portion to the plurality of files. Copying the tail portion to the second memory enables retaining the tail portion when the second memory is a non-volatile memory. Adding a file enables reducing the time required to copy the tail portion to the second memory, e.g., compared to updating existing files.

[0020] In a further implementation of the first and second aspects, documenting the at least one data access request in the tail portion comprises: updating an entry of the tail portion and / or documenting another access request for the corresponding data item documented thereby and / or moving the updated entry to one end of the tail portion and / or adding a new entry to the tail portion. Optionally, at least one further cache management iteration of the plurality of cache management iterations is executed when it is determined that the tail portion is full. Optionally, at least some of the plurality of cache management iterations are executed periodically.Executing at least one additional cache management iteration when the tail portion is determined to be full enables identifying a candidate for eviction from the main portion of the cache rather than the tail portion, thereby increasing cache management throughput by reducing the likelihood of a future cache miss. Periodically performing at least some of the plurality of cache management iterations further enables increasing cache management throughput by identifying a candidate for eviction from the head portion and reducing the likelihood of executing a cache management iteration when responding to a data access request.

[0021] In a further implementation of the first and second aspects, the method further comprises, in at least one cache management iteration of the plurality of cache management iterations, identifying a data access request of the at least one data access request for requesting access to a data item not stored in the data cache and inserting the data item into the data cache. Optionally, the cache management list further comprises a header stored in the first memory and documenting a plurality of least recently accessed data items stored in the data cache.The method optionally further comprises, in the at least one cache management iteration, identifying at least one entry of the header portion that is not included in the tail portion, and documenting access to at least one data element stored in the data cache, and removing the at least one entry from the header portion. Optionally, at least one further cache management iteration of the plurality of cache management iterations is executed if the at least one entry of the header portion that is not included in the tail portion cannot be identified.Performing the at least one further cache management iteration of the plurality of cache management iterations when at least one entry of the head portion not included in the tail portion cannot be identified enables identifying a candidate for eviction from the body of the cache rather than the tail portion, thereby increasing the throughput of managing the cache by reducing the probability of a future cache miss.

[0022] In another implementation of the first and second aspects, a ratio between a first access time of the first memory and a second access time of the second memory is smaller than a threshold access time ratio. Using a first memory with an access time where the ratio between a first access time of the first memory and a second access time of the second memory is smaller than a threshold access time ratio reduces the time required to respond to a memory access request compared to when the entire cache management list is stored in the second memory.

[0023] In a further implementation of the first and second aspects, the first memory is selected from a first group of digital memories consisting of: a random access memory (RAM), a static RAM (SRAM), a dynamic RAM (DRAM), a hard disk drive, and a semiconductor storage disk; and the second memory is selected from a second group of digital memories consisting of: a DRAM, a hard disk drive, a semiconductor storage disk, an electronically erasable programmable read-only memory (EEPROM), a NAND-type flash memory, a network-attached memory, and a network storage.

[0024] In a further implementation of the first and second aspects, at least one of the at least one data access request is received by a software object executed by the at least one hardware processor. The at least one other of the at least one data access request is optionally received by at least one other hardware processor connected to the at least one hardware processor. Optionally, the at least one other hardware processor is connected to the at least one hardware processor via at least one digital data transmission network interface connected to the at least one hardware processor.

[0025] In one implementation of the third aspect, the at least one hardware processor is further configured to receive at least one other data access request, request access to at least one data item of the plurality of data items; identify the at least one data item in the at least some data items stored in the data cache; and access the at least one data item in the data cache in response to the at least one data access request. Accessing the data item in the data cache increases the throughput of the system for accessing the plurality of data items by reducing the number of data items in another memory, e.g., when the memory is located remotely from the at least one hardware processor.

[0026] Other systems, methods, features, and advantages of the present disclosure will become apparent to those skilled in the art upon consideration of the following drawings and detailed description. All such additional systems, methods, features, and advantages are intended to be included in this description, within the scope of the present disclosure, and protected by the appended claims.

[0027] Unless otherwise defined, all technical and / or scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which they belong. While methods and materials similar or equivalent to those described herein may be used in the practice or examination of embodiments, exemplary methods and / or materials are described below. In the event of any conflict, the patent specification, including its definitions, shall control. Furthermore, the materials, methods, and examples are merely illustrative and are not intended to be limiting.

[0028] One way to manage a cache is to maintain a cache management list that has a plurality of entries, each of which documents a data item stored in the cache. Each entry can contain documentation of the last access to the respective data item by one or more data clients using the data cache. The cache management list can be sorted and have a beginning and an end, so that new entries are added to a part of the cache management list at the end of the list, also called the tail part. In such a cache management list, another part at the beginning of the list, also called the head part, contains the oldest entries of the plurality of entries. Reference is now made to Fig. 1, which shows a block diagram of an exemplary cache management list 100. In this example, the cache management list 100 includes a header 101, a body 102, and a tail 103. In this example, the header 101 includes at least one entry 111 documenting access to an associated corresponding data item at a first time, denoted by t1. In this example, the body 102 further includes at least one other entry 121 documenting another access to an associated corresponding data item at a second time, denoted by t2. In this example, the tail 103 further includes at least one additional other entry 103 documenting another other access to an associated additional other corresponding data item at a third time, denoted by t3.

[0029] As described above, in an LRU cache, when a data item needs to be evicted from the cache, the least recently used data item is evicted first. An LRU cache may be managed using a cache management list, where the header 101 has one or more entries documenting one or more least recently accessed data items, and one or more other entries documenting one or more recently accessed data items are located in the tail 103. For example, in the cache management list 100, t3 may be equal to or more recent than t1 and t2, i.e., t3 is equal to or later than t2 and t2. In this example, t1 may also be equal to or less recent than t2 and t3, i.e., t3 is equal to or earlier than t2 and t3.The one or more recently accessed data elements may be one or more data elements that were accessed most recently, i.e., a time associated with an entry in the tail section 103 may not be later than another time associated with another entry in the body section 102 or the head section 101. A plurality of less recently accessed data elements may be documented by a plurality of other entries in the body section 102 of the list. For example, t2 may be equal to or less recently than t3, i.e., t2 is equal to or earlier than t3.

[0030] When a data item in a cache needs to be replaced—that is, when one or more existing data items need to be removed to store another data item in their place—according to some cache replacement policies, one or more entries are selected from header 103, e.g., entry 131, and the corresponding data items associated with the selected entries are replaced in the cache. When a new data item is added to the cache, such policies add an entry documenting access to the new data item to tail 101.

[0031] To increase the throughput of a cache client accessing the cache, the cache management list is typically stored in memory or a storage to which the cache client has fast access. For example, if the cache client is a hardware processor, the cache management list may be stored in a local memory component electrically connected to the hardware processor. However, depending on the number of a plurality of data items whose copies are stored in the cache, and additionally or alternatively depending on the amount of data describing the access to each data item in the cache, the size of the cache management list may exceed a memory size allocated to storing the cache management list. In the above example, the size of the cache management list may exceed a local memory size allocated to storing the cache management list.

[0032] The cost of this memory or storage can be a barrier to increasing the size of memory or storage used to store the cache management list, since fast memory and storage are generally more expensive than slow memory or storage. One possible solution is to store the cache management list in a larger storage, such as a hard disk drive. However, a large memory is generally slower than other storage commonly used to store a cache management list. Furthermore, for some large memory technologies, such as hard disk drives, the access time to a cache management list entry is affected by the physical organization of the majority of cache management list entries in memory.Accessing more than one of a plurality of entries without considering the physical organization of the plurality of entries in memory may be significantly slower than accessing more than one entry according to the physical organization in memory. For example, if the cache management list is stored in a file on a hard disk drive, opening and closing the file to access one entry at a time may be significantly slower than opening a file and accessing all of the one or more entries in the file before closing the file.

[0033] In some of the embodiments described herein, it is proposed to split the cache management list between two memories, with the tail portion, which documents a plurality of recently accessed data items stored in the cache, being contained in a first memory, and the main portion, which documents a plurality of less recently accessed data items stored in the cache, being contained in a second memory. The first memory may be faster than the second memory, so that a first access time, which indicates a period of time required to retrieve data from the first memory, may be shorter than a second access time, which indicates a period of time required to retrieve data from the second memory.The first memory may be significantly faster than the second memory such that a ratio between the first access time and the second access time is below a threshold access time ratio, e.g., below 0.1 or below 0.01, i.e., the first memory is at least 10 times or 100 times faster than the second memory. For example, the first memory may be static random access memory (SRAM) and the second memory may be RAM. In another example, the first memory is RAM and the second memory is an HDD or a solid state disk (SSD). In another example, the first memory is an SSD with a faster access time than another SSD used for the second memory.

[0034] In these embodiments, one or more data access requests are documented in the tail. If the accessed data item is in the cache (cache hit), the access is documented by adding an entry to the tail or updating an existing entry, e.g., by moving it to one end of the tail. When a data item is added to the cache, an entry documenting the access to the data item is added to the tail. An entry is considered a duplicate of another entry if the entry and the other entry both document access to the same data item. The entry and the other entry may document different accesses to the same data item.Documenting the data accesses in the tail when the tail is in the first memory allows increasing the throughput of managing the cache compared to the case where the first memory is not large enough to store the entire cache management list and the entire cache management list is in the second memory, e.g., when access to the first memory is faster than access to the second memory.

[0035] Since data accesses are only documented in the tail portion, the tail portion may, over time, contain one or more entries that are duplicates of one or more entries in the main portion. In the present disclosure, in some embodiments described herein, it is proposed to identify a plurality of duplicate entries contained in the main portion and the tail portion and to remove each of the plurality of duplicate entries from the main portion in the second memory. Optionally, the removal of each of the plurality of duplicate entries from the main portion occurs according to a physical organization of the plurality of duplicate entries in the second memory.For example, if the plurality of duplicate entries are located in a plurality of files in the second memory, removing each of the plurality of duplicate entries may comprise opening each of the plurality of files once and removing all of the plurality of duplicate entries in the file before closing the file. Removing each of the plurality of duplicate entries from the main body according to the physical organization of the plurality of duplicate entries in the second memory reduces the time required to update the main body compared to removing the plurality of duplicate entries in a random order.

[0036] Identifying the plurality of duplicate entries and removing the plurality of duplicate entries from the main part optionally occurs in each of a plurality of cache management iterations (sometimes referred to herein as management iterations). Optionally, one or more of the plurality of management iterations are executed periodically. Optionally, one or more other ones of the plurality of management iterations are executed when the tail part is determined to be full, e.g., when a new entry needs to be added to the tail part or when a new entry has been added to the tail part. The tail part is optionally copied to the second storage, e.g., when the second storage is non-volatile storage, e.g., an HDD or SSD, and the second storage is volatile storage, e.g., RAM.

[0037] In some embodiments, the header portion of the cache management list is further stored in the first memory. Optionally, a copy of the header portion is stored in the first memory. When a data item needs to be evicted from the cache, one or more entries are optionally identified in the header portion rather than the tail portion, wherein the one or more entries document access to the data item. When the data item is evicted from the cache, the one or more entries are optionally removed from the header portion. Storing the header portion in the first memory enables increasing the throughput of managing the cache compared to storing the entire cache management list in the second memory when the first memory is not large enough to store the entire cache management list, e.g., when access to the first memory is faster than access to the second memory.

[0038] Optionally, one or more additional other of the plurality of cache management iterations are executed if the header is determined to be empty.

[0039] The embodiments may be a system, a method, and / or a computer program product. The computer program product may include computer-readable storage medium(s) storing computer-readable program instructions for causing a processor to perform aspects of the embodiments.

[0040] The computer-readable storage medium may be any physical device that can retain and store instructions for use by an instruction-executing device. The computer-readable storage medium may be, for example, but is not limited to, an electronic storage device, a magnetic storage device, an optical storage device, an electromagnetic storage device, a semiconductor storage device, or any suitable combination thereof. A non-exhaustive list of more specific examples of the computer-readable storage medium includes the following: a portable computer diskette, a hard disk, random access memory (RAM), read-only memory (ROM), erasable programmable read-only memory (EPROM).Flash memory), static random access memory (SRAM), portable compact read-only memory (CD-ROM), digital versatile disc (DVD), memory stick, floppy disk, and any suitable combination thereof. A computer-readable storage medium, as used herein, should not be construed as carrying transient signals per se, such as radio waves or other freely propagating electromagnetic waves, electromagnetic waves propagating through a waveguide or other transmission medium (e.g., pulses of light traveling through fiber optic cables), or electrical signals carried through a wire.

[0041] Computer-readable program instructions described herein may be downloaded from a computer-readable storage medium to respective computing / processing units or to an external computer or external storage unit via a network such as the Internet, a local area network, a wide area network, and / or a wireless network. The network may include copper transmission cables, fiber optic transmission lines, wireless transmission, routers, firewalls, switching units, gateway computers, and / or edge servers. A network adapter card or network interface in each computing / processing unit receives computer-readable program instructions from the network and forwards the computer-readable program instructions for storage in a computer-readable storage medium within the respective computing / processing unit.

[0042] Computer-readable program instructions for performing operations of embodiments may be assembly instructions, instruction set architecture (ISA) instructions, machine instructions, machine-dependent instructions, microcode, firmware instructions, state-setting data, or either source code or object code, written in any combination of one or more programming languages, including object-oriented programming languages ​​such as Smalltalk, C++, or the like.as well as conventional procedural programming languages ​​such as the C programming language or similar programming languages. The computer-readable program instructions may execute entirely on the user's computer, partly on the user's computer, as a standalone software package, partly on the user's computer and partly on a remote computer, or entirely on the remote computer or server. In the latter case, the remote computer may be connected to the user's computer by any type of network, including a local area network (LAN) or a wide area network (WAN), or the connection may be made to an external computer (for example, over the Internet using an Internet service provider).In some embodiments, electronic circuits, including, for example, programmable logic circuits, field programmable gate arrays (FPGAs), or programmable logic arrays (PLAs), may execute the computer-readable program instructions by utilizing state information of the computer-readable program instructions to personalize the electronic circuits to perform aspects of embodiments.

[0043] Aspects of embodiments are described herein with reference to flowcharts and / or block diagrams of methods, apparatus (systems), and computer program products according to embodiments. It should be understood that each block of the flowcharts and / or block diagrams, as well as combinations of blocks in the flowcharts and / or block diagrams, may be implemented by computer-readable program instructions.

[0044] These computer-readable program instructions may be provided to a processor of a general-purpose computer, a special-purpose computer, or other programmable data processing device to produce a machine such that the instructions, executed by the processor of the computer or other programmable data processing device, produce a means for implementing the functions / steps defined in the flowchart and / or block diagram block(s).These computer-readable program instructions may also be stored on a computer-readable storage medium that can direct a computer, a programmable data processing apparatus, and / or other devices to function in a particular manner, such that the computer-readable storage medium having instructions stored thereon comprises an article of manufacture, including instructions that implement aspects of the function / step specified in the flowchart block(s) and / or block diagram(s).

[0045] The computer-readable program instructions may also be loaded onto a computer, other programmable data processing apparatus, or other device to cause a series of process steps to be performed on the computer, other programmable apparatus, or other device to produce a computer-executable process such that the instructions executing on the computer, other programmable apparatus, or other device implement the functions / steps defined in the block(s) of flowcharts and / or block diagrams.

[0046] The flowcharts and block diagrams in the figures illustrate the architecture, functionality, and operation of possible implementations of systems, methods, and computer program products according to various embodiments. In this regard, each block in the flowcharts or block diagrams may represent a module, segment, or portion of instructions comprising one or more executable instructions for performing the particular logical function(s). In some alternative implementations, the functions specified in the block may occur in a different order than shown in the figures. For example, two blocks shown in sequence may actually execute substantially concurrently, or the blocks may sometimes execute in reverse order depending on the corresponding functionality. It should also be noted that each block of the block diagrams mayBlock diagrams and / or flowcharts, and combinations of blocks in the block diagrams or block diagrams and / or flowcharts, can be implemented by special purpose hardware-based systems that perform the specified functions or steps, or combinations of special purpose hardware and computer instructions.

[0047] Reference is now made to Fig. 2, which shows a schematic block diagram of an example system 200 according to some embodiments. In these embodiments, at least one hardware processor 211 is connected to a first memory 201 and a second memory 202. The first memory 201 is optionally selected from a first group of memories including a RAM, an SRAM, a dynamic random access memory (DRAM), an HDD, and an SSD. The second memory 202 is optionally selected from a second group of memories including a DRAM, an HDD, an SSD, an electronically erasable programmable read-only memory (EEPROM), a NAND-type flash memory, a network-attached memory, and a network storage. The first memory 201 is optionally faster than the second memory 202 such that a first access time of the first memory 201 is shorter than a second access time of the second memory 202.A ratio between the first access time and the second access time is optionally smaller than an access time ratio threshold. Some examples of an access time ratio threshold are 0.1, 0.5, 0.01, 0.035, and 0.0001.

[0048] For the sake of brevity, the term “processor” is used below to mean “at least one hardware processor,” and the terms are used interchangeably.

[0049] The processor 211 is optionally connected to the data cache 210. The data cache 210 optionally includes a plurality of data items. The data cache 210 is optionally stored in the first memory 201. The data cache 210 is optionally stored in the second memory 202. The data cache 210 is optionally stored in another memory (not shown) connected to the processor 211. The processor 211 optionally manages the data cache 210, optionally using the cache management list 100. The cache management list 100 includes a tail 103 documenting a plurality of recently accessed data items stored in the data cache 210. The tail 103 is optionally stored in the first memory 201. The cache management list 100 optionally includes a body 102 that documents a plurality of less recently accessed data items stored in the data cache 210.The main part 102 is optionally stored in the second memory 202. The cache management list 100 optionally includes a header part 101 that documents a plurality of least recently accessed data elements stored in the data cache 210. The header part 101 is optionally stored in the first memory 201.

[0050] The processor 211 is optionally connected to one or more digital data transmission network interfaces 205. For brevity, the term "network interface" is used below to mean "one or more digital data transmission network interfaces," and the terms are used interchangeably. The network interface 205 is optionally connected to a local area network (LAN), e.g., a wireless LAN or an Ethernet LAN. The network interface 205 is optionally connected to a wide area network (WAN), e.g., a cellular network or the Internet. The first memory 201 is optionally connected to the processor 211 via the network interface 205. The second memory 202 is optionally connected to the processor 211 via the network interface 205.

[0051] Another processor 220 is optionally connected to processor 211 via network interface 205. Another processor 220 optionally accesses data cache 210, optionally by sending one or more access requests to processor 211.

[0052] To manage the data cache 210, in some embodiments, the system 200 implements the following optional method.

[0053] It will now also be Fig. 3, which shows a flowchart schematically illustrating an optional flow of the method 300 for managing a cache according to some embodiments. In these embodiments, in step 301, the processor 211 receives one or more data access requests. At least one of the one or more data access requests is optionally received from a software object executed by the processor 211, e.g., an application. At least one other of the one or more data access requests is optionally received from the other processor 220 via the network interface 205.

[0054] In step 302, the processor 211 optionally documents the one or more data access requests in the tail portion 103. Documenting the one or more data access requests in the tail portion 103 optionally comprises updating an entry of the tail portion 103, wherein the entry documents another access request for the corresponding data item documented by the entry. Documenting the one or more data access requests in the tail portion 103 optionally further comprises moving the updated entry to an end of the tail portion 103. Documenting the one or more data access requests in the tail portion 103 optionally comprises adding a new entry to the tail portion 103, optionally at the end of the tail portion 103.

[0055] Over time, it may become necessary to synchronize the main part 102 and the tail part 103. In step 311, the processor 211 optionally identifies a plurality of duplicate entries in the main part 102 and the tail part 103. In step 312, the processor 211 optionally removes each of the plurality of duplicate entries from the main part 102 in the second memory 202 according to a physical organization of the plurality of duplicate entries in the second memory 202.

[0056] Steps 301, 302, 311, and 312 are optionally performed in each of a plurality of management iterations. Optionally, at least some of the plurality of management iterations are optionally performed periodically. Optionally, one or more of the plurality of management iterations are executed when it is determined that the tail portion 103 is full. In one or more of the plurality of management iterations, in step 313, the processor 211 optionally copies the tail portion 103 to the second memory 202, e.g., if the second memory 202 is a non-volatile memory, to create a permanent copy of the tail portion 103. The body portion 102 is optionally stored in the second memory 202 in a plurality of files. Copying the tail portion 103 to the second memory 202 optionally comprises adding a file comprising the tail portion 103 to the plurality of files.

[0057] In at least one management iteration of the plurality of management iterations, at least one of the one or more data access requests may result in a cache miss, wherein the at least one data access request is a request to access a data item that is not stored in the data cache 210.

[0058] It will now also be Fig. 4, which shows a flowchart schematically illustrating an optional flow of operations 400 for a cache miss, according to some embodiments. In these embodiments, in step 401, the processor 211 identifies a data access request of the one or more data access requests that requests access to a data item not stored in the data cache 210. In step 402, the processor 211 optionally inserts the data item into the data cache. To document the data access request, one or more data items must optionally be removed from the data cache 210. In step 411, the processor 211 optionally identifies one or more entries of the header 101 that are not included in the tail 103, the one or more entries documenting access to at least one data item stored in the data cache 210.For example, processor 211 may check whether an entry in header 101 documenting a first accessed data item is included in tail 103, and continue in ascending order of access time until it identifies the one or more entries of header 101 that are not included in tail 103. The one or more entries of header 101 are optionally not included in tail 103 and not included in body 102. In step 413, processor 211 optionally removes the one or more entries from header 101.

[0059] Reference is now again made to Fig. 3. It may be necessary to update the header 101 stored in the first memory 201. In at least some of the plurality of management iterations, in step 321, the processor 211 optionally identifies in the main portion 102 a new plurality of least recently used entries, and in step 322, the processor 211 optionally copies copies of the new plurality of least recently used entries from the main portion 102 in the second memory 202 to the header portion 101 in the first memory 201. After copying the new plurality of least recently used entries from the main portion 102 to the header portion 101, the processor 211 additionally optionally removes the new plurality of least recently used entries from the main portion 102, effectively moving the new plurality of least recently used entries from the main portion 102 to the header portion 101.Processor 211 optionally removes the new, least recently accessed, plurality of entries from main portion 102 in another of the plurality of management iterations. Processor 211 optionally executes at least some of the plurality of management iterations if, in step 411, the one or more entries of head portion 101 not included in tail portion 103 cannot be identified, e.g., if head portion 101 is empty.

[0060] In some embodiments, system 200 manages access to a plurality of data items, e.g., a plurality of data items stored in a cloud-based object storage service. In this example, a majority of the plurality of data items are stored in storage remote from processor 211. In these embodiments, data cache 210 stores a plurality of copies, one each of at least some of the plurality of data items. The copies stored in data cache 210 optionally have more than 100 terabytes of storage space. Data cache 210 is optionally stored in one or more HDDs and additionally or alternatively in one or more SSDs. Second storage 202, in which main portion 102 is stored, optionally comprises one or more HDDs and additionally or alternatively in one or more SSDs.The first memory 201, in which the header part 101 and the tail part 103 are stored, is a memory component connected to the processor 211.

[0061] To manage access to the plurality of data elements, in some embodiments, system 200 implements the following non-mandatory method.

[0062] Reference is now also made to Fig. 5, which shows a flowchart schematically illustrating an optional sequence of operations 500 for managing access to a plurality of data items, according to some embodiments. In these embodiments, in step 501, the processor 211 manages the data cache 210, optionally using the method 300. In step 510, the processor 211 optionally receives one or more data access requests, e.g., from the other processor 220 or from a software object executed by the processor 211. The one or more data access requests optionally request access to at least one data item of the plurality of data items. In step 511, the processor 211 optionally identifies the at least one data item in the data cache 210, i.e., in the copies of at least some of the plurality of data items stored in the data cache 210.In response to the one or more data access requests, the processor 211 optionally accesses the at least one data item in the data cache 210 in step 512.

[0063] An embodiment of a possible hardware and software environment for software and / or methods according to the present invention will now be described in detail with reference to the figures. Fig. 6 is a functional block diagram illustrating various parts of the networked computer system 600, including: the client computer 602; the communications network 604; the storage subsystem 606; the server computer 608; the communications unit 610; the processor set 612; the input / output (I / O) interface set 614; the display unit 616; the external devices 618; the memory 620; the random access memory (RAM) 622; the cache 624; the persistent memory 626; and the cache manager 628.

[0064] The memory subsystem 606 is, in many ways, representative of the various computer subsystems in the present invention. Therefore, several parts of the memory subsystem 606 are discussed in the following sections.

[0065] The storage subsystem 606 may be a laptop computer, a tablet computer, a netbook computer, a personal computer (PC), a desktop computer, a personal digital assistant (PDA), a smartphone, or any electronic device capable of communicating with the client subsystems over the communications network 604. The cache management program 628 is a collection of machine-readable instructions and / or data used to create, manage, and control certain software functions, which are explained in detail below in the "Exemplary Embodiment" subsection of this "Detailed Description" section.

[0066] The storage subsystem 606 is capable of exchanging data with other computer subsystems via the communications network 604. The communications network 604 may be, for example, a local area network (LAN), a wide area network (WAN) such as the Internet, or a combination of both, and may include wired, wireless, or fiber optic connections. In general, the communications network 604 may consist of any combination of connections and protocols that support data transfers between server and client subsystems.

[0067] The memory subsystem 606 is depicted as a block diagram with multiple double-ended arrows. These double-ended arrows (no separate reference numbers) represent a data transfer structure that provides data transfers between various components of the memory subsystem 606. This data transfer structure may be implemented using any architecture designed for transferring data and / or controlling information between processors (e.g., microprocessors, data transfer and network processors, etc.), system memories, peripherals, and any other hardware components in a system. The data transfer structure may, for example, be implemented at least in part using one or more buses.

[0068] Memory 620 and persistent storage 626 are computer-readable storage media. In general, memory 620 may include any suitable volatile or non-volatile computer-readable storage medium. It should further be noted that now and / or in the near future: (i) external device(s) 618 may provide some or all of the storage for storage subsystem 606; and / or (ii) devices external to storage subsystem 606 may be capable of providing storage for storage subsystem 606.

[0069] The cache management program 628 is stored in persistent memory 626 for access and / or execution by one or more of the respective computer processors of the computer processor set 612, typically via one or more memories of the memory 620. Persistent memory 626: (i) is at least more persistent than a transmitted signal; (ii) stores the program (including its soft logic and / or data) on a volatile medium (e.g., magnetic or optical domains); and (iii) is substantially less persistent than permanent memory. Alternatively, the data store may be more persistent and / or permanent than the type of memory provided by persistent memory 626.

[0070] The cache management program 628 may include both machine-readable and executable instructions and / or content data (i.e., the type of data stored in a database). In this particular embodiment, the persistent storage 626 includes a magnetic hard disk drive. To name a few possible variations, the persistent storage 626 may include a semiconductor disk, a semiconductor storage device, a read-only memory (ROM), an erasable programmable read-only memory (EPROM), a flash memory, and any other computer-readable storage media capable of storing program instructions or digital information.

[0071] The media used by persistent storage 626 may also be removable. For example, a removable hard disk may be used for persistent storage 626. Other examples include optical and magnetic disks, USB memory sticks, and smart cards that are inserted into a drive for transfer to another computer-readable storage medium that is also part of persistent storage 626.

[0072] In these examples, the communications unit 610 provides communications with other computing systems or devices external to the storage subsystem 606. In these examples, the communications unit 610 includes one or more network interface cards. The communications unit 610 may provide communications over physical and wireless communications connections, either or both. All software modules described herein may be downloaded to a persistent storage device (e.g., persistent storage 626) via a communications unit (e.g., the communications unit 610).

[0073] The I / O interface set 614 enables the input and output of data with other devices that may be locally connected to the server computer 608 for transferring data. For example, the I / O interface set 614 provides a connection to the external devices 618. The external devices 618 include devices such as a keyboard, a keypad, a touchscreen, and / or other suitable input device. The external devices 618 may also include portable, computer-readable storage media such as USB memory sticks, portable optical or magnetic disks, and memory cards. Software and data used to carry out embodiments of the present invention, e.g., the cache management program 628, may be stored on such portable, computer-readable storage media.In these embodiments, the software in question may be loaded, in whole or in part, into persistent memory 626 via I / O interface set 614. I / O interface set 614 is also connected to display unit 616 for transferring data.

[0074] The display unit 616 provides a mechanism for displaying data to a user, and the unit may be, for example, a computer monitor or a display screen of a smartphone.

Claims

[1] A computer-implemented method for managing a data cache (624), the method comprising: Storing a cache management list having a plurality of entries, the cache management list comprising: a final part (103) stored in a first memory, which documents a plurality of recently accessed data elements stored in a data cache (624), a body (102) stored in a second memory that documents a plurality of less recently accessed data items stored in the data cache (624), and a header (101) stored in the first memory and documenting a first plurality of least recently accessed data elements stored in the data cache (624), in at least one cache management iteration of a plurality of cache management iterations, further comprising: Identifying (321) a second plurality of entries that have not been accessed for the longest time in the body (102), Documenting a second plurality of least recently accessed data items stored in the data cache (624); and Copying (322) the second plurality of entries that have not been accessed for the longest time from the body (102) to the header (101); in each cache management iteration of a plurality of cache management iterations: Receiving (301) a first data access request; Documenting (302) the first data access request in the end part (103); Identifying (311) a plurality of duplicate entries associated with the first data access request and contained in the body and tail (103); and Removing (312) each duplicate entry of the plurality of duplicate entries from the body (102) according to a physical organization of the plurality of duplicate entries in the second memory. [2] The method of claim 1, further comprising copying (313) the end portion (103) into the second memory. [3] The method of claim 1, wherein the method further comprises: Identifying (401) a data item not stored in the data cache (624) in at least one cache management iteration of the plurality of cache management iterations and based on the first data access request; and Inserting (402) the data element into the data cache (624). [4] The method of claim 3, wherein the method further comprises, in at least one cache management iteration of the plurality of cache management iterations: Identifying (411) an entry contained in the header (101) and not in the tail (103), the entry documenting access to the data element stored in the data cache; and Removing (413) the entry from the header (101). [5] The method of claim 1, wherein documenting the first data access request in the final part (103) comprises an operation selected from the group consisting of: Updating a first entry of the end part (103), the first entry documenting a further access request for a corresponding data element documented thereby, and moving the updated first entry to an end of the end part (103); and Adding a second entry to the end part (103). [6] The method of claim 1, wherein at least one cache management iteration of the plurality of cache management iterations is executed periodically. [7] The method of claim 1, further comprising: Determining that the end part (103) is full; and in response to determining that the end portion (103) is full, performing at least one cache management iteration of the plurality of cache management iterations. [8] The method of claim 4, further comprising: Determining that the entry contained in the header part (101) is not contained in the tail part (103); in response to determining that the entry included in the header (101) is not included in the tail (103), executing at least one cache management iteration of the plurality of cache management iterations. [9] The method of claim 1, wherein a ratio between a first access time of the first memory and a second access time of the second memory is less than a threshold value for the access time ratio. [10] The method of claim 1, wherein: the first memory is selected from a first group of digital memories consisting of: a random access memory (RAM), a static RAM (SRAM), a first dynamic RAM (DRAM), a first hard disk drive, and a first semiconductor storage disk; and the second memory is selected from a second group of digital memories consisting of: the first DRAM, a second DRAM, the first hard disk drive, a second hard disk drive, the semiconductor storage disk, a second semiconductor storage disk, an electronically erasable programmable read-only memory (EEPROM), a NAND-type flash memory, a network-connected storage and a network-attached storage. [11] The method of claim 2, wherein: the main part (102) is stored in the second memory in a plurality of files; and copying the end part (103) into the second memory comprises adding a file having the end part (103) to the plurality of files. [12] A computer system for managing a data cache, the computer system comprising: a processor set (612) comprising a first processor (612) and a second processor (612); and one or more computer-readable storage media; where: the processor set is structured, located, connected and / or programmed to execute program instructions stored together in the one or more computer-readable storage media; and the program instructions which, when executed by the processor set, cause the processor set to operate the data cache (624) by: Storing a cache management list having a plurality of entries, the cache management list comprising: a terminal portion (103) stored in a first memory, connected to the first processor, and documenting a plurality of recently accessed data elements stored in the data cache (624), a body (102) stored in a second memory, coupled to the first processor, and documenting a plurality of less recently accessed data items stored in the data cache (624), and a header (101) stored in the first memory and documenting a first plurality of least recently accessed data elements stored in the data cache (624), wherein in at least one cache management iteration of a plurality of cache management iterations, further comprising: Identifying a second plurality of entries that have not been accessed for the longest time in the body (102), Documenting a second plurality of least recently accessed data items stored in the data cache (624); and Copying the second plurality of entries that have not been accessed for the longest time from the body (102) to the header (101); in each cache management iteration of a plurality of cache management iterations: Receiving a first data access request; Documenting the first data access request in the final part (103); Identifying a plurality of duplicate entries belonging to the first data access request and contained in the body (102) and tail (103); and Removing each duplicate entry of the plurality of duplicate entries from the body (102) according to a physical organization of the plurality of duplicate entries in the second memory. [13] A computer system according to claim 12, wherein the main part is stored in the second memory in a plurality of files; and the processor set is further caused to operate the data cache (624) by: copying the end part (103) into the second memory by adding a file having the end part (103) to the plurality of files. [14] The computer system of claim 12, wherein the processor set is further caused to operate the data cache to: Identifying a data item not stored in the data cache in at least one cache management iteration of the plurality of cache management iterations; and Inserting the data element into the data cache. [15] The computer system of claim 14, further causing the processor set (612) to operate the data cache in at least one cache management iteration of the plurality of cache management iterations to: Identifying an entry contained in the header (101) and not in the tail (103), the entry documenting access to the data item stored in the data cache; and Removing the entry from the header (101). [16] The computer system of claim 15, wherein the processor set (612) is further arranged to operate the data cache for Determining that the entry contained in the header part (101) is not contained in the tail part (103); in response to determining that the entry included in the header (101) is not included in the tail (103), executing at least one cache management iteration of the plurality of cache management iterations. [17] A computer program product comprising a computer-readable storage medium having stored therein a set of instructions that, when executed by a processor (612), cause the processor (612) to operate a data cache (624) to: Storing a cache management list having a plurality of entries, the cache management list comprising: a final part (103) stored in a first memory, which documents a plurality of recently accessed data elements stored in the data cache, a body (102) stored in a second memory that documents a plurality of less recently accessed data items stored in the data cache (624), and a header (101) stored in the first memory and documenting a first plurality of least recently accessed data elements stored in the data cache (624); in at least one cache management iteration of a plurality of cache management iterations: Identifying a second plurality of entries that have not been accessed for the longest time in the body (102), Documenting a second plurality of least recently accessed data items stored in the data cache (624); and Copying the second plurality of entries that have not been accessed for the longest time from the body (102) to the header (101); in each cache management iteration of a plurality of cache management iterations: Receiving a first data access request; Documenting the first data access request in the final part (103); Identifying a plurality of duplicate entries contained in the main part (102) and the tail part (103) with respect to the first data access request; and Removing each duplicate entry of the plurality of duplicate entries from the body (102) according to a physical organization of the plurality of duplicate entries in the second memory. [18] The computer program product of claim 17, wherein the body (102) is stored in the second memory in a plurality of files; and the processor set is further caused to operate the data cache (624) to: copying the end part (103) into the second memory by adding a file containing the end part (103) to the plurality of files. [19] The computer program product of claim 17, wherein the processor set is further caused to operate the data cache to: Identifying a data item not stored in the data cache (624) in at least one cache management iteration of the plurality of cache management iterations; and Insert the data element into the data cache (624). [20] The computer program product of claim 19, wherein the processor set (612) is further caused to operate the data cache (624) to: Identifying an entry contained in the header (101) and not in the tail (103), the entry documenting access to the data item stored in the data cache; and Removing the entry from the header (101). [21] The computer program product of claim 20, wherein the processor set is further caused to operate the data cache (624) to: Determining that the entry contained in the header part (101) is not contained in the tail part (103); in response to determining that the entry included in the header (101) is not included in the tail (103), executing at least one cache management iteration of the plurality of cache management iterations.

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