Chopper-modulated instrumentation amplifier with offset voltage elimination circuit

Abstract

The present invention discloses a chopper-modulated instrumentation amplifier with an offset voltage elimination circuit, comprising a first chopper, a second chopper, a chopper operational amplifier, input capacitors C1 and C2, feedback capacitors C3 and C4, an offset voltage detector, and an offset voltage eliminator. The offset voltage detector includes a fourth chopper, a low-pass filter, single-pole double-throw switches SW1, SW2, SW3, SW4, and capacitors C7 and C8. The offset voltage eliminator includes two current source tubes that eliminate the offset voltage in a transconductance circuit of the first stage of the chopper operational amplifier.The chopper-modulated instrumentation amplifier with an offset voltage elimination circuit of the present invention utilizes the existing two-stage transconductance of the chopper operational amplifier to achieve amplification, detection, and elimination of the offset voltage with low additional power consumption and low noise influence of the main circuit, while the low-pass filter in the offset voltage detector uses a duty cycle resistor with high accuracy and a small area.

Description

Technical FieldThe present invention relates to an instrumentation amplifier, in particular a chopper-modulated instrumentation amplifier having an offset voltage elimination circuit.Background ArtChopper-modulated instrumentation amplifier using a chopper to achieve modulating the input signal so that the low frequency of the input signal can be extended to DC and the chopper reduces flicker noise in the operational amplifier is often used in DC measurement, AC measurement and other high precision sensors. The main disadvantage of the chopper modulated instrumentation amplifier is that the offset voltage represents a large amplitude signal at the output of the amplifier at the same frequency as the chopper clock and the dynamic range of the amplifier is seriously affected if the offset voltage is not separately treated.Content of the InventionThe object of the invention: The technical object to be achieved by the present invention is to provide a novel chopper-modulated instrumentation amplifier with an offset voltage elimination circuit with respect to an offset voltage of a chopper-modulated instrumentation amplifier.In order to achieve the above objects, the following technical solutions are used in the present invention:The present invention discloses a chopper modulated instrumentation amplifier having an offset voltage eliminating circuit comprising a first chopper, a second chopper, a chopper operational amplifier, input capacitors C1 and C2, feedback capacitors C3 and C4, an offset voltage detector, and an offset voltage eliminator. The chopper operational amplifier includes a first stage transconductance circuit Gm1, a third chopper, a second stage transconductance circuit Gm2, and Miller compensated capacitors C5 and C6. Positive and negative ends of the input signals are connected to positive and negative inputs, respectively, of the first chopper, and positive and negative outputs of the first chopper are connected to one end of the capacitor C1 and one end of the capacitor C2, respectively, the other end of the capacitor C1 and the other end of the capacitor C2 are connected to the negative input and the positive input, respectively, of the first-stage transconductance circuit Gm1, the positive output and the negative output of the first-stage transconductance circuit Gm1 are connected to the positive input and the negative input of the third chopper, the positive output and the negative output of the third chopper are connected to the negative input and the positive input, respectively, of the second-stage transconductance circuit Gm2, the two ends of the capacitor C5 are connected to the positive output and the negative input of the second-stage transconductance circuit Gm2, respectively, and the two ends of the capacitor C6 are connected to the negative output and the positive input of the second-stage transconductance circuit Gm2, respectively. The positive output and the negative output of the second-stage transconductance circuit Gm2 are connected to the positive input and the negative input of the second chopper, respectively, the positive output and the negative output of the second chopper are connected to one end of the capacitor C3 and one end of the capacitor C4, respectively, and the other end of the capacitor C3 and the other end of the capacitor C4 are connected to the positive input and the negative input of the first-stage transconductance circuit Gm1. The positive output and the negative output of the second-stage transconductance circuit Gm2 are connected to the positive input and the negative input of the offset voltage detection circuit, respectively, and the positive output and the negative output of the offset voltage detector are connected to the positive input and the negative input of the offset voltage eliminator, respectively, and the offset voltage eliminator generates a direct current based on the result of the offset voltage detector to compensate for the offset current of the first-stage transconductance circuit.According to a preferred embodiment of the present invention, the chopper operational amplifier consists of two-stage transconductance comprising PMOS tubes M1, M2, M3, M4, M5, M6, M7, M12, M13, NMOS tubes M8, M9, M10, M11, M14, M15, capacitors C5 and C6, and a third chopper CH3. The positive input and the negative input are connected to the gate of M2 and the gate of M3, respectively, the source of M2 and the source of M3 are connected to the drain of M1, the source of M1 is connected to the supply voltage VDD, and the gate of M1 is connected to the voltage VP1. The drain of M2 and the drain of M3 are connected to the source of M8 and the source of M9, respectively, and the gate of M8 and the gate of M9 are connected to the voltage VN2, the source of M8 and the source of M9 are connected to the drain of M10 and the drain of M11, respectively, the gate of M10 and the gate of M11 are connected to the voltage VN1, and the source of M10 and the source of M11 are grounded. The drain of M8 and the drain of M9 are connected to the drain of M6 and the drain of M7, respectively. The gate of M6 and the gate of M7 are connected to the voltage VP3, and the source of M6 and the source of M7 are connected to the drain of M4 and the drain of M5, respectively. The gate of M4 and the gate of M5 are connected to the voltage VP2, and the source of M4 and the source of M5 are connected to the supply voltage VDD. The drain of M 6 and the drain of M 7 are connected to the positive input and the negative input of the third chopper, the positive output and the negative output of the third chopper are connected to the gate of M 12 and the gate of M 13, respectively, the drain of M 12 and the drain of M 13 are connected to the drain of M 14 and the drain of M 15, respectively, the both ends of the capacitor C 5 are connected to the gate of M 12 and the drain of M 12, respectively, the both ends of the capacitor C 6 are connected to the gate of M 13 and the drain of M 13, respectively, and the drain of M 12 and the drain of M 13 are the positive and the negative output, respectively.The offset voltage detector of the present invention includes a fourth chopper, a low pass filter, four single pole double throw switches SW1, SW2, SW3, SW4, and capacitors C7 and C8. The positive output and the negative output of the output signal of the amplifier are connected to the positive input and the negative input of the fourth chopper, respectively, the positive output and the negative output of the fourth chopper are connected to the positive input and the negative input of the low pass filter, respectively, the positive output of the low pass filter is connected to a fixed end of the single pole double throw switch SW 1 and a fixed end of the single pole double throw switch SW 3, respectively, and the other fixed end of the SW 1 and the other fixed end of the SW 3 are connected to the voltage VP 3 and the voltage VP 2, respectively. The negative output of the low pass filter is connected to one stationary end of the single pole double throw switches SW2 and one stationary end of the single pole double throw switches SW4, respectively, and the other stationary end of SW2 and the other stationary end of the SW4 are connected to the voltage VP2 and the voltage VP4, respectively. The both ends of the capacitor C 7 are connected to the movable ends of SW 1 and SW 2, respectively, and the both ends of the capacitor C 8 are connected to the movable ends of SW 3 and SW 4, respectively.According to a preferred embodiment of the present invention, the low pass filter may include a duty cycle resistor and a capacitor including resistors R 1, R 2, changeover switches SW 5, SW 6, and a capacitor C 9. A positive input and a negative input of the filter are connected to one end of the resistor R 1 and one end of the resistor R 2, respectively, and the other end of the resistor R 1 and the other end of the resistor R 2 are connected to one end of the changeover switch SW 5 and one end of the changeover switch SW 6, respectively. The other end of the changeover switch SW 5 is connected to one end of the capacitor C 9 and serves as a positive output of the filter, and the other end of the changeover switch SW 6 is connected to another end of the capacitor C 9 and serves as a negative output of the filter. The control signal of the changeover switches SW 5 and SW 6 is f SW, a periodic signal having a duty ratio of 1 / N and the same frequency as the chopper clock, i.e., the duty ratio per cycle of the changeover switch is Ton=1 / (N*f SW). The equivalent resistances of this duty cycle resistor are N*R1 and N*R2.The offset voltage eliminator of the present invention includes PMOS tubes M16 and M17, the source of M16 and the source of M17 are connected to the power supply voltage VDD, the drain of M16 is connected to the drain of M4 in the operational amplifier, the drain of M17 is connected to the drain of M5 in the operational amplifier, the gate of M16 is connected to the voltage VP3, and the gate of M17 is connected to the voltage VP4. When an offset voltage is present in the output signal of the amplifier, the offset voltage detection circuit extracts the offset voltage as a DC voltage and stores it in the capacitors C7 and C8 having opposite polarity. M16 and M17 may be made up of a portion of the original M4 and M5, where the gate voltage of M16 is the voltage VP2plus the output offset voltage of the amplifier and the gate voltage of M17 is the voltage VP2 minus the output offset voltage of the amplifier.Advantageous effect: This eliminates the offset voltage, at the same time the power consumption and smoke of the original circuit are little affected, the circuit structure is simple and easy to implement, the space requirement is small and the cost is low.Explanation with DrawingsThe advantages of the above and / or other aspects of the present invention will become more apparent as the invention is described in more detail below in conjunction with the accompanying drawings and specific embodiments. FIG. 1 shows a chopper-modulated instrumentation amplifier with an offset voltage elimination circuit of the present invention. FIG. 2 shows a chopper operational amplifier with an offset voltage eliminator of the present invention. Fig. 3 shows an offset voltage detector of the present invention. Fig. 4 shows a low pass filter consisting of a duty cycle resistor of the present invention.EmbodimentsThe present invention discloses a chopper modulated instrumentation amplifier having an offset voltage eliminating circuit comprising a first chopper, a second chopper, a chopper operational amplifier, input capacitors C1 and C2, feedback capacitors C3 and C4, an offset voltage detector, and an offset voltage eliminator. The chopper operational amplifier includes a first stage transconductance circuit Gm1, a third chopper, a second stage transconductance circuit Gm2, and Miller compensation capacitors C5 and C6.In a particular embodiment, the chopper modulated instrumentation amplifier including an offset voltage elimination circuit is shown in FIG. 1, wherein the positive end and the negative end of the input signal are connected to the positive input and the negative input of the first chopper, respectively, the positive output and the negative output of the first chopper are connected to one end of the capacitor C 1 and one end of the capacitor C 2, respectively, and the other end of the capacitor C 1 and the other end of the capacitor C 2 are connected to the negative input and the positive input of the first stage transconductance circuit Gm 1, respectively, the positive output and the negative output of the first stage transconductance circuit Gm 1 are connected to the positive input and the negative input of the third chopper, respectively, the positive output and the negative output of the third chopper are connected to the negative input and the positive input of the second-stage transconductance circuit Gm2, respectively, the two ends of the capacitor C5 are connected to the positive output and the negative input of the second-stage transconductance circuit Gm2, respectively, and the two ends of the capacitor C6 are connected to the positive output and the negative input of the second-stage transconductance circuit Gm2, respectively. The positive output and the negative output of the second-stage transconductance circuit Gm2 are connected to the positive input and the negative input of the second chopper, the positive output and the negative output of the second chopper are connected to one end of the capacitor C3 and one end of the capacitor C4, respectively, and the other end of the capacitor C3 and the other end of the capacitor C4 are connected to the positive input and the negative input of the first-stage transconductance circuit Gm1, respectively. The positive output and the negative output of the second-stage transconductance circuit Gm2 are connected to the positive input and the negative input of the offset voltage detection circuit, respectively, and the positive output and the negative output of the offset voltage detector are connected to the positive input and the negative input of the offset voltage eliminator, respectively, and the offset voltage eliminator generates a direct current based on the result of the offset voltage detector to compensate for the offset current of the first-stage transconductance circuit.In a concrete preferred embodiment of the present invention, the chopper operational amplifier with an offset voltage eliminator is shown in Fig. 2 and consists of two stages of transconductances including PMOS tubes M1, M2, M3, M4, M5, M6, M7, M12, M13, NMOS tubes M8, M9, M10, M11, M14, M15, capacitors C5, C6 and a third chopper CH3. The positive input and the negative input are respectively connected to the gate of M 3 and the gate of M 2, both the source of M 2 and the source of M 3 are connected to the drain of M 1, the source of M 1 is connected to the supply voltage VDD, and the gate of M 1 is connected to the voltage VP 1. The drain of M2 and the drain of M3 are connected to the source of M8 and the source of M9, respectively, both the gate of M8 and the gate of M9 are connected to the voltage VN2, the source of M8 and the source of M9 are connected to the drain of M10 and the drain of M11, respectively, the gate of M10 and the gate of M11 are connected to the voltage VN1, and the source of M10 and the source of M11 are grounded. The drain of M8 and the drain of M9 are connected to the drain of M6 and the drain of M7, respectively. The gate of M6 and the gate of M7 are connected to the voltage VP3, and the source of M6 and the source of M7 are connected to the drain of M4 and the drain of M5, respectively. The gate of M4 and the gate of M5 are connected to the voltage VP2, and the source of M4 and the source of M5 are connected to the supply voltage VDD. The drain of M 6 and the drain of M 7 are connected to the positive input and the negative input of the third chopper, the positive output and the negative output of the third chopper are connected to the gate of M 12 and the gate of M 13, respectively, the drain of M 12 and the drain of M 13 are connected to the drain of M 14 and the drain of M 15, respectively, the both ends of the capacitor C 5 are connected to the gate of M 12 and the drain of M 12, respectively, the both ends of the capacitor C 6 are connected to the gate of M 13 and the drain of M 13, respectively, and the drain of M 12 and the drain of M 13 are the positive output and the negative output, respectively.In a specific embodiment, the offset voltage detector illustrated in FIG. 3 comprises a fourth chopper, a low-pass filter, four single-pole changeover switches SW 1, SW 2, SW 3, SW 4 and capacitors C 7 and C 8. The positive output and the negative output of the output signal of the amplifier are connected to the positive input and the negative input of the fourth chopper, respectively, the positive output and the negative output of the fourth chopper are connected to the positive input and the negative input of the low pass filter, respectively, the positive output of the low pass filter is connected to a stationary end of the single pole double throw switch SW 1 and a stationary end of the single pole double throw switch SW 3, respectively, and the other stationary end of SW 1 and the other stationary end of SW 3 are connected to the voltage VP 3 and the voltage VP 2, respectively. The negative output of the low pass filter is connected to a fixed end of the single pole double throw switch SW2 and a fixed end of the single pole double throw switch SW4, respectively, and the other fixed end of SW2 and the other fixed end of SW4 are connected to the voltages VP2 and VP4, respectively. The two ends of the capacitor C 7 are respectively connected to a movable end of SW 1 and a movable end of SW 2, and the two ends of the capacitor C 8 are respectively connected to a movable end of SW 3 and a movable end of SW 4. Φ1and Φ2are respectively the high-level phase and the low-level phase of the chopper clock signal, wherein in the Φ1phase, the capacitor C7is respectively connected to the positive output and the negative output of the low-pass filter to sample the DC offset voltage output from the low-pass filter; in the Φ2phase, the capacitor C7is connected between VP3and VP2to feed the offset voltage back to the first-stage transconductance circuit Gm1via M16. In the φ2phase, the capacitor C8is connected to the positive output and the negative output of the low pass filter in order to sample the DC offset voltage output by the low pass filter; in the φ1phase, the capacitor C8is connected between VP4and VP2in order to feed back the offset voltage via M17into the transconductance circuit of the first stage Gm1.When an offset voltage is present in the output signal of the amplifier, the offset voltage detection circuit extracts the offset voltage as a DC voltage and simultaneously stores it in the capacitors C7 and C8 having opposite polarity. Since the leakage of the capacitors is very small, the offset voltage detector can be intermittently operated, and the capacitors C7 and C8 are connected to the offset voltage eliminator during the operation suspension to further reduce the power consumption.In a concrete preferred embodiment of the present invention, as shown in FIG. 4, the low pass filter comprises a duty cycle resistor and a capacitor including resistors R1 and R2, changeover switches SW5 and SW6, and a capacitor C9. A positive input and a negative input of the filter are connected to one end of the resistor R 1 and one end of the resistor R 2, respectively, and the other end of the resistor R 1 and the other end of the resistor R 2 are connected to one end of the changeover switch SW 5 and one end of the changeover switch SW 6, respectively. The other end of the changeover switch SW5 is connected to one end of the capacitor C9 and serves as a positive output of the filter; the other end of the changeover switch SW6 is connected to the other end of the capacitor C9 and serves as a negative output of the filter. The control signal of the changeover switches SW 5 and SW 6 is f SW, a periodic signal having a duty ratio of 1 / N and the same frequency as the chopper clock, i.e., the duty ratio per cycle of the changeover switches is Ton=1 / (N*f SW). The equivalent resistance of this duty ratio resistor is N*R1 and N*R2, which means that the resistance value is increased N times, and it has high accuracy and saves chip area.In a specific embodiment, the offset voltage eliminator is comprised of PMOS tubes M16 and M17, the source of M16 and the source of M17 are connected to the supply voltage VDD, respectively, the drain of M16 is connected to the drain of M4 in the operational amplifier, the drain of M17 is connected to the drain of M5 in the operational amplifier, the gate of M16 is connected to the voltage VP3, and the gate of M17 is connected to the voltage VP4. In the actual construction, M16 and M17 may be divided from the original M4 and M5, where the gate voltage of M16 is the voltage VP2 plus the output offset voltage of the amplifier, and the gate voltage of M17 is the voltage VP2 minus the output offset voltage of the amplifier. In this way, the offset voltage is eliminated without changing the power consumption of the original circuit.The present invention provides an idea and method for a chopper-modulated instrumentation amplifier having an offset voltage eliminating circuit, and there are many ways to concretely realize the technical solution, and the above description is only a preferred embodiment of the present invention, and it should be noted that a number of improvements and configurations can be made for a person of ordinary skill in the art without departing from the principles of the present invention, and these improvements and configurations should also be considered as the scope of the present invention. The components not mentioned in this embodiment can be realized by the existing technology.

Claims

A chopper-modulated instrumentation amplifier having an offset voltage eliminating circuit, characterized in that it includes a first chopper, a second chopper, a chopper operational amplifier, input capacitors C1 and C2, feedback capacitors C3 and C4, an off-voltage detector, and an off-voltage eliminator.The chopper modulated instrumentation amplifier with an offset voltage eliminating circuit according to claim 1, characterized in that the off-voltage detector comprises a fourth chopper, a low pass filter, single pole double throw switches SW1, SW2, SW3, SW4 and capacitors C7, C8, the off-voltage eliminator consisting of two current source tubes and eliminating offset voltage in a transconductance circuit of the first stage of the chopper operational amplifier.A chopper modulated instrumentation amplifier with an offset voltage elimination circuit according to claim 2, wherein the offset voltage elimination circuit is characterized in that the amplifying, detecting and eliminating of the offset voltage is achieved by using the two-stage transconductance already present in the chopper operational amplifier, which has a low additional current consumption and a low noise influence on the main circuit.The chopper-modulated instrumentation amplifier with an offset voltage eliminating circuit according to claim 3, wherein the off-voltage detecting circuit is characterized in that the offset voltage is stored in the capacitors C7 and C8 having a small leak so that the offset voltage detector can be intermittently operated, and during the operation suspension, the capacitors C7 and C8 are connected to the offset voltage eliminator to further reduce the power consumption.The chopper-modulated instrumentation amplifier with an offset voltage eliminating circuit according to claim 3, wherein the offset voltage eliminator is characterized in that PMOS tubes M16 and M17 can be fabricated by dividing a part of the current source tubes M4 and M5 originally derived from a first-stage transconductance resistor, so that the offset voltage can be eliminated without increasing the power consumption.The chopper-modulated instrumentation amplifier with an offset voltage eliminating circuit according to claim 3, wherein the off-voltage detecting circuit is characterized in that the low-pass filter therein uses a duty cycle resistor with high accuracy and small area.

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